全桥移相软开关(好)

ZVZCS移相全桥软开关工作原理整个系统由控制电路、功率电路和传感器等组成。

控制电路负责监测输入和输出电压，根据设定的电压值及输入电流来调整开关的工作状态。

功率电路则负责将输入的交流电源通过变换装置转换为需要的输出电压。

在正常工作状态下，当控制电路接收到输入电压的反馈信号，它会产生一个控制信号，用于控制开关器件的状态。

这些开关器件通常采用汽车电源模块（IGBTS）或金属氧化物半导体场效应管（MOSFETS）等。

在移相全桥逆变器中，开关器件通常以两种状态工作：导通和截止。

在导通状态下，开关器件允许交流电流通过，从而使逆变器的输出与输入电源同相。

在截止状态下，开关器件将输出与输入电源分离，并阻断电流流动。

在移相全桥软开关的工作过程中，通过调整控制信号的相位和幅值，使得逆变器的输出电压能够达到所需的目标。

在每个周期的不同时间点，开关器件都会在导通和截止状态之间进行切换，从而实现输入电压的调节和变换。

1.相位调整：通过改变控制信号的相位来控制开关器件的工作状态。

当输入和输出电压相位相同时，开关器件处于导通状态；当输入和输出电压相位相反时，开关器件处于截止状态。

通过相位调整，可以实现输入电压的调节和变换。

2.软开关控制：在开关器件的导通和截止状态转换过程中，通过合理设计控制信号的波形和幅值，使得开关器件在导通和截止状态之间平滑切换，从而减少开关过程中的损耗和干扰。

3.双向开关：移相全桥逆变器中的开关器件是双向的，既可以流通正向电流，也可以流通反向电流。

这种双向开关的特性使得逆变器可以实现输入电压的变换，同时也可以回馈电压到电源端。

总体而言，ZVZCS移相全桥软开关通过控制开关器件的导通和截止状态，以及调整开关器件的相位和幅值，实现输入电压的调节和变换。

它具有高效率、快速响应、可靠性高等优点，可广泛应用于交流电源的电压调节和变换等领域。

全桥移相开关电源原理一、引言全桥移相开关电源是一种常用的电源转换电路，广泛应用于各类电子设备中。

本文将深入探讨全桥移相开关电源的原理，包括其基本结构和工作原理，并对其优缺点进行分析。

二、全桥移相开关电源的基本结构全桥移相开关电源由四个开关管和一个变压器组成。

其中，变压器是核心部件，用于将输入电压转换为所需的输出电压。

四个开关管用来控制输入电压的导通和断开，实现对输出的调节。

三、全桥移相开关电源的工作原理1.工作原理概述全桥移相开关电源工作原理主要包括以下几个步骤： - 步骤1：输入电压通过变压器经过变压转换，得到所需的输出电压。

- 步骤2：四个开关管按照一定的规律进行开关动作，控制电压的导通和断开。

- 步骤3：通过控制开关管的开关时间，实现输出电压的调节。

2.步骤详解步骤1：输入电压转换输入电压经过变压器的变压转换，得到所需的输出电压。

变压器中的绕组通过磁场耦合，实现电压的传递和转换。

步骤2：开关管控制四个开关管按照一定的规律进行开关动作，实现对输入电压的导通和断开。

具体的开关管控制方式有多种，包括单稳态控制、正弦控制和方波控制等。

步骤3：输出电压调节通过控制开关管的开关时间，可以实现对输出电压的调节。

通常情况下，开关管的开关时间越短，输出电压越小；开关时间越长，输出电压越大。

四、全桥移相开关电源的优缺点1.优点•高效率：全桥移相开关电源具有较高的能量转换效率，能够充分利用输入电能，减少能量的损耗；•输出稳定：通过控制开关管的开关时间，可以实现对输出电压的精确调节，保持输出电压的稳定性；•体积小：全桥移相开关电源采用高频开关技术，可以大大减小变压器的体积，适用于体积要求较小的场合。

2.缺点•噪声干扰：由于开关管的开关动作产生的高频电磁干扰，可能对周围的其他电子设备产生干扰；•复杂控制：全桥移相开关电源的控制较为复杂，需要对开关管进行精确控制，对控制电路的设计和调试要求较高。

五、总结全桥移相开关电源是一种常用的电源转换电路，具有高效率、输出稳定和体积小的优点，但也存在噪声干扰和复杂控制的缺点。

电镀用移相全桥软开关的电路讲解
由于行业的特殊性，用于电镀的电源较普通电源有着明显不同，电镀电源需要较高的电流输出，而对输出电压则要求较低。

电镀电源的电流要求在几千瓦到几十千瓦不等，这种比较大功率的电镀电源大多采用晶闸管相控整流方式。

 此篇文章将为大家介绍一种电镀用开关电源，其输出电压从0~12V、电流从0~5000A 连续可调，满载输出功率为60kW。

采用了ZVT软开关等技术，同时采用了较好的散热结构。

 主电路拓扑结构
 考虑到对大电流输出的需要，在主电路的高频逆变部分，本设计选用了IGBT作为功率开关器件的全桥拓扑结构。

整个主电路如图1 所示，包括：工频三相交流电输入、二极管整流桥、EMI 滤波器、滤波电感电容、高频全桥逆变器、高频变压器、输出整流环节、输出LC 滤波器等。

 为了防止偏磁，电路中包含了隔直电容Cb，用它来对变压器的伏秒值进行平衡。

考虑到效率的问题，谐振电感LS 只利用了变压器本身的漏感。

因为如果该电感太大，将会导致过高的关断电压尖峰，这对开关管极为不利，同时也会增大关断损耗。

另一方面，还会造成严重的占空比丢失，引起开关器件的电流峰值增高，使得系统的性能降低。

 图1 主电路原理图
 零电压软开关
 高频全桥逆变器的控制方式为移相FB2ZVS控制方式，控制芯片采用Unitrode 公司生产的UC3875N。

超前桥臂在全负载范围内实现了零电压软开。

第18卷第4期2008年7月黑龙江科技学院学报Journa l o fH e ilongjiang I nstitute o f Science&TechnologyV o.l18N o.4Ju l y2008文章编号:1671-0118(2008)04-0302-04Z VS全桥移相软开关电源李春华,胡红林,王艳超(黑龙江科技学院电气与信息工程学院,哈尔滨150027)摘要:为了克服硬开关电源尖峰干扰大、可靠性差、效率低的缺点,分析了全桥移相软开关电路超前臂和滞后臂的不同工作状态,讨论了全桥移相软开关电路的占空比丢失现象,对软开关谐振器超前臂、滞后臂的并联电容和串联电感参数进行选取。

通过试制4k W全桥移相ZVS软开关电源,获得了变压器前端电压和电流波形。

结果表明:开关管实现了零电压变换,验证了谐振电感和谐振电容参数选取的正确性。

关键词:全桥移相;软开关;谐振中图分类号:TM46文献标识码:AFul-l bri dge phase-shifting ZVS power sourceLI Chunhua,HU H ong lin,WANG Yanchao(Co llege of E l ectr i cal and Infor mati on Eng i neeri ng,He ilong ji ang Institute of Science&T echno l ogy,H arbi n150027,China)Abst ract:D irected a t overco m ing the hard-sw itch i n g po w er supply.s shortco m ings,such as grea t peak i n terference,poor re liability,and l o w efficiency,this paper analyses the different states about the leadi n g ar m and t h e lagg i n g ar m o f t h e fu l-l bri d ge phase-sh ifting sof-t s w itching c ircu it and d i s cusses the duty factor l o ss of f u l-l bri d ge phase-sh ifting so f-t s w itch i n g c ircu i.t The paper a lso g ives the choice of the para m eter of the parallel capacitance and series i n ductance in t h e sof-t sw itch i n g resonator.s lead i n g ar m and lagg i n g ar m.The developm ent o f4k W Z VS fu l-l bri d ge phase-sh ift so f-t sw itch i n g po w er supp li e s m akes possi b le the w ave for m s of t h e front voltage and curren t co m ing fro m the transfor m ers.The results sho w that the s w itch i n g tube g i v es the possibility of zero-vo ltage transfor m ati o n,wh ich proves the co rrect cho ice of t h e para m e ters o f the i n ductor and resonant capacito r in the resonator.K ey w ords:f u l-l bri d ge phase-sh ifting;so f-t s w itching;resonance收稿日期:2008-05-26作者简介:李春华(1959-),女,黑龙江省尚志人,教授,硕士,研究方向:自动控制及智能控制,E-m ai:l lch-ysx@f126.co m。

移相全桥为主电路的软开关电源设计详解2014-09-11 11:10 来源：电源网作者：铃铛移相全桥变换器可以大大减少功率管的开关电压、电流应力和尖刺干扰，降低损耗，提高开关频率。

如何以UC3875为核心，设计一款基于PWM软开关模式的开关电源?请见下文详解。

主电路分析这款软开关电源采用了全桥变换器结构，使用MOSFET作为开关管来使用，参数为1000V/24A。

采用移相ZVZCSPWM控制，即超前臂开关管实现ZVS、滞后臂开关管实现ZCS。

电路结构简图如图1，VT1~VT4是全桥变换器的四只MOSFET开关管，VD1、VD2分别是超前臂开关管VT1、VT2的反并超快恢复二极管，C1、C2分别是为了实现VTl、VT2的ZVS设置的高频电容，VD3、VD4是反向电流阻断二极管，用来实现滞后臂VT3、VT4的ZCS，Llk为变压器漏感，Cb为阻断电容，T 为主变压器，副边由VD5~VD8构成的高频整流电路以及Lf、C3、C4等滤波器件组成。

图1 1.2kw软开关直流电源电路结构简图其基本工作原理如下：当开关管VT1、VT4或VT2、VT3同时导通时，电路工作情况与全桥变换器的硬开关工作模式情况一样，主变压器原边向负载提供能量。

通过移相控制，在关断VT1时并不马上关断VT4，而是根据输出反馈信号决定移相角，经过一定时间后再关断VT4，在关断VT1之前，由于VT1导通，其并联电容C1上电压等于VT1的导通压降，理想状况下其值为零，当关断VT1时刻，C1开始充电，由于电容电压不能突变，因此，VT1即是零电压关断。

由于变压器漏感L1k以及副边整流滤波电感的作用，VT1关断后，原边电流不能突变，继续给Cb充电，同时C2也通过原边放电，当C2电压降到零后，VD2自然导通，这时开通VT2，则VT2即是零电压开通。

当C1充满电、C2放电完毕后，由于VD2是导通的，此时加在变压器原边绕组和漏感上的电压为阻断电容Cb两端电压，原边电流开始减小，但继续给Cb 充电，直到原边电流为零，这时由于VD4的阻断作用，电容Cb不能通过VT2、VT4、VD4进行放电，Cb两端电压维持不变，这时流过VT4电流为零，关断VT4即是零电流关断。

引言随着计算机与通信技术的飞速发展，作为配套设备的开关电源也获得了长足进步，并随着新器件、新理论、新电磁材料和变换技术以及各种辅助设计分析软件的不断问世，开关电源的性能不断提高。

本文介绍一种新型的高频DC/DC开关变换器，并成功地应用在军用充电机上。

DC/DC变换器主电路改进型移相全桥ZVS DC/DC变换器主电路结构和各点波形对照如图1、图2所示。

由于电路工作状态在一个周期内可以分为两个完全一样的过程，所以以下仅仅分析半个周期的情况，而这半个周期又可分为以下三种开关模态。

● 开关模态1，t0<t<t1，其中t1=DT s/2此时Q1和Q4同时导通，变压器副边电感L1和整流管D S2导通，原边能量向负载端传递。

此模态的等效电路见图3。

其中，a为变压器变比，V in是直流母线电压，I1和I2分别是电感L1和L2电流(L1=L2=LS)，此时有等式（1）成立。

(1)(2)I p(t)=aI1(t)(3)当Q4关断时该模态过程结束。

● 开关模态2，t1<t<t2，其中t2≤T s/2在t1时刻关断Q4，此时副边电感L1中储存的能量给Q4电容(或并联电容)充电，同时将Q3两端电容电荷放掉。

为了实现软开关，Q4关断和Q3开通之间至少要存在一死区时间Δt1，使得在Q3开通前D3首先导通，且有下式成立。

I p1Δt1=2C eff V in(4)其中C eff是开关管漏源两端等效电容，I P1为t1时刻变压器原边流过电流。

当D3导通后，变压器副边两个二极管D S1和D S2同时导通，电路工作在续流状态。

此时等效电路如图4所示。

此时有如下电路方程成立。

(5)(6)(7)(8)r t=r mosfet+r xfmr (9)其中D为脉冲占空比，f S为电路工作频率，L’ik为主边变压器漏感(或与外接电感的串联值)，rt是变压器原边等效电阻，τ是原边等效电流衰减时间常数，Vfp是反并联二极管导通压降。

移相谐振全桥软开关控制器UCC38951、引言UCC3895是美国德州仪器公司生产的移相谐振全桥软开关控制器，该系列控制器采用了先进的BCDMOS技术。

UCC3895在基本功能上与UC3875系列和UC3879系列控制器完全相同，同时增加了一些新的功能。

下面对其特点、引脚功能、电气参数、工作原理分别进行介绍。

2、特点和引脚说明2.1 特点（1）输出导通延迟时间编程可控；（2）自适应延迟时间设置功能；（3）双向振荡器同步功能；（4）电压模式控制或电流模式控制；（5）软启动/软关机和控制器片选功能编程可控，单引脚控制；（6）占空比控制范围0％～100％；（7）内置7MHz误差放大器；（8）最高工作频率达到1MHz；（9）工作电流低，500KHz下的工作电流仅为5mA；（10）欠压锁定状态下的电流仅为150μA。

2.2 引脚说明UCC3895和UCC2895移相谐振全桥软开关控制器采用SOIC-20、PDIP-20、TSSOP-20和PLCC-20四种封装形式，UCC1895采用CDIP-20和CLCC-20两种封装形式。

下面以PDIP-20为例进行介绍，其引脚排列如图1所示。

UCC3895系列移相谐振控制器采的引脚功能简介如下：•EAN（引脚1）：误差放大器反相输入端。

•EAOUT（引脚2）：误差放大器输出端。

在控制器内部，该端分别与PWM比较器和空载比较器的非反相输入端相连，并箝位于软启动电压。

当该端上的电压低于500mV时，控制器的输出级将被空载比较器关断。

当该端上的电压升至600mV时，输出级重新开通。

•RAMP（引脚3）：PWM比较器的非反相输入端。

在电压模式或平均电流模式下，该端接CT（引脚7）上的锯齿波信号；而在峰值电流模式下，该端接电流信号。

RAMP内接放电晶体管，该晶体管在振荡器死区时间内触发。

•REF（引脚4）：精密5V基准电压输出端。

控制器内部的基准电源一方面为控制器内部的电路供电，另一方面还能够向外接负载提供5mA的偏置电流。

Optimum Design Consideration and Implementation of a Novel Synchronous Rectified Soft-Switched Phase-Shift Full-Bridge Converter for Low-Output-V oltage High-Output-Current Applications Chen Zhao,Xinke Wu,Peipei Meng,and Zhaoming Qian,Senior Member,IEEEAbstract—Optimum design consideration and implementation of a novel synchronous rectified soft-switched phase-shift full-bridge dc/dc converter with a primary-side energy storage inductor for server adapter application is presented in this paper.By em-ploying a primary-side energy storage inductor,the main switches can achieve a soft-switching condition,and there is little reverse recovery loss in the body diodes of a secondary-side rectifier due to relatively slow downslope of the triangular current.Since the out-put capacitivefilter reduces the voltage stress across the rectifiers, the synchronous rectifier with a lower breakdown voltage rate can be utilized to improve the conversion efficiency dramatically.Thus, this converter can obtain relatively high conversion efficiency for some medium-power applications with low output voltage and high output current,such as the server adapter.Several key optimum design considerations of this converter are also presented in detail in this paper.Finally,a100-kHz,300-W(12V/25A)laboratory-made prototype for a given server adapter application is built up based on the proposed optimum design procedure of this converter to verify all the theoretical analysis and evaluations.Index Terms—Inductor,phase-shift full bridge(PSFB),soft switched,synchronous rectifier(SR).I.I NTRODUCTIONF OR MEDIUM-POWER applications,the conventionalphase-shift full-bridge(PSFB)dc/dc converter has drawn more attention in recent decades due to its advantages:high con-version efficiency,high power density,and low electromagnetic interference(EMI).Many literatures have already analyzed its operation principle and design considerations in detail[1]–[4]. It is well known that zero-voltage switching(ZVS)condi-tion can decrease the switching loss dramatically especially for MOSFETs.For a conventional PSFB dc/dc converter,the energy stored in the outputfilter inductor is sufficient to help the leading leg switches achieve relative wide ZVS range even under light-load condition.But ZVS for the lagging leg switches could not be achieved easily since the energy stored in the leakage inductance of the transformer is always insufficient especiallyManuscript received April29,2008;revised August3,2008.Current version published February6,2009.This work was supported by Astec Hong Kong Cor-poration.This paper was presented in part at the Proceedings of IEEE Applied Power Electronics Conference and Exposition2008,Austin,TX,pp.581–586. Recommended for publication by Associate Editor J.Shen.The authors are with the College of Electrical Engineering,Zhejiang Uni-versity,Hangzhou310027,China(e-mail:chanezhao@;wuxinke@ ;cathleen@;qian@).Digital Object Identifier10.1109/TPEL.2008.2005269under light-load condition.By increasing the leakage induc-tance and/or adding a properly sized external serially connected inductor might extend ZVS range for the lagging leg switches, but the excessive energy will be stored at full load to produce large circulation currents,which increases the current stresses of semiconductor components and also the primary-side conduc-tion loss.Moreover,some other problems are brought in,such as large duty cycle loss,high voltage spikes on the secondary-side rectifiers,etc.Specially,high voltage spike increases the voltage stress across the rectifiers,which means that the rectifier with higher breakdown voltage rate has to be utilized,and this in-creases the conduction loss further.Therefore,many techniques and improvements[5]–[18]were proposed to overcome these major issues for conventional PSFB dc/dc converters.When the conventional PSFB dc/dc converter is utilized as a front-end dc/dc converter in medium-power applications with low output voltage and high output current,such as for a two-stage server adapter,the conduction loss at the secondary side mainly caused by the rectifiers and thefilter inductor becomes the major bottleneck for optimum design to obtain high conver-sion effiually for the conventional PSFB dc/dc con-verter with secondary-side center-taped rectifier configuration, the voltage stress across the rectifier can be expressed easily as a function of the duty cycle D,as shown in(1),where the duty cycle loss is neglectedV REC=2V OUTD(1) where V REC is the voltage across the rectifier and V OUT is the output voltage.Since the requirement of holdup time is always an important consideration for the adapter design,the front-end dc/dc converter is necessary to befit for the relatively wide input voltage range.Thus,V REC would be much higher than twice the output voltage V OUT when the converter is operated with the high side of the input voltage range.Thus,the rectifier with higher breakdown voltage rate has to be used,and it brings in relatively higher conduction loss.Different from the topology of the conventional PSFB dc/dc converter,a new circuit was proposed in[19]that shapes the current to be triangular by employing an external energy stor-age inductor in series at the primary side,and substituting an output capacitivefilter for the traditional output inductivefilter. In this way,the primary-side energy storage inductor can help the main switches achieve the soft-switching conditions easily.0885-8993/$25.00©2009IEEEThe reverse recovery loss in the diode rectifiers or the body diodes of the synchronous rectifier(SR)can be reduced a lot due to the relatively slow downslope of the triangular current.The voltage stress across the rectifiers can be reduced and clamped by the output voltage directly.Thus,the rectifier with a lower breakdown voltage rate can be used to reduce the secondary-side conduction loss.Unfortunately,sufficient design considerations for the engineers are provided in[19].Following the same idea presented in[19],another topology proposed in[20]employs the PS strategy to control the primary-side switches and the secondary-side switches.It can be designed to operate in step-down mode and step-up mode,respectively.The MOSFETs can achieve ZVS condition easily,and the diode rectifiers can turn off in zero-current switching(ZCS)condition.However,the control circuit is rather complex due to the additional isolating control design for the secondary-side switches.Besides,when in the step-down operation mode,this converter cannot be op-erated with null-load.It would be fatal problem if the front-end dc/dc converter is designed for the adapter applications.The en-ergy storage inductor is set before the rectifiers at the secondary side in[21]and[22].They have similar operation principles and characteristics as in[19]for high-power applications with high output voltage and low output current,but not suitable for medium-power server adapter applications.In order to obtain high conversion efficiency for medium-power applications with low output voltage and high output current,a new synchronous rectified soft-switched PSFB dc/dc converter with a primary-side energy storage inductor based on[19]–[22]is studied and implemented in this paper.Many current-mode-driven strategies for the SR are already proposed [25]–[28],whereas the strategy proposed in[27]and[28]is utilized to drive the SR in this converter.Section II presents the principle analysis of the selected appropriate operation modes when this converter is designed as a front-end dc/dc converter for medium-power server adapter applications.Section III fo-cuses on several key optimum design considerations of this converter.Successively,an optimum design procedure of this converter is proposed,and is supposed to be the design refer-ence for other engineers.Finally,a100-kHz,300-W(12V/25A) laboratory-made prototype is built up to verify all the theoret-ical analysis and evaluation.The highest full-load conversion efficiency of this converter reaches about95.9%.Compared with the traditional PSFB dc/dc converter,its advantage in high conversion efficiency shows good potential for medium-power server adapter applications.II.P RINCIPLE OF THE S ELECTEDA PPROPRIATE O PERATION M ODEFig.1shows the basic topology of this converter,where Q1–Q4are the primary-side main switches paralleled with D C1P–D C4as their body diodes.C OSS1–C OSS4are their par-asitic paralleled capacitances.L R is the added external energy storage inductor in series at the primary side.C B is the series dc block capacitor.T is a traditional center-taped transformer. To reduce the secondary-side conduction loss,the synchronous rectifiers SR1and SR2are utilized and paralleled with D SR1and Fig.1.Topology of the presented synchronous rectified PSFB converter with primary-side energy storage inductor[23],[28].D SR2as their body diodes.C SR1and C SR2are their parasiticparalleled capacitances.The SRs are driven by the strategy pro-posed in[27]and[28].CT1and CT2are the current detectors.C O is the outputfilter capacitor.R LOAD is the output load.This converter can be designed to operate in three differentmodes,which are defined according to the operation of theprimary-side currentflow I PRI.When there is an idle intervalof I PRI in one switching period,this operation mode is definedas the discontinuous conduction mode(DCM);if I PRI reacheszero exactly at the time when the lagging leg switches are turned OFF,this operation mode is defined as the boundary conduction mode(BCM);if I PRI does not reach zero at the time whenthe lagging leg switches are turned OFF,this operation mode isdefined as the continuous conduction mode(CCM).Therefore,thefirst and the most important step of the whole design processis to select the appropriate operation modes that arefit for themedium-power applications.A.Appropriate Operation Modes SelectionWhen the converter is designed to be operated in DCM mode,the primary-side energy storage inductor L R can easily help theleading leg switches achieve wide range ZVS and help the lag-ging leg switches achieve entire range ZCS without any otherauxiliary circuit.The detailed soft-switching analysis is pre-sented in Section III.There is little reverse recovery loss in theSRs’body diodes at the secondary side due to the relativelyslow downslope of the triangular current.Additionally,the volt-age stress across the rectifiers can be restrained by the outputvoltage clamping,which means that the feasibility of utilizingthe SRs with lower breakdown voltage rate will improve theconversion efficiency.The energy stored in the primary-sideleakage inductance of the transformer is accommodated by L R;thus,there is no more duty cycle loss and circulation loss.How-ever,with the same input voltage,output power,and the turnratio of transformer,the converter would have a relatively largerrms current in DCM mode than that in CCM mode or BCMmode.When operated in BCM mode,it not only preserves all advan-tages as when operated in DCM,but also with relatively lesserrms current,which means that the conduction loss is reduced.Unfortunately,controlled by the PS strategy,the BCM operationmode can be maintained only under a given operation conditionof this buck-derived converter.When operated in CCM mode,although the converter hasrelatively smallest rms current and ZVS conditions can simplybe achieved for both the leading leg switches and the lagging legswitches,the extremely narrow range of dc gain variation resultsin the extremely wide range of duty cycle variation in order tomeet the requirement of the input voltage range.It increases thedifficulty in optimum design for the transformer and definitelythe energy storage inductor.This issue will also be analyzed inSection III.Moreover,operation in CCM mode also leads to therelatively faster downslope of the current,which would causethe high voltage spikes on SRs and the large reverse recoveryloss in SRs’body diodes.Based on the aforementioned discussion,for medium-powerapplications with low output voltage and high output current,DCM mode is always suitable for this presented converter.Spe-cially,BCM mode can be designed for this converter under thefollowing operation conditions:low side of the input voltagerange and full-load output power.The detailed operation princi-ple of CCM mode can be obtained in a previous work[23]andare not presented in this paper.B.Principle Analysis of the Selected AppropriateOperation ModeTo be brief,this part mainly focuses on the operation prin-ciple of this converter when operated in DCM mode,and theBCM mode can simply be considered as the critical case of theDCM mode.Some reasonable assumptions are listed primarilyto simplify the operation analysis process:1)all the magneticcomponents are ideal:the magnetizing inductance of the trans-former is so large that the magnetizing current can be neglected.The leakage inductances of the transformer no matter at the pri-mary side or at the secondary side are both omitted;2)all thecapacitors are constant and linear;and3)the forward voltage ofdiodes and the R DSON of MOSFETs are not considered.Fig.2shows the theoretical waveforms and the equivalent circuits offive operation modes during a half switching period when thisconverter is operated in DCM mode.1)Mode1(t0–t1):During this active state,the primary-side main switches Q1and Q3are ON,the secondary-side syn-chronous rectifier SR2turns on at t0with the current-drivenstrategy[28],and the power is transferred from input side to out-put side.V AB equals the input voltage V IN.The voltage acrossthe transformer’s primary-side winding V Trans is clamped bythe output voltage at nV OUT.The voltage across SR1,V SR1,is also clamped by the output voltage at2V o.L R takes thepositive voltage stress(V IN−nV o).The secondary-side current increases with positive slope as shown in(2),which is n timesthe primary-side current.This mode ends at t1when Q1turnsoffdi SEC dt =ndi PRIdt=nV LRL R=nV IN−nV OUTL R(2)where n is the turns ratio of the transformer.2)Mode2(t1–t2):When the primary-side main switch Q1 turns off at t1,then the parasitic paralleled capacitances C OSS1 and C OSS2of the leading leg switches Q1and Q2are charged and discharged by the primary-side current,respectively.To simplify the analysis,the primary-side current i PRI can be con-sidered as a constant current source I PRI during this short inter-val because the energy stored in L R is large enough.Sincethe Fig.2.Theoretical waveforms and the equivalent circuits offive operation modes in DCM.primary-side leading leg switches are always of the same type, the parasitic paralleled capacitances C OSS1and C OSS2can also be supposed to be equal to a constant capacitance C OSS.Thus, the voltages stress across C OSS1and C OSS2can be expressed in(3)and(4),respectively.When the voltage across C OSS2 reaches zero,the body diode of main switches Q2,D C2,turns on for the primary-side circulation.Then,switch Q2can turn on with ZVS.Obviously,the dead time T DEAD between the driven signals of Q1and Q2should exactly befit for(5).This interval ends at t2when Q2turns onV CO S S1(t)=(V IN−nV OUT)(t1−t0)2L R C OSS(t−t1)(3)V CO S S2(t)=V IN−(V IN−nV OUT)(t1−t0)2L R C OSS(t−t1)(4) T DEAD≥2V IN L R C OSS(V IN−nV OUT)(t1−t0).(5)3)Mode3(t2−t3):When the main switch Q2turns on with ZVS at t2,V AB equals to zero.Since the primary-side current maintains itsflow direction,V Trans keeps its polarity and is still clamped at nV OUT,and SR2conducts continuously.Thus, L R takes the negative voltage stress(−nV OUT)to achieve the volt·seconds balance.The primary-side current i PRI expressed in(6)decreases with the negative slope(−nV OUT/L R).The secondary-side current i SEC also decreases with the negative slope,but n times the primary-side current.This mode ends at t3when the primary-side current i PRI reaches zeroi PRI(t)=(V IN−nV OUT)(t1−t0)L R−nV OUTL R(t−t2).(6)TABLE IB ASIC S PECIFICATIONS OF A T YPICAL M EDIUM -P OWER S ERVERA DAPTER APPLICATION4)Mode 4(t 3−t 4):At t 3,both the primary-side and the secondary-side currents fall to zero.Thus,the lagging leg switch Q 3as well as the synchronous rectifier SR 2can turn off with ZCS.However,for the MOSFETs,ZVS condition can be more beneficial than ZCS condition.Section III will analyze the ZVS condition of the primary-side switches in detail.During this interval,both V Trans and V LR are at 0V .The voltage stress across the SRs is clamped at V OUT if the parasitical resonance between the leakage inductance and parasitical capacitance is neglected.This interval ends at t 4when the lagging leg switch Q 3turns off with ZCS.5)Mode 5(t 4−t 5):Since the parasitic capacitance and leak-age inductance are neglected and the magnetizing inductance of transformer is large enough,before the lagging leg switch Q 4turning on,there would be no voltage balance current flow,nei-ther in C OSS3nor in C OSS4even if the lagging leg switch Q 3is already turned off.When the lagging leg switch Q 4turns on at t 5,the charging current of C OSS3and the discharging current of C OSS4flow through it together,and the obvious current spike results in the turn-on switching loss in the lagging leg switches.After mode 5,this converter begins to operate in another half switching pared with the DCM,the BCM does not have the idle interval mode 4,as shown in the shadow area of the theoretical waveforms.III.S EVERAL K EY O PTIMUM D ESIGN C ONSIDERATIONS To obtain relatively higher conversion efficiency for the medium-power applications especially as the server adapter,some key optimum design considerations are necessary to be taken into account for this converter.First,the steady-state analysis is proposed,which can help the engineers realize the dc gain variable range of this converter in different operation modes.Second,the maximum duty cycle and the parameters of the magnetic components,which affect the conversion efficiency directly,should be designed carefully.Then,the ZVS range analysis of the primary-side main switches shows the capability in the reduction of switching loss.More-over,the analysis of the voltage stress across the secondary-side SRs,when considering the impact of the secondary-side leakage inductances of the transformer,is necessary for the selection of the breakdown voltage rate for SRs.The current stress in the output capacitive filter is also presented.Table I shows the basic specifications of a typical medium-power server adapter appli-cation with low output voltage and high output current.A.Steady-State Analysis of This ConverterAs mentioned earlier,this converter can be designed to oper-ate in three different modes:DCM,BCM,or CCM.To simplify the steady-state analysis,the dead time between the drivensig-Fig.3.(a)DC gain characteristic of this converter.n =24;L R =120µH;V IN =350V .(b)Relationship between the duty cycle and the output load.n =24;L R =120µH.nals of one-bridge leg switches is omitted in this part.When operated in DCM mode,the dc gain characteristic of this con-verter can be derived from the volt ·seconds balance on L R and the basic principle of energy conservation.It is equivalent to the buck-derived converter operated in DCM mode.Based on (7)and (8),it is easy to obtain the dc gain characteristic in DCM of this converter as shown in (9)V IN −nV OUTL R (t 2−t 0)=nV OUT L R (t 3−t 2)(7)2(V IN −nV OUT )(t 2−t 0)(t 3−t 0)T S L R =V OUTnR LOAD (8)Gain DCM=V OUT V IN =nD 2T S R LOAD 8L R × 1+16L RD T S R LOAD n −1(9)where T S is the switching period and D is the duty cycle defined as D =2(t 2−t 0)/T S .When operated in BCM mode,the dc gain characteristic can be derived directly via the volt ·seconds balance on L R asGain BCM =V OUT V IN =Dn.(10)When operated in CCM mode,the theoretical waveformscan be seen from [23].Then,the dc gain characteristic can be derived in the same way as well as operated in DCM.Based on the integral equation (11),the dc gain of CCM is obtained as shown in (12)2 T S /20i PRI dt T S =V OUTnR LOAD(11)Gain CCM =V OUT V IN =16L 2Rn 6T 2S R 2LOAD−D 2n 2+2D n 2−4L Rn 3T S R LOAD.(12)Fig.3(a)shows the dc gain characteristic of this converter with the given parameters.It can be seen that the curve slope in CCMrange is extremely slow,which indicates the extremely narrow variable range of the dc gain.The extremely narrow variable dc gain range always needs wide duty cycle variable range and small turn ratio of the transformer to meet the requirement of the input voltage range.Thus,operation in CCM mode would bring in more difficulty in the optimum design for the magnetic components(both the added energy storage inductor L R and the transformer)and more conduction loss at the primary side. Moreover,the relatively fast downslope of the current in CCM mode also causes the voltage spikes and increases the voltage stress across the secondary-side SRs.Therefore,this converter is not suitable to operate in CCM mode especially for the medium-power server adapter applications.Furthermore,for the buck-derived converter controlled by the PS strategy,the BCM mode has only one point on the dc gain curve.Considering the advantages that BCM have,it is optimum to make this converter operate in BCM mode exactly with the low side of the input voltage,V IN LOW,and the full-load output power,as mentioned in Section II.Fig.3(b)shows the relationship between the duty cycle D and the output load R LOAD.B.Optimum Design for the Maximum Duty Cycle and the Magnetic ComponentsBased on the aforementioned steady-state analysis,this con-verter prefers to operate in BCM with350-V input voltage and full-load output power.This case requires the maximum duty cycle operation,which means that D BCM should be equal to D MAX.Hence,the optimum design for D MAX would be nec-essary for obtaining the high conversion efficiency in BCM operation.The rms value of the triangular current in BCM at the primary side can be expressed as a function of D MAX in(13). But the current at the secondary side is determined only by the output power,as shown in(14).Thus,D MAX would obviously affect the primary-side conduction lossI rms P(D MAX)=2√3I OUT V OUT3D MAX V IN(13)I rms S=2√3P OUT3V OUT.(14)Generally,(10)can determine the turn ratio of the transformer directly.For the server adapter applications,the secondary-side winding turns are usually as small as possible in order to reduce the conduction loss effectively.But it results in larger core loss of the transformer due to the fewer turns of the primary-side winding.Equation(15)shows the acflux density of the trans-former as a function of D MAX.Thus,the conduction loss and the core loss of the transformer can also be a function of D MAX, and the tradeoff between them should be taken into account carefully∆B T(D MAX)=D MAX T S V IN4N P A CT(15)where N P is the turns of the primary-side winding of the trans-former and A CT is the effective cross-sectional area of trans-former core’s magneticcircuit.Fig.4.Loss tradeoff results of the optimum design for the D B C M and the magnetic components.For the series energy storage inductor L R,it is necessary to tradeoff the conduction loss and core loss as well as the transformer.Equations(16)and(17)show the inductance and the winding turns of L R as a function of D MAX separately L R(D MAX)=D2MAX T S R OUT(1−D MAX)4G2BCM(16)N LR(D MAX)=V IN T S D MAX(1−D MAX)4∆B LRA CLR(17)where∆B LRis the acflux density of L R and A CLR is the effective cross-sectional area of L R core’s magnetic circuit. Although∆B LRis an unknown quantity as well as the wind-ing turns of L R,it can usually be given before one cycle of the design procedure to simplify the optimum design process. Then,the relatively optimum value of∆B LRcan be obtained through several cycles of the design procedure.Thus,during one cycle of the design procedure with the given value of∆B LR, the tradeoff between conduction loss and core loss of L R can also be derived by the equations of D MAX.Therefore,the optimum design for D MAX can be obtained based on the loss tradeoff among three main parts,such as the primary-side conduction loss in semiconductor components,the transformer loss,and the added series energy storage inductor loss.Fig.4shows the tradeoff results of four different design cases separately.All of them have the same tendency,i.e.,the loss clearly decreases with increase of D BCM.However,larger D BCM results in the faster downslope of the triangular current in BCM mode,which would increase the reverse recovery loss in SRs’body diodes and the design difficulty and complexity in turn-off control circuit of SRs.Luckily,it can also be seen that when D MAX is larger than0.6approximately,little benefit in loss reduction can be gained by increasing D MAX.It means that the duty cycle range shown in the shadow area should be the relatively optimum range of D MAX.Then,the optimum design for the transformer and L R can be derived by the comparison of several tradeoff result curves,which can be done easily by the program in the computer.Fig.5.ZVS range of the leading leg switches.(a)n =24;C O S S =120pF;T D E A D =200ns;V O U T =12V;V IN =350V .(b)L R =120µH;n =24;C O S S =120pF;T D E A D =200ns;V O U T =12V.Fig.6.Theoretic waveforms of the primary-side current i P R I and the mag-netizing current i M .C.Soft-Switching Analysis for the Primary-Side Main Switches As mentioned earlier,the primary-side series energy storage inductor L R and the output capacitive filter are employed for this converter to have a triangular shape of the current flow.Thus,for the primary-side leading leg switches,the wide load-range zero-voltage turn-on can be achieved easily by the sufficient energy stored in L R without any other auxiliary circuit.To simplify the analysis process,ZVS range of the leading leg switches can be defined as (18).When (18)is greater than unity,the leading leg switches can achieve ZVS;when (18)is lesser than unity,ZVS will be lost.Fig.5shows ZVS range of the leading leg switches,where Fig.5(a)shows the relationship between ZVS range and two variable factors,the inductance of L R and the output load R LOAD .As R LOAD becomes lighter,L R needs to decrease to maintain ZVS for the leading leg switches.Fig.5(b)indicates that with the relatively optimum design for L R ,the leading leg switches can achieve ZVS approximately from 5%load to full-load.Sometimes,the transformer’s magnetic cur-rent is designed to help the primary-side lagging leg switches achieve ZVS.Fig.6shows the theoretic waveforms of i PRI and the transformer magnetizing current i M ,when this converter is operated in DCM mode.It can be seen that if ∆T 1is lesser than ∆T 2,the magnetizing current i M would help further widen ZVS range for the leading leg switches.On the contrary,when ∆T 1is larger than ∆T 2,the magnetizing current i M would deterio-rate ZVS range of the leading leg switches.Thus,(20)should be valid to guarantee ZVS range for the leading leg switches,which means that the input voltage range should also be a designconsideration for ZVS range of the leading leg switchesZVS LEAD (R LOAD )=T DEAD T C O S S(18)where T C O S S is the charge or discharge time of the parasitic paralleled capacitances of the leading leg switches,and can be expressed asT C O S S (R LOAD )=2C OSS V OUT /V IN1−n V O U T VI NT S /(R LOAD L R )(19)V IN HIGH V INLOW≤2D MAX=2D BCM.(20)If the magnetizing current of the transformer is small enough,the lagging leg switches can definitely achieve the entire range zero-current turn-off when this converter is operated in BCM mode or DCM mode.But MOSFETs always obtain more bene-fit in the reduction of switching loss from zero-voltage turn-on than that from zero-current turn-off.The current spike at the hard-switching turn-on mentioned in Section II would cause the considerable switching loss in the lagging leg switches.ZVS for the lagging leg switches can be achieved by several ways.First one is to increase the magnetizing current of the trans-former without any other auxiliary circuit.However,sufficient magnetizing current also increases the conduction loss both in the primary-side semiconductor components and the mag-netic components.ZVS condition is load-dependent as well.The second way is to utilize a simple LC auxiliary resonant circuit proposed in [12]–[14].It can easily achieve the load-independent ZVS for the lagging leg switches and increases the additional conduction loss only in the lagging leg switches and the auxiliary circuit,which is less than that of the first way.Fig.10(a)shows the presented converter with this auxiliary res-onant circuit,and the auxiliary inductance L AUX should be fit for (21)to ensure the load-independent ZVS for the lagging leg switches.The third way is to employ the other LC auxiliary resonant circuit proposed in [15].It can self-adaptively achieve ZVS for all the main switches over the entire conversion range with small conduction loss penalty.But the design and imple-mentation of it are little more difficult than that of the second approach.L AUX ≤T DEAD T S16C OSS.(21)D.Voltage Stress Across the Secondary-Side SRsTheoretically,the voltage stress across the secondary-side SRs should be clamped at twice of the output voltage (2V OUT )exactly.However,when the impact of the secondary-side leak-age inductances of the transformer is taken into account,the practical voltage stress across the SRs would be higher than 2V OUT .For the traditional center-taped rectifier configuration with inductive output filter,there is always little current ripple flow-ing though the secondary-side leakage inductances L KS of the。