DSP 汇编指令缩写
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DSP汇编指令缩写ABS Absolute value of AccumulatorADD add to accumulatorADDC add to accumulator with carryADDT add to accumulator with shift specified by TREGAND and with accumulatorCMPL complement accumulatorLACC load accumulator with shiftLACL load low accumulator and clear high accumulatorLACT load accumulator with shift specified by TREGNEG negate accumulatorNORM normalize contents of accumulatorOR or with accumulatorROL/ROR rotate accumulator left/rightSACH/SACL store high/low accumulator with shiftSFL/SFR shift accumulator left/rightSUB subtract from accumulatorSBUC conditional subtractSUBS subtract from accumulator with sign extension suppressed SUBT subtract from accumulator with shift specified by TREGXOR exclusive or with accumulatorZALR zero low accumulator and load high accumulator with rounding ADRK add short limmediate value to ARBANZ branch on AR not zeroCMPR compare AR with AR0LAR load ARMAR modify ARSTR store ARSBRK subtract short limmediateAPAC add PREG to accumulatorLPH load PREGLT load TREGLTA load TREG and ACC previous productLTD load TREG ACC previous product and move dateLTS load TREG and subtract previous productMAC multiply and accumulateMACD multiply and accumulate wit data moveMPY multiplyMPY A multiply and accumulate previous productMPYS multiply and subtract previous productMPYS multiply unsignPAC load accumulator with PREGSPAC subtract PREG from accumulatorSPH/SPL store high/low PREGSPM set PREG output shift modeSQRA/SQRS square value and accumulate/subtract previous product B branch unconditionallyBACC branch to location specified by ACCBANZ branch on AR not zeroBCND branch conditionallyCALA call subroutione at location specified by ACCCALL call unconditionallyCC call conditionallyINTR software interruptNMI nonmaskable interruptRET return from subroutineRETC return conditionallyTRAP software interruptBIT bit numberBITT test bit specified by TREGCLRC clear control bitIDEL idle until interruptLDP load data page pointerLST load status registerNOP no operationPOP pop top of stack to low ACCPOPD pop top of stack to data memoryPSHD push data-memory value onto stackPUSH push low ACC onto stackRPT repeat next instructionSETC set control bitSPM set PREG output shift modeSST store status registerBLDD block move from data memory to data memory BLPD block move from data memory to data memory DMOV data move in data memoryIN input data from portOUT output data to portSPLK store long immediate value to data memory TBLR table readTBLW table write。
DSP中的EALLOW和EDIS
F2812中有⼀些配置寄存器是受保护的,⽆法直接操作。
在对这些寄存器进⾏修改之前,需要先去掉保护功能。
⽽保护状态是由状态寄存器中EALLOW标志来指⽰的。
汇编指令“EALLOW”就是将该标志位置位,允许对受保护的寄存器操作。
EALLOW(Edit allow)⼀般和EDIS(Edit disable)配套使⽤,在对受保护的寄存器操作之后,⽤EDIS恢复寄存器的被保护状态。
F280x器件上的⼏个控制寄存器受EALLOW 保护机制保护以防⽌虚假的CPU 写⼊。
在复位时EALLOW位被清除以启⽤EALLOW 保护。
在受保护时,CPU 对受保护寄存器进⾏的所有写⼊被忽略且只允许CPU读取、JTAG读取和JTAG写⼊。
如果设置了此位,则通过执⾏EALLOW指令可以允许CPU⾃由写⼊受保护的寄存器。
在修改寄存器之后,可以通过执⾏EDIS指令清除EALLOW位使它们再次受保护。
以下列寄存器受EALLOW保护:
· 器件仿真寄存器
· 闪存寄存器
· CSM 寄存器
· PIE ⽮量表
· 系统控制寄存器
· GPIO MUX 寄存器
· 某些eCAN 寄存器
eg:
// Enable EALLOW
EALLOW;
// Setting PWM1-6 as primary output pins
GpioMuxRegs.GPAMUX.all |= 0x003F;
// Disable EALLOW
EDIS;。
DSP缩略词整理DSP digital signal processing 数字信号处理的理论和方法SUB subtract from accumulator 带累加器减法SBUC conditional subtract from accumulator 有条件带累加器减法SUBS subtract from accumulator with sign extension suppressed 抑制符号带累加器减法STR store AR 存储到ARMAR modify AR 修改ARLAR load AR 加载ARCMPR compare AR with AR0 比较AR和AR0XOR exclusive or with accumulator 特殊与或累加器ZALR zero low accumulator and load high accumulator with rounding 低位取零高位取整BANZ branch on AR not zero 不分配AR 0SBRK subtract short limmediate 减去短的立即数APAC add PREG to accumulator 把PREG加到累加器LPH load PREG 加载PREGLT load TREG 加载TREGLTA load TREG and ACC previous product 加载TREG和ACC之前的输出LTD load TREG ACC previous product and move date 加载TREG ACC之前的输出和移动日期LTS load TREG and subtract previous product 加载TREG和减去以前的输出MAC multiply and accumulate 乘法和积累MACD multiply and accumulate wit data move 带数据移动的乘加运算MPY A multiply and accumulate previous product 乘加之前的输出 MPYS multiply and subtract previous product 乘减之前的输出TI Texas Instrumens 美国德州仪器公司ASIC Application Specific Intergrated Circuit 专用集成电路BS Barrel Shifter 桶形移位寄存器AU Addressing Unit 寻址单元PAGEN Program Address Generation Logic 逻辑发生程序地址DAGEN Data Address Generation Logic 数据地址产生单元PLL Phase Locked Loops 锁相环电路IFR Interrupt Flag Register 中断标志寄存器IMR Interrrupt Mask Register 中断屏蔽寄存器TIM Timer Register 定时器寄存器PRD Timer Period Register 定时器周期寄存器TCR Timer Control Register 定时器控制寄存器TDDR Timer Divide Down Ration 定时器分频系数TSS Timer Stop Status 定时器停止状态位TRB Timer Reload 定时器重新加载位PSC Timer Prescaler Counter 定时器预定标计数器HPI Host Port Interface 主机接口SPI Serial Port Interface 标准同步串行BSP Buffered Serial Port 缓冲串行口TDM Time Division Multiplexed 时分多路复用串行接口IDE Intergrated Development Environment 集成开发环境ABS Absolute value of Accumulator 累加器绝对值ADD add to accumulator 累加器值相加ADDC add toaccumulator with carry 带进位加法运算LACC load accumulator with shift 加载移位累加器LACL load low accumulator and clear high accumulator 加载到累加器低位字和清除累加器高位字LACT load accumulator with shift specified by TREG 通过TREG 特殊移位加载到累加器NEG negate accumulator 否定累加器NORM normalize contents of accumulator 正规化累加器ROL/ROR rotate accumulator left/right 左/右旋转累加器SACH/SACL store high/low accumulator with shift 高/低位存储移位累加器SFL/SFR shift accumulator left/right 左/右移位累加器SPAC subtract PREG from accumulator 从累加器减去PREG MELP Mixed Excitation LPC Vocoder 混合激励线性预测编码器FBTC Flashburn Target Component 下载用具CCS Code Composer Studio TI 公司的DSP软件编译环境GEL General Eextension Language 类似于C语言的解释性语言RF3 Reference Frmework level 3 应用程序使用多通道和多算法API Application Program Interface 应用程序编程接口EMIF External Memory Interface 外部存储器界面RAM random access memory 随机存储器SDRAM Synchronous Dynamic Random Access Memory 同步动态随机存储器ALU Arithmetic-Logic Unit 算术逻辑单元ARP Address Resolution Protocol 辅助寄存器指针ROM Read-Only Memory 只读存储器PCB Printed circuit board 电路板HPI Hardware Platform Interface 主机接口。
dsp中的汇编伪指令伪指令分类伪指令及其表示格式具体描述段定义伪指令 .asect “段名” , 地址汇编到一以绝对地址为起始的段中.bss 符号,字数[,块标号] 在未初始化数据段bss中保留空间.data 汇编到已初始化数据段data中.sect “段名”汇编到一已命名(已初始化)的段中.text 汇编到可执行代码段text中符号 .usect “段名”,字数[,块标号] 在一已命名(未初始化)的段中保留空间常数初始化伪指令(包括数据和地址常数) .bes 位数在当前段中保留位数(标号指向所保留空间的尾部).bfloat 数值初始化一个32位,IEEE单精度的浮点常数;禁止有跨页的初始化对象。
.blong 数值1[,…,数值n] 初始化一个或多个32位整数;禁止有跨页的初始化对象。
.byte 数值1[,…,数值n] 初始化当前段中一个或多个连续字节.field 数值1[,…,数值n] 初始化一个可变长度的字段.float 数值初始化一个32位,IEEE单精度的浮点常数.int 数值1[,…,数值n] 初始化一个或多个16位整数.long 数值1[,…,数值n] 初始化一个或多个32位整数.space 位数在当前段中保留位数(标号指向所保留空间的头部).string “字符串1”[,…,“字符串n”] 初始化一个或多个文本字符串.word 数值1[,…,数值n] 初始化一个或多个16位整数对准段程序计数器的伪指令 .align 在一页的边缘对准SPC(段程序计数器).even 在一偶数的边缘对准SPC定义输出列表格式的伪指令 .drlist 使所有伪指令行都被列出(缺省方式).drnolist 禁止某些伪指令行的列出.fclist 允许列出错误的条件代码块(缺省方式).fcnolist 禁止列出错误的条件代码块.length 页的长度定义源文件列表的页长.list 从头开始源文件的列表.mlist 允许宏列表和循环块(缺省方式).mnolist 禁止宏列表和循环块定义输出列表格式的伪指令 .nolist 停止源文件列表.option{B/D/F/L/M/T/X} 选择输出列表文件的参数.page 在源文件列表中生成一页.sslist 允许扩展子程序符号列表.ssnolist 禁止扩展子程序符号列表(缺省方式).tab 大小设置表的大小.title “字符串”在列表页头显示一个标题.width 页宽设置源文件列表的页宽外部文件定位的指伪令 .copy [“]文件名[”] 包含其他文件中的源语句.def 符号1[,…,符号n] 标明一个或多个在当前模块中定义而在其他模块中要用到的符号.global 符号1[,…,符号n] 标明一个或多个全局(外部)符号.include [“]文件名[”] 包含其他文件中的源语句.mlib [“]文件名[”] 定义宏定义库.ref符号1[,…,符号n] 标明一个或多个在另一模块中定义而在当前模块中要用到的符号条件汇编伪指令.break [确切定义的表达式] 如果条件满足,就结束.loop汇编。
ABS Absolute value of Accumulator
ADD add to accumulator
ADDC add to accumulator with carry
ADDT add to accumulator with shift specified by TREG
AND and with accumulator
CMPL complement accumulator
LACC load accumulator with shift
LACL load low accumulator and clear high accumulator
LACT load accumulator with shift specified by TREG
NEG negate accumulator
NORM normalize contents of accumulator
OR or with accumulator
ROL/ROR rotate accumulator left/right
SACH/SACL store high/low accumulator with shift
SFL/SFR shift accumulator left/right
SUB subtract from accumulator
SBUC conditional subtract
SUBS subtract from accumulator with sign extension suppressed SUBT subtract from accumulator with shift specified by TREG
XOR exclusive or with accumulator
ZALR zero low accumulator and load high accumulator with rounding ADRK add short limmediate value to AR
BANZ branch on AR not zero
CMPR compare AR with AR0
LAR load AR
MAR modify AR
STR store AR
SBRK subtract short limmediate
APAC add PREG to accumulator
LPH load PREG
LT load TREG
LTA load TREG and ACC previous product
LTD load TREG ACC previous product and move date
LTS load TREG and subtract previous product
MAC multiply and accumulate
MACD multiply and accumulate wit data move
MPY multiply
MPY A multiply and accumulate previous product
MPYS multiply and subtract previous product
MPYS multiply unsign
PAC load accumulator with PREG
SPAC subtract PREG from accumulator
SPH/SPL store high/low PREG
SPM set PREG output shift mode
SQRA/SQRS square value and accumulate/subtract previous product B branch unconditionally
BACC branch to location specified by ACC
BANZ branch on AR not zero
BCND branch conditionally
CALA call subroutione at location specified by ACC
CALL call unconditionally
CC call conditionally
INTR software interrupt
NMI nonmaskable interrupt
RET return from subroutine
RETC return conditionally
TRAP software interrupt
BIT bit number
BITT test bit specified by TREG
CLRC clear control bit
IDEL idle until interrupt
LDP load data page pointer
LST load status register
NOP no operation
POP pop top of stack to low ACC
POPD pop top of stack to data memory
PSHD push data-memory value onto stack
PUSH push low ACC onto stack
RPT repeat next instruction
SETC set control bit
SPM set PREG output shift mode
SST store status register
BLDD block move from data memory to data memory
BLPD block move from data memory to data memory
DMOV data move in data memory
IN input data from port
OUT output data to port
SPLK store long immediate value to data memory
TBLR table read
TBLW table write。