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CD4069UBCMX_NL中文资料

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© 2002 Fairchild Semiconductor CorporationDS005975

www.fairchildsemi.comOctober 1987Revised April 2002CD4069UBC Inverter Circuits

CD4069UBC

Inverter Circuits

General Description

The CD4069UB consists of six inverter circuits and is man-ufactured using complementary MOS (CMOS) to achievewide power supply operating range, low power consump-tion, high noise immunity, and symmetric controlled riseand fall times.

This device is intended for all general purpose inverterapplications where the special characteristics of theMM74C901, MM74C907, and CD4049A Hex Inverter/Buff-ers are not required. In those applications requiring largernoise immunity the MM74C14 or MM74C914 Hex SchmittTrigger is suggested.

All inputs are protected from damage due to static dis-charge by diode clamps to VDD and VSS.Features

sWide supply voltage range: 3.0V to 15V

sHigh noise immunity:0.45 VDD typ.

sLow power TTL compatibility:Fan out of 2 driving 74Lor 1 driving 74LS

sEquivalent to MM74C04

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.

Connection DiagramSchematic DiagramOrder NumberPackage NumberPackage Description

CD4069UBCMM14A14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

CD4069UBCSJM14D14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

CD4069UBCNN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide元器件交易网www.cecb2b.comwww.fairchildsemi.com2CD4069UBCAbsolute Maximum Ratings(Note 1)

(Note 2)Recommended Operating

Conditions (Note 2)

Note 1: “Absolute Maximum Ratings” are those values beyond which thesafety of the device cannot be guaranteed. They are not meant to implythat the devices should be operated at these limits. The table of “Recom-mended Operating Conditions” and Electrical Characteristics table provideconditions for actual device operation.Note 2: VSS = 0V unless otherwise specified.

DC Electrical Characteristics (Note 3)

Note 3: VSS = 0V unless otherwise specified.

Note 4: IOH and IOL are tested one output at a time.DC Supply Voltage (VDD)−0.5V to +18 VDCInput Voltage (VIN)−0.5V to VDD +0.5 VDCStorage Temperature Range (TS)−65°C to +150°C

Power Dissipation (PD)

Dual-In-Line700 mW

Small Outline500 mW

Lead Temperature (TL)

(Soldering, 10 seconds) 260°CDC Supply Voltage (VDD)3V to 15VDCInput Voltage (VIN)0V

to

VDD VDCOperating Temperature Range (TA)−55°C to +125°C

SymbolParameterConditions−55°C+25°C+125°CUnitsMinMaxMinTypMaxMinMax

IDDQuiescent Device CurrentVDD = 5V,0.250.257.5

µAVIN = VDD or VSSVDD = 10V,0.50.515

VIN = VDD or VSSVDD = 15V,1.01.030

VIN = VDD or VSSVOLLOW Level Output Voltage|IO| < 1 µA

VDD = 5V0.0500.050.05

VVDD = 10V0.0500.050.05

VDD = 15V0.0500.050.05

VOHHIGH Level Output Voltage|IO| < 1 µA

VDD = 5V4.954.9554.95

VVDD = 10V9.959.95109.95

VDD = 15V14.9514.951514.95

VILLOW Level Input Voltage|IO| < 1 µA

VDD = 5V, VO = 4.5V1.01.01.0

VVDD = 10V, VO = 9V2.02.02.0

VDD = 15V, VO = 13.5V3.03.03.0

VIHHIGH Level Input Voltage|IO| < 1 µA

VDD = 5V, VO = 0.5V4.04.04.0

VVDD = 10V, VO = 1V8.08.08.0

VDD = 15V, VO = 1.5V12.012.012.0

IOLLOW Level Output CurrentVDD = 5V, VO = 0.4V0.640.510.880.36

mA(Note 4)VDD = 10V, VO = 0.5V1.61.32.250.9

VDD = 15V, VO = 1.5V4.23.48.82.4

IOHHIGH Level Output CurrentVDD = 5V, VO = 4.6V−0.64−0.51−0.88−0.36

mA(Note 4)VDD = 10V, VO = 9.5V−1.6−1.3−2.25−0.9

VDD = 15V, VO = 13.5V−4.2−3.4−8.8−2.4

IINInput CurrentVDD = 15V, VIN = 0V−0.1−10−5−0.1−1.0µAVDD = 15V, VIN = 15V0.110−50.11.0元器件交易网www.cecb2b.com3www.fairchildsemi.comCD4069UBCAC Electrical Characteristics (Note 5)TA = 25°C, CL = 50 pF, RL = 200 kΩ, tr and tf ≤ 20 ns, unless otherwise specified

Note 5: AC Parameters are guaranteed by DC correlated testing.Note 6: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note—AN-90.

AC Test Circuits and Switching Time WaveformsSymbolParameterConditionsMinTypMaxUnits

tPHL or tPLHPropagation Delay Time fromVDD = 5V5090

nsInput to OutputVDD = 10V3060

VDD = 15V2550

tTHL or tTLHTransition TimeVDD = 5V80150

nsVDD = 10V50100

VDD = 15V4080

CINAverage Input CapacitanceAny Gate615pF

CPDPower Dissipation CapacitanceAny Gate (Note 6)12pF元器件交易网www.cecb2b.comwww.fairchildsemi.com4CD4069UBCTypical Performance Characteristics Gate Transfer Characteristics

Power Dissipation vs. FrequencyPropagation Delay vs. Ambient Temperature

Propagation Delay vs. Ambient Temperature

Propagation Delay Time vs. Load Capacitance元器件交易网www.cecb2b.com

合集下载

CD4094BCWM中文资料

CD4094BCWM中文资料

October 1987

Revised January 1999CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs

© 1999 Fairchild Semiconductor CD4094BC

8-Bit Shift Register/Latch with 3-STATE Outputs

General Description

The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shiftregister on the positive transition of the clock. The output ofthe last stage (QS) can be used to cascade several

devices. Data on the QS output is transferred to a second

output, Q′S, on the following negative clock edge.

The output of each stage of the shift register feeds a latch,which latches data on the negative edge of the STROBEinput. When STROBE is HIGH, data propagates throughthe latch to 3-STATE output gates. These gates areenabled when OUTPUT ENABLE is taken HIGH.

CD4049中文资料

CD4049中文资料

CD4049中文资料

CD4049 六反相缓冲器/转换器.,CD4049是六反相缓冲器，具有仅用一电源电压(VCC)进行逻辑电平转换的特征。用作逻辑电平转换时，输入高电平电压(V IH)超过电源电压V CD。该器件主要用作COS/MOS到DTL/TTL的转换器，能直接驱动两个DTL/TTL负载。CD4049可替换CD4009，因为CD4049仅 需要一电源电压，可取代CD4009用于反相器、电源驱动器或逻辑电平转换器。CD4049与CD4009引出端排列一致，16引出端是空脚 ，与内部电路无连接。若使用时不要求高的漏电

流或电压转换，推荐使用CD4049六反相器。

CD4049引脚图

:

CD4049 内部图

Supply Voltage电源电压(VDD) -0.5V to +18V Input Voltage输入电压

(VIN) -0.5V to +18V

Voltage at Any Output Pin (VOUT)电压在任何输出引脚（输出电压） -0.5V

to VDD + 0.5V Storage Temperature Range储存温度范围 (TS) -65? to +150?

Dual-In-Line 普通双列封装 700 mW Small Outline 小外形封装 500 mW 焊接温度(TL)（焊接10秒） 260?

Supply Voltage电源电压(VDD) 3V to 15V Input Voltage输入电压 (VIN)

0V to 15V Voltage at Any Output Pin (VOUT)电压在任何输出引脚（输出电压）

0 to VDD

CD4049UBC, CD4050BC -40? to +85?

-40? +25? +85?

VDD = 5V 4 0.03 4.0 30

Quiescent Device IDD VDD = 10V 8 0.05 8.0 60 μA Current静态电流

CD4006B资料

CD4006B资料

Data sheet acquired from Harris SemiconductorSCHS017元器件交易网元器件交易网元器件交易网元器件交易网IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

CD4093BDMSR中文资料

CD4093BDMSR中文资料

CD4093BDMSR中文资料

CAUTION: These devices are sensitive to electrostatic

discharge; follow proper IC Handling Procedures.Pinout

CD4093BMSMS TOP VIEW

Functional Diagram

A B J =A · B K =C · D C D VSS VDD H G M =G · H L =E · F F E

12

34

567

141312111098A B J K C D VSS

VDD H G M L F E

123

4

567

141312

111098

J =A · B

L =E · F

M =G · H

K =C · D

Features

High Voltage Types (20V Rating)

Schmitt Trigger Action on Each Input With No External

Components ?Hysteresis Voltage Typically 0.9V at VDD = 5V and

2.3V at VDD = 10V ?Noise Immunity Greater than 50%?No Limit

on Input Rise and Fall Times

Standardized, Symmetrical Output Characteristics ?100%

Tested for Quiescent Current at 20V

Maximum Input Current of 1μA at 18V Over Full Pack-age Temperature Range, 100nA at 18V and +25o C ?5V, 10V and 15V

Parametric Ratings

Meets All Requirements of JEDEC Tentative Standard No. 13B,