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第19卷第1期电源学报Vol.19No.1 2021年1月Journal of Power Supply Jan.2021 DOI：10.13234/j.issn.2095-2805.2021.1.1中图分类号：TM461；TM464文献标志码:A基于磁路耦合的电力电子变压器直流变换技术杨晓梅1,虞汉阳2,费益军1,吉宇-徐晓轶-姚文熙2(1.国网江苏省电力有限公司，南京210029；2.浙江大学电气工程学院，杭州310027)摘要:针对模块串联型电力电子变压器中变压器数量多、绝缘要求高的问题，设计了一种基于磁路耦合变压器的多有源桥直流变换器结构，能够提高模块化程度和减少高频变压器端口数目，提升系统功率密度。
该变换器采用多磁芯高频变压器，变压器原边具有多绕组结构，对应多模块的串联，以满足输入高电压等级的要求；副边则采用单一绕组，对应全桥或多个全桥电路的并联，以承受副边较大的电流应力。
改进的变换器在高压侧保持模块化结构，并且将变压器的磁芯和原边绕组集成到高压模块中，而低压侧使用统一的绕组和变换器，降低了高频变压器的设计难度。
最后给出了该拓扑的等效模型和工作原理，并通过实验验证了所提变换器结构的可行性。
关键词：电力电子变压器；直流变换器；多有源桥；磁耦合Improved DC Converter Based on Magnetic Coupling forPower Electronic TransformerYANG Xiaomei1,YU Hanyang2,FEI Yijun1,JI Yu1,XU Xiaoyi1,YAO Wenxi2(1.State Grid Jiangsu Electric Power Co.,Ltd.,Nanjing210029,China;2.College of Electrical Engineering,Zhejiang University,Hangzhou310027,China)Abstract:To overcome the problems in a series connected power electronic transformer such as a large number of transformers and higher insulation requirement,a multiple active bridge converter structure based on magnetic coupling transformer is designed in this paper,which can improve the modulation degree,reduce the number of ports of a high-frequency transformer,and enhance the system'power density.This converter adopts a multi-core high-frequency transformer.It has a multi-winding structure on the primary-side in response to the series-connection of multiple modules, thus satisfying the requirement of high-voltage level.On the secondary-side,it adopts a single winding in response to the full-bridge or the parallel connection of multiple full-bridge circuits,so as to withstand a higher current stress.The improved converter maintains a modular structure on the high-voltage side,in which the core of the transformer and primary winding are integrated.In contrast,it uses a uniform winding and converter on the low-voltage side,thus reducing the difficulty in designing the high-frequency transformer.The equivalent model of this topology and its operating principle are given.In addition,the feasibility of the proposed converter structure was verified by experimental results.Keywords:power electronic transformer;DC converter;multiple active bridge;magnetic coupling电力电子变压器PET(power electronic transfor-mer)被认为是可再生能源并网发电和高效利用电能的必要设备，是当前智能电网和电力电子的重要发展方向冋。
Selection GuideCertificationPart No.Input Voltage (VDC)OutputFull Load Efficiency (%)Min./Typ.Capacitive Load(µF)Max.Nominal (Range)Voltage (VDC)Current(mA)Max./Min.CEB0503XT-2WR25(4.5-5.5) 3.3400/4068/72220B0505XT-2WR25400/4075/79B0509XT-2WR29222/2278/82B0512XT-2WR212167/1778/82B0515XT-2WR215133/1379/83B1205XT-2WR212(10.8-13.2)5400/4075/79B1209XT-2WR29222/2278/82B1212XT-2WR212167/1778/82B1215XT-2WR215133/1379/83B1224XT-2WR22483/880/84--B1505XT-2WR215(13.5-16.5)5400/4073/77CEB1515XT-2WR215133/1379/83B2405XT-2WR224(21.6-26.4)5400/4075/79B2409XT-2WR29222/2278/82B2412XT-2WR212167/1778/82B2415XT-2WR215133/1379/83B2424XT-2WR22483/880/84Input SpecificationsItemOperating Conditions Min.Typ.Max.UnitInput Current(full load /no-load)5V input --506/30--/60mA 12V input --212/25--/5015V input --169/18--/3524V input--105/15--/30Reflected Ripple Current*--15--Surge Voltage (1sec.max.)5V input-0.7--9VDC 12V input -0.7--1815V input -0.7--2124V input-0.7--302W isolated DC-DC converter with Fixed input voltage,&Unregulated Single OutputPatent Protection RoHSFEATURES●Operating ambient temperature range:-40℃to+105℃●High efficiency up to 84%●Compact SMD package●I/O isolation test voltage 1.5k VDC ●Internal surface mount design ●No external components required●Industry standard pin-out ●EN60950approvalB_XT-2WR2series is designed for use in distributed power supply systems and especially suitable in applications such as pure digital circuits,low frequency analog circuits,noise and interference cancelling circuits,relay-driven circuits and data switching circuits,where 1.The voltage of the input power supply is relatively stable with a variation of ±10%Vin or less;2.An input to output isolation voltage of up to 1500VDC is necessary;3.The requirement for ripple &noise or a tight output regulation is not as strict.Input Filter Capacitance filterHot Plug UnavailableNote:*Please refer to DC-DC Converter Application Note for detailed description of Reflected ripple current testing method.Output SpecificationsItem Operating Conditions Min.Typ.Max.Unit Voltage Accuracy See output regulation curve(Fig.1)Linear Regulation Input voltagechange:±1%3.3VDC output----±1.5--Other output----±1.2Load Regulation10%-100%load 3.3VDC output--18--% 5VDC output--12--9VDC output--9--12VDC output--8--15VDC output--7--24VDC output--6--Ripple&Noise*20MHz bandwidth 24VDC output--100200mVp-p Other output--100150Temperature Coefficient Full load----±0.03%/℃Short Circuit Protection**----1s Note:*The“parallel cable”method is used for Ripple and noise test,please refer to DC-DC Converter Application Notes for specific information;**At the end of the short circuit duration,the supply voltage must be disconnected from the modules.General SpecificationsItem Operating Conditions Min.Typ.Max.Unit Isolation Input-output electric strength test for1minute with aleakage current of1mA max.1500----VDC Insulation Resistance Input-output resistance at500VDC1000----MΩIsolation Capacitance Input-output capacitance at100kHz/0.1V--20--pFOperating Temperature 3.3V/5VoutputDerating when operatingtemperature≥71°C,(see Fig.2)-40--105℃Other output Derating when operatingtemperature≥85°C,(see Fig.2)Storage Temperature-55--125Case Temperature Rise Ta=25℃--25--Storage Humidity Non-condensing----95%RHReflow Soldering Temperature Peak temp.≤245℃,maximum duration time≤60s over217℃.For actual application,please refer to IPC/JEDEC J-STD-020D.1.Switching Frequency Full load,nominal input voltage--100--KHz MTBF MIL-HDBK-217F@25℃3500----K hoursMechanical SpecificationsCase Material Black Epoxy resin;flame-retardant and heat-resistant(UL94-V0)Dimensions12.70x11.20x7.25mmWeight 1.6g(Typ.)Cooling Method Free air convectionElectromagnetic Compatibility(EMC)Emission CE CISPR32/EN55032CLASS B(see Fig.4for recommended circuit) RE CISPR32/EN55032CLASS B(see Fig.4for recommended circuit)Immunity ESD IEC/EN61000-4-2Contact±8KV perf.Criteria BTypical Characteristic Curves3.3VDC outputOther outputFig.112080-40O u t p u t P o w e r P e r c e n t (%)Ambient Temp.()℃Safe Ope rating Are aTemperature Derating Curveoutputoutput Fig.2Design Reference1.Typical applicationInput and/or output ripple can be further reduced,by connecting a filter capacitor from the input and/or output terminals to ground as shown in Fig.3.Choosing suitable filter capacitor values is very important for a smooth operation of the modules,particularly to avoid start-up problems caused by capacitor values that are too high.For recommended input and output capacitor values refer to Table 1.Vin0VDCCinDC CoutFig.3Table 1:Recommended input and output capacitor values Vin(VDC)Cin(µF)Vo (VDC)Cout(µF)5 4.7 3.31012 2.2510152.29 4.724112 2.2----151----240.472.EMC (CLASS B)compliance circuitVinGND+Vo0VDC/DCLOADLDMC1CYVinGNDC3C2Fig.4Input voltage (VDC)5/12/1524EMIC1 4.7µF /50V C2 4.7µF /50VC3Refer to the Cout in Fig.3CY --1nF/2KV LDM6.8µHNote:1.For 24V input models use a Y-capacitor CY of 1nF/2kV.3.Minimum Output Load RequirementFor a reliable and efficient operation of the converter,the minimum load should never be less than 10%of the rated output load.If the total required output power is below 10%,a parallel bleeding resistor is required on the output,ensuring that the sum of the power consumption is always maintained at 10%minimum.4.For additional information,please refer to DC-DC converter application notes on Dimensions and Recommended LayoutNotes:1.For additional information on Product Packaging please refer to .Packaging bag number:58210024,RollPacking bag number:58200054;2.If the product is not operated within the required load range,the product performance cannot be guaranteed to comply with allparameters in the datasheet;3.The maximum capacitive load offered were tested at input voltage range and full load;4.Unless otherwise specified,parameters in this datasheet were measured under the conditions of Ta=25℃,humidity<75%RH with nominalinput voltage and rated output load;5.All index testing methods in this datasheet are based on our company corporate standards;6.We can provide product customization service,please contact our technicians directly for specific information;7.Products are related to laws and regulations:see"Features"and"EMC";8.Our products shall be classified according to ISO14001and related environmental laws and regulations,and shall be handled byqualified units.MORNSUN Guangzhou Science&Technology Co.,Ltd.Address:No.5,Kehui St.1,Kehui Development Center,Science Ave.,Guangzhou Science City,Huangpu District,Guangzhou,P.R.China Tel:86-20-38601850Fax:86-20-38601272E-mail:***************。
专利名称：DC-DC CONVERTER AND MULTI-OPERATING MODE IMPLEMENTATIONMETHOD THEREFOR发明人：QI, Jing,齐京申请号：CN2017/090371申请日：20170627公开号：WO2018/036266A1公开日：20180301专利内容由知识产权出版社提供专利附图：摘要：A DC-DC converter and a multi-operating mode implementation method therefor, the method comprising: detecting voltages of an input terminal (301) and anoutput terminal (302) of a DC-DC converter, and generating an operation mode control signal according to the detection result (S101); according to the operation mode control signal, controlling the statuses of a forward switch circuit (303) and a reverse switch circuit (304) (S102); the forward switch circuit (303) and the reverse switch circuit (304) are arranged in parallel connection between the input terminal (301) and the output terminal (302) of the DC-DC converter. The present invention enables two-way conduction of the DC-DC converter, thus facilitating the miniaturization of a product.申请人：ZTE CORPORATION,中兴通讯股份有限公司地址：518057 CN,518057 CN国籍：CN,CN代理人：AFD CHINA INTELLECTUAL PROPERTY LAW OFFICE,北京安信方达知识产权代理有限公司更多信息请下载全文后查看。
第51卷第22期电力系统保护与控制Vol.51 No.22 2023年11月16日Power System Protection and Control Nov. 16, 2023 DOI: 10.19783/ki.pspc.230262基于改进线性二次调节器的微电网运行模式无缝切换控制策略孙佳航1，黄景光1，徐慧鑫1，陈 勇1，张 霞1，王楷杰2(1.三峡大学电气与新能源学院，湖北 宜昌 443002；2.强电磁工程与新技术国家重点实验室(华中科技大学)，湖北 武汉 430074)摘要：微电网的主要特点之一是能够在并网模式和孤岛模式下运行，进行微电网运行模式之间的切换可能导致电压和频率的显著波动，严重时会威胁到整个系统的稳定性。
无缝切换控制策略是保证微电网稳定可靠运行的关键，为解决传统无缝切换控制策略易受干扰影响和动态稳定性差的问题，提出了一种基于改进线性二次调节器的微电网运行模式无缝切换控制策略，该策略包括并网-孤岛平滑调节器和孤岛-并网平滑调节器。
并网-孤岛平滑调节器通过对传统电压控制环的改进，可以为系统提供更多的阻尼并补偿逆变器输出处的瞬态电压降，从而改善系统动态性能。
同时，通过对传统下垂控制策略的改进，可以根据系统有功功率的变化来调整其下垂系数，在受干扰的情况下能够将频率偏差降低到期望的水平。
孤岛-并网平滑调节器考虑内部控制回路和PLL动态的情况下，根据并网控制策略下的状态空间模型对传统电流控制回路进行了改进，可以保证PCC两侧电压的同步性和微电网频率的稳定性。
最后，对所提出的控制策略进行了小信号分析，同时研究了孤岛检测算法对控制策略的潜在影响，突出了所提策略的鲁棒性，并验证了所提控制策略能够平滑稳定地实现微电网运行模式间的切换。
关键词：并网模式；孤岛模式；微电网；线性二次调节器；平滑过渡Seamless switching control strategy for microgrid operation mode based onan improved linear secondary regulatorSUN Jiahang1, HUANG Jingguang1, XU Huixin1, CHEN Yong1, ZHANG Xia1, WANG Kaijie2(1. College of Electrical Engineering and New Energy, China Three Gorges University, Yichang 443002, China;2. State Key Laboratory of Advanced Electromagnetic Engineering and Technology(Huazhong University of Science and Technology), Wuhan 430074, China)Abstract: One of the main features of microgrids is their ability to operate in both grid-connected and islanded modes.Switching between microgrid operating modes can lead to significant voltage and frequency fluctuations, which can seriously threaten the stability of the entire system.Seamless switching control strategy is the key to ensuring stable and reliable operation of a microgrid. To solve the problems that traditional seamless switching control strategy is susceptible to interference and poor dynamic stability, a strategy based on an improved linear secondary regulator is proposed, one which includes grid-islanding and islanding-griding smoothing regulators. The grid-islanding smoothing regulator improves the system dynamic performance by providing more damping and compensating for transient voltage drops at the inverter output through an improvement to the traditional voltage control loop. Also, by improving on the traditional sag control strategy, it can adjust its sag coefficient according to changes in the active power of the system and is able to reduce the frequency deviation to the desired level in the presence of disturbances. The islanding-grid smoothing regulator considers the internal control loop and PLL dynamics and improves the traditional current control loop according to the state space model under the grid-connected control strategy. This can ensure the synchronisation of the voltages on both sides of the PCC and the stability of the microgrid frequency. Finally, a small-signal analysis of the proposed control strategy is carried out, and the potential impact of the islanding detection algorithm on the control strategy is investigated, highlighting the robustness of the proposed strategy and verifying that the proposed control strategy can achieve smooth and stable switching between microgrid operation modes.This work is supported by the National Natural Science Foundation of China (No. 52107095).Key words: grid-connected mode; islanding mode; microgrid; linear quadratic regulator; smooth transition基金项目：国家自然科学基金项目资助(52107095)孙佳航，等基于改进线性二次调节器的微电网运行模式无缝切换控制策略- 121 -0 引言微电网(microgrid, MG)作为一个小型电力系统，可以在并网(grid connected, GC)和孤岛(islanding, IS)模式下运行[1-4]。
PYBJ15-Q24-S5-Mdate 06/24/2019page1 of 9SERIES: PYBJ15 │ DESCRIPTION: DC-DC CONVERTERFEATURES• up to 15 W isolated output• ultra wide 4:1 input voltage range • single regulated output• output short circuit, over current, over voltage protection • efficiency up to 89%• DIP and SMT mounting styles • available with or without case• 1500 Vdc isolationMODELinput voltageoutput voltageoutput currentoutput powerripple & noise 1efficiency 2typ (Vdc)range (Vdc)(Vdc)min (mA)max (mA)max (W)max (mVp-p)typ (%)PYBJ15-Q24-S3249~36 3.30450014.8510088PYBJ15-Q24-S5249~365030001510088PYBJ15-Q24-S12249~3612012501510089PYBJ15-Q24-S15249~3615010001510089PYBJ15-Q48-S34818~75 3.30450014.8510088PYBJ15-Q48-S54818~755030001510088PYBJ15-Q48-S124818~7512012501510089PYBJ15-Q48-S154818~751510001510089Notes: 1. From 5~100% load, nominal input, 20 MHz bandwidth oscilloscope, with 10 µF tantalum and 1 µF ceramic capacitors on the output. From 0~5% load, ripple and noise is <5% Vo.2. Measured at nominal input voltage, full load.3. All specifications are measured at T a=25°C, humidity < 75%, nominal input voltage, and rated output load unless otherwise specified.PART NUMBER KEYBase NumberPYBJ15 - Q XX - S XX - X XInput VoltageOutput VoltageCase:“blank” = with case O = no caseMounting Style:D = DIPM = SMTdate 06/24/2019 │page 2 of 9 CUI Inc │ SERIES: PYBJ15 │DESCRIPTION: DC-DC CONVERTERINPUTparameter conditions/description min typ max unitsoperating input voltage24 Vdc input models48 Vdc input models 91824483675VdcVdcstart-up voltage24 Vdc input models48 Vdc input models 918VdcVdcsurge voltage24 Vdc input models for 1 second max48 Vdc input models for 1 second max -0.7-0.750100VdcVdcunder voltage shutdown24 Vdc input models48 Vdc input models 5.5126.515.5VdcVdccurrent 24 Vdc input models3, 5 Vdc output models12, 15 Vdc output models727718mAmA48 Vdc input models 3.3 Vdc output models5 Vdc output models363360mAmAstart-up current24 Vdc input models48 Vdc input models 3,0001,500mAmAremote on/off (CTRL)4turn on (CTRL pin pulled low to GND (0~1.2 Vdc))turn off (CTRL pin open or pulled high (3.5~12 Vdc))input current when switched off615mAalarm indication (ALM)Valm (relative to GND), when under voltage protection isgoing to happen, and during the over voltage protectionworking status.0.2 1.2Vdc Valm (relative to GND), other working status 3.59Vdcfilter Pi filterno load power consumption0.36W Notes: 4. The voltage of the CTRL pin is referenced to input GND pin.OUTPUTparameter conditions/description min typ max unitsmaximum capacitive load53.3, 5 Vdc output models12 Vdc output models15 Vdc output models4,7001,000820μFμFμFvoltage accuracy from 0% to full load±1±2% line regulation from low line to high line, full load±0.2±0.5% load regulation6from 5% to full load±0.5±1% switching frequency7PWM mode300kHz transient recovery time25% load step change, nominal input voltage300500μstransient response deviation 25% load step change, nominal input voltage3.3, 5 Vdc output modelsall other output models±3±3±8±5%%temperature coefficient at full load±0.03%/°C Note: 5. Tested at input voltage range and full load.6. At 0~100% load, the max load regulation is ±3%.7. Value is based on full load. At loads <50%, the switching frequency decreases with decreasing load for efficiency improvement.date 06/24/2019 │ page 3 of 9CUI Inc │ SERIES: PYBJ15 │ DESCRIPTION: DC-DC CONVERTER PROTECTIONSparameterconditions/description min typmax units over voltage protection output shut down 110160%over current protection hiccup, auto recovery110180230%short circuit protectionhiccup, continuous, auto recoverySAFETY AND COMPLIANCEparameter conditions/descriptionmin typ max units isolation voltageinput to output for 1 minute at 1 mA input to case 8 for 1 minute at 1 mA output to case 8 for 1 minute at 1 mA 1,500500500Vdc Vdc Vdc isolation resistance input to output at 500 Vdc input to case 8 at 500 Vdc output to case 8 at 500 Vdc 100100100MΩMΩMΩisolation capacitance input to output, 100 kHz / 0.1 V 1,000pFsafety approvals IEC 62368-1, EN 62368-1conducted emissions CISPR32/EN55032, class B (external circuit required, see Figure 2-a) radiated emissions CISPR32/EN55032, class B (external circuit required, see Figure 2-a)ESDIEC/EN61000-4-2, contact ±6 kV , class B radiated immunity IEC/EN61000-4-3, 10 V/m, class AEFT/burst IEC/EN61000-4-4, ±2 kV , class B (external circuit required, see Figure 2-b)surgeIEC/EN61000-4-5, line-line ±2 kV , class B (external circuit required, see Figure Figure 2-b)conducted immunity IEC/EN61000-4-6, 3 Vr .m.s, class A MTBF as per MIL-HDBK-217F , 25°C 1,000,000hoursRoHSyesNote:8. Only applies to versions with case.ENVIRONMENTALparameterconditions/description min typmax units operating temperature see derating curves-4085°C storage temperature -55125°C storage humidity non-condensing595%vibration10~150 Hz, for 60 minutes on each axis 5GDERATING CURVESO u t p u t L o a d (%)60801004020120 0Temperature Derating Curve(Output Load vs. Ambient Tempearature3.3, 5 Vdc output models)O u t p u t L o a d (%)60801004020120 070Temperature Derating Curve(Output Load vs. Ambient Tempearature12, 15 Vdc output models)date 06/24/2019 │ page 4 of 9CUI Inc │ SERIES: PYBJ15 │ DESCRIPTION: DC-DC CONVERTER MECHANICALparameterconditions/descriptionmintypmaxunits dimensionsDIP without case:3.3, 5 Vdc output models: 38.70 x 27.20 x 6.20 [1.524 x 1.071 x 0.244 inch]12, 15 Vdc output models: 38.70 x 27.20 x 5.80 [1.524 x 1.071 x 0.228 inch]mm mm DIP with case:3.3, 5 Vdc output models: 39.10 x 29.50 x 6.80 [1.539 x 1.161 x 0.268 inch]12, 15 Vdc output models: 39.10 x 29.50 x 6.40 [1.539 x 1.161 x 0.252 inch]mm mm SMT without case:3.3, 5 Vdc output models: 38.70 x 27.20 x 6.20 [1.524 x 1.071 x 0.244 inch]12, 15 Vdc output models: 38.70 x 27.20 x 5.80 [1.524 x 1.071 x 0.228 inch]mm mm SMT with case:3.3, 5 Vdc output models: 39.10 x 29.50 x 6.80 [1.539 x 1.161 x 0.268 inch]12, 15 Vdc output models: 39.10 x 29.50 x 6.40 [1.539 x 1.161 x 0.252 inch]mm mm case material aluminum alloyweightwithout case 3.3, 5 Vdc output models without case 12, 15 Vdc output models with case 3.3, 5 Vdc output models with case 12, 15 Vdc output models11.08.813.811.5g g g g10 Sec. Max.Wave Soldering Time4 Sec. Max.Peak Temp. 260°C Max.Time (sec.)T e m p e r a t u r e (°C )25020015010050SOLDERABILITYparameter conditions/descriptionmin typ max units hand soldering 1.5 mm from case for 10 seconds 300°C wave soldering 9see wave soldering profile260°C reflow soldering 10see reflow soldering profileMaximum duration >217°C is 60 seconds.For actual application, refer to IPC/JEDEC J-STD-020D.1245°CNote: 9. For DIP models only. 10. For SMT models only.50100150200250245217T e m p e r a t u r e (°C )Time (sec.)60 sec max (>217°C)Peak Temp 245°CWave Soldering Proflile(DIP models)Reflow Soldering Profile(SMT models)date 06/24/2019 │ page 5 of 9CUI Inc │ SERIES: PYBJ15 │ DESCRIPTION:DC-DC CONVERTER units: mm [inch]tolerance: ±0.50[±0.020]pin section tolerance: ±0.10[±0.004]Recommended PCB LayoutTop Viewunits: mm [inch]tolerance: ±0.50[±0.020]pin section tolerance: ±0.10[±0.004]MECHANICAL DRAWING (DIP WITH CASE )Recommended PCB LayoutTop ViewMECHANICAL DRAWING (DIP WITHOUT CASE )PIN CONNECTIONS PIN Function 1+Vo 2+Vo 3+Vo 40V 50V 6NC 7ALM 8CTRL 9NC 10+Vin 11+Vin 12GND 13GND PIN CONNECTIONS PIN Function 1+Vo 2+Vo 3+Vo 40V 50V 6NC 7ALM 8CTRL 9NC 10+Vin 11+Vin 12GND 13GND 14NCNote: NC = no connectdate 06/24/2019 │ page 6 of 9CUI Inc │ SERIES: PYBJ15 │ DESCRIPTION: DC-DC CONVERTER units: mm [inch]tolerance: ±0.50[±0.020]pin section tolerance: ±0.10[±0.004]MECHANICAL DRAWING (SMT WITHOUT CASE )Recommended PCB LayoutTop Viewunits: mm [inch]tolerance: ±0.50[±0.020]pin section tolerance: ±0.10[±0.004]MECHANICAL DRAWING (SMT WITH CASE )PIN CONNECTIONS PIN Function 1+Vo 2+Vo 3+Vo 40V 50V 6NC 7NC 8ALM 9CTRL 10NC 11+Vin 12+Vin 13GND 14GND Recommended PCB LayoutTop ViewPIN CONNECTIONS PIN Function 1+Vo 2+Vo 3+Vo 40V 50V 6NC 7NC 8ALM 9CTRL 10NC 11+Vin 12+Vin 13GND 14GND 15NCNote: NC = no connectdate 06/24/2019 │page 7 of 9 CUI Inc │ SERIES: PYBJ15 │DESCRIPTION: DC-DC CONVERTERAPPLICATION CIRCUITFigure 1 Table 1Vin+Vo0V Vout(Vdc)Cin(μF)Cout(μF)3.3/5/12/1510010This series has been tested according to the following recommended circuit (Figure 1) before leaving the factory. If you want to further reduce the input and output ripple, you can increase the input and output capacitors or select capacitors of low equivalent impedance provided that the capacitance is less than the maximum capacitive load of the model.EMC RECOMMENDED CIRCUITTable 2Figure 2Recommended External Circuit ComponentsVin (Vdc)2448FUSE choose according to actual input currentC0470 µF / 50 V680 µF / 100 VC1, C2 4.7 µF / 50 V 4.7 µF / 100 VC3refer to the Cout in T able 1C4330 µF / 50 V330 µF / 100 VLCM1 4.7 µHCY1, CY22000 pF /2 kVdate 06/24/2019 │page 8 of 9 CUI Inc │ SERIES: PYBJ15 │DESCRIPTION: DC-DC CONVERTERPACKAGINGunits: mmInner Carton Size: 280 x 196 x 63 mmOuter Carton Size: 600 x 285 x 225 mmOuter Carton QTY: 288 pcsdate 06/24/2019 │ page 9 of 9CUI Inc │ SERIES: PYBJ15 │ DESCRIPTION: DC-DC CONVERTER CUI offers a two (2) year limited warranty. Complete warranty information is listed on our website.Headquarters20050 SW 112th Ave.Tualatin, OR 97062800.275.4899Fax 503.612.2383cui .com*******************rev.description date 1.0initial release06/24/2019The revision history provided is for informational purposes only and is believed to be accurate.REVISION HISTORYPYBJ15-Q24-S5-M。
DC-DC 变换器的改进型仿TYPE-III 全集成补偿网络设计郭卓奇，高源，范世全，陆浩，耿莉基金项目：教育部博士点基金（20110201110004）；国家自然科学基金（60971049）；陕西省科技攻关（2009K08-03）作者简介：郭卓奇，（1989-），男（汉族），2011年毕业于西安交通大学，现于瑞晟微电子担任后端工程师，主要从事IC 版图设计。
通信联系人：耿莉，西安交通大学，教授。
（西安交通大学电子与信息工程学院，西安 710049）摘要：本文分析了DC-DC 变换器的TYPE-3补偿网络和仿TYPE-3补偿网络，在此基础上设计了一种改进型仿TYPE-3补偿网络。
利用频带分裂的思想，将补偿网络的频率响应分为低频和高频两个路径，使用电压-电流-电压（V-I-V ）加法器实现两路信号的相加，用一个单级运放和一个小电容实现低通路径。
电路采用标准0.18μm CMOS 工艺设计，并应用在一个Buck 变换器中，变换器的开关频率为1MHz 。
仿真结果表明：当Buck 变换器的输出负载在200mA 至400mA 之间跳变时，输出电压在25μs 内可以稳定。
和传统TYPE-3补偿网络相比，本文设计的补偿网络面积减小了60%，功耗降低了90%。
关键词：集成电路设计；补偿网络；电压-电流-电压加法器；低通滤波器中图分类号：TN43A fully integrated design of improved Pseudo Type-III compensation for DC-DC converters GUO Zhuoqi, GAO Yuan, FAN Shiquan, LU Hao, GENG Li (The School of Electronic and Information Engineering, Xi'an Jiaotong University, Xi'an 710049) Abstract: In this paper, we analyze TYPE-3 and Pseudo TYPE-3 compensation network of the DC-DC converter. Then an improved Pseudo TYPE-3 compensation is presented. With the idea of spectrum-splitting, the frequency band of the compensation is divided into two paths: low and high frequency bands. A voltage-current-voltage (V-I-V) adder is designed to achieve the summation of the two band signals. We also presents a low-pass filter consisting of a simple op-amp and a small capacitor to achieve the low frequency band. The design uses a standard CMOS 0.18μm process and the simulation results show that the DC-DC converter's output is settled within 25μs for a load current step between 200mA and 400mA. Compared to the traditional TYPE-3 compensation, the chip area and power consumption of the improved compensation network is reduced by 60% and 90% respectively. Keywords: IC design; TYPE-3 compensation network; voltage-current-voltage (V-I-V) adder; low-pass filter0 引言DC-DC 变换器中通常需要加入补偿网络来稳定输出电压并且提高响应速度[1],[2]。
dcdc转换器的故障排除流程1.首先检查电源线是否接触良好。
First, check if the power supply line is well connected.2.确保输入电压符合设备规格要求。
Make sure the input voltage meets the specifications of the equipment.3.检查转换器的电气连接是否正确。
Check if the electrical connections of the converter are correct.4.检查转换器内部的散热器是否正常工作。
Check if the internal heat sink of the converter is working properly.5.通电后，观察是否有异常声音或异味。
After power-on, observe if there are any abnormal noisesor odors.6.判断是否有电路板或元器件的损坏。
Determine if there is any damage to the circuit board or components.7.使用万用表检查电路的连通性。
Use a multimeter to check the continuity of the circuit.8.检查电解电容是否出现漏液或鼓包。
Check if the electrolytic capacitor is leaking or bulging.9.测量输出端的电压和电流是否正常。
Measure if the output voltage and current are normal.10.检查是否有电路板焊点脱落或氧化。
Check for solder joints or oxidation on the circuit board.11.重新固定松动的连接器或螺丝。
DC TO DC CONVERTER轉換器基本原理介绍Input Current﹕输入电流 Output Current﹕输入电流或负载电流Input Filter﹕输入滤波 Output Ripple and Noise﹕输出莲波和噪声 Switching Frequency﹕开关频率 Load Resistance﹕输出负载电阻Isolation Voltage DC﹕绝缘电压或高压直流电压Isolation Resistance﹕绝缘电阻Efficiency﹕效率 Watt﹕功率Load Regulation﹕负载调整率 Line Regulation﹕线性调整率Output Full Load﹕输出满负载 Output On Load﹕输出空负载Single Output Series﹕单组输出系列 Dual Output Series﹕双组输出系列Dual Separate Output﹕隔离的双组系列SIL﹕单排 DIL﹕双排O C P﹕过电流保护 Over CurrentO V P﹕过电压保护 Over VoltageO W P﹕过功率保护 Over WattO T P﹕过温度保护 Over TemperatureOperating Temperature﹕运行或操作温度Storage Temperature﹕贮存温度Min ﹕最小值Minimum Max﹕最大值 Maximal Typ﹕中间值二、帛汉DC TO DC CONVERTER产品令明方式主要系列﹕B1, B2, B3, B4, B5, B6, B7, B7W, F7, B8W, B9, BB, BD, BP, SPX, DPX , PA, CFUS, CGRX, CAX, BA, SM1, ST1。
B1系列输出功率为1W﹐分 Single Output Series﹐Dual Output SeriesDual Separate Output在三种中又分SIL单排﹐DIL双排两种。
Study On an Improved DC-DC Converter Basedon ZVZCS PWM Three-LevelWu XinDep.of computer & information Engineering Luoyang Institute of Science and Technology, Luoyang 471023, Chinae-mail :wuxin66@Xin YiboDep.of Control Science and EngineeringHuaZhong University of Science and Technology, Wuhan 430074, ChinaDep. of Electrical Engineering and Automation Luoyang Institute of Science and Technology, Luoyang 471023, China e-mail: xinyibo@Fang HuajingDep.of Control Science and EngineeringHuaZhong University of Science and Technology, Wuhan 430074, Chinae-mail: hjfang@Abstract —The advantage of three-level converter is that the voltage stress is only the half of input voltage. A DC-DC converter based on improved three-level topology combining soft-switching ZVZC PWM controlling is proposed in this paper. And the converter structure and working principle is analyzed. Through computer simulation the performance is evaluated and experimental results indicate that the proposed technique is correct and effective. The converter is very suitable for the situation of high power quality waveforms, low EMI and high voltage capability.Keywords - three-level;DC-DC converter; soft-switchingI. I NTRODUCTIONThe three-level DC-DC converter can decrease the switching voltage stress to only half the input voltage. Combination of this circuit structure and soft-switch controlling is very suitable for high voltage and high-power applications [1]. To improve conversion efficiency, a new type of three-level converter with ZVZCS PWM (zero-voltage zero-current pulse-width modulation) controlling as the power supply design is proposed in this paper[1].In order to improve the working conditions of the main power switches and improve system efficiency, the three-level converter power switches tend to work in the soft-switching conditions. However, the current technology researches of three-level soft-switch mostly concentrated in areas of active soft-switching. There has been a number of available topology and conclusions, but there are always an added active auxiliary switch so that the conversions become more complex both detection and control corresponding. So that is not appropriate for the multi-level converter with large number of power switches and the complex circuit topology and controlling. The main problem of an original ZVZCS PWM three-level converter is that the hysteresis control is difficult to achieve ZVS in light load conditions, only in the original side for additional inductor can be achieved[2]. However, inductance increase with the transformer leakage inductance's combined action, enlarges the primary side the breakover loss andreduces converter's efficiency. And the magnetic inductance device is difficult to be manufactured with high cost. At the same time in use it will also increase core power loss.To address the above problems, this paper presents a novel converter power circuit structure based on the ZVZCS PWM three-level. And the how the circuit works is discussed, the soft-switching achieving conditions and strategies are proposed in this paper. On this basis, the selection principles of the main components of the circuit parameters and PWM controlling methods are discussed. Simulation and experimental results show that the circuit structure and control methods are effective for the designing the DC-DC power supply .II.TOPOLOGY AND CONTROLA. Structure of a three-level converterThe Structure topology of a three-level converter is shown in Fig.1. In this structure each three-level bridge is composed of fours switches Q 1～Q 4 (including inside diode D l ～D 4 and the switch parasitic capacitance C 1～C 4), C S is a flying-capacitor, Co is an output capacitor and LK is a transformer magnetizing inductor. Comparing with the traditional three-level convert circuit, the two-level bridges constituted by the Q 5, Q 6 and D 5, D 6 are added in this new convert circuit so that the switching may always occurs at ZVZCS, and thus, permits all the advantages of soft switching[3].Fig. 1 Structure of a three-level convert978-1-4244-5895-0/10/$26.00 ©2010 IEEEB. ControllingThe principle of the new type of ZVZCS PWM controlling is analyzed in this chapter. The Structure of a three-level convert is illustrated in Fig.1. The principle of operation in steady state condition is described with following assumptions: (1). All switching devices and other components are the ideal devices.(2). Output filter inductor L k is considered large so that it acts as constant current source equal to output current.(3). There are four capacities on each switching bridged one, and C 1=C 2=C 3=C 4.The switching sequence waveforms of the convert is shown in Fig.2. Q 1, Q 4 and Q 2, Q 3 are same phases respectivel y；,Q 5 and Q 6 are reversal phases and there are a lag phase difference related to Q 2 and Q 3. (i.e. smallest phase shifting angle). For the convenience analysis, , we defined that Q 1 and Q 4 are the chopping switches ；Q 2 and Q 3 are the leading switches ；Q 5 and Q 6 are the lagging switches according to the switches functions. When Q l and Q 4 are controlled, the dead area are established between Q 2 and Q 3, and between Q 5 and Q 6 as well. So that Q 5 and Q 6 are achieved ZCS condition. The output voltage is three level waveforms.Fig.2 The switching sequence and theoretical waveforms of the convertC. Operation principleThe equivalent circuit for a half cycle of operation in CCM(continuous conduction mode) shows in Fig.3.The second half cycle is the mirror image of the first half cycle. The relevant eight sequential operation modes are described below ：Mode 1: Q 1, Q 2, Q 4 are turned-on at the same time. The voltage between AB is V AB = V in . The transformer T primary-side current i P is NIo (N is the transformer turns ratio). Thecapacitor C o is charging state. V co is gradually increased and the converter is in the energy output state.Mode 2：Q 1 is turned-off. C 1 is charged in constant current of the transformer primary side current i P , and V C1 is up. C 4 is discharge through C s and V C4 is decreased linearly. Under the action of both C 1 and C 4 ,Q 1 is turned-off near zero voltage. Mode 3: D 7 is turned-on. The voltage of C s is stable in2in Vand the voltage of Q 4 clamp at zero. V AB =2inV and the circuit is still in energy outputting state.Mode 4: Q 2 is turned-off. C 2 is charged in constant current i P and V C2 going up linearly; C 3 is discharged through C S andV C3 is decreased in linear. Under the action of both C 1 and C 4 ,Q 2 is turned-off at zero-voltage.Mode 5: At this time V C2 =2inV and V C3 = 0. Both D 3 and D 4 are turned-on . Both Q 3 and Q 4 are located in the zero-voltage and lead both Q 3 and Q 4 turned-on in zero-voltage. V AB was also located in the zero-voltage. Under the action of V CO the original current i P is decreased linearly. Mode 6: i P is reducing and D 6 is blocking i P reverse increased lead i P becoming zero. Q 6 is turned-off zero-current. Because the original current i P becoming zero, the voltage of C o is to be the voltage V AB .Mode 7: Q 5 is turned-on. Because the current can not be mutated, Q 5 is opening in zero current. And it leads V AB =-V in , primary side current of transformer flowing through Q 3, Q 4, Q 5. When both V in and V co are loaded ,the L K and the current i P increased reversely;Mode 8: With i P backs toNI o, the circuit re-stated in the state that the energy is outputed . The circuit is running to the second half cycle because Q 4 turned-off .The working process is similar with the previous half-cycle. V AB output waveform and the current i P waveforms is shown in Fig.3. Generally when the magnetizing inductance is very large, the magnetizing current is very small. So their difference is even smaller, but if N is the larger, the influence on the current sharing will be significantly.Fig.3 V AB and I P theoretical waveforms of the convertIII. A NALYSIS OF SOFT -SWITCHING STATEA. How to chopper switches at ZVSThe junction capacitance of both chopper control switches Q 1 and Q 4 can ensure the switches achieving zero-voltage turning-off. In order to achieving zero-voltage opening, the junction capacitance voltage of the conduction chopperswitches must be from 2in Vdown to 0. At the same time, thejunction capacitance voltage of the turning-off chopperswitches must be from 0 up to 2in V. This is the process thatenergy was exchanged between two chopper switches the junction capacitances of Q 1 and Q 4 [4]. From the Mode 1, one can see that both the output filter inductor and resonant inductor is in series with each other in the process of the chopper switching. Energy from both the filter inductor and resonant inductor are used to exchange in between the chopper switches Q 1 and Q 4. In this convert the output filter inductor isdesigned large enough to achieve ZVS even, and the load becomes lighter. In other words, the chopper switches can be a very wide load range to achieve ZVS. And like the chopper switches, both Q 2 and Q 3, the leading switches used the energy samely from both filter inductor and resonant inductor to achieve ZVS at wide load ranges.B. how to lag switches at ZCSIn order to make the lagging switches both Q 5 and Q 6 achieving the ZCS, one must turn off them before their current decrease to zero. Mode4 is the time of the voltage Vco leading to current i P reduced to zero. This time has no relation with any load. As long as this period is long enough to allow current i P to be zero, one can make both Q 5 and Q 6 achieving the ZCS at any loads.C. Power Architecture DesignAs the main circuit is a three-level structure, it is needed to design six switch control circuit. In order to simplify the circuit design, using a phase-shifted PWM IC UC3875 and an UC3524 controllers constitute a control circuit[5]. IC UC3875 is a soft-switching phase-shifted full-bridge resonant controller ASIC, which is characterized as follows: PWM pulse duty cycle 0-100%; programmable control output delay; switching frequency 2MHz. UC3524 is a PWM ASIC and can be achieved synchronous operation with the UC3875. So they are the ideal control ICs. The schematic diagram of the designed power supply is shown in Fig.4.Fig.4 The schematic diagram of the designed power supplyTransformer turns ratio is the key parameter, the calculation formula is:)1(2r OinD D V V N −+=(1) Where, V o is the output voltage, D is the duty cycle for the PWM control, D r reset for the current duty cycle. Calculate the value of capacitor C o :)2(2.0r in o o T TNV I C −=(2)Where, T for the control period, T r to reset the time. Other major parameters are[6]: input DC voltage 300V ~ 310V , output DC voltage 48V , rated output current I o = 24A , switching frequency 100 kHz, C s = C a = C b = 380μF ,transformer turns ratio N = 2.8, transformer primary side leakage inductance L k = 70μH , DC blocking capacitor C o = 0.33μF . The experimental waveforms of the Q 5 to ZCS and Q 2 to ZVS shows in Fig.5.Fig.5 (a) Q 5experimental waveforms of ZCSFig.5 (b) Q 2 experimental waveforms of the ZVSIV. CONCLUSIONAn new DC-DC Converter designed in this paper does not use conventional DC-DC converters, but the improved three-level topology and combined to ZVZCS PWM soft-switching control circuit .Experiments and prototype show that this design has a high conversion efficiency, cost reduction, easy to control, good stability, a higher value in engineering.R EFERENCES[1] Xin yibo,Chen wenqing, Fang huajing, “Research on the CascadedInverters Based on Simplex DC Power Source”. 2008 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING, VOLS 1 AND 2: 461-463 2008[2] G. C. Hua, W. A. Tabisz, C. S. Leu, N. Dai, “Development of a DCdistributed power system.” IEEE Applied Power Electronics Conference Proc., Orlando, FL: 2002, 763-769.[3] Xin Yi-bo,“Research on Generator Exciter Using Novel Interleaving”.Large Electric Machine and Hydraulic Turdine, 2007 No.4 53～55. ( in Chinese)[4] Michael T,Zhang, Milan M. Jovanovic, “Analysis and Evaluation ofInterleaving Techniques in Forward Converters,” IEEE Trans. On Power Electronics, 2004, 13(4): 690-698[5] Xin Yibo,Wu Xin,Jiang Jianhu, “High Frequency Inverter Based on SoftSwitching Module”. PROCEEDINGS OF THE SECOND INTERNATIONAL SYMPOSIUM ON TEST AUTOMATION & INSTRUMENTATION, VOL. 3: 1509-1511 2008[6] Chen Guo-cheng, Novel Power Electrnic Converting Technology,China Electric Power Press Beijng, 2004， 90~98. (in Chinese)。
