MB40166中文资料
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R-2R RESISTOR NETWORK
24 VOUT
15 28
D.GND
17 26
A.GND
16 27
VCCD
18 25
VCCA
23
COMP
Note : The circuits within the dotted lines above are different for MB40166 and MB40176.
– Clamp capacitor is connected between these pins.
–
I A/D conversion clock input.
O Analog signal output.
I Digital signal input. (DD1: MSB, DD6: LSB)
Phase compensation capacitor is connected. – Insert a capacitor of 1 µF or more between this pin and
VINA
-0.5 to VCCA +0.5
V
Storage Temperature
TSTG
-55 to +125
°C
NOTE:
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
LATCH &
BUFFER
0.8VCCA (MSB)
13 DA1
12 DA2
11 DA3
R 62
R 63
10 DA4
9 DA5 8 DA6
(LSB)
R2 VREF 22
DACK 1
DD1
(MSB) 2 6 to
DD6
7
(LSB)
6
MASTER 6 SLAVE
REGISTER
6 BUFFER
CURRENT 6 SWITCH
MB40166 has an independent analog input terminal for the A/D section and a
clamp voltage output terminal, while MB40176 has an analog input in the A/D
section internally connected with the clamp circuit.
:±0.8% max.
• Maximum Conversion Rate
:20 MSPS min.
• Analog Input Voltage Range :VREF to VCCA (MB40166)
0 to 1.0 V (MB40176)
• Analog Output Voltage Range :VCC to VCC -1 V
is fabricated with Fujitsu Advanced Bipolar Technology. MB40166 and MB40176
have the same basic circuits and functions, with the only difference being that
26
4
25
5
24
6
23
7
MB40166
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
(FPT-28P-M01) (DIP-28P-M03)
D.GND VCCD A.GND VCCA VOUT COMP VREF VINA VCLMP (N.C.) VCCA A.GND VCCD D.GND
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元器件交易网
MB40166/MB40176
s PIN DESCRIPTIONS
Section
Pin No.
40166 40176
21
–
–
19
Symbol
VINA VIN
A/D
D/A Common
Other
22
8 to 13
20
–
–
20
–
21
14
24
2 to 7
23
1
18, 25
2
元器件交易网
s BLOCK DIAGRAM
• MB40166
MB40166/MB40176
VCLMP 20 VINA 21
CLAMP
0.8VCCA
REFERENCE VOLTAGE
GENERATOR
ADCK 14
VCCA
R1 1
R 2
63 to 6 ENCODER
0.8VCCA
Analog Input Voltage
Digital High-level Input Voltage Digital Low-level Input Voltage Clock Frequency Clock Pulse Width at High Level Clock Pulse Width at Low Level Set-up Time Hold Time Phase Compensation Capacitance Clamp Capacitance Reference Voltage Capacitance Operating Temperature
Symbol
VCCA, VCCD VINA VIN VIHD VILD fCLK tW+ tWtS tH
CCOMP CCLAMP CVREF
Ta
Min 4.75 VREF
0 2.0 – – 20 20 12.5 7.5 1.0 1.0 1.0 0
ValueLeabharlann Typ 5.00– – – – – – – – – – – – –
Since both models contain a single-chip clamp circuit and a reference voltage
circuit, they are ideal for video signal processing.
• Resolution
:6 bits
• Linearity Error
• Digital I/O Level
:TTL Level
• Power Supply Voltage
:+5 V
• Power Dissipation:300 mW typ.
• Package
28pin Plastic FLAT Package (Suffix : -PF) 28pin Plastic DIP Package (Suffix : -P)
DACK (MSB) DD1
DD2 DD3 DD4 DD5 (LSB) DD6 (LSB) DA6 DA5 DA4 DA3 DA2 (MSB) DA1 ADCK
(TOP VIEW)
1
28
2
27
3
26
4
25
5
24
6
23
7
MB40176
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
(FPT-28P-M01) (DIP-28P-M03)
元器件交易网
FUJITSU SEMICONDUCTOR DATA SHEET
ASSP
AD/DA CONVERTER
DS04-28500-5E
MB40166/MB40176
1-CHANNEL 6-BIT AD/DA CONVERTER WITH CLAMP CIRCUIT
The Fujitsu MB40166 and MB40176 are low power 6-bit AD/DA converter which
– Ground for digital circuit. (0 V)
– No connection.
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元器件交易网
MB40166/MB40176
s RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
3
元器件交易网
MB40166/MB40176
s BLOCK DIAGRAM (Continued)
• MB40176
VIN 19 C1 20 C2 21
CLAMP
0.8VCCA
REFERENCE VOLTAGE
GENERATOR
ADCK 14
VCCA
R1 1
R 2
63 to 6 ENCODER
CURRENT 6 SWITCH
R-2R RESISTOR NETWORK
24 VOUT
15 28
D.GND
17 26
A.GND
16 27
VCCD
18 25
VCCA
