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CY7C1399BN-15VXC中文资料

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256K (32K x 8) Static RAMCY7C1399BNFeatures•Temperature Ranges —Industrial: –40°C to 85°C —Automotive-A: –40°C to 85°C •Single 3.3V power supply•Ideal for low-voltage cache memory applications •High speed: 12 ns •Low active power —180 mW (max.)•Low-power alpha immune 6T cell•Available in Pb-free and non Pb-free Plastic SOJ and TSOP I packagesFunctional Description [1]The CY7C1399BN is a high-performance 3.3V CMOS Static RAM organized as 32,768 words by 8 bits. Easy memoryexpansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and tri-state drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected. An active LOW Write Enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O 0 through I/O 7) is written into the memory location addressed by the address present on the address pins (A 0through A 14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW,while WE remains inactive or HIGH. Under these conditions,the contents of the location addressed by the information on address pins is present on the eight data input/output pins.The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and Write Enable (WE) is HIGH. The CY7C1399BN is available in 28-pin standard 300-mil-wide SOJ and TSOP Type I packages.Note:1.For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at .Selection Guide-12-15-20Maximum Access Time (ns)121520Maximum Operating Current (mA)555045Maximum CMOS Standby Current (µA)Commercial 500500500Commercial (L)505050Industrial 500500Automotive-A500Logic Block DiagramPin Configurations12345678910111415162019181721242322Top ViewSOJ 121325282726GNDA 6A 7A 8A 9A 10A 11A 12A 13WE V CC A 4A 3A 2A 1I/O 7I/O 6I/O 5I/O 4A 14A 5I/O 0I/O 1I/O 2CE OE A 0I/O 3A 1A 2A 3A 4A 5A 6A 7A 8COLUMN DECODERR O W D E C O D E RS E N S E A M P SINPUT BUFFERPOWER DOWNWE OEI/O 0CE I/O 1I/O 2I/O 332K x 8ARRAYI/O 7I/O 6I/O 5I/O 4A 9A 0A 11A 13A 12A 14A 10CY7C1399BNMaximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.)Storage Temperature .................................–65°C to +150°C Ambient Temperature withPower Applied.............................................–55°C to +125°C Supply Voltage on V CC to Relative GND [2]....–0.5V to +4.6V DC Voltage Applied to Outputsin High Z State [2]....................................–0.5V to V CC + 0.5V DC Input Voltage [2].................................–0.5V to V CC + 0.5VOutput Current into Outputs (LOW).............................20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015)Latch-Up Current.................................................... >200 mAPin Configuration2223242526272812510111514131216191817Top ViewTSOP 3420217689OE A 1A 2A 3A 4WE V CC A 5A 6A 7A 8A 9A 0CE I/O 7I/O 6I/O 5GND I/O 2I/O 1I/O 4I/O 0A 14A 10A 11A 13A 12I/O 3Operating RangeRange Ambient Temperature V CC Commercial 0°C to +70°C 3.3V ±300 mVIndustrial –40°C to +85°C Automotive-A–40°C to +85°CElectrical Characteristics Over the Operating Range [1]Parameter Description Test Conditions-12-15-20UnitMin.Max.Min.Max.Min.Max.V OH Output HIGH Voltage V CC = Min., I OH = –2.0 mA 2.4 2.42.4VV OL Output LOW Voltage V CC = Min., I OL = 4.0 mA0.40.40.4V V IH Input HIGH Voltage 2.2V CC + 0.3V 2.2V CC + 0.3V 2.2V CC + 0.3V V V IL Input LOW Voltage [2]–0.30.8–0.30.8–0.30.8V I IX Input Leakage Current –1+1–1+1–1+1µA I OZ Output Leakage Current GND ≤ V I ≤ V CC ,Output Disabled –5+5–5+5–5+5µA I CC V CC Operating Supply Current V CC = Max., I OUT = 0 mA, f = f MAX = 1/t RC 555045mA I SB1Automatic CE Power-Down Current— TTL Inputs Max. V CC , CE ≥ V IH , V IN ≥ V IH , or V IN ≤ V IL , f = f MAXComm’l 555mA Comm’l (L)44mAInd’l 55Auto-A5I SB2Automatic CE Power-Down Current— CMOS Inputs [3]Max. V CC , CE ≥ V CC – 0.3V , V IN ≥ V CC – 0.3V , or V IN ≤ 0.3V ,WE ≥V CC – 0.3V or WE ≤ 0.3V ,f =f MAXComm’l 500500500µA Comm’l (L)5050µA Ind’l 500500µA Auto-A500µANotes:2.Minimum voltage is equal to –2.0V for pulse durations of less than 20 ns.3.Device draws low standby current regardless of switching on the addresses.CY7C1399BNCapacitance [4]ParameterDescription Test ConditionsMax.Unit C IN : Addresses Input CapacitanceT A = 25°C, f = 1 MHz, V CC = 3.3V5pF C IN : Controls 6pF C OUTOutput Capacitance6pFAC Test Loads and Waveforms [5]Switching Characteristics Over the Operating Range [5]Parameter Description-12-15-20UnitMin.Max.Min.Max.Min.Max.Read Cycle t RC Read Cycle Time 121520ns t AA Address to Data Valid121520ns t OHA Data Hold from Address Change 333ns t ACE CE LOW to Data Valid 121520ns t DOE OE LOW to Data Valid 567ns t LZOE OE LOW to Low Z [6]0ns t HZOE OE HIGH to High Z [6, 7]566ns t LZCE CE LOW to Low Z [6]333ns t HZCE CE HIGH to High Z [6, 7]677ns t PU CE LOW to Power-Up 0ns t PD CE HIGH to Power-Down 121520ns Write Cycle [8, 9]t WC Write Cycle Time 121520ns t SCE CE LOW to Write End 81012ns t AW Address Set-Up to Write End 81012ns t HA Address Hold from Write End 000ns t SA Address Set-Up to Write Start 000ns t PWE WE Pulse Width81012ns t SD Data Set-Up to Write End 7810ns t HD Data Hold from Write End 0ns t HZWE WE LOW to High Z [8]777ns t LZWEWE HIGH to Low Z [6]333nsNotes:4.Tested initially and after any design or process changes that may affect these parameters.5.Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I OL /I OH and capacitance C L = 30 pF.6.At any given temperature and voltage condition, t HZCE is less than t LZCE , t HZOE is less than t LZOE , and t HZWE is less than t LZWE for any given device.7.t HZOE , t HZCE , t HZWE are specified with C L = 5 pF as in AC Test Loads. Transition is measured ±500 mV from steady state voltage.8.The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.9.The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of t HZWE and t SD .3.0V 3.3V OUTPUT R1 317ΩR2351ΩC LINCLUDING JIG AND SCOPEGND90%10%90%10%≤3ns≤3nsOUTPUT1.73VEquivalent to:THÉVENIN E QUIVALENTALL INPUT PULSES 167ΩCY7C1399BNData Retention Characteristics (Over the Operating Range - L version only)Parameter DescriptionConditionsMin.Max.Unit V DR V CC for Data Retention 2.0V I CCDR Data Retention Current V CC = V DR = 2.0V,CE > V CC – 0.3V,V IN > V CC – 0.3V or V IN < 0.3V020µA t CDR Chip Deselect to Data Retention Time0ns t ROperation Recovery Timet RCnsData Retention Waveform3.0V 3.0V t CDRV DR >2VDATA RETENTION MODEt RCEV CC Switching WaveformsRead Cycle No. 1[10, 11]Read Cycle No. 2[11, 12]Notes:10.Device is continuously selected. OE, CE = V IL .11.WE is HIGH for read cycle.12.Address valid prior to or coincident with CE transition LOW.ADDRESSDATA OUTPREVIOUS DATA VALIDDATA VALIDt RCt AAt OHA50%50%DATA VALIDt RCt ACEt DOEt LZOEt LZCEt PUDATA OUTHIGH IMPEDANCEIMPEDANCEICCISBt HZOE t HZCEt PDOECEHIGH V CC SUPPLY CURRENTCY7C1399BNWrite Cycle No. 1 (WE Controlled)[8, 13, 14]Write Cycle No. 2 (CE Controlled)[8, 13, 14]Write Cycle No. 3 (WE Controlled, OE LOW)[9, 14]Notes:13.Data I/O is high impedance if OE = V IH .14.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.15.During this period, the I/Os are in the output state and input signals should not be applied.Switching Waveforms (continued)t HDt SDt PWEt SAt HAt AWt WCDATA I/OADDRESSCEWEOEt HZOEDATA IN VALIDNOTE 15t WCt AWt SAt HAt HDt SDt SCEWEDATA I/OADDRESSCEDATA IN VALIDDATA I/OADDRESSt HDt SDt LZWEt SAt HAt AWt WCCEWEt HZWEDATA IN VALIDNOTE 15CY7C1399BN Truth TableCE WE OE Input/Output Mode PowerH X X High Z Deselect/Power-Down Standby (I SB)L H L Data Out Read Active (I CC)L L X Data In Write Active (I CC)L H H High Z Deselect, Output Disabled Active (I CC)Ordering InformationSpeed(ns)Ordering Code PackageDiagram Package TypeOperatingRange12CY7C1399BN-12VC51-8503128-Lead Molded SOJ Commercial CY7C1399BN-12VXC28-Lead Molded SOJ (Pb-free)CY7C1399BN-12ZC51-8507128-Lead TSOP ICY7C1399BN-12ZXC28-Lead TSOP I (Pb-free)CY7C1399BNL-12ZC28-Lead TSOP ICY7C1399BNL-12ZXC28-Lead TSOP I (Pb-free)CY7C1399BN-12VXI51-8503128-Lead Molded SOJ (Pb-free)Industrial 15CY7C1399BN-15VC28-Lead Molded SOJ Commercial CY7C1399BN-15VXC28-Lead Molded SOJ (Pb-free)CY7C1399BN-15ZC51-8507128-Lead TSOP ICY7C1399BN-15ZXC28-Lead TSOP I (Pb-free)CY7C1399BNL-15ZXC28-Lead TSOP I (Pb-free)CY7C1399BNL-15VXC51-8503128-Lead Molded SOJ (Pb-free)CY7C1399BN-15VI28-Lead Molded SOJ IndustrialCY7C1399BN-15VXI28-Lead Molded SOJ (Pb-free)CY7C1399BN-15ZI51-8507128-Lead TSOP ICY7C1399BN-15ZXI28-Lead TSOP I (Pb-free)CY7C1399BN-15VXA51-8503128-Lead Molded SOJ (Pb-free)Automotive-A 20CY7C1399BN-20ZXC51-8507128-Lead TSOP I (Pb-free)Commercial Please contact local sales representative regarding availability of these parts.CY7C1399BN Package DiagramsDocument #: 001-06490 Rev. *A Page 7 of 8CY7C1399BN Document History PageDocument Title: CY7C1399BN 256K (32K x 8) Static RAMDocument Number: 001-06490REV.ECN NO.ISSUEDATEORIG. OFCHANGE DESCRIPTION OF CHANGE**423877See ECN NXR New Data Sheet*A498575See ECN NXR Added Automotive-A rangeRemoved I OS parameter from DC Electrical Characteristics tableUpdated Ordering Information table.。

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FPGA可编程逻辑器件芯片XCZU7EV-2FFVF1517I中文规格书

FPGA可编程逻辑器件芯片XCZU7EV-2FFVF1517I中文规格书

CoolRunner-II Serial Peripheral Interface MasterThe receive full flag (RCV_FULL) is set whenever data is loaded from the SPI receive shiftregister to the SPIRR. This signal is clocked from the system clock and is reset whenever theμC reads data from the SPIRR.SCK Clock LogicThis process generates the SCK output based on the CLKDIV, CPHA, and CPOL settings inthe SPI control register. The clock frequency of the SCK signal is determined by dividing downthe input clock based on the entries in the control register. The signal, SCK_INT is the internalSCK used to clock serial data out of the device and is continually generated. The SPI Controlstate machine is synchronized to this internal signal. The signal SCK_1 represents SCK whenCPHA = 1 and the signal SCK_0 represents SCK when CPHA = 0. The SPI control statemachine generates the masks for these clocks (CLK0_MASK, CLK1_MASK) so that the outputSCK has the correct phase relationship with the data and is held in its inactive state when thereis no data to be transferred. A representation of the logic required to generate the SCK signaloutput to the SPI bus is shown in Figure8.Figure 8: SCK Clock Generation LogicSPI Shift RegistersSPI Transmit Shift RegisterThe SPI transmit shift register is an 8-bit loadable shift register containing SPI data. This shiftregister is loaded from the SPI Transmit Register (SPITR) via a load signal generated by theSPI Control state machine and is clocked by the rising edge of SCK_INT. The data shifting outis the MOSI data. Note that in Figure8, SCK_OUT is one SYS_CLK delay from SCK_INT.Therefore, it is necessary to delay the data being shifted out from the SPI transmit shift registerby one SYS_CLK as well so that the relationship between MOSI and SCK_OUT is maintained. XAPP386 (v1.0) December 12, 2002White Paper: CoolRunner-II CPLDs in Cell Phone Handsets/Terminals But what about new applications that are not in this group? There are applications yet to come that we can envision, but whose exact specifications we cannot wholly anticipate. Designing for their arrival is sometimes called “future proofing.”It is true that some applications are better served by microprocessor code dropped into on board EPROM, but that can only happen as long as the processor bandwidth is available for the application. If this cannot be done, either more processors or additional silicon needs to be added. Either way, the application will need to interface into the phone bus network, and that will require programmable logic, very low power programmable logic.MediPhone—A Speculative Example To drive home some of these ideas, consider an idea for a product that probably does not exist today, but easily could in the near future. It will be marketed under the name “MediPhone” and will target segments of the population that require quick medical support. This would include the growing population of elderly citizens (frequently with enough money to buy these) as well as handicapped people needing close monitoring. See Figure4 for an “artist” conception of this futuristic phone.MediPhone works like this:1. A heart attack (or other medical emergency occurs)2.The victim or friend dials Emergency (911 in the U.S.)3.Personnel receiving the call at a medical facility recognize the phone is“MediPhone” equipped and extract the geographic location of the emergency using GPS4.The medic directs the friend to place the cell phone on the victim’s face5. A video camera scans the Iris for dilation to determine shock level6.The friend is directed to attach small electrodes to the forehead/ear and chest ofthe victim, where pulse is taken and EEG/EKG measurements are driven into the Internet. Everything is attached to the phone.Figure 4:MediPhone Block DiagramWP198 (v1.1) July 4, 2005。

CY7C1399BN-15VXA中文资料

CY7C1399BN-15VXA中文资料

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Automatic CE
Max. VCC, CE ≥ VCC – 0.3V, Comm’l
500
500
500 µA
Power-Down Current— CMOS Inputs[3]
VIN ≥ VCC – 0.3V, or VIN ≤ 0.3V, WE ≥VCC – 0.3V or WE ≤ 0.3V,
19 I/O7 18 I/O6
I/O5
I/O1 12
17 I/O5
I/O2 13
16 I/O4
I/O6
GND 14
15 I/O3
I/O7
A 10 A 11 A 12 A 13 A 14
Selection Guide
-12
Maximum Access Time (ns)
12
Maximum Operating Current (mA)
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015)
元器件交易网
CY7C1399BN
Pin Configuration
OE 22
A1
23
A2
24
A3
25
A4
26
WE
27
VCC
28
A5
1
A6
2
A7
3
A8
4
A9
CY7C9915-2JXC资料

CY7C9915-2JXC资料

Each output can be hardwired to one of nine delay or function configurations. Delay increments of 0.42 to 1.6 ns are determined by the operating frequency with outputs able to skew up to ±6 time units from their nominal “zero” skew position. The completely integrated PLL allows external load and transmission line delay effects to be canceled. When this “zero delay” capability of the LVPSCB is combined with the selectable output skew functions, the user can create output-to-output delays of up to ±12 time units.
Notes:
Skew Select Matrix
The skew select matrix is comprised of four independent sections. Each section has two low-skew, high-fanout drivers (xQ0, xQ1), and two corresponding three-level function select (xF0, xF1) inputs. Table 2 below shows the nine possible output functions for each section as determined by the function select inputs. All times are measured with respect to the REF input assuming that the output connected to the FB input has 0tU selected.
YXC编程器详细说明书样本

YXC编程器详细说明书样本

YX-C多功能编程器YX-C多功能编程器是咱们依照国外资料仿制一种便宜、功能繁多普及型编程器。

YX-C多功能编程器通过并口与PC连接，支持Win9x、Me、XP、NT以及操作系统；英文软件(性能稳定)，适合电脑公司、电子兴趣者、电子产品维修等工作人员使用。

使用前只需要将“YX-C程序”复制到电脑硬盘中即可。

打开文献夹“YX-C程序”，双击“EpromM51.exe”一、软件运营窗口如下：二、菜单栏：1、File（文件）：下拉菜单中Load打开需要编程文献。

下拉菜单中Save as‥另存为编程器读入文献作为备用。

下拉菜单中Exit为退出程序。

2、Edit（编辑）：编辑数据。

3、Device（选取元件）：选取芯片类型。

4、Action（操作）：对芯片进行操作，如：读写、编程/RAM测试、比较/校验、空白检查、擦除芯片、获取ID、清空缓存、颠倒数据、互换字节等。

5、Help（帮助）：联机测试等。

6、主窗口简介：三、工具栏：1、打开文献。

把编译好数据调入编程器中。

可以打开文献类型为：二进制（*.BIN）、十六进制（*.HEX）等。

2、另存为一种文献。

把正在编辑中数据此外保存为一种*.bin文献。

3、清除缓存。

4、读取芯片数据。

5、校验数据。

6、空白测试。

检测芯片存储器与否为空。

7、获取芯片ID。

8、芯片编程。

9、擦除（清空）芯片。

四、支持芯片列表EPROM ：27C16、27C32、27C64、27C128、27C256、27C512、27C010、27C020、27C040、27C1001 M27C1001、M27C、M27C400127C080，M27C801，M87C2572716(Vpp25V)、2732、2764、27128、27256、27512、27010FLASH Memory ：28F64、28F128、28F256、28F512、28F010、28F020MX26C1000、MX26C、MX28F1000、MX28FAm28F256A、Am28F512A、Am28F010A、Am28F020AIntel：i28F001BX、28F004、28F008、28F016SST28SF040A 、LE28F400129F64、29F128、29F256、29F512、29F010、29F020、29F040、29F08029F001、29F002、29F004、29F008、29F016、29F032AT29C256、AT29C512、AT29C010A、AT29C020、AT29C040、AT29C040AW29EE512、W29EE011、W29EE012、W29C020(128)、W29C040PH29EE010(W29EE011)ASD AE29F1008 (AT29C010)、AE29F (AT29C020)AT49F512、AT49F010、AT49F020、AT49F040SST39SF010、SST3S9F020 、SST39SF040AT49F001、AT49F002 、AT49F008AAm29F512、Am29F010、Am29F020、Am29F040、HY29F08029F002、29F002T、Pm29F002TEEPROM ：28C65、28C64、28C128、28C256、28C512、28C010、28C020、28C040 M28C16A/17A (DIP28)28C16、XLS2816 (DIP24)AT28C64B、AT28C256、AT28C512、AT28C010、AT28C020、AT28C040电擦 EPROM ：W27E512、W27E010、W27C010、W27C020、W27C040SST27SF256、SST27SF512、SST27SF010、SST27SF020MX26C4000Vcc = 3.3-3.6V SST37VF512、SST37VF010、SST37VF020、SST37VF040串行(I2C) EEPROM ：24C02、24C04、24C08、24C16、85C72、85C82、85C9224C32、24C64、24C128、24C256、24C512 (所有C、LC系列)PCF8572 或8572，PCF8582或8582，PCF8592或8592Microwire EEPROM ：8位模式：93C06、93C46、93LC46、93C56、93C57、93C66、93C76、93C86、93C13、93C1416位模式：AT59C11、AT59C22、AT59C13CAT35C102、CAT35C104、CAT35C10893C06A 、93C46X、93C56、93C66、93C76、93C86 (NS)SPI EEPROM ：Atmel：AT25010、020、040 (A8-A0)AT25080、160、320、640、128、256 (A15-A0)ST：W95010....256、Microchip 25x010 - 25x64025010、25020、2504025C080、25C160、25C320、25C640、25C128、25C256、25C512AT25HP256、AT25HP512AT25HP1024CAT64LCxxx (16位数据I/O)CAT64LC010、CAT64LC020、CAT64LC040PIC单片机：17XXX、18XXX系列16C84，16F84，16F84A ,16F627/16F62812C508/A，12C509/A，12CE518，12CE519，16C50516C620 16C621，16C622，16CE623，16CE624，16CE625，16C710/71151系列单片机(需要51AVR适配器) ：AT89C51、52、55、AT89LV51、52、55AT89S51、AT89S52、AT89S53、AT89LS51、AT89LS52、AT89SL53AT89S8252 (8K+2K)、AT89LS8252、AT89LS53AT89C1051、AT89C2051、AT89C4051 (20pin)AT89C51RC (32KB)、AT89C55WD (6.2V)AT89LV52,AT89C55,AT89LV55 AT89S8252,AT89LS8252,AT89S53,AT89LS53 AT87F51,AT87F52 i87C51、i87C51FA、i87C51FBi8xC51、i8xC52、i8xC54、i8xC58i87C51,i87C51FA,i87C51FB,i87C51FC,i87C52,i87C54,i87C58 AT89C51RC (32KB)，AT89C55WD等AT90S1200、AT90S231390S2333、90S4433、90S4414、90S8515、90S4434、90S8535，AT90S2313四、举例操作阐明使用编程器对W27C020进行读、擦除和写1、打开文献夹“YX-C程序”，双击“EpromM51.exe”操作软件运营窗口如下：2、用鼠标点击“Device”，在下拉菜单中点击“EPROM Electrical Erase”，再在下拉菜单中点击“Winboad 27E/27C”，最后在下拉菜单中点击“W27x020 （Vpe=14V）”。