1.Microelectronic packages – Compact models1.1ObjectiveTwo factors that determine compact package modeling approach are:•What are the designer’s objectives?⇒Selection of packages for a new design at the ‘drawing board’ level?⇒Board or system layout with known Packages?⇒Pre-prototype screening of a tentative design?⇒Design finalized, orders placed, but a few components overheat . Engineer has to come up with an innovative cooling solution with minimal design change.•What are the available information?⇒Package supplier provides compact model parameters⇒Package supplier provides detailed model information⇒Legacy package – no information available other than the package type (QFP or BGA) and externally visible information (number of balls/leads, package footprint and height etc.)This tutorial is a case study of a board design. A card is making two package type changes to an existing commercial board. The objective of the thermal simulation project is to see if the selected new packages are likely to function without overheating. If not what kind of thermal management is recommended? Based on simulation findings, wind tunnel testing will be done.1.2Model DescriptionAn Icepak model of the geometry exists. The model is “compact-package-modeling”.•Unpack the icepak job “compact-package-modeling.tzr” using “Unpack” option under “File” menu.•Rename the model to Compact-package-modeling-bLayout of the loaded model is shown in Figure 1. Available information about the board and packages is shown in Table 1.Figure 1: Layout of the board to be analyzed.Object# ofoccurrencesin model Available information Power(w)PCB1 1.6 mm thick, FR4 Material, six1 ‘ounce1’ layers of Copper,30% coverage for all layersHeat Spreader for TO-220packages3Extruded AluminumTO-220 Packages9θjc = 2.50 C/W 1.5 DIP6None0.5 400 BGA (new packagetype to the existing board)6See Table 2 2.0232 PQFP (new package type to the existing board)2232 leads, 40 mm X 40 mmFootprint, 2 mm height.3.5Table 1: Available details for objects in the modelAn ounce of copper is actually the thickness of 1 ounce/sq.ft of plane copper sheet. Using copper density this translates to a thickness of 0.035 mm.Feature Size (mm)Material /Conductivity (W/m/K)Other infoWhere to inputthis info?Overall Package 26 X 26 X 2.15Dimensions menuMoldCompound 0.8Die/Mold menu Die 18X 18 X 0.4Silicon material Die/Mold menu Die Flag 18X 18 X 0.035(equivalent)80.0(effective)Die/Mold menu Die Attach 0.05 mm thick Not mentioned Die/Mold menu Substrate 0.4 mm thick FR4Substrate menu Substrate traces0.035 mm thickCopper4 layers, top andbottom 30% coverage intermediate layers are 100% (plane layers)Substrate menuVias Unknown Not mentioned Number of vias unknownSubstrate menu (use 0 for vias)Solder Balls Standard Solder 20 X 20 count, full arraySolder menu Wire BondNot mentionedUsually GoldDie/Mold menuTable 2: Available information for 400 PBGA1.3 Model Set upPCB:• Create a PCB object by clicking on the PCB object icon, • Enter the following coords:Global Coordinates (m)Other propertiesObject type NameShape/Type/Plane XS YS ZS XE YE ZE PCBpcb.1XZ0.00.00.00.25NA0.2See Table 1.Why did we do this ?Geometry of the PCB is already available from the imported geometry. You have two options:e existing geometry and estimate effective properties based on copper contentinformation in Table 1.OR2.Recreate PCB object geometry using coordinates of the imported ‘PCB’ block.We have used the later option since, use of the PCB object eliminates tedious hand calculation of effective properties.•Then edit by clicking the click the edit icon,•Enter the PCB thickness of 1.6 mm for “Substrate thickness”•Material Information for the PCB is in Table 1. This info can be input for the selected PCB object as shown in Figure 2:Figure 2: PCB Edit Form with input based on PCB information in Table 1. Now, you should see the pcb object overlapping the block called PCB. There is no more need for this block.•Deactivate the block named PCB.Heat spreader for TO-220 devicesSince default solid material happens to be extruded aluminum, all three spreaders should have come into the model with correct material specification. Check by editing the object.Modeling PackagesThis model has 4 different types of objects. Based on available information and our objectives, we shall use compact package modeling capabilities in Icepak.TO220 Type Packages•There are 9 TO-220 device blocks. Select them all in at once by drawing a ‘window’ with shift+left mouse button (see figure 3)•You should see all TO-220 devices highlit in the tree. Please note that only TO-220 objects should be selected. If you see some other objects, please reselect. You can simultaneously edit all of them at once by clicking your right mouse on any one of the selected TO-220 objects in the tree.−Select “Network” under block type.−Select “Two Resistor” under type.−In order to assign the resistance, we need to identify a reference side. This is the purpose of “board side” input. We want the resistance to be applied from Junction to the side in contact with spreader (Max Z side). We can accomplish this in two ways:Designate Min Z side as the Board side and assign the supplier providedresistance value (2.5 C/W from Table 1) to Rjc.ORDesignate Max Z side as the Board side and assign the supplier providedresistance value to Rjb.−Input 1.5 W for Junction power.Click Done to finish operation. You should see all TO-220 blocks turning to resistance type. See Figure 4 for inputs to edit frame.Figure 3: Window (dotted line) selecting multiple objects for simultaneous edit.Figure 4: TO-220 Objects edit formWhy did we do this ?The Supplier has provided onlyθjc. To understand what this means and what to dowith the provided information, lets consider the construction of a TO-220 device.DIP type packages•As we did before for the TO_220s, edit the DIPs by right clicking one of the simultaneously selected DIP block objects in the tree.•Use Default solid material (any material will work, since we are not interested in DIP temperature)•Input the 0.5 W power in the Total Power Field.•Click DoneSave!Why Did we do this ?Dip is the package type for which we have least information. So we are left with two options:•Try to get information from supplier.OR•Perform a tentative simulation with available information.The options are considered along with the following facts:•The DIPs constitute a lower heat flux than the other components in the board.•This is an existing design in which the DIPs have been known to run well below their specified temperature even at max power.Based on the above reasoning, it’s easier to perform tentative simulation with the available power information. Note, in this context the purpose of DIP package modeling is appropriate accounting of air and PCB heating due to flow over the DIPs. Accurate prediction of DIP temperature is not an objective.PQFP package modelingInternal details are unavailable for the PQFP type package. But based on the exterior details such as lead count, foot print size, and package height information, it’s possible to construct compact model of a typical package for screening analysis.•Select ‘libraries’ item in the tree menu. Right click to select ‘search packages’•In the search window enter all known information about the package (such as package type, lead count, package foot print etc., as search criteria. Search should return a few of closest matching packages from the library. Pick the package that is most similar in description to the 232-lead PQFP info available. Figure 7 depicts the package search procedure.Search in this example usesminimal search criteria. Useadditional criteria to narrowyour search!Figure 7: Package search ProcedureIf search doesn’t return relevant package click on the package object icon to create a new package object. After entering the few known information, you may enter reasonable values or defaults for the remaining parameters.•Edit the package object created. Make sure that the ‘Package type’ is QFP•‘Plane’ is the same as the PCB plane (XZ)•the model type is ‘Compact Conduction Model (CCM)’Why did we do this?CCM is a compact model based on geometric simplifications that still preserve the original heat transfer pathways of the package. It has been demonstrated that CCM are fairly accurate and boundary condition independent. Other options under ‘Model type’ are:•To model package in full detail. This option is meant for package level modeling.Using this in board or system design will unduly complicate the simulation.•To characterize Junction-to-case and Junction-to-board network resistances for two resistance compact model. We will be doing this for the PBGA package.•‘Symmetry’ is ‘Full’. If the default value of package height is different from 2mm, correct it.•Select the ‘Die/Mold’ tab (The ‘substrate’ and ‘Solder’ tabs show blank interface since QFP type packages do not have solder or substrate.). Enter 3.5 W for Power.•Use all other defaults under ‘Die/Mold’ tab. Click ‘Done’.•The package thus created is in an arbitrary location. You may use align-face centers icon, to position the base center of the created package object with that of the ‘232PQFP’ block. Following is the step by step procedure:Left mouse click onSelect the min Y side of the Package object using left-click (zoom, pan and rotate view using F-9 key as toggle)Middle mouse key to accept once the min Y surface is selected.Left-click on the reference surface to align with – this is the min Y side of the block called 232PQFP.Middle mouse key to accept surface selection.Karimanal, K. V. and Refai-Ahmed, G., “Validation of Compact Conduction Models of BGA UnderAn Expanded Boundary Condition Set”, Proceedings of the ITHERM 2002, May, 2002, San Diego, Ca, USA.)•There is no more need for the 232PQFP block. Deactivate it.•There is another ‘232PQFP’ block. Create a copy of the first package object and align with the remaining ‘232PQFP’ block. (You can accomplish this by copy-translating with the appropriate X offset. The offset value can be determined using Distance utility under View in the main menu.)•Deactivate the second block called ‘232PQFP’.Save!PBGA package modelingWe have fairly comprehensive information about the PBGA type package from the supplier (see Table 2). Using this information we can construct a CCM or characterize to determineθjc andθjb to model it as a 2-resistor network model. The procedure to determine resistance values for a 2 resistor model is described in another tutorial exercise (Microelectronic Package Characterization – Detailed Model). Representation of 400-PBGA block as 2 resistor models•Select all the blocks named 400-PBGA. By right mouse button clicking on any of the selected blocks, you can edit all of them simultaneously.•Select Network and 2 Resistor options.•The board side is the Min Y side of the blocks.•Input estimatedθjc(1.4 C/W) andθjb(6.75 C/W) values in the Rjc and Tjb fields respectively.•Done to finish.1.4Boundary conditionsLet us solve the board model with a 1 m/s inlet velocity.•Edit the cabinet. Under Properties menu, you have the option to define the boundary condition (Wall Type) for each side of the cabinet. Define MinX and MaxX sides as openings (See Figure 8).•By editing the minX side assign X velocity = 1 m/s for the min X side opening.Click Done to close the opening edit window.•The Max X side opening should have default settings (free opening)•All other cabinet boundaries should be Default.•Click Done in the Cabinet Edit window to confirm changes.•You should see openings on the min and max X sided of the cabinet.Figure 8: Cabinet Edit screen.Now, you have successfully built a model that uses different compact models of packages. Meshing, solution and post-processing/reporting are the remaining tasks. Save!1.5Meshing•Click the Mesher Icon .•Select Hexa Cartesian4for Mesh Type and Normal for Mesh Parameters (See Figure 9).•Generate mesh.•Use Mesh viewing tools to evaluate your mesh.All Geometric features in this model are rectangular. Hence Cartesian Mesh option is sufficient.Figure 9: Mesh settings.1.6Solution•Define point monitors of temperature by dragging selected objects in the tree into Monitor points folder (Figure 10).•Start Solution.Monitor points are a complementary way of checking for incomplete convergence. If the values plotted by the point monitors are changing significantly between iterations, the solution cannot be considered as ‘converged’.This places a point monitor at the centroid of the selected objects. Since network objects do not have mesh in their volume, centroid monitor points will not be createdfor them.Drag and drop todefine monitor points1.7Post Processing and ReportingFirst we would like to get an idea of the general temperature distribution pattern on the board.•Create object face contours of the PCB by clicking the icon.−Probe temperature values at desired location after clicking on probe icon,−Note the higher temperatures in the parts of the PCB under the 400-PBGA blocks.•Click on Report main menu and select Network block values. Message window in the bottom right region will list all network block temperatures.•The closeness of the PBGAs to each other is a cause for their overheating. How much is the problem due to the temperature of the air approaching these components?− A picture of the thermal boundary layer over the PBGAs can be seen by taking XY cut plane of temperature contours over the PBGA blocks.•What is the cause for the somewhat high temperatures of the TO-220 devices?−Are the heat spreaders too close? If so, the air flowing between the spreaders will overheat preventing further heat dissipation to the air. You can find out if this is the case by creating XZ cut planes of vectors and contours that cut across the Spreader blocks.•The highest temperatures are in the 400-PBGA blocks. Effective cooling solutions can be designed by understanding heat flow pathways.−Generate a summary report of heat flow for selected 400-PBGA blocks. By deactivating the button under Comb in the summary report panel, you can generate an itemization of heat flow through each of the sides of the object. Potential Cooling SolutionsPost processing showed that the 400-PBGA are the most critical components since they are the hottest. Here are some cooling ideas:What if...1.The flow is in the negative X direction?2.The flow is in the negative X direction, and by judicious use of flow resistances,more flow is diverted towards the PBGAs (for the same overall flow rate)?3.The bottom side of the PCB is not dissipating any heat as a result of lying ondomain boundary. On the other hand, there seem to be plenty of space above the board. The main reason for the ‘head room above the PCB is the height of the Spreader blocks. While there is room to move up the spreader by a little bit, more room can be gained if the spreader is longer in the X direction but shorter in Y height. What if both the sides of the PCB are exposed to airflow by moving it up?4. A heatsink is mounted on the PBGA blocks? Will it be possible to use one heatsinkin contact with all PBGAs? Are there any practical issues?If time permits, set up some of these scenarios and perform Icepak simulations.。
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