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A Framework for the Performance Evaluation of SDLMSC-specified Systems

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PerformanceEvaluationofSDL/MSC-specifiedSystems

WinfriedDulzUniversityofErlangen-N¨urnbergIMMDVIIMartensstr.3,91058Erlangen,Germanydulz@informatik.uni-erlangen.de

KeywordsSoftwareengineering,specificationstandards,performanceanalysis,performancemonitoring.Abstract

SDLandMSCarestandardizedspecificationtechniquesforthedevelopmentofreactivereal-timesystemsandprotocolarchitectures.WhereasMSCscenariosonlyallowtospecifythedy-namicsystembehaviorinformofevent/timediagrams,SDLspecificationsareusedtodescribestaticandfunctionalaspectsofthesystemaswell.InthispaperaframeworkispresentedwhichdemonstratestherelationshipbetweenformallyspecifiedSDLsystemsandappropriateperformanceanalysisrespectivelymonitoringtechniquesdrivenbyannotedMSCscenarios.Itisfurtherdiscussedhowtoanalysesomeimportantperfor-mancemeasuresforSDL-specifiedsystems,i.e.theutilizationofprocessorandchannelcom-ponents,whichcorrespondtotheworkloadcharacteristicsofgivenMSCscenarios.

1IntroductionandMotivationDuetotheeverincreasingcomplexityofparallelanddistributedsystemsappropriatecomputeraidedsystemengineering(CASE)techniquesmustbeusedtodesignsafeandhighperformancesystems.CASEtoolshavetosupportallphasesinthesoftwaredevelopmentandlifecycle,namelyrequirementanalysis,design,specification,implementation,testandmonitoringoftherealsystem.Standardizedformaldescriptiontechniques(FDTs)likeLOTOS(ISO8807)whichisbasedonanprocessalgebraapproach,ESTELLE(ISO9074)andSDL(ITUZ.100),bothdescribingthesystembehaviorbymeansofextendedfinitestateautomata[Hog89],provideaunifyingthe-oreticalbasisfortheconstructionofdedicatedCASEtools.Modernobject-orientedspecifica-tionlanguageslikeSDL’92alsoallowthehierarchicaldecompositionofsystemsbyreusinglesscomplexsubsystemswithsimplerfunctionalandtemporalproperties.Thereexist,however,onlyfewresultsconcerningthedevelopmentofmethodsandtoolsforstudyingtheperformanceofsystemswhicharespecifiedandimplementedbyusinganFDTapproach([DHHMC95],[BB93],[HHMC91]).Performanceevaluationstartingfromanab-stractsystemmodeleithercanbeachievedbymathematicalanalysisandsimulationtechniquesinearlysystemdesignphasesorbymonitoringpartsoftherealsystemintheintegrationandtestphase.BecausemostmodernFDTenvironmentssupporttheautomaticgenerationofexe-cutablecodefromagivenformalsystemspecification,monitoringtoolscanreusethesesystemspecificationsasaformalmonitoringmodelaswell[DDL95].InthenextsectionitisfirstmotivatedwhySDLandMSCaregoodsuitedforspecifyinganddeveloppingdistributedreal-timesystems.ThepresentationofageneralframeworktoevaluatetheperformanceofSDL/MSC-specifiedsystemsfollowsnext.ThenitisshownhowtheanalysisofthemeanperformancecharacteristicsofprocessorandchannelcomponentscanbeachievedbyusingannotatedSDL/MSCspecifications.Finallythemainresultsaresummarizedandashortoutlooktofutureworkwillconcludethepaper.

2SDLandMSCTheSpecificationandDescriptionLanguage(SDL,ITU-StandardZ.100)andMessageSequenceCharts(MSC,ITU-StandardZ.120)arewidelyusedFDTsthathavebeenprovedtobeveryuse-fulfordeveloppingreactivereal-timesystemsandprotocolsintelecommunicationapplications.SDLandMSCcanbecharacterizedbythefollowingfeatures.

MSCsarederivedfrominformaltextualuserdescriptionsduringtherequirementsanalysisphaseandspecifythedynamicbehaviorofthesystem.IntheITUrecommendationZ.120[CCI92b]twoequivalentMSCrepresentationsarestandardized.OntheonehandMSC/GRdefinesagraph-icalsyntaxwithintuitivegraphicalelementsthatarebestsuitedforhumaninteractionsviagraph-icaleditorsandinterfaces.OntheotherhandMSC/PRisahigh-levelprogrammingnotationwhichcanbeusedbyMSCtools.TheprimaryuseofMSCsarerequirementsdefinition,gen-erationofSDLskeletons,behaviorvalidationofSDLspecificationsandselectionoftestcasescenarios.ThemainelementsofanMSCdiagramareverticalinstanceaxes,thatrepresentthecausalrelationshipbetweenactions,sendingandreceivingofmessages,startingandstoppingoftimers,creationanddeletionofdynamicinstancesandreachingofwell-definedconditionsthatarerepresentedbyhexagonalboxes.Inthefollowingtheprototypicalconnection-orientedInresprotocolwillbeusedtodemonstratethemainbuildingblocksofSDL/MSCsystemspecifications.Afteratimer-controlledconnec-tionestablishmentphaseisstartedbytheinitiator,asecureconnection-orienteddataexchangebetweentheinititiatorandresponderentitiesviaanunsecuremediumservicefollows,untiltheresponderwillclosetheconnectionatsometimeorother.TheMSCConnectionSetupinFigure1specifiesasuccesfulconnectionestablishmentbetweentheinitiatorandresponderinstancesoftheInresprotocolbymeansofexchangingprotocoldataunitsviathecommunicationmedium.AnadditionaltimerconstructensuresthecorrecttimingconditionsbetweensendingandreceivingoftheCRandCCmessagesinsideoftheinitiatorentity.

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可靠性预计 电信 电子

可靠性预计 电信 电子


FOREWORD
This present databook gives elements to calculate failure rate of mounted electronic components. It made easier equipment reliability optimization studies, thanks to influence factors introduction. This document replaces and cancels UTE C 80 - 810 (June 1997). This present guide has been adopted on 07/03/2000 by the UTE board of directors.
76 à 77 77 77 77 78 à 89 79 à 81 82 à 83 84 à 85 86 à 87 88 à 89 90 à 91 91 92 à 93 93 93 93 93 94 à 95 95 95 95 95 96 à 97 97 97 97 97 98 à 99 99 99 9TE
This reliability calculation guide for electronic and optical card, is an important progress compared to older guides. Calculation models take directly into account the influence of the environment. The thermal cycling seen by cards, function of mission profiles undergone by the equipment, replace environment factor which is difficult to evaluate. These models can handle permanent working, on/off cycling and dormant applications. On the other hand, failure rate related to the component soldering, is henceforth included in component failure rate.
美国插标准

美国插标准

ANSI/EIA-364-30A-2002
电连接器和插座的电容试验程序
Capacitance Test Procedure for Electrical Connectors and Sockets
ANSI/EIA-364-52A-2003
连接器/插座中使用的触点终端的软钎焊性的TP52试验程序
TP 52 Test Procedures for Solderability of Contact Terminations Use in Connectors/Sockets
ANSI/EIA-540A000-A-1990
ANSI/EIA 540AA00-1991
电子设备用无引线A、B、D型片载体用片载插座的空白详细规范
Chip Carrier Sockets for Leadless type A,B,D Chip Carriers for use in Electronic Equipment, Blank Detail Specification for
Combustion Characteristics Test Procedure for Electrical Connector Housing, Connector Assemblies and Sockets
ANSI/EIA-364-82A-2005
电连接器套、连接器组件和插座的塑料腐蚀性试验程序
Roadway and Area Lighting Equipment - Locking-type Photocontrol Devices and Mating Receptacles - Physical and Electrical Interchangeability and Testing
基于NuSMV的SysML模型形式化验证

基于NuSMV的SysML模型形式化验证

基于NuSMV的SysML模型形式化验证邓刘梦; 葛晓瑜; 宛伟健【期刊名称】《《计算机技术与发展》》【年(卷),期】2019(029)010【总页数】4页(P153-156)【关键词】需求工程; 模型转换; 形式化验证; 模型驱动开发【作者】邓刘梦; 葛晓瑜; 宛伟健【作者单位】南京航空航天大学计算机科学与技术学院江苏南京 211106【正文语种】中文【中图分类】TP3110 引言在过去多年，软件开发面临了多个挑战，新的需求和存在系统不断增长，系统也变得越来越复杂，以至于很难及时地对它们进行构建。

为了解决这些问题，出现了很多新的方法，其中最突出的一个就是模型驱动开发。

模型驱动开发代表了一套理论和工业化软件开发的方法框架，在软件开发全生命周期中系统的使用模型作为主要工件，主要是为了解决软件的两个根本危机：复杂性和变更能力。

但与此同时，模型驱动开发也带来了一些问题：使用自然语言描述的需求与严格定义的模型之间的鸿沟无法很好地连通[1]。

此外，对于SysML描述的图形化模型，目前缺乏严格有效的分析和验证方法。

针对以上存在的问题，文中给出了从SysML模型到NuSMV输入模型的转换规则，并实现自动化程序完成这一转换。

接着利用NuSMV模型检测的方法来验证SysML模型的正确性。

1 SysML系统建模SysML是目前业界常用的系统体系结构建模语言，可用于由软硬件、数据和人综合而成的复杂系统的分析与设计。

然而，为了保证一定的易读性，SysML采用半形式化的描述方法来定义语义，使用自然语言描述约束和详细语义，力求在形式严格和易于理解间找到平衡[2]。

在实际中，其图形化的建模方式十分简洁直观，关系链接与约束描述等方式也进一步缩小了模型驱动开发过程中需求描述与模型设计制品间的沟壑。

但是，其牺牲的部分就是缺乏精确的语义，难以进行严格的语义分析以及正确性验证。

SysML是一种图形化建模语言，是对象管理组织(object management group，OMG)在对UML2.0的子集进行重用和扩展的基础上提出的一种新建模语言[3]。

210973314_基于ZYNQ_平台的XDMA_IP_核性能研究

210973314_基于ZYNQ_平台的XDMA_IP_核性能研究

基于ZYNQ平台的XDMA IP核性能研究金璐(东软医疗系统有限公司 辽宁沈阳 110011)摘要：数字通信相关技术以及计算机技术的快速发展极大地推动了高速数据传输的需求， PCIe Gen5信号速率已经达到32 Gb/s，在数据采集、雷达通信、遥感探测等领域，数据量的日益增大和数据处理的日益复杂化，使高速数据传输逐渐成为通信系统设计中的关键点。

Xilinx提供的DMA/Bridge Subsystem for PCI Express IP是一个高性能，可配置的，适用于PCIe 2.0、PCIe 3.0的SG模式DMA，该文主要介绍了XDMA的配置说明、数据通路搭建及相关测试性能，实测结果与PCIe相关测试速率比较。

关键词：Xilinx XDMA 数据通路 性能中图分类号：TP336;TP274.2文献标识码：A 文章编号：1672-3791(2023)04-0015-04 Research on the Performance of XDMA IP Cores Based on theZYNQ PlatformJIN Lu(Neusoft Medical Systems Co., Ltd., Shenyang, Liaoning Province, 110011 China)Abstract:The rapid development of digital communication-related technology and computer technology has greatly promoted the demand for high-speed data transmission. PCIe Gen5 signal rates have reached 32 Gb/s. In the fields of data collection, radar communications and remote sensing detection, the increasing volume of data and the growing complexity of data processing have made high-speed data transmission become a key point in the de‐sign of communication systems. The DMA/Bridge Subsystem for PCI Express IP provided by Xilinx is a high-performance, configurable SG-mode DMA suitable for PCIe 2.0 and PCIe 3.0. This article mainly introduces the configuration instructions, data path construction and related test performance of XDMA , and compares the mea‐sured results with PCIe related test rates.Key Words: Xilinx; XDMA; Data path; PerformancePCIe Gen5信号速率已经达到32 Gb/s[1]，在数据采集、雷达通信、遥感探测等领域，数据量的日益增大和数据处理的日益复杂化，使高速数据传输逐渐成为通信系统设计中的关键点[2]。