TC1303B-EM1EUNTR中文资料

B120/B - B160/B1.0A SURFACE MOUNT SCHOTTKY BARRIER RECTIFIERFeaturesMaximum Ratings and Electrical Characteristics@ T A = 25°C unless otherwise specified·Guard Ring Die Construction for Transient Protection·Ideally Suited for Automatic Assembly ·Low Power Loss, High Efficiency ·Surge Overload Rating to 30A Peak·For Use in Low Voltage, High Frequency Inverters, Free Wheeling, and Polarity Protection Application·Plastic Material - UL Flammability Classification 94V-0Mechanical Data·Case: Molded Plastic·Terminals: Solder Plated Terminal -Solderable per MIL-STD-202, Method 208·Polarity: Cathode Band or Cathode Notch ·Approx. Weight:SMA 0.064 gramsSMB 0.093 grams·Marking: Type NumberNo Suffix Designates SMA Package “B” Suffix Designates SMB PackageSingle phase, half wave, 60Hz, resistive or inductive load.For capacitive load, derate current by 20%.Notes:1. Thermal Resistance: Junction to terminal, unit mounted on PC board with 5.0 mm 2(0.013 mm thick) copper pads as heat sink.2. Measured at 1.0MHz and applied reverse voltage of 4.0V DC.0.11.0100.20.40.60.8 1.0 1.2I ,I N S T A N T A N E O U S F W D C U R R E N T (A )F V ,INSTANTANEOUS FORWARD VOLTAGE (V)Fig.2Typical Forward Characteristics -B120/B thru B140/BF0.010.11.0100.20.40.60.8 1.0I ,I N S T A N T A N E O U S F O R W A R D C U RR E N T (A )F V ,INSTANTANEOUS FWD VOLTAGE (V)Fig.3Typ.Forward Characteristics -B150/B thru B160/BF 102030400110100I ,P E A K F O R W A R D S UR G E C U R R E N T (A )F S M Fig.4Max Non-Repetitive Peak Fwd Surge CurrentNUMBER OF CYCLES AT 60Hz1010010000.1110100C ,J U N C T I O N C A P A C I T A N C E (p F )j V ,REVERSE VOLTAGE (V)Fig.5Typical Junction CapacitanceR 00.51.0255075100125150I A V E R A G E R E C T I F I E D C U R R E N T (A )O ,T ,TERMINAL TEMPERATURE (ºC)Fig.1Forward Current Derating CurveT 1001010.10.01100010,000204060I ,I N S T A N T A N E O U S RE V E R S E C U R R E N T (A )R m V ,INSTANTANEOUS REVERSE VOLTAGE (V)Fig.6Typical Reverse Characteristics,B120/B thru B140/BR 1030501001010.1100010,00020406070I ,I N S T A N T A N E O U S R E V E R S E C U R R E N T (A )R m V ,INSTANTANEOUS REVERSE VOLTAGE (V)Fig.7Typical Reverse Characteristics,B150/B thru B160/BR 103050。

元器件交易网
A1301 and A1302
Continuous-Time Ratiometric Linear Hall Effect Sensors
Features and Benefits
▪ Low-noise output ▪ Fast power-on time ▪ Ratiometric rail-to-rail output ▪ 4.5 to 6.0 V operation ▪ Solid-state reliability ▪ Factory-programmed at end-of-line for optimum
High precision in output levels is obtained by internal gain and offset trim adjustments made at end-of-line during the manufacturing process.
These features make the A1301 and A1302 ideal for use in position sensing systems, for both linear target motion and rotational target motion. They are well-suited for industrial applications over extended temperature ranges, from –40°C to 125°C.
Continuous-Time Ratiometric Linear Hall Effect Sensors
Selection Guide
Part Number
Packing*

Electrical Characteristics
(VIN=1.0V, VOUT =2.8V, IOUT=0mA Ta=+250C)
Parameter
Symbol
Condition Min.
Values Typ. 0.8 2 Max. 5.5 5.5 87 32 1 1.2 1.75 50 10 1.224 50 -
AT1305:LDO set to 3.3V
AT1305AP:LDO set to 3.0V AT1305BP:LDO set to 1.8V
*For more marking information, contact our sales representative directly
Pin Description
VST VDD VDD IIN1 IIN2 IIN3 VFB IFB FS
IOUT=1mA
0.7 -
V V V V μA μA μA V nA μS
AT1305,AT1305A AT1305B IOUT=0mA VIN=5V EN=0V, /ENPB=High Close Loop VDD =2.85V VFB =1.2V VOUT =2.85V
元器件交易网
AT1305
Preliminary Product Information PFM Step-Up DC/DC Converter with LDO Features
• 0.8V Low Start-Up Input Voltage • Up to 90%Efficiency • Adjustable 100mA Output with 1 Alkaline Cell or 200mA Output with 2 Alkaline Cell Battery input. • 1.8V/3.0V/3.3V/300mA Output with USB Power input. • Small Number of External Components needed • Load Disconnects from Input in Shutdown • Power good output • 32µA Quiescent(Switch OFF) Supply current • 1µA Shutdown Mode Supply current • 8-Pin TSSOP package

TMS320C6414, TMS320C6415, TMS320C6416FIXED-POINT DIGITAL SIGNAL PROCESSORSSPRS146N − FEBRUARY 2001 − REVISED MAY 2005Terminal Functions (Continued)SIGNALNAME NO.TYPE †IPD/IPU ‡DESCRIPTION EMIFB (16-BIT) − ADDRESS ||kBEA20E16IPU EMIFB external address (half-word address) (O/Z )•Also controls initialization of DSP modes at reset (I ) via pullup/pulldown resistors D i E di d BEA19D18IPU − Device Endian mode BEA20:0–Big Endian BEA18C181−Little Endian (default mode)− Boot mode –BEA17B18BEA[19:18]:00No boot 01−HPI boot 10−EMIFB 8-bit ROM boot with default timings (default mode)BEA16A1811−Reserved − EMIF clock select BEA15D17BEA[17:16]:Clock mode select for EMIFA (AECLKIN_SEL[1:0])00–AECLKIN (default mode)CPU/4 Cl k R t BEA14C1701−CPU/4 Clock Rate 10−CPU/6 Clock Rate BEA13B1711−Reserved BEA[15:14]:Clock mode select for EMIFB (BECLKIN_SEL[1:0])BEA12A17[](_[])00–BECLKIN (default mode)01−CPU/4 Clock Rate −CPU/6 Clock Rate BEA11D161011−Reserved BEA10C16− PCI EEPROM Auto-Initialization (EEAI) [C6415 and C6416 devices only]BEA13:PCI auto-initialization via external EEPROM If the PCI peripheral is disabled (PCI EN pin 0) this pin must be pulled up BEA9B16I/O/Z IPD If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.0−PCI auto-initialization through EEPROM is disabled (default).1−PCI auto-initialization through EEPROM is enabled.BEA8A16− UTOPIA Enable (UTOPIA_EN) [C6415 and C6416 devices only]BEA UTOPIA i h l bl (f i l)BEA7D15(_)[y]BEA11:UTOPIA peripheral enable (functional)0−UTOPIA disabled (McBSP1 enabled) [default]BEA6C151−UTOPIA enabled (McBSP1 disabled)BEA5B15The C6414 device does not support the PCI and UTOPIA peripherals; for proper device operation, do not oppose the internal pulldowns (IPDs) on the BEA13 and BEA11 pins.Also for proper C6414 device operation oppose the IPDs on the BEA7 BEA8BEA4A15Also for proper C6414 device operation, do not oppose the IPDs on the BEA7, BEA8,and BEA9 pins.BEA3D14For proper C6415 device operation, the BEA7 pin must be externally pulled up with a 1-k Ω resistor.BEA2C14For proper C6416 device operation, the BEA8 and BEA9 pins must be externally pulled Ω resistor.BEA1A14up with a 1-k Ω For more details, see the Device Configurations section of this data sheet.†I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground ‡IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k Ω IPD or IPU resistor. T o pull up a signal to the opposite supply rail, a 1-k Ω resistor should be used.)||These C64x ™ devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted from the signal name.k To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.TMS320C6414, TMS320C6415, TMS320C6416FIXED-POINT DIGITAL SIGNAL PROCESSORSSPRS146N − FEBRUARY 2001 − REVISED MAY 2005 Terminal Functions (Continued)SIGNAL NAME NO.TYPE†IPD/IPU‡DESCRIPTIONEMIFB (16-bit) − DATA||kBED15D7BED14B6BED13C7BED12A6BED11D8BED10B7BED9C8BED8A7BED7C9I/O/Z IPU EMIFB external dataBED6B8BED5D9BED4B9BED3C10BED2A9BED1D10BED0B10MULTICHANNEL BUFFERED SERIAL PORT 2 (McBSP2)MCBSP2_EN AF3I IPD McBSP2 enable pin. This pin works in conjunction with the PCI_EN pin to enable/disable other peripherals (for more details, see the Device Configurations section of this data sheet).CLKS2/GP8§AE4I/O/Z IPD McBSP2 external clock source (CLKS2) [input only] [default] or this pin can also be programmed as a GPIO 8 pin (I/O/Z).CLKR2AB1I/O/Z IPD McBSP2 receive clock. When McBSP2 is disabled (PCI_EN = 1 and MCBSP2_EN pin = 0), this pin is tied-off.CLKX2/XSP_CLK§AC2I/O/Z IPD McBSP2 transmit clock (I/O/Z) [default] or PCI serial interface clock (O).DR2/XSP_DI§AB3I IPU McBSP2 receive data (I) [default] or PCI serial interface data in (I). In PCI mode, this pin is connected to the output data pin of the serial PROM.DX2/XSP_DO§AA2O/Z IPU McBSP2 transmit data (O/Z) [default] or PCI serial interface data out (O). In PCI mode, this pin is connected to the input data pin of the serial PROM.FSR2AC1I/O/Z IPD McBSP2 receive frame sync. When McBSP2 is disabled (PCI_EN = 1 and MCBSP2_EN pin = 0), this pin is tied-off.FSX2AB2I/O/Z IPD McBSP2 transmit frame sync. When McBSP2 is disabled (PCI_EN = 1 and MCBSP2_EN pin = 0), this pin is tied-off.†I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground‡IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. T o pull up a signal to the opposite supply rail, a 1-kΩ resistor should be used.)§For the C6415 and C6416 devices, these pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet. The C6414 device does not support the PCI or UTOPIA peripherals; therefore, these muxed peripheral pins except CLKS2/GP8 are standalone peripheral functions for this device.||These C64x™ devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted from the signal name.k To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.。