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74ACT16245MTDX中文资料

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© 2005 Fairchild Semiconductor CorporationDS500296

www.fairchildsemi.comAugust 1999Revised May 200574ACT16245 16-Bit Transceiver with 3-STATE Outputs

74ACT16245

16-Bit Transceiver with 3-STATE Outputs

General Description

The ACT16245 contains sixteen non-inverting bidirectionalbuffers with 3-STATE outputs and is intended for bus ori-ented applications. The device is byte controlled. Each hasseparate control inputs which can be shorted together forfull 16-bit operation. The T/R inputs determine the directionof data flow through the device. The OE inputs disable boththe A and B ports by placing them in a high impedancestate.Features

sBidirectional non-inverting buffers

sSeparate control logic for each byte

s16-bit version of the ACT245

sOutputs source/sink 24 mA

sTTL-compatible inputs

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin DescriptionConnection Diagram

FACT¥ is a trademark of Fairchild Semiconductor Corporation.Order NumberPackage NumberPackage Description

74ACT16245SSCMS48A48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74ACT16245MTDMTD4848-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin NamesDescription

OEnOutput Enable Input (Active LOW)

T/RTransmit/Receive Input

A0–A15Side A Inputs/Outputs

B0–B15Side B Outputs/Inputs元器件交易网www.cecb2b.comwww.fairchildsemi.com274ACT16245Functional DescriptionThe ACT16245 contains sixteen non-inverting bidirectionalbuffers with 3-STATE outputs. The device is byte controlledwith each byte functioning identically, but independent ofthe other. The control pins can be shorted together toobtain full 16-bit operation. The following descriptionapplies to each byte. When the T/R input is HIGH, then BusA data is transmitted to Bus B. When the T/R input is LOW,Bus B data is transmitted to Bus A. The 3-STATE outputsare controlled by an Output Enable (OEn) input for each

byte. When OEn is LOW, the outputs are in 2-state mode.

When OEn is HIGH, the outputs are in the high impedance

mode, but this does not interfere with entering new datainto the inputs.

Truth Tables

H HIGH Voltage LevelL LOW Voltage LevelX ImmaterialZ High Impedance

Logic DiagramInputsOutputs

OE1T/R1

LLBus B0–B7 Data to Bus A0–A7

LHBus A0–A7 Data to Bus B0–B7

HXHIGH-Z State on A0–A7, B0–B7

InputsOutputs

OE2T/R2

LLBus B8–B15 Data to Bus A8–A15

LHBus A8–A15 Data to Bus B8–B15

HXHIGH-Z State on A8–A15, B8–B15元器件交易网www.cecb2b.com3www.fairchildsemi.com74ACT16245Absolute Maximum Ratings(Note 1)Recommended Operating

Conditions

Note 1: Absolute maximum ratings are those values beyond which damageto the device may occur. The databook specifications should be met, with-out exception to ensure that the system design is reliable over its powersupply, temperature, and output/input loading variables. Fairchild does notrecommend operation of FACT¥ circuits outside databook specifications.

DC Electrical Characteristics

Note 2: All outputs loaded; thresholds associated with output under test.Note 3: Maximum test duration 2.0 ms; one output loaded at a time.Supply Voltage (VCC)󰀐0.5V to 󰀎 7.0V

DC Input Diode Current (IIK)

VI 󰀐0.5V󰀐20 mA

VI VCC 󰀎 0.5V󰀎20 mA

DC Output Diode Current (IOK)

VO 󰀐0.5V󰀐20 mA

VO VCC 󰀎0.5V󰀎20 mA

DC Output Voltage (VO)󰀐0.5V to VCC 󰀎0.5V

DC Output Source/Sink Current (IO)r 50 mA

DC VCC or Ground Current

per Output Pinr 50 mA

Storage Temperature󰀐65qC to 󰀎150qCSupply Voltage (VCC)4.5V to 5.5V

Input Voltage (VI)0V to VCCOutput Voltage (VO)0V to VCCOperating Temperature (TA)󰀐40qC to 󰀎85qC

Minimum Input Edge Rate ('V/'t)125 mV/ns

VIN from 0.8V to 2.0V

VCC @ 4.5V, 5.5V

SymbolParameterVCCTA 󰀎25qCTA 󰀐40qC to󰀎85qCUnitsConditions(V)TypGuaranteed Limits

VIHMinimum HIGH4.51.52.02.0VVOUT 0.1V

Input Voltage5.51.52.02.0or VCC 󰀐 0.1V

VILMaximum LOW4.51.50.80.8VVOUT 0.1V

Input Voltage5.51.50.80.8or VCC 󰀐 0.1V

VOHMinimum HIGH4.54.494.44.4VIOUT 󰀐50 PAOutput Voltage5.55.495.45.4

VIN VIL or VIH4.53.863.76VIOH = 󰀐24 mA

5.54.864.76IOH = 󰀐24 mA (Note 2)

VOLMaximum LOW4.50.0010.10.1VIOUT 50 PAOutput Voltage5.50.0010.10.1

VIN VIL or VIH4.50.360.44VIOL = 24 mA

5.50.360.44IOL = 24 mA (Note 2)

IOZTMaximum I/O5.5r0.5r5.0PAVI VIL, VIHLeakage CurrentVO VCC, GND

IINMaximum Input5.5r0.1r1.0PAVI VCC, GNDLeakage Current

ICCTMaximum ICC/Input5.50.61.5mAVI VCC 󰀐2.1V

ICCMax Quiescent5.58.080.0PAVIN VCC or GNDSupply Current

IOLDMinimum Dynamic5.575mAVOLD 1.65V Max

IOHDOutput Current (Note3)󰀐75mAVOHD 3.85V Min元器件交易网www.cecb2b.com

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SN54ABT16245中文资料

SN54ABT16245中文资料

SN54ABT16245, SN74ABT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS084B – D3712, JANUARY 1991 – REVISED DECEMBER 1992

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265Copyright © 1992, Texas Instruments Incorporated3–1•Members of the Texas InstrumentsWidebus™ Family•State-of-the-Art EPIC-ΙΙB™ BiCMOS DesignSignificantly Reduces Power Dissipation•Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17•Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C•Distributed VCC and GND Pin ConfigurationMinimizes High-Speed Switching Noise•Flow-Through Architecture Optimizes PCB Layout•High-Drive Outputs (–32-mA IOH,64-mA IOL)•Packaged in Plastic 300-mil ShrinkSmall-Outline and Thin ShrinkSmall-Outline Packages and 380-milFine-Pitch Ceramic Flat Packages Using25-mil Center-to-Center Spacings descriptionThe ′ABT16245 is a 16-bit (dual-octal)noninverting 3-state transceiver designed forsynchronous two-way communication betweendata buses. The control function implementationminimizes external timing requirements.This device can be used as two 8-bit transceiversor one 16-bit transceiver. It allows datatransmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at thedirection-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the busesare effectively isolated.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN74ABT16245 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pincount and functionality of standard small-outline packages in the same printed-circuit-board area.The SN54ABT16245 is characterized for operation over the full military temperature range of –55°C to 125°C.The SN74ABT16245 is characterized for operation from –40°C to 85°C.FUNCTION TABLE(each 8-bit section)INPUTSOEDIROPERATIONLLB data to A busLHA data to B busHXIsolationSN54ABT16245...WD PACKAGESN74ABT16245...DGG OR DL PACKAGE(TOP VIEW)1234567891011121314151617181920212223244847464544434241403938373635343332313029282726251DIR1B11B2GND1B31B4VCC1B51B6GND1B71B82B12B2GND2B32B4VCC2B52B6GND2B72B82DIR1OE1A11A2GND1A31A4VCC1A51A6GND1A71A82A12A2GND2A32A4VCC2A52A6GND2A72A82OE

74系列中文资料(非常全)

74系列中文资料(非常全)

74系列芯片资料

反相器 驱动器 LS04 LS05 LS06 LS07 LS125 LS240 LS244 LS245

与门 与非门 LS00 LS08 LS10 LS11 LS20 LS21 LS27 LS30 LS38

或门 或非门 与或非门 LS02 LS32 LS51 LS64 LS65

异或门 比较器 LS86

译码器 LS138 LS139

寄存器 LS74 LS175 LS373

反相器:

Vcc 6A 6Y 5A 5Y 4A 4Y 六非门 74LS04

┌┴─┴─┴─┴─┴─┴─┴┐ 六非门(OC门) 74LS05

_ │14 13 12 11 10 9 8│ 六非门(OC高压输出) 74LS06

Y = A ） │

│ 1 2 3 4 5 6 7│

└┬─┬─┬─┬─┬─┬─┬┘

1A 1Y 2A 2Y 3A 3Y GND

驱动器:

Vcc 6A 6Y 5A 5Y 4A 4Y

┌┴─┴─┴─┴─┴─┴─┴┐

│14 13 12 11 10 9 8│

Y = A ） │ 六驱动器(OC高压输出) 74LS07

│ 1 2 3 4 5 6 7│

└┬─┬─┬─┬─┬─┬─┬┘

1A 1Y 2A 2Y 3A 3Y GND

Vcc -4C 4A 4Y -3C 3A 3Y

流量检测装置说明书样本

流量检测装置说明书样本

流量检测装置设计阐明书

装置需求:

2. 1.100点流量差压信号采集。用键盘输入流量系数，输入时可显示；

3. 范畴0-1000l/min,采集周期0.5s,信号4-20mA, 辨别力0.1%；

4. 规定运用数字滤波（办法自选）；

5. 计算瞬时流量（l/min）、合计流量（m3/h）,并显示；

6. 操作人员可随时修改流量系数和切换显示内容（瞬时/合计流量）。

1. 设计阐明书规定:

2. 系统构成框图及构成阐明, 涉及重要部件选型及根据；

3. DSP与A/D转换芯片连接电原理图；

4. 程序框图, 涉及重要流程；

5. 采集、数字滤波、流量计算程序清单。

三、差压式流量计基本理论

1.节流装置工作原理

差压式流量计是依照伯努力方程和流体持续性原理用差压法测量流量, 其节流装置工作原理如图1所示, 在横截面H处: 流体平均流速是v1, 密度是ρ1, 横截面积是A1；在横截面L处: 流体平均流速是v2, 密度是ρ2, 横截面积是A2。

图1 差压流量计工作原理图

依照流体流动持续性原理有如下关系式:

v1·A1·ρ1=v2·A2·ρ2 （1）

如果流体是液体, 可以为在收缩前、后其密度不变:

ρ1＝ρ2＝ρ （2）

依照瞬时流量定义, 即单位时间内流体流经管道或明渠某横截面数量, 因此液体体积瞬时流量:

2211AvAvqv （3）

依照伯努利方程（能量守恒定律）, 在水平管道上Z1＝Z2, 则有如下关系式:

2222222111vPvP （4）

应用伯努利方程和流动持续性原理, 在两个横截面上压力差则有如下关系式:

)(2212221vvPPP （5）

74AVC16T245DGGRG4资料

74AVC16T245DGGRG4资料

FEATURES

DESCRIPTION/ORDERINGINFORMATIONDGG OR DGV PACKAGE

(TOP VIEW)

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251DIR

1B1

1B2

GND

1B3

1B4

VCCB1B51B6GND

1B7

1B8

2B1

2B2

GND

2B3

2B4

VCCB2B5

2B6

GND

2B7

2B8

2DIR1OE

1A1

1A2

GND

1A3

1A4

VCCA1A5

1A6

GND

1A7

1A8

2A1

2A2

GND

2A3

2A4

VCCA2A5

2A6

GND

2A7

2A8

2OE

TheSN74AVC16T245isdesignedforasynchronouscommunicationbetweendatabuses.ThedevicetransmitsSN74AVC16T245

16-BITDUAL-SUPPLYBUSTRANSCEIVER

WITHCONFIGURABLEVOLTAGETRANSLATIONAND3-STATEOUTPUTS

SCES551C–FEBRUARY2004–REVISEDAUGUST2005

•ControlInputsVIH/VILLevelsAreReferenced

toVCCAVoltage

•VCCIsolationFeature–IfEitherVCCInputIsat

GND,BothPortsAreintheHigh-Impedance

State

•Overvoltage-TolerantInputs/OutputsAllow

Mixed-Voltage-ModeDataCommunications

•FullyConfigurableDual-RailDesignAllows

EachPorttoOperateOvertheFull1.2-Vto