11+Using+the+Create+&+Package+IP+Wizard+to+Build+a+Custom+AXI+Peripheral

  • 格式:pdf
  • 大小:852.07 KB
  • 文档页数:21

Package IP Tab – IP Identification
9
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 9© Copyright 2014 Xilinx 45637
Package IP Tab – IP File Groups
11
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 11© Copyright 2014 Xilinx 45637
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 6© Copyright 2014 Xilinx 45637
More About IP Repositories

Top level IP file name is <IP_name_vx_x>.vhd/v
<IP_name> - user assigned base IP name <vx_x> - version assigned in IP Packager

Wizard-created source AXI attachment files are automatically instantiated in <IP_name_vx_x>.vhd/v
3 45632**slid e
Putting Together Custom IP Details Package IP Tab Summary
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 3© Copyright 2014 Xilinx 45637
7 80739**slid e
Custom IP location must be added to be visible in IP catalog
— —
Location of directory of IP Specific IP in that directory repository
Use project settings in Vivado IDE project for design that is instantiating the custom AXI component
Create and Package IP Wizard AXI Vivado IDE Project
4 80737**slid e
The wizard creates a skeleton AXI IP Vivado IDE project At this point, your custom AXI hardware application is integrated
Package IP Tab – IP Customization Parameters
12
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 12© Copyright 2014 Xilinx 45637
Package IP Tab – IP Compatibility
10
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 10© Copyright 2014 Xilinx Nhomakorabea5637
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 2© Copyright 2014 Xilinx 45637
Putting Together Custom IP Details
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 5© Copyright 2014 Xilinx 45637
More About Custom IP Directories
— —
Generic defaults are defined in the entity using them Generics are passed down the hierarchy with generic map statements
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 4© Copyright 2014 Xilinx 45637
Package IP Tab – IP GUI Customization
15
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 15© Copyright 2014 Xilinx 45637
8 45621**slid e
Putting Together Custom IP Details Package IP Tab Summary
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 8© Copyright 2014 Xilinx 45637
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 7© Copyright 2014 Xilinx 45637
Package IP Tab
Package IP Tab – IP Ports and Interfaces
13
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 13© Copyright 2014 Xilinx 45637
6 80741**slid e
The Create and Package IP Wizard creates a new Vivado IDE project



Default path is one level above current project Default project directory is ip_repro Vivado IDE project name is <IP_name_vx_x>.xpr
User Signals and Parameters
5 16300**slid e
All parameters (generics) and signals that are proprietary to the user design must be bought up through the hierarchy to the top-level peripheral file Top level file <IP_name_vx_x>.vhd(v) File locations may vary in the project depending on how and from where they are added to the project
Package IP Tab – IP Review and Package
16
“本文档版权属Xilinx所有,未经许可,不可用于商业用途、转载、复制和网上发布” Using the Create and Package IP Wizard to Build a Custom AXI Peripheral - 16© Copyright 2014 Xilinx 45637
User created sources must be hand instantiated

Use the Vivado synthesis tool as a means of syntax checking
External signals that are proprietary to the design need to be passed up the design hierarchy through <IP_name_vx_x>.vhd/v Generics or parameters that are proprietary to the design need to also be passed up