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第4章 原理图设计进阶上一章对Altium Designer 7的原理图设计进行了详细的讲解，读者完全可以独立设计出精美的电路原理图，本章将讲解一些Altium Designer 7原理图设计系统的高级应用，这些功能并不是原理图设计所必须的，但是倘若读者掌握了这些技能则可以使绘图的效率大大提高。
——附带光盘“视频\4.avi”文件。
原理图的全局编辑应用模板的应用多图纸原理图的设计层次式原理图的设计编译与查错生成各种报表打印输出单片机控制的实时时钟数码管显示系统本章要点本章案例4.1 原理图的全局编辑Altium Designer 7提供了强大的全局编辑功能，可以对工程中或所有打开的文件进行整体操作，在这里将介绍元件标号的全局操作以及元件属性和字符的全局编辑。
4.1.1 元件的标注原理图设计中每一个元件的标号都是唯一的，倘若标注重复或是未定义的话系统编译都会报错。
但是Altium Designer在放置元件时元件的默认都是未定义状态，即“字母+？”，例如芯片的默认标号为“U？”、电阻为“R？”、电容为“C？”，用户需要为每个元件重新编号。
当然用户可以为每一类的第一个元件编号，然后其他同类的元件系统会自动递增编号，但是元器件一多难免也会出错误。
其实最好的解决方法是在原理图编辑完成后利用系统的Annotate工具统一为元件编号。
Altium Designer提供了一系列的元件标注命令，点击【Tools】菜单栏，在展开的命令中有各种方式的元件标注功能，如图4-1所示，其实各命令都是以【Annotate Schematic】命令为基础，并在此基础上进行简化或者应用于不同的范围，下面先详细介绍【Annotate Schematic】命令的应用。
图 4- 1 元件标注命令图 4- 2 元件标注工具对话框执行【Tools】菜单下的【Annotate Schematic】命令，弹出如图4-2所示的元件标注工具对话框，下面来分别介绍各选项的意义。
第4章原理图编辑第 3 章已经简要叙述了原理图设计的基本流程，本章将详细介绍如何在原理图上放置组件、原理图编辑器的使用和组件位置的编辑。
4.1 组件库的管理完成原理图工程环境设置以后，接下来的步骤是在原理图上放置组件，组件库为用户取用组件、查找组件提供了很大的方便。
4.1.1 打开组件库管理器Altium Designer 6.0 集成库的概念： Altium Designer 6.0 与 Potel99 最明显的区别就是集成库。
集成库就是将原理图组件与 PCB 封装和信号完整性分析联系在一起，关于某个组件的所有信息都集成在一个模块库中，所有的组件信息被保存在一起。
Protel 将组件分类放置在不同的库中。
放置组件的第一步就是找到组件所在的库并将该库添加到当前项目中。
在完成了原理图工作环境的设置以后，出现如图 4-1 所示的空白原理图图纸接口。
由于设置工作环境的不同，主菜单和主工具栏也可能会有所不同。
打开 Libraries （组件库管理器）主要有两种方法：图 4-1 空白原理图图纸接口图 4-2 组件库管理器对话框在图 4-1 的下方有一排工具按钮，单击 Libraries 按钮，将弹出如图 4-2 所示组件库管理器对话框。
●执行主菜单命令 Design/Browse Library ，也同样弹出如图 4-2 所示组件库管理器对话框。
4.1.2 添加组件库组件库管理器主要实现添加或删除组件库、在组件库中查找组件和在原理图上放置组件。
单击组件库管理器中的Libraries 按钮，将弹出如图 4-3 所示对话框。
单击图 4-3 中的 Add Library 按钮，将弹出打开组件库文件对话框，如图 4-4 所示。
在一般情况下，组件库文件在 Altium\library 目录下下， Altium Designer 6.0 主要根据厂商来对组件分类。
选定某个厂商，则该厂商的组件列表会被显示。
图 4-3 添加组件库对话框图 4-4 组件库文件对话框在图 4-4 所示组件库文件对话框中，根据原理图的需要选中希望加载的组件库。
Altium Designer 14原理图与PCB设计本文将介绍《Altium Designer 14原理图与PCB设计》的大纲，提供背景信息和目的。
在本文中，将介绍Altium Designer 14软件的基本原理图与PCB设计功能，并深入探讨其使用方法和技巧。
Altium Designer 14简介原理图设计界面概述元件库管理连接和布线信号捕获和逻辑判别设计规则检查输出文件生成PCB设计界面概述元件布局和走线层次设计和分层规划信号完整性与电磁兼容性考虑设计规则检查输出文件生成实例分析原理图设计实例PCB设计实例注意事项和常见问题解答结论Altium Designer 14是一款专业的电子设计自动化工具，广泛应用于电子工程师和PCB设计师的原理图与PCB设计过程中。
在本文中，我们将重点介绍Altium Designer 14软件中原理图与PCB设计的相关功能和特点，以帮助读者更好地理解和使用该软件。
本文的目的旨在提供关于《Altium Designer14原理图与PCB设计》的详细大纲，以引导读者逐步研究和掌握使用Altium Designer 14进行原理图与PCB设计的基本知识和技能。
通过阅读本文，读者将了解到Altium Designer 14软件在电子设计中的核心功能和应用方法，并能够应用这些知识进行实际工程项目的设计和开发工作。
概述Altium Designer 14的主要功能和特点，如原理图设计、PCB设计、仿真等本文档为使用Altium Designer 14进行原理图与PCB设计提供指南。
其中包括软件界面介绍、操作步骤、常见问题解答等内容。
Altium Designer 14是一款强大的电子设计自动化软件，为电路原理图和PCB设计提供了全面的支持。
下面是软件界面的主要组成部分：工具栏：包含了常用的工具和命令，可以快速访问并执行相应的操作。
项目导航器：显示当前项目的文件结构和层次关系，方便管理和导航文件。
Daughter Boards 2 Connector_NBP13 Xilinx CoolRunner PQ208 Rev1.01第一部分2层PCB层设计_Layer Stack ManagerBottom Layer层设计第三部分 Design Information部分第四部分 程序部分-- mm 2.0.0------------------------------------------------------------------------ -- -- -- Contents: Package pack1076 -- -- -- -- This package contains type and subprogram -- -- declarations for Viewlogic's builtin -- -- type conversion and bus resolution functions. -- -- This package should be used when porting VHDL -- -- models written for the Viewsim simulator to other -- -- VHDL environments. -- -- -- -- This code may be freely distributed, copied, or -- -- modified by any interested parties (with the -- -- request that modifications be noted in the -- -- revision history, and any errors found be reported -- -- to Customer Support at Viewlogic Systems.) -- -- -- -- This code is NOT copyrighted. Viewlogic supplies -- -- this package with the intention that it be -- -- distributed as a deliverable with VHDL models. -- -- -- -- Caveats: The behavior of the builtin function bschanging() ---- is not defined here since it is not portable. ---- (It violates the rule of a statically determinable ---- signal name.) ---- ---- Revision History: ---- ---- Who When What ---- ---- bobf 01-Aug-94 Metamor port, changes marked with "--*" ---- I.Dahan 13-Mar-91 Added definitions for character_1d. ---- M.Chapman 04-Mar-91 Removed copyright notice. ---- I.Dahan 15-Dec-90 Final code cleanup for initial release. ----------------------------------------------------------------------------------------------------------------------------------------------------*-----------------------------------------------------------------------* Metamor modifications , for use with Metamor compler ONLY--*------------------------* 1) comment all subprograms using textio.--* 2) use vhdl'93 shift operations.--* 3) use Metamor array_arith functions in arithmetic subprograms.--* 4) add 4 local functions : vlb2bit , bit2vlb, v1d2bv, bv2v1d--*--* CAVEAT : vlbit designs *may* make use of register inferrence conventions--* that are different from those used by Metamor. Watch out for preset/reset --* specified in a wait statement along with the clock. Using Metamor this--* will result in a gated clock which is probably not what you want.--* You should validate using simulation and also check the number of registers --* used and their type (flip-flop/latch, preset/reset, sync/async).--*--*-----------------------------------------------------------------------*use std.textio.all;--* add reference to Metamorlibrary metamor;use metamor.attributes.all;use metamor.array_arith.all;package pack1076 is-------------------------------------------------------------------------- Type declaration for Viewlogic's bit and vector types. ---- Resolution function is also given. --------------------------------------------------------------------------type vlbit_base is ('X', 'Z', '0', '1');--* Metamor specific attribute--*-----------------------------------------------------------------attribute enum_encoding of vlbit_base : type is "- Z 0 1";type vlbit_base_vector is array (integer range<>) of vlbit_base;function vlbit_resolve (inputs: vlbit_base_vector) return vlbit_base; subtype vlbit is vlbit_resolve vlbit_base;type vlbit_1d is array (integer range<>) of vlbit;subtype vlbit_vector is vlbit_1d;type vlbit_2d is array (integer range<>,integer range<>) of vlbit;type integer_1d is array (integer range<>) of integer;type integer_2d is array (integer range<>,integer range<>) of integer;type boolean_1d is array (integer range<>) of boolean;type boolean_2d is array (integer range<>,integer range<>) of boolean;type time_1d is array (integer range<>) of time;type time_2d is array (integer range<>,integer range<>) of time;type character_1d is array (integer range<>) of character; type character_2d is array (integer range<>,integer range<>) of character;------------------------------------------------------------------------ -- Conversion functions -- ------------------------------------------------------------------------function int2vlb (i: integer) return vlbit;function boo2vlb (b: boolean) return vlbit;function vlb2boo (v: vlbit) return boolean;function int2boo (i: integer) return boolean;function vlb2int (v: vlbit) return integer;function boo2int (b: boolean) return integer;function int2vec (i: integer) return vlbit_vector;function int2v1d (i: integer) return vlbit_1d;function v1d2int (v: vlbit_1d) return integer;------------------------------------------------------------------------ -- overloading -- ------------------------------------------------------------------------function "=" (v1, v2: vlbit) return boolean;function "/=" (v1, v2: vlbit) return boolean;function "<" (v1, v2: vlbit) return boolean;function "<=" (v1, v2: vlbit) return boolean;function ">" (v1, v2: vlbit) return boolean;function ">=" (v1, v2: vlbit) return boolean;function "AND" (v1, v2: vlbit) return vlbit;function "OR" (v1, v2: vlbit) return vlbit;function "NAND" (v1, v2: vlbit) return vlbit;function "NOR" (v1, v2: vlbit) return vlbit;function "XOR" (v1, v2: vlbit) return vlbit;function "NOT" (v: vlbit) return vlbit;function "AND" (v1, v2: vlbit_1d) return vlbit_1d;function "OR" (v1, v2: vlbit_1d) return vlbit_1d;function "NAND" (v1, v2: vlbit_1d) return vlbit_1d;function "NOR" (v1, v2: vlbit_1d) return vlbit_1d;function "XOR" (v1, v2: vlbit_1d) return vlbit_1d;function "NOT" (v: vlbit_1d) return vlbit_1d;------------------------------------------------------------------------ -- predefined functions -- ------------------------------------------------------------------------function addum (v1, v2: vlbit_1d) return vlbit_1d; function add2c (v1, v2: vlbit_1d) return vlbit_1d; function comp2c (v: vlbit_1d) return vlbit_1d; function divum (v1, v2: vlbit_1d) return vlbit_1d; function div2c (v1, v2: vlbit_1d) return vlbit_1d; function extendum (v: vlbit_1d; i: integer) return vlbit_1d; function extend2c (v: vlbit_1d; i: integer) return vlbit_1d; function mulum (v1, v2: vlbit_1d) return vlbit_1d; function mul2c (v1, v2: vlbit_1d) return vlbit_1d; function shiftlum (v: vlbit_1d; i: integer) return vlbit_1d; function shiftl2c (v: vlbit_1d; i: integer) return vlbit_1d; function shiftrum (v: vlbit_1d; i: integer) return vlbit_1d; function shiftr2c (v: vlbit_1d; i: integer) return vlbit_1d; function subum (v1, v2: vlbit_1d) return vlbit_1d; function sub2c (v1, v2: vlbit_1d) return vlbit_1d;--* function bchanging (signal s: vlbit_1d) return boolean;--* function bitunknown (v: vlbit) return boolean;--* function bitX (v: vlbit) return boolean;--* function bitZ (v: vlbit) return boolean;--* function bschanging (signal s: vlbit_1d;--* i, j: integer) return boolean;--* function pchanging (signal s: vlbit) return boolean;function pfalling (signal s: vlbit) return boolean;function prising (signal s: vlbit) return boolean;--* function vecunknown (v: vlbit_1d) return boolean;--* function vecX (v: vlbit_1d) return boolean;--* function vecZ (v: vlbit_1d) return boolean;------------------------------------------------------------------------ -- Predefined I/O procedures -- --------------------------------------------------------------------------* procedure put (s: in string);--* procedure putline (s: in string);--* procedure put (s: in string; v: in vlbit);--* procedure putline (s: in string; v: in vlbit);--* procedure put (s: in string; v: in vlbit_1d);--* procedure putline (s: in string; v: in vlbit_1d);--* procedure put (s: in string; v: in vlbit_2d);--* procedure putline (s: in string; v: in vlbit_2d);--* procedure put (s: in string; b: in boolean);--* procedure putline (s: in string; b: in boolean);--* procedure put (s: in string; b: in boolean_1d);--* procedure putline (s: in string; b: in boolean_1d);--* procedure put (s: in string; b: in boolean_2d);--* procedure putline (s: in string; b: in boolean_2d);--* procedure put (s: in string; i: in integer);--* procedure putline (s: in string; i: in integer);--* procedure put (s: in string; i: in integer_1d);--* procedure putline (s: in string; i: in integer_1d);--* procedure put (s: in string; i: in integer_2d);--* procedure putline (s: in string; i: in integer_2d);--* procedure put (s: in string; t: in time);--* procedure putline (s: in string; t: in time);--* procedure put (s: in string; t: in time_1d);--* procedure putline (s: in string; t: in time_1d);--* procedure put (s: in string; t: in time_2d);--* procedure putline (s: in string; t: in time_2d);--* procedure put (s: in string; c: in character);--* procedure putline (s: in string; c: in character);--* procedure put (s: in string; c1: in character_1d);--* procedure putline (s: in string; c1: in character_1d);--* procedure put (s: in string; c2: in character_2d);--* procedure putline (s: in string; c2: in character_2d);--* procedure put (s: in string; st: in string);--* procedure putline (s: in string; st: in string);--* procedure fwrite (variable ft: out text; v: in vlbit; b: out boolean); --* procedure fwriteline (variable ft: out text; v: in vlbit; b: out boolean); --* procedure fwrite (variable ft: out text; v: in vlbit_1d; b: out boolean); --* procedure fwriteline (variable ft: out text; v: in vlbit_1d; b: out boolean);--* procedure fwriteline (variable ft: out text; v: in vlbit_2d; b: out boolean);--* procedure fwrite (variable ft: out text; b1: in boolean; b: out boolean);--* procedure fwriteline (variable ft: out text; b1: in boolean; b: out boolean);--* procedure fwrite (variable ft: out text; b1: in boolean_1d; b: out boolean);--* procedure fwriteline (variable ft: out text; b1: in boolean_1d; b: out boolean);--* procedure fwrite (variable ft: out text; b1: in boolean_2d; b: out boolean);--* procedure fwriteline (variable ft: out text; b1: in boolean_2d; b: out boolean);--* procedure fwrite (variable ft: out text; i: in integer; b: out boolean);--* procedure fwriteline (variable ft: out text; i: in integer; b: out boolean);--* procedure fwrite (variable ft: out text; i: in integer_1d; b: out boolean);--* procedure fwriteline (variable ft: out text; i: in integer_1d; b: out boolean);--* procedure fwrite (variable ft: out text; i: in integer_2d; b: out boolean);--* procedure fwriteline (variable ft: out text; i: in integer_2d; b: out boolean);--* procedure fwrite (variable ft: out text; t: in time; b: out boolean);--* procedure fwriteline (variable ft: out text; t: in time; b: out boolean);--* procedure fwrite (variable ft: out text; t: in time_1d; b: out boolean);--* procedure fwriteline (variable ft: out text; t: in time_1d; b: out boolean);--* procedure fwrite (variable ft: out text; t: in time_2d; b: out boolean);--* procedure fwriteline (variable ft: out text; t: in time_2d; b: out boolean);--* procedure fwrite (variable ft: out text; c: in character; b: out boolean);--* procedure fwriteline (variable ft: out text; c: in character; b: out boolean);--* procedure fwrite (variable ft: out text; c1: in character_1d; b: out boolean); --* procedure fwriteline (variable ft: out text; c1: in character_1d; b: out boolean);--* procedure fwriteline (variable ft: out text; c2: in character_2d; b: out boolean); --* procedure fwrite (variable ft: out text; st: in string; b: out boolean);--* procedure fwriteline (variable ft: out text; st: in string; b: out boolean);--* procedure freadline (variable ft: in text; c: out character; b: out boolean) ;--* procedure freadline (variable ft: in text; st: out string; b: out boolean) ;--* procedure freadline (variable ft: in text; c1: out character_1d; b: out boolean) ; --* procedure freadline (variable ft: in text; c2: out character_2d; b: out boolean) ; --* procedure freadline (variable ft: in text; v: out vlbit; b: out boolean) ;--* procedure freadline (variable ft: in text; v: out vlbit_1d; b: out boolean) ;--* procedure freadline (variable ft: in text; v: out vlbit_2d; b: out boolean) ;--* procedure freadline (variable ft: in text; b1: out boolean; b: out boolean) ;--* procedure freadline (variable ft: in text; b1: out boolean_1d; b: out boolean) ; --* procedure freadline (variable ft: in text; b1: out boolean_2d; b: out boolean) ; --* procedure freadline (variable ft: in text; i: out integer; b: out boolean) ; --* procedure freadline (variable ft: in text; i1: out integer_1d; b: out boolean) ; --* procedure freadline (variable ft: in text; i1: out integer_2d; b: out boolean) ; --* procedure freadline (variable ft: in text; t: out time; b: out boolean) ; --* procedure freadline (variable ft: in text; t: out time_1d; b: out boolean) ; --* procedure freadline (variable ft: in text; t: out time_2d; b: out boolean) ;--* procedure getline (s: in string; c: out character; b: out boolean) ;--* procedure getline (s: in string; st: out string; b: out boolean) ;--* procedure getline (s: in string; c1: out character_1d; b: out boolean) ; --* procedure getline (s: in string; c2: out character_2d; b: out boolean) ; --* procedure getline (s: in string; v: out vlbit; b: out boolean) ;--* procedure getline (s: in string; v: out vlbit_1d; b: out boolean) ;--* procedure getline (s: in string; v: out vlbit_2d; b: out boolean) ;--* procedure getline (s: in string; b1: out boolean; b: out boolean) ;--* procedure getline (s: in string; b1:out boolean_1d; b: out boolean) ;--* procedure getline (s: in string; b1:out boolean_2d; b: out boolean) ;--* procedure getline (s: in string; i: out integer; b: out boolean) ;--* procedure getline (s: in string; i1:out integer_1d; b: out boolean) ;--* procedure getline (s: in string; i1:out integer_2d; b: out boolean) ;--* procedure getline (s: in string; t: out time; b: out boolean) ;--* procedure getline (s: in string; t: out time_1d; b: out boolean) ;--* procedure getline (s: in string; t: out time_2d; b: out boolean) ;end pack1076;package body pack1076 is------------------------------------------------------------------------function vlbit_resolve (inputs: vlbit_base_vector) return vlbit_base istype vlbit_base_table is array (vlbit_base'left to vlbit_base'right,vlbit_base'left to vlbit_base'right) ofvlbit_base;constant merge: vlbit_base_table := -- 'X' 'Z' '0' '1'(('X','X','X','X'), -- 'X'('X','Z','0','1'), -- 'Z'('X','0','0','X'), -- '0'('X','1','X','1'));-- '1'variable result: vlbit_base := 'Z';beginfor i in inputs'range loopresult := merge (result, inputs (i));end loop;return result;end;------------------------------------------------------------------------ function int2vlb (i: integer) return vlbit isbegincase i iswhen 0 => return '0';when 1 => return '1';when others => return 'X';end case;end;------------------------------------------------------------------------ function boo2vlb (b: boolean) return vlbit isbegincase b iswhen false => return '0';when true => return '1';end case;end;------------------------------------------------------------------------ function vlb2boo (v: vlbit) return boolean isbegincase v iswhen '1' => return true;when others => return false;end case;end;------------------------------------------------------------------------ function int2boo (i: integer) return boolean isbegincase i iswhen 1 => return true;when others => return false;end case;end;------------------------------------------------------------------------ function vlb2int (v: vlbit) return integer isbegincase v iswhen '1' => return 1;when others => return 0;end case;end;------------------------------------------------------------------------ function boo2int (b: boolean) return integer isbegincase b iswhen false => return 0;when true => return 1;end case;end;------------------------------------------------------------------------ function int2vec (i: integer) return vlbit_vector isvariable temp: integer := i;variable result: vlbit_vector (0 to 31) :=('0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0', '0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0'); beginfor b in 31 downto 0 loopif temp rem 2 = 1 thenresult (b) := '1';end if;temp := temp / 2;end loop;return result;end;------------------------------------------------------------------------function int2v1d (i: integer) return vlbit_1d isvariable temp: integer := i;variable result: vlbit_1d (31 downto 0) :=('0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0', '0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0'); beginfor b in 0 to 31 loopif temp rem 2 = 1 thenresult (b) := '1';end if;temp := temp / 2;end loop;return result;end;------------------------------------------------------------------------ function v1d2int (v: vlbit_1d) return integer isvariable result: integer := 0;variable addition: integer := 1;beginfor b in v'reverse_range loopif v (b) = '1' thenresult := result + addition;end if;addition := addition *2;end loop;return result;end;--*---------------------------------------------------------------------- --* added four local functions for interface to Metamor array_arith--* vlb2bit , bit2vlb, v1d2bv bv2v1d--*---------------------------------------------------------------------- function vlb2bit (v: vlbit) return bit isbegincase v iswhen '1' => return '1';when others => return '0';end case;end;function bit2vlb (v: bit) return vlbit isbegincase v iswhen '1' => return '1';when others => return '0';end case;end;function v1d2bv (v: vlbit_1d) return bit_vector isvariable result: bit_vector(v'range);beginfor b in v'range loopresult(b) := vlb2bit(v(b));end loop;return result;function bv2v1d (v: bit_vector) return vlbit_1d isvariable result: vlbit_1d(v'range);beginfor b in v'range loopresult(b) := bit2vlb(v(b));end loop;return result;end;-----------------------------------------------------------------------type vlbit_relation_table is array (vlbit_base'left to vlbit_base'right,vlbit_base'left to vlbit_base'right) of boolean;------------------------------------------------------------------------function "=" (v1, v2: vlbit) return boolean isconstant equal: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,FALSE,FALSE), -- 'X'(FALSE,FALSE,FALSE,FALSE), -- 'Z'(FALSE,FALSE,TRUE, FALSE), -- '0'(FALSE,FALSE,FALSE,TRUE ));-- '1'return equal (v1, v2);end;------------------------------------------------------------------------ function "/=" (v1, v2: vlbit) return boolean isconstant unequal: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,FALSE,FALSE), -- 'X'(FALSE,FALSE,FALSE,FALSE), -- 'Z'(FALSE,FALSE,FALSE,TRUE ), -- '0'(FALSE,FALSE,TRUE, FALSE));-- '1'beginreturn unequal (v1, v2);end;------------------------------------------------------------------------ function "<" (v1, v2: vlbit) return boolean isconstant lessthan: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,FALSE,FALSE), -- 'X'(FALSE,FALSE,FALSE,FALSE), -- 'Z'(FALSE,FALSE,FALSE,TRUE ), -- '0'(FALSE,FALSE,FALSE,FALSE));-- '1'return lessthan (v1, v2);end;------------------------------------------------------------------------ function "<=" (v1, v2: vlbit) return boolean isconstant lessoreq: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,FALSE,TRUE ), -- 'X'(FALSE,FALSE,FALSE,TRUE ), -- 'Z'(TRUE,TRUE,TRUE,TRUE ), -- '0'(FALSE,FALSE,FALSE,TRUE ));-- '1'beginreturn lessoreq (v1, v2);end;------------------------------------------------------------------------ function ">" (v1, v2: vlbit) return boolean isconstant greaterthan: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,FALSE,FALSE), -- 'X'(FALSE,FALSE,FALSE,FALSE), -- 'Z'(FALSE,FALSE,FALSE,FALSE), -- '0'(FALSE,FALSE,TRUE, FALSE));-- '1'return greaterthan (v1, v2);end;------------------------------------------------------------------------function ">=" (v1, v2: vlbit) return boolean isconstant greateroreq: vlbit_relation_table :=-- 'X' 'Z' '0' '1'((FALSE,FALSE,TRUE, FALSE), -- 'X'(FALSE,FALSE,TRUE, FALSE), -- 'Z'(FALSE,FALSE,TRUE, FALSE), -- '0'(FALSE,FALSE,TRUE, TRUE ));-- '1'beginreturn greateroreq (v1, v2);end;type vlbit_table is array (vlbit_base'left to vlbit_base'right,vlbit_base'left to vlbit_base'right) of vlbit;------------------------------------------------------------------------function "AND" (v1, v2: vlbit) return vlbit isconstant and_t: vlbit_table := -- 'X' 'Z' '0' '1'(('X','X','0','X'), -- 'X'('X','X','0','X'), -- 'Z'('0','0','0','0'), -- '0'('X','X','0','1'));-- '1'beginreturn and_t (v1, v2);end;------------------------------------------------------------------------ function "OR" (v1, v2: vlbit) return vlbit isconstant or_t: vlbit_table := -- 'X' 'Z' '0' '1'(('X','X','X','1'), -- 'X'('X','X','X','1'), -- 'Z'('X','X','0','1'), -- '0'('1','1','1','1'));-- '1'beginreturn or_t (v1, v2);end;------------------------------------------------------------------------ function "NAND" (v1, v2: vlbit) return vlbit isconstant nand_t: vlbit_table :=-- 'X' 'Z' '0' '1'(('X','X','1','X'), -- 'X'('X','X','1','X'), -- 'Z'('1','1','1','1'), -- '0'('X','X','1','0'));-- '1'beginreturn nand_t (v1, v2);end;------------------------------------------------------------------------ function "NOR" (v1, v2: vlbit) return vlbit isconstant nor_t: vlbit_table := -- 'X' 'Z' '0' '1'(('X','X','X','0'), -- 'X'('X','X','X','0'), -- 'Z'('X','X','1','0'), -- '0'('0','0','0','0'));-- '1'beginreturn nor_t (v1, v2);end;------------------------------------------------------------------------ function "XOR" (v1, v2: vlbit) return vlbit isconstant xor_t: vlbit_table := -- 'X' 'Z' '0' '1'(('X','X','X','X'), -- 'X'('X','X','X','X'), -- 'Z'('X','X','0','1'), -- '0'('X','X','1','0'));-- '1'beginreturn xor_t (v1, v2);end;------------------------------------------------------------------------ function "NOT" (v: vlbit) return vlbit isbegincase v iswhen 'X' | 'Z' => return 'X';when '0' => return '1';when '1' => return '0';end case;end;------------------------------------------------------------------------ function "AND" (v1, v2: vlbit_1d) return vlbit_1d isalias lv: vlbit_1d (1 to v1'length) is v1 ;alias rv: vlbit_1d (1 to v2'length) is v2 ;variable j: integer := 1 ;variable result: vlbit_1d (v1'range);beginassert v1'length = v2'lengthreport "vlbit array AND: operands of unequal lengths"severity FAILURE;for i in v1'range loopresult (i) := lv (j) and rv (j) ;j := j + 1 ;end loop;return result;end;------------------------------------------------------------------------ function "OR" (v1, v2: vlbit_1d) return vlbit_1d isalias lv: vlbit_1d (1 to v1'length) is v1 ;alias rv: vlbit_1d (1 to v2'length) is v2 ;variable j: integer := 1 ;variable result: vlbit_1d (v1'range);beginassert v1'length = v2'lengthreport "vlbit array OR: operands of unequal lengths"severity FAILURE;for i in v1'range loopresult (i) := lv (j) or rv (j) ;j := j + 1 ;end loop;return result;end;------------------------------------------------------------------------ function "NAND" (v1, v2: vlbit_1d) return vlbit_1d isalias lv: vlbit_1d (1 to v1'length) is v1 ;alias rv: vlbit_1d (1 to v2'length) is v2 ;variable j: integer := 1 ;variable result: vlbit_1d (v1'range);beginassert v1'length = v2'lengthreport "vlbit array NAND: operands of unequal lengths"severity FAILURE;for i in v1'range loopresult (i) := lv (j) nand rv (j) ;j := j + 1 ;end loop;return result;end;------------------------------------------------------------------------ function "NOR" (v1, v2: vlbit_1d) return vlbit_1d isalias lv: vlbit_1d (1 to v1'length) is v1 ;alias rv: vlbit_1d (1 to v2'length) is v2 ;variable j: integer := 1 ;variable result: vlbit_1d (v1'range);beginassert v1'length = v2'lengthreport "vlbit array NOR: operands of unequal lengths"。
第4章原理图设计在前面几章讲述了电路设计的基础知识后，现在可以学习具体的原理图设计。
本章主要讲述电子元件的布置、调整、布线、绘图以及元件的编辑等，最后将以一个FPGA应用板原理图和一个译码器原理图设计为实例进行讲解。
4.1 元件库管理在向原理图中放置元件之前，必须先将该元件所在的元件库载入系统。
如果一次载入过多的元件库，将会占用较多的系统资源，同时也会降低应用程序的执行效率。
所以，最好的做法是只载入必要且常用的元件库，其他特殊的元件库在需要时再载入。
一般在放置元件时，经常需要在元件库中查找需要放置的元件，所以需要进行元件库的相关操作。
4.1.1 浏览元件库浏览元件库可以执行Design→Browse Library命令，系统将弹出如图4-1所示的元件库管理器。
在元件库管理器中，用户可以装载新的元件库、查找元件、放置元件等。
79图4-1 元件库管理器(1)查找元件元件库管理器为用户提供了查找元件的工具。
即在元件库管理器中，单击Search按钮，系统将弹出如图4-2所示的查找元件库对话框，如果执行Tools→Find Component命令也可弹出该对话框，在该对话框中，可以设定查找对象以及查找范围。
可以查找的对象为包含在.Intlib文件中的元件。
该对话框的操作及使用方法如下：图4-2 简单查找元件库对话框801)简单查找。
图4-2所示为简单查找对话框，如果要进行高级查找，则单击图4-2所示对话框中的“Advanced”按钮，然后会显示高级查找对话框。
Filters操作框。
在该操作框中可以输入查找元件的域属性，如Name等；然后选择操作算子(Operator)，如Equals(等于)、Contains(包含)、Starts With(起始)或者Ends With(结束)等；在Vlaue(值)编辑框中可以输入或选择所要查找的属性值。
Scope操作框。
该操作框用来设置查找的范围。
当选中Available Libraries单选按钮时，则在已经装载的元件库中查找；当选中Libraries on Path单选按钮时，则在指定的目录中进行查找。
