Design Considerations and Performance Evaluations of Synchronous Rectification in Flyback Converters Michael T.Zhang,Member,IEEE,Milan M.Jovanovi´c,Senior Member,IEEE,and Fred C.Y.Lee,Fellow,IEEEAbstract—Design tradeoffs and performance comparisons of various implementations of theflyback converter with a synchronous rectifier(SR)are presented.Specifically,the merits and limitations of the constant-frequency(CF)continuous-conduction mode(CCM),CF discontinuous-conduction mode (DCM),variable-frequency(VF)DCM,and zero-voltage-switched(ZVS)DCMflyback converters with SR’s are discussed.The theoretical efficiency improvements of the discussed synchronous rectification approaches relative to Schottky diode implementations are derived.Finally,theoretical results are verified on an experimental universal-input off-line 15-V/36-Wflyback prototype.Index Terms—Efficiency,flyback converter,synchronous rec-tification.I.I NTRODUCTIONG ENERALLY,in low-output-voltage power supplies,theconduction loss of the diode rectifier(DR)due to its forward voltage drop is the dominant loss component.In power supplies with the output voltage not too many times higher than the rectifier forward voltage drop,the DR loss accounts for more than50%of the total power loss.The rectification loss can be reduced by replacing the DR with a synchronous rectifier(SR),i.e.,with a low-on-resistance MOSFET[1],[2]. Synchronous rectification is most often applied to the buck and buck-derived isolated topologies,which are suitable for step-down low-output-voltage applications[2].Generally,in the isolated buck-derived topologies,such as the forward,bridge-type,and push–pull converters,synchronous rectification can be implemented by a direct replacement of the DR’s with low-voltage MOSFET’s[3],[4].Namely,in these self-driven SR implementations,the secondary voltage of the transformer is used to directly drive the SR’s,thus reducing the circuit complexity and cost without sacrificing the efficiency.A number of applications of the SR in theflyback converter have also been reported[5]–[7].However,in all of these applications,the main purpose of the SR was to provide the postregulation of the output voltage and not to maximize the conversion efficiency.Specifically,in[5]–[7],the SR is used Manuscript received January7,1997;revised July28,1997.This work was supported by Delta Electronics,Inc.,Taiwan.Recommended by Associate Editor,R.Steigerwald.M.T.Zhang is with the Platform Architecture Laboratory,Intel Corpora-tion,Hillsboro,OR97124-5916USA.M.M.Jovanovi´c is with the Delta Power Electronics Laboratory,Inc., Blacksburg,V A24060USA.F. C.Y.Lee is with the Virginia Power Electronics Center,Bradley Department of Electrical Engineering,Virginia Polytechnic Institute and State University,Blacksburg,V A24061-0111USA.Publisher Item Identifier S0885-8993(98)03343-2.Fig.1.Flyback converter with SR.as a voltage-controlled resistor in a control loop which adjusts the SR’s resistance so that the output voltage is maintained within the regulation range.Generally,the regulation range of these postregulation approaches is limited to the forward voltage drop of the SR body diode,i.e.,Generally,the circuit sown in Fig.1can work in CCM or DCM either with a constant or variable switching frequency pulse-width-modulation(PWM)control.Design considera-tions and SR loss estimates for various modes of operation and different control approaches are given next.A.Constant-Frequency CCMThe key waveforms of theflyback converter with the SR operating in CCM are given in Fig.2.As can be seen fromFig.2,during delaytimesnot onlyincreases the conduction loss,but also introduces a reverse recovery loss when primary switch SW is turned on.The total conduction loss of the SR is given by the sum of the channel-resistance loss(unshadedis the SR onresistance,is theduty ratio of the primaryswitch,is the turns ratio of the transformer,ing(1),the total conduction loss of the SR can be calculatedas,currents).whereand losses,the CF CCM converterin Fig.1exhibits a loss each time the SR is turned off(i.e.,each time the SW is turned on)because of a parasitic resonancebetween)must be terminated at themomentstarts resonating,as shown in Fig.3.For a converter with aregulated output,the duration of resonantintervalFig.3.Key waveforms of CF DCMflyback converter with SR.Body diode of SR conducts in shaded area(C.Variable-Frequency DCMCapacitive switchinglosscan be eliminated if the primary switch SW is turned on at themoment,which isequal to one half of the parasitic-resonance period,i.e.,).and full load,and it increases as the line increases and/or loaddecreases.The conversion efficiency at low line of the VF DCMconverter can be always made higher than the efficiencyof the corresponding CF counterpart.In addition,the high-line efficiency of the VF DCM converter can also be higherthan that of the CF DCM implementation if the power-losssavings due to elimination of the parasitic oscillations andthe minimization of the turn-onvoltage.Therefore,forTABLE IP OWER L OSS C OMPARISONSOFF LYBACK C ONVERTERSWITHDRANDSRFig.5.Key waveforms of VF ZVS DCM operation.Therefore,to build up thenecessary,rectifier switchinglosses,(11)where is the loss other than the conduction and switching losses of the rectifier and the capacitive turn-on switching loss of the primary switch.Specifically,includes the transformer,input [electromagnetic interference (EMI)]filter,output filter,and control circuit losses,i.e.,the losses which are virtually the same for both the SR and rectifier diode implementations of the converter.Similarly,the efficiency of the flyback converter with the SR can be writtenasfrom (11)and (12),the efficiencydifference between the SR and the DR implementations canFig.6.Theoretical efficiency estimates. be calculatedas(13)whereA)because the switching turn-onloss of the primary switch contributes significantly to the totalloss in the other implementations.For the same range of theoutput power,the CF CCM implementation exhibits the lowestefficiency due to the dominant effect of the turn-on switchingloss of the primary switch and the turn-off switching loss ofthe SR.For example,at A(which corresponds to thefull-load current of the experimental converter presented in thenext section),the efficiency of the ZVS DCM implementationwith the SR is approximately3%higher than the efficiency ofthe corresponding circuit with the Schottky rectifier.However,at A,the efficiency of the CCM implementation withthe SRat A is1%lower than the efficiency of thesame circuit with the Schottky rectifier.At higher power levels,the conduction losses of the primaryswitch and the SR start dominating the total loss.As a result,the CF CCM implementation exhibits the highest efficiencyat.IV.E V ALUATION R ESULTSThe discussed SR implementations were experimentallyevaluated on a15-V/2.4-Aflyback converter designed to oper-ate in the100–370-Vdc input-voltage range.The diode-versionpower stages were implemented with Motorola MTP6N60(C,andpFpFV)Schottky diodes in parallel for the secondary rectifiers.Inimplementations of the power stages with SR’s,the Schottkydiodes were replaced with IXYS IXFK100N10(V)MOSFET’s.The turns ratio of thetransformer for the CCM implementationwaskHz[9].The transformer used for allother implementations(CF DCM,VF DCM,and ZVS DCM)had a turns ratioofcircuit which is connected to the output of thezero-crossing detector comparator.ResistorsFig.7.Control and drive circuit for VF DCM flyback converter with SR.The thick lines belong to the powerstage.Fig.8.Measured efficiencies of CF CCM implementation with SR and Schottkies rectifier at full power.A.Constant-Frequency CCMFig.8shows the measured efficiencies of the CF CCM experimental converters with the Schottky diode and the SR.Because the SR body diode conducts current during delaytimes,causes large superimposed capacitor charging andbody reverse recovery currents.To suppress these currents,a saturable core was connected in series with the SR to slow down the rateofpF),causing a highercapacitor charging loss according to (5).Therefore,at 36-W power level the CCM converter with the Schottky rectifier exhibits higher efficiency than that with the SR.B.Constant-Frequency DCMFig.10shows an oscillogram with the key waveform of the CF DCM converter with the SR.During the resonantintervalresonance can be clearly seen inbothand.Toachieve the switch turn on with minimumvoltageispF,and since at themaximum inputvoltagein the experimentalconverterispF(a)(b)Fig.9.SR turn-off waveforms of CF CCM converter with SR:(a)without saturable core and (b)with saturablecore.Fig.10.Measured waveforms of CF DCM converter with SR at V in =250Vdc,V o =15V,and I o =2:4A.Fig.11.Measured efficiency of CF DCM implementation with SR and Schottky at full power.It should be notedthatis a function of inputvoltageonin the entire input-voltage range from 100to 370V is less than 20%.Therefore,Fig.12.Measured waveforms of VF DCM implementation with SR at V in =250Vdc,V o =15V,and I o =2:4A.Fig.13.Measured waveforms of ZVS DCM implementation at V in =250Vdc,V o =15V,and I o =2:4A.a simple low-cost drive circuit with a constant delay can be used in the implementations of the VF converters in Figs.12and 13without significantly affecting their performance.By eliminating the parasitic resonance duringtheFig.14.Measured efficiencies of VF DCM implementations with SR and Schottky and ZVS DCM implementation at fullpower.Fig.15.Switching frequency comparison of VF DCM implementations with SR and Schottky and ZVS DCM implementation.the efficiency comparisons in Fig.14shows that VF DCM implementation with the SR has a relatively constant 2.5%–4%efficiency improvement over VF DCM implementation with the Schottky,as has been predicted.However,in the VF DCM implementation,only partial ZVS can be achieved,since inthis design,input voltage(–Arequired toobtain[9]L.Huber and M.M.Jovanovi´c,“Evaluation offlyback topologiesfor notebook ac/dc adapter/charger applications,”in High Freq.Power Conversion Conf.Proc.,1995,pp.284–294.[10] B.Andreycak,“Power factor correction using the UC3852controlledon-time zero-current switching techniques,”Unitrode Product&Appli-cations Handbook1995–1996,Application Note U-132,pp.10-269–10-283.[11]J.G.Kassakian,M.F.Schelcht,and G.C.Verghese,Principle of PowerElectronics.Reading,MA:Addison-Wesley,1991.Michael T.Zhang(S’95–M’97)was born in Shang-hai,China,in1966.He received the B.S.degree inphysics from Fudan University,Shanghai,in1989and the M.S.degree in physics and Ph.D.degreein electrical engineering,both from Virginia Poly-technic Institute and State University,Blacksburg,in1992and1997,respectively.He joined Intel’s Platform Architecture Labora-tory(PAL),Hillsboro,OR,in1997as a SeniorDesign Engineer.His research interests include theanalysis and design of high-frequency computer power supplies and the techniques of computer EMI an M.Jovanovi´c(S’86–M’89–SM’89),for a photograph and biography, see this issue,p.486.Fred C.Y.Lee(S’72–M’74–SM’87–F’90),for a photograph and biography, see this issue,p.521.。
