Integrated Circuits(集成电路)
The Integrated Circuit
Digital logic and electronic circuits derive their functionality from electronic switches called transistor. Roughly speaking, the transistor can be likened to an electronically controlled valve whereby energy applied to one connection of the valve enables energy to flow between two other connections.By combining multiple transistors, digital logic building blocks such as AND gates and flip-flops are formed. Transistors, in turn, are made from semiconductors. Consult a periodic table of elements in a college chemistry textbook, and you will locate semiconductors as a group of elements separating the metals and nonmetals.They are called semiconductors because of their ability to behave as both metals and nonmetals. A semiconductor can be made to conduct electricity like a metal or to insulate as a nonmetal does. These differing electrical properties can be accurately controlled by mixing the semiconductor with small amounts of other elements. This mixing is called doping. A semiconductor can be doped to contain more electrons (N-type) or fewer electrons (P-type). Examples of commonly used semiconductors are silicon and germanium. Phosphorous and boron are two elements that are used to dope N-type and P-type silicon, respectively.
A transistor is constructed by creating a sandwich of differently doped semiconductor layers. The two most common types of transistors, the bipolar-junction transistor (BJT) and the field-effect transistor (FET) are schematically illustrated in Figure 2.1.This figure shows both the silicon structures of these elements and their graphical symbolic representation as would be seen in a circuit diagram. The BJT shown is an NPN transistor, because it is composed of a sandwich of N-P-N doped silicon. When a small current is injected into the base terminal, a larger current is enabled to flow from the collector to the emitter.The FET shown is an N-channel FET, which is composed of two N-type regions separated by a P-type substrate. When a voltage is applied to the insulated gate terminal, a current is enabled to flow from the drain to the source. It is called N-channel, because the gate voltage induces an N-channel within the substrate, enabling current to flow between the N-regions.
Another basic semiconductor structure is a diode, which is formed simply by a junction of N-type and P-type silicon. Diodes act like one-way valves by conducting current only from P to N. Special diodes can be created that emit light when a voltage is applied. Appropriately enough, these components are called light emitting diodes, or LEDs. These small lights are manufactured by the millions and are found in diverse applications from telephones to traffic lights.
The resulting small chip of semiconductor material on which a transistor or diode is fabricated can be encased in a small plastic package
for protection against damage and contamination from the out-side world.Small wires are connected within this package between the semiconductor sandwich and pins that protrude from the package to make electrical contact with other parts of the intended circuit. Once you have several discrete transistors, digital logic can be built by directly wiring these components together. The circuit will function, but any substantial amount of digital logic will be very bulky, because several transistors are required to implement each of the various types of logic gates.
At the time of the invention of the transistor in 1947 by John Bardeen, Walter Brattain, and William Shockley, the only way to assemble multiple transistors into a single circuit was to buy separate discrete transistors and wire them together. In 1959, Jack Kilby and Robert Noyce independently invented a means of fabricating multiple transistors on a single slab of semiconductor material. Their invention would come to be known as the integrated circuit, or IC, which is the foundation of our modern computerized world. An IC is so called because it integrates multiple transistors and diodes onto the same small semiconductor chip. Instead of having to solder individual wires between discrete components, an IC contains many small components that are already wired together in the desired topology to form a circuit.
A typical IC, without its plastic or ceramic package, is a square or rectangular silicon die measuring from 2 to 15 mm on an edge. Depending on the level of technology used to manufacture the IC, there may be anywhere from a dozen to tens of millions of individual transistors on this small chip. This amazing density of electronic components indicates that the transistors and the wires that connect them are extremely small in size. Dimensions on an IC are measured in units of micrometers, with one micrometer (1mm) being one millionth of a meter. To serve as a reference point, a human hair is roughly 100mm in diameter. Some modern ICs contain components and wires that are measured in increments as small as 0.1mm! Each year, researchers and engineers have been finding new ways to steadily reduce these feature sizes to pack more transistors into the same silicon area, as indicated in Figure 2.2.
When an IC is designed and fabricated, it generally follows one of two main transistor technologies: bipolar or metal-oxide semiconductor (MOS). Bipolar processes create BJTs, whereas MOS processes create FETs. Bipolar logic was more common before the 1980s, but MOS technologies have since accounted the great majority of digital logic ICs. N-channel FETs are fabricated in an NMOS process, and P-channel FETs are fabricated in a PMOS process. In the 1980s, complementary-MOS, or CMOS, became the dominant process technology and remains so to this day. CMOS ICs incorporate both NMOS and PMOS transistors.
Application Specific Integrated Circuit
An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC. In contrast, the 7400 series and 4000 series integrated circuits are logic building blocks that can be wired together for use in many different applications.
As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 gates to over 100 million.Modern ASICs often include entire 32-bit processors, memory blocks including ROM, RAM, EEPROM, Flash and other large building blocks. Such an ASIC is often termed a SoC (System-on-Chip). Designers of digital ASICs use a hardware description language (HDL), such as Verilog or VHDL, to describe the functionality of ASICs.
Field-programmable gate arrays (FPGA) are the modern day equivalent of 7400 series logic and a breadboard, containing programmable logic blocks and programmable interconnects that allow the same FPGA to be used in many different applications. For smaller designs and/or lower production volumes, FPGAs may be more cost effective than an ASIC design. The non-recurring engineering cost (the cost to setup the factory to produce a particular ASIC) can run into hundreds of thousands of dollars.
The general term application specific integrated circuit includes FPGAs, but most designers use ASIC only for non-field programmable devices and make a distinction between ASIC and FPGAs.
History
The initial ASICs used gate array technology. Ferranti produced perhaps the first gate-array, the ULA (Uncommitted Logic Array), around 1980. Customization occurred by varying the metal interconnect mask. ULAs had complexities of up to a few thousand gates. Later versions became more generalized, with different base dies customized by both metal and polysilicon layers. Some base dies include RAM elements.
Standard cell design
In the mid 1980s a designer would choose an ASIC manufacturer and implement their design using the design tools available from the manufacturer. While third party design tools were available, there was not an effective link from the third party design tools to the layout and actual semiconductor process performance characteristics of the various ASIC manufacturers.Most designers ended up using factory specific tools to complete the implementation of their designs. A solution to this problem that also yielded a much higher density device was the
implementation of Standard Cells. Every ASIC manufacturer could create functional blocks with known electrical characteristics, such as propagation delay, capacitance and inductance; that could also be represented in third party tools.Standard cell design is the utilization of these functional blocks to achieve very high gate density and good electrical performance. Standard cell design fits between Gate Array and Full Custom design in terms of both its NRE (Non-Recurring Engineering) and recurring component cost.
By the late 1980s, logic synthesis tools, such as Design Compiler, became available. Such tools could compile HDL descriptions into a gate-level netlist. This enabled a style of design called standard-cell design. Standard-cell Integrated Circuits (ICs) are designed in the following conceptual stages, although these stages overlap significantly in practice.
These steps, implemented with a level of skill common in the industry, almost always produce a final device that correctly implements the original design, unless flaws are later introduced by the physical fabrication process.
A team of design engineers starts with a non-formal understanding of the required functions for a new ASIC, usually derived from requirements analysis.
*The design team constructs a description of an ASIC to achieve these goals using an HDL. This process is analogous to writing a computer program in a high-level language. This is usually called the RTL (register transfer level) design.
*Suitability for purpose is verified by simulation. A virtual system created in software, using a tool such as Virtutech’s Simics, can simulate the performance of ASICs at speeds up to billions of simulated instructions per second.
*A logic synthesis tool, such as Design Compiler, transforms the RTL design into a large collection of lower-level constructs called standard cells. These constructs are taken from a standard-cell library consisting of pre-characterized collections of gates such as 2 input nor, 2 input nand, inverters, etc.The standard cells are typically specific to the planned manufacturer of the ASIC. The resulting collection of standard cells, plus the needed electrical connections between them, is called a gate-level netlist.
*The gate-level netlist is next processed by a placement tool which places the standard cells onto a region representing the final ASIC. It attempts to find a placement of the standard cells, subject to a variety of specified constraints. Sometimes advanced techniques such as simulated annealing are used to optimize placement.
*The routing tool takes the physical placement of the standard cells and uses the netlist to create the electrical connections between them.
Since the search space is large, this process will produce a “sufficient” rather than “globally-optimal” solution. The output is a set of photomasks enabling semiconductor fabrication to produce physical ICs.
*Close estimates of final delays, parasitic resistances and capacitances, and power consumptions can then be made. In the case of a digital circuit, this will be further mapped into delay information. These estimates are used in a final round of testing. This testing demonstrates that the device will function correctly over all extremes of the process, voltage and temperature. When this testing is complete the photomask information is released for chip fabrication.
These design steps (or flow) are also common to standard product design. The significant difference is that Standard Cell design uses the manufacturer’s cell libraries that have been used in hundreds of other design implementations and therefore are of much lower risk than full custom design.
Gate array design
Gate array design is a manufacturing method in which the diffused layers, i.e. transistors and other active devices, are predefined and wafers containing such devices are held in stock prior to metallization, in other words, unconnected.The physical design process then defines the interconnections of the final device. It is important to the designer that minimal propagation delays can be achieved in ASICs versus the FPGA solutions available in the marketplace. Gate array ASIC is a compromise as mapping a given design onto what a manufacturer held as a stock wafer never gives 100% utilization.
Pure, logic-only gate array design is rarely implemented by circuit designers today, replaced almost entirely by field programmable devices such as FPGAs, which can be programmed by the user and thus offer minimal tooling charges, marginally increased piece part cost and comparable performance.Today gate arrays are evolving into structured ASICs that consist of a large IP core like a processor, DSP unit, peripherals, standard interfaces, integrated memories SRAM, and a block of reconfigurable uncommitted logic.This shift is largely because ASIC devices are capable of integrating such large blocks of system functionality and “system on a chip” requires far more than just logic blocks.
Full-custom design
The benefits of full-custom design usually include reduced area, performance improvements and also the ability to integrate analog components and other pre-designed components such as microprocessor cores that form a System-on-Chip. The disadvantages can include increased
manufacturing and design time, increased non-recurring engineering costs, more complexity in the CAD system and a much higher skill requirement on the part of the design team.However for digital only designs, “standard-cell” libraries together with modern CAD systems can o ffer considerable performance/cost benefits with low risk. Automated layout tools are quick and easy to use and also offer the possibility to manually optimize any performance limiting aspect of the design.
Structured design
Structured ASIC design is an ambiguous expression, with different meanings in different contexts. This is a relatively new term in the industry, which is why there is some variation in its definition. However, the basic premise of a structured ASIC is that both manufacturing cycle time and design cycle time are reduced compared to cell-based ASIC by virtue of there being pre-defined metal layers and pre-characterization of what is on the silicon.One definition states that, in a structured ASIC design, the logic mask-layers of a device are predefined by the ASIC vendor (or in some cases by a third party). Structured ASIC technology is seen as bridging the gap between field-programmable gate arrays and “standard-cell” ASIC designs.
What makes a structured ASIC different from a gate array is that in a gate array the predefined metal layers serve to make manufacturing turnaround faster. In a structured ASIC the predefined metallization is primarily to reduce cost of the mask sets and is also used to make the design cycle time significantly shorter as well.Likewise, the design tools used for structured ASIC can substantially lower cost, and are easier to use than cell-based tools, because the tools do not have to perform all the functions that cell-based tools do.
One other important aspect about structured ASIC is that it allows IP that is common to certain applications to be “built in”, rather than “designed in”. By building the IP directly into the architecture the designer can again save both time and money compared to designing IP into a cell-based ASIC.
中文翻译：
集成电路
数字逻辑和电子电路由称为晶体管的电子开关得到它们的（各种）功能。粗略地说，晶体管好似一种电子控制阀，由此加在阀一端的能量可以使能量在另外两个连接端之间流动。通过多个晶体管的组合就可以构成数字逻辑模块，如与门和触发电路等。而晶体管是由半导体构成的。查阅大学化学书中的元素周期表，你会查到半导体是介于金属与非金属之间的一类元素。它们之所以被叫做半导体是由于它们表现出来的性质类似于金属和非金属。可使半导体像金属那样导电，
或者像非金属那样绝缘。通过半导体和少量其它元素的混合可以精确地控制这些不同的电特性，这种混合技术称之为“半导体掺杂”。半导体通过掺杂可以包含更多的电子（N型）或更少的电子（P型）。常用的半导体是硅和锗，N型硅半导体掺入磷元素，而P型硅半导体掺入硼元素。
不同掺杂的半导体层形成的三明治状夹层结构可以构成一个晶体管，最常见的两类晶体管是双极型晶体管（BJT）和场效应晶体管（FET），图2.1给出了它们的图示。图中给出了这些晶体管的硅结构，以及它们用于电路图中的符号。BJT 是NPN晶体管，因为由N—P—N掺杂硅三层构成。当小电流注入基极时，可使较大的电流从集电极流向发射极。图示的FET是N沟道的场效应型晶体管，它由两块被P型基底分离的N型组成。将电压加在绝缘的栅极上时，可使电流由漏极流向源极。它被叫做N沟道是因为栅极电压诱导基底上的N通道，使电流能在两个N区域之间流动。
另一个基本的半导体结构是二极管，由N型和P型硅连接而成的结组成。二极管的作用就像一个单向阀门，由于电流只能从P流向N。可以构建一些特殊二极管，在加电压时可以发光，这些器件非常合适地被叫做发光二极管或LED。这种小灯泡数以百万计地被制造出来，有各种各样的应用，从电话机到交通灯。
半导体材料上制作晶体管或二极管所形成的小芯片用塑料封装以防损伤和被外界污染。在这封装里一些短线连接半导体夹层和从封装内伸出的插脚以便与（使用该晶体管的）电路其余部分连接。一旦你有了一些分立的晶体管，直接用电线将这些器件连线在一起就可以构建数字逻辑（电路）。电路会工作，但任何实质性的数字逻辑（电路）都将十分庞大，因为要在各种逻辑门中每实现一种都需要多个晶体管。
1947年，John Bardeen、Walter Brattain和and William Shockley发明晶体管的时候。将多个晶体管组装在一个电路上的唯一方法就是购买多个分离的晶体管，将它们连在一起。1959年，Jack Kilby 和 Robert Noyce各自独立地发明了一种将多个晶体管做在同一片半导体材料上的方法。这个发明就是集成电路，或IC，是我们现代电脑化世界的基础。集成电路之所以被这样命名，是因为它将多个晶体管和二极管集成到同一块小的半导体芯片上。IC包含按照形成电路所要求的拓扑结构连在一起的许多小元件，而无需再将分立元件的导线焊接起来。
去除了塑料或陶瓷封装后，一个典型的集成电路就是每一边2mm至15mm的方形或矩形硅片。根据制造集成电路的技术水平的不同，在这种小片上可能有几十个到几百万个晶体管，电子器件这种令人惊异的密度表明那些晶体管以及连接它们线是极其微小的。集成电路的尺寸是以微米为单位测量的，1微米是1米的百万分之一。作为参照，一根人的头发其直径大约为100微米。一些现代集成电路包含的元件和连线，是以小到0.1微米的增量来测量的。每年研究人员和工程师都在寻找新的方法来不断减小这些元件的大小，以便在同样面积的硅片上集成更多的晶体管，如图2.2所示。
在集成电路的设计和制造过程中，常用两种主要晶体管技术是：双极和金属氧化物半导体（MOS）。双极工艺生产出来的是BJT（双极型晶体管），而MOS工艺生产出来的是FET（场效应晶体管）。在20世纪80年代以前更常用的集成电路是双极逻辑，但是此后MOS技术在数字逻辑集成电路中占据了大多数。N沟道FET是采用NMOS工艺生产的，而P沟道FET是采用PMOS工艺生产的。到了20世纪80年代，互补MOS即CMOS成为占主导地位的加工技术，并且延续至今。CMOS
集成电路包含了NMOS和PMOS两种晶体管。
专用集成电路（ASIC）
专用集成电路（ASIC）是为了特殊应用而定制的集成电路，而不是通用的。比如，一片仅被设计用于运行蜂窝式电话的芯片是专用集成电路（ASIC）。相比之下，7400与4000系列集成电路是可以用导线连接的逻辑构建模块，适用于各种不同的应用。
随着逐年来特征尺寸的缩小和设计工具的改进，ASIC中的最大复杂度从5000个门电路增长到了1亿个门电路，因而功能也有极大的提高。现代ASIC常包含32位处理器，包括ROM、RAM、EEPROM、Flash等存储器，以及其它大规模组件。这样的ASIC经常被称为SoC（片上系统）。数字ASIC的设计者们使用硬件描述语言（HDL），比如Verilog或VHDL语言来描述ASIC的功能。
现场可编程门阵列（FPGA）是7400系列和面包板的现代版，它包括可编程逻辑块和可编程的模块之间的相互连接，使得相同的FPGA能够用于许多不同的场合。对于较小规模的设计或（与）小批量生产，FPGA可能比ASIC设计有更高的成本效率。不能循坏的工程费用（建立工厂生产特定ASIC的成本）可能会达到数十万美元。
专用集成电路这一通用名词也包括FPGA，但是大多数设计者仅将ASIC用于非现场可编程的器件，将ASIC和FPGA两者区别开来。
历史
最初的ASIC使用门阵列技术。Ferranti在1980年左右制作了也许是第一片门阵列，ULA（自由逻辑阵列）。通过改变金属互相连接掩模产生了定制。ULA 有多至几千个门电路的复杂度。之后的版本变得更通用，有适应用户的包含金属和多层硅的不同基底，有些基底包括RAM单元。
标准单元设计
在20世纪80年代中期，一个设计者要选择一家ASIC制造商，并用制造商提供的设计工具完成他们的设计工作。尽管有第三方设计工具，但第三方设计工具和不同的ASIC制造商的布线以及实际半导体工艺过程的性能之间却缺乏有效的联系。大多数的设计者最终使用工厂特制的工具来完成他们的设计。解决这个问题的一个方法是实现标准元件，这一问题也带来了更高密度的器件。每个ASIC 制造商都可创造他们自己的具有已知电性能的功能块，如传播延迟器、电容、电感，这些都可以用第三方工具来表示（实现）。标准单元设计就是利用这些功能块来实现很高的门密度以及良好的电性能。标准单元设计使门阵列和全定制设计之间在一次性投入的工程费用和循环元件成本方面相互适应。
直到80年代后期，逻辑综合工具，比如设计编译器，开始向广大设计者提供。这些工具能够将HDL描述语言编译成门级的网表。这就使得称作标准单元设计的设计方法成为可能。标准单元集成电路的设计过程在概念上需经过以下几个过程，但事实上在实际生产中这些工序都有较大的重叠。
以工业界普通的熟练水平实现的这些步骤几乎总是产生能正确实现原设计
的最终器件，除非后来在物理制造过程中引入了缺陷。
设计工程师团队开始工作于对新的ASIC所要求功能的非正式理解，这通常来自于需求分析。
*设计团队构建对ASIC芯片的描述并使用HDL语言实现这些目标。这一过程可类比于用高级语言编写计算机程序。这一过程常被称为RTL（寄存器传送级）设计。
*仿真验证目标的合适性。利用例如Virtutech’s Simics工具，用软件构建的虚拟系统能以高达每秒数十亿条模拟指令的速度来模拟ASIC的功能。
*逻辑综合工具，比如设计编译器，将RTL设计转换成称为标准单元的较低层结构的集合。这些构成的元素是从一个标准单元库中得到的，这个库由事先规定好的门电路集合构成，例如2输入或非门，2输入与非门，非门等等。有计划的ASIC制造商有其特定的标准单元。所产生的所有标准单元，加上连接他们所需要的导线称为门级网表。
*接着，门级网表由布局工具进行处理，将标准单元布局在代表最终ASIC 的区域。努力寻找一种标准单元的布局服从各种规定的约束。有时，先进的技术比如模拟退火被用来优化布局。
*路由工具获取标准单元的物理布局，并利用网表来创建它们之间的电连接。由于搜索空间很大，该过程将产生满足充分条件的解，而不是全局最优解。这个过程的输出是一套光掩模使半导体制造产生实物的IC。
*接下来是对最终延时、寄生电阻和电容以及能量消耗的周全的评估。对于数字电路，这将被进一步对应为延迟信息，这些评估将用于最后一轮的测试。这一测试表明器件将在所有极端的过程、电压、温度下正常工作。当这项测试完成时，光掩模信息将被公布用于芯片制造。
这些设计步骤（或流程）对于标准产品设计同样适用。重要的差别在于标准单元设计使用制造商的单元库，这些库已用于数以百计的其它设计实现，因而比起全定制设计来风险小得多。
门阵列设计
门阵列设计是一种制造方法，事先定义好扩散层（晶体管和其它有源器件），包含这些器件的晶片在金属化之前被库存，就是说先不进行联接。然后在物理设计过程中定义最终设计的连接。对设计者来说重要的是，ASIC相比在市场上可提供的FPGA解决方案，能达到最小的传播延时。门阵列ASIC是一种折中方案，因为将某一给定的设计与制造商库存的晶片相对应总是不可能达到100%利用率的。
现在电路设计者已经很少采用纯粹的逻辑门阵列设计，而几乎都代之以FPGA之类的现场可编程器件了。这些器件可由用户编程，使工具作业费用最低，以略为提高的零件价格获得可比的性能。现在门阵列正在发展为结构化ASIC，其中包含很大的IP内核，如处理器、DSP单元、外围设备、标准接口、集成SRAM 存储器、以及一组可重新设置的未确定功能的逻辑单元。这种转变很大程度上是因为ASIC器件能够集成大量的系统功能模块，以及片上系统所要求的（功能）比仅仅逻辑单元多得多。
全定制设计
全定制设计的优点通常包括减小的面积，性能的改进，以及能集成模拟元件和其它预先设计的元件比如构成片上系统的微处理器核。缺点包括增加的制造和设计时间，增加的不可循环工程成本，更复杂的CAD系统，和对设计团队熟练程度高得多的要求。但对于纯数字设计来说，“标准单元”库与现代CAD系统一起，可以低风险提供相当大的性能/价格优势。自动布局工具使用起来快速且简单，也提供了对设计的性能限制进行人工优化的可能性。
结构化设计
结构化ASIC设计是一个不明确的表达，在不同的上下文中有不同的意义。在工业界这是一个相对新的术语，这也是为什么在它的定义上有一些不同。不过结构化ASIC的基本前提是，由于有事先定义的金属层和事先规定了硅片上包含的内容，制造周期和设计周期相对于基于单元的ASIC都有所减少。一种定义是这样的：在结构化ASIC设计中，器件的逻辑掩模层是被ASCI供应商（有些情况下由第三方）预先定义的。结构化ASCI可以被看成是在现场可编程门阵列与“标准单元”ASCI设计之间建立联系。
使得结构化ASCI与门阵列不同的是，在门阵列中，预先定义的金属层是为能更快地制造转向而服务的。而在结构化ASIC中预先定义的金属化主要是降低掩模的成本，并被用于使设计周期明显缩短。同样的，为结构化ASCI所使用的设计工具可以大大降低成本，并比基于单元的工具更容易使用，因为这些工具不必像基于单元的工具那样执行所有的功能。
关于结构化ASIC的另一个重要方面是，它使对于某些应用共同的IP成为内在的，而不是设计在内的。通过直接将IP植入结构中，相比将IP设计在基于单元的ASIC中，设计者又能节省时间和花费。
半导体行业专业词汇 . acceptance testing (WAT: wafer acceptance testing) 2. acceptor: 受主，如B，掺入Si中需要接受电子 3. ACCESS：一个EDA（Engineering Data Analysis）系统 4. Acid：酸 5. Active device：有源器件，如MOS FET（非线性，可以对信号放大） 6. Align mark(key)：对位标记 7. Alloy：合金 8. Aluminum：铝 9. Ammonia：氨水 10. Ammonium fluoride：NH4F 11. Ammonium hydroxide：NH4OH 12. Amorphous silicon：α-Si，非晶硅（不是多晶硅） 13. Analog：模拟的 14. Angstrom：A（1E-10m）埃 15. Anisotropic：各向异性（如POLY ETCH） 16. AQL(Acceptance Quality Level)：接受质量标准，在一定采样下，可以95%置信度通过质量标准（不同于可靠性，可靠性要求一定时间后的失效率） 17. ARC(Antireflective coating)：抗反射层（用于METAL等层的光刻） 18. Antimony(Sb)锑 19. Argon(Ar)氩 20. Arsenic(As)砷 21. Arsenic trioxide(As2O3)三氧化二砷 22. Arsine(AsH3) 23. Asher：去胶机 24. Aspect ration：形貌比（ETCH中的深度、宽度比） 25. Autodoping：自搀杂（外延时SUB的浓度高，导致有杂质蒸发到环境中后，又回掺到外延层） 26. Back end：后段（CONTACT以后、PCM测试前） 27. Baseline：标准流程 28. Benchmark：基准 29. Bipolar：双极 30. Boat：扩散用（石英）舟 31. CD：（Critical Dimension）临界（关键）尺寸。在工艺上通常指条宽，例如POLY CD 为多晶条宽。 32. Character window：特征窗口。用文字或数字描述的包含工艺所有特性的一个方形区域。 33. Chemical-mechanical polish（CMP）：化学机械抛光法。一种去掉圆片表面某种物质的方法。 34. Chemical vapor deposition（CVD）：化学汽相淀积。一种通过化学反应生成一层薄膜的工艺。 35. Chip：碎片或芯片。 36. CIM：computer-integrated manufacturing的缩写。用计算机控制和监控制造工艺的一种综合方式。 37. Circuit design ：电路设计。一种将各种元器件连接起来实现一定功能的技术。
网易电力专业英语词汇(较全) 1）元件设备 三绕组变压器：three-column transformer ThrClnTrans 双绕组变压器：double-column transformer DblClmnTrans 电容器：Capacitor 并联电容器：shunt capacitor 电抗器：Reactor 母线：Busbar 输电线：TransmissionLine 发电厂：power plant 断路器：Breaker 刀闸(隔离开关)：Isolator 分接头：tap 电动机：motor 2）状态参数 有功：active power 无功：reactive power 电流：current 容量：capacity 电压：voltage 档位：tap position 有功损耗：reactive loss 无功损耗：active loss 空载损耗：no-load loss 铁损：iron loss 铜损：copper loss 空载电流：no-load current 阻抗：impedance 正序阻抗：positive sequence impedance 负序阻抗：negative sequence impedance 零序阻抗：zero sequence impedance 无功负载：reactive load 或者QLoad 有功负载: active load PLoad 遥测：YC(telemetering) 遥信：YX 励磁电流(转子电流)：magnetizing current 定子：stator 功角：power-angle
上限:upper limit 下限：lower limit 并列的：apposable 高压: high voltage 低压：low voltage 中压：middle voltage 电力系统 power system 发电机 generator 励磁 excitation 励磁器 excitor 电压 voltage 电流 current 母线 bus 变压器 transformer 升压变压器 step-up transformer 高压侧 high side 输电系统 power transmission system 输电线 transmission line 固定串联电容补偿fixed series capacitor compensation 稳定 stability 电压稳定 voltage stability 功角稳定 angle stability 暂态稳定 transient stability 电厂 power plant 能量输送 power transfer 交流 AC 装机容量 installed capacity 电网 power system 落点 drop point 开关站 switch station 双回同杆并架 double-circuit lines on the same tower 变电站 transformer substation 补偿度 degree of compensation 高抗 high voltage shunt reactor 无功补偿 reactive power compensation 故障 fault 调节 regulation 裕度 magin 三相故障 three phase fault 故障切除时间 fault clearing time 极限切除时间 critical clearing time 切机 generator triping
微电子学专业词汇 A be absorb in 集中精力做某事 access control list 访问控制表 active attack 主动攻击 activeX control ActiveX控件 advanced encryption standard AES,高级加密标准 algorithm 算法 alteration of message 改变消息 application level attack 应用层攻击 argument 变量 asymmetric key cryptography 非对称密钥加密 attribute certificate属性证书 authentication 鉴别 authority 机构 availability 可用性 Abrupt junction 突变结 Accelerated testing 加速实验 Acceptor 受主 Acceptor atom 受主原子 Accumulation 积累、堆积 Accumulating contact 积累接触 Accumulation region 积累区 Accumulation layer 积累层 Active region 有源区 Active component 有源元 Active device 有源器件 Activation 激活 Activation energy 激活能 Active region 有源（放大）区 Admittance 导纳 Allowed band 允带 Alloy-junction device 合金结器件 Aluminum(Aluminium) 铝 Aluminum – oxide 铝氧化物 Aluminum passivation 铝钝化 Ambipolar 双极的 Ambient temperature 环境温度 Amorphous 无定形的，非晶体的 Amplifier 功放扩音器放大器Analogue(Analog) comparator 模拟比较器 Angstrom 埃 Anneal 退火
集成电路英文代码及中文对照（一） 我的文摘2009-11-21 11:32:53 阅读111 评论0 字号：大中小订阅 性能说明 产品名称 型号规格 LM LM24J 四运放(军用级) LM148J 通用四运放 LM1875T 无线电控制/接收器 LM224J 四运放(工业级) LM258N 分离式双电源双运放 LM2901N 四电压比较器 LM2904N 四运放 LM301AN 通用运算放大器 LM308N 单比较器 LM311P 单比较器 LM317L 可调三端稳压器/100mA LM317T 可调三端稳压器/1.5A LM317K 可调三端稳压器/3A LM318 高速宽带运放 LM324K 通用四运放 LM331N V-F/F-V转换器 LM336-2.5V 基准电压电路 LM336 5V 基准电压电路 LM337T 基准电压电路1A LM338K 可调三端稳压器5A LM339N 四比较器 LM348N 四741运放 LM358N 低功耗双运放
LM361N 高速差动比较器 LM386N 声频功率放大器 LM3914N 十段点线显示驱动 LM393N 低功耗低失调双比较器 LM399H 精密基准源(6.9) LM723CN 可调正式负稳压器 LM733CN 视频放大器 LM741J 单运放 LM741CN 双运放 NE NE521 高速双差分比较器 NE5532 双运放 NE5534 双运放 NE555N 单运放 NE555J 时基电路军品极 NE556 双级型双时基电路 NE564 锁相环 NE565 锁相环 NE567 音调译码器 NE592 视频放大器 OP OP07 低噪声运放 OP27 超低噪声精密运放 OP37 超低噪声精密运放 光电耦合 4N25 晶体管输出 4N25MC 晶体管输出 4N26 晶体管输出 4N27 晶体管输出 4N28 晶体管输出 4N29 达林顿输出
电力电子-专业词汇中英文对照（一） AbsorberCircuit 吸收电路 AC/ACFrequencyConverter 交交变频电路ACpowercontrol交流电力控制ACPowerController交流调功电路ACPowerElectronicSwitch交流电力电子开关AcVoltageController交流调压电路AsynchronousModulation异步调制BakerClampingCircuit贝克箝位电路 Bi-directionalTriodeThyristor双向晶闸管BipolarJunctionTransistor--BJT双极结型晶体管Boost-BuckChopper升降压斩波电路Boost Chopper升压斩波电路BoostConverter升压变换器BridgeReversibleChopper桥式可逆斩波电路BuckChopper降压斩波电路BuckConverter降压变换器Commutation 换流 Conduction Angle 导通角ConstantVoltageConstantFrequency--CVCF 恒压恒频
ContinuousConduction--CCM （电流）连续模式ControlCircuit 控制电路 CukCircuit CUK斩波电路CurrentReversible Chopper 电流可逆斩波电路CurrentSourceTypeInverter--CSTI 电流（源）型逆变电路Cycloconvertor 周波变流器 DC-AC-DC Converter 直交直电路 DCChopping 直流斩波 DCChoppingCircuit 直流斩波电路 DC-DCConverter 直流－直流变换器DeviceCommutation 器件换流DirectCurrentControl 直接电流控制DiscontinuousConductionmode （电流）断续模式displacementfactor 位移因数 distortionpower 畸变功率 doubleendconverter 双端电路 drivingcircuit 驱动电路 electricalisolation 电气隔离 fastactingfuse 快速熔断器 fastrecoverydiode 快恢复二极管fastrevcoveryepitaxialdiodes 快恢复外延二极管
电子信息专业英语复习资料 一、基本术语（英译汉） 1.probe探针 2.real time operational system 实时操作系统 3.debugger 调试器 4.sourse code 源代码 5.software radio wireless LAN 软件无线电网络 6.base station 基站 7.top-down approach 自顶向下分析法 8.variable 变量 9.data compress 数据压缩 10.signal conditioning circuit 信号调理电路 11.Chebyshev Type Ⅰfilter 切比雪夫Ⅰ型滤波器 12.vertical resolution 垂直分辨率 13.device driver 设备驱动 https://www.doczj.com/doc/c25388987.html,piler 编译器 15.template 模板 16.concurrent process 并发进程 17.object recognition 目标识别 18.Discrete Time Fourier Transform 离散傅立叶变换 https://www.doczj.com/doc/c25388987.html,bined circuit 组合逻辑电路 20.impedance transform 阻抗变换器 21.voltage source 电压源22.passive component 无源器件 23.quality factor 品质因数 24.unit-impulse response 单位脉冲响应 25.noise origin 噪声源 26.Domino effect 多米诺效应 27.output load 输出负载 28.cordless phone 无绳电话 29.Antenna 天线 30.harmonic interference 谐波干涉 31.Parallel Resonant 并联谐振 32.voltage control oscillator 压控振荡器 33.adaptive delta modulation 自适应增量调制 34.amplitude modulation 调幅 二、缩略语（写出全称） 1.LSI：large scale integration 2.PMOS ：p-type metal-oxide semiconductor 3.CT：cycle threshold 4.MRI：magnetic resonance imaging 5.ROM：read-only memory 6.DRAM ：dynamic random access memory 7.TCXO ：temperature compensated X'tal (crystal) Oscillator https://www.doczj.com/doc/c25388987.html,B：Universal Serial Bus 9.DCT：discrete cosine transform
电力电子专业英语 1、元件设备 三绕组变压器：three-column transformer ThrCln Trans 双绕组变压器：double-column transformer DblCl mnTrans 电容器：Capacitor 并联电容器：shunt capacitor 电抗器：Reactor 母线：Bus bar 输电线：Transmission Line 发电厂：power plant 断路器：Breaker 刀闸(隔离开关)：Isolator
功角：power-angle 电压等级：voltage grade 空载损耗：no-load loss 铁损：iron loss 铜损：copper loss 空载电流：no-load current 阻抗：impedance 正序阻抗：positive sequence impedance 负序阻抗：negative sequence impedance 零序阻抗：zero sequence impedance 电阻：resistance 电抗：reactance 电导：conductance 电纳：susceptance 导纳：admittance
无功负载：reactive load 或者QLoad 有功负载: active load PLoad 遥测：YC(telemetering) 遥信：YX 励磁电流(转子电流)：magnetizing current 定子：stator 功角：power-angle 上限:upper limit 下限：lower limit 并列的：apposable 高压: high voltage 低压：low voltage 中压：middle voltage 电力系统 power system 发电机 generator
课一A Communications 通讯 1. equation n.相等, 平衡, 综合体, 2. communication n. 通信, 通讯, 交通communicate v.沟通, 通信, 3. triode n.三极管 4. storage n. 存储 5.transmission n. 传输, 传送, transmit v. 传输, 转送, 传达, 传导 6. amplifier n.放大器，扩音器 amplify v. 扩大，放大，增强amplification n. 扩大，放大 7. oscillator n.振荡器 8. correlate v. 是相互关联 correlation n.相互关系, 相关(性) 9. transmitter n.发射机 transmit receive transmission reception (发射) （接收） 10.subsequent adj.随后的 课一B Capacitors 电容 1.capacitor n. 电容器 2.capacitance n. 电容量（值） Resistor resistance capacitor capacitance inductor inductance 3. fixed adj. 固定的 variable adj. 可变的 4. dielectric n. 电介质，绝缘材料 adj. 绝缘的 5. relatively adv. 相对地 absolutely adv.绝对地 6. maximum adj. 最大的 n. 最大值 minimum adj. 最小的 n. 最小值 7. farad n. 法（拉） F ohm n. 欧姆Ω Henry n. 亨（利）H 8. trimmer n. 调整者, 整理者, 9. screwdriver n. 螺丝起子，改锥课二A Radio T ransmitter无线电发射机 1. radio transmitter 无线电发射机 radio n. 无线电，无线 2. telecommunication n.电信，电信学， 无线电通信 telephone n.电话，电话机 telegraph n.电报, 电报机, 电讯报 3. transmit v. 传输, 转送, 传达, 传导, 发射, 发报 transmit receive transmission reception transmitter receiv er (发射) （接收） 4. intelligence n.信息、情报、智能 information/message n.信息 5. potential adj.潜在的, 可能的, 势 的, n.潜能, 潜力, 电位 6. generate v.产生，发生 generation n.产生, 发生, 一代,7. frequency n.频 low frequency 几个Hz到几十kHz high frequency 几个MHz到几十 MHz radio frequency 几百MHz到几 个GHz 8. pulse signal 脉冲信号 9. wavelength n.波长用λ表示 10. output n.输出，产量 input n.输入 11. band n. 带，波段，频带 课二B Electromotive Force 电动势 1. electromotive adj.电动的，电动 势的 electromotive force 电动势 2.driving adj.驱动的 driving force n. 驱动力 driving unit 传动装置 3. volt n. 伏特 4. distinguish v.区分 5. potential difference 电位差 课三A Time Constant 时常数 1.nuclear adj.原子能的， n.核武器, 有核国 nuclear arms 核武 nuclear energy 核能 2.constant n.常数 adj.不断, 不断的, time constant 时间常数 3. instantaneously adv.瞬间地，即刻 instant n.瞬息, 一会儿, 时刻 4. dependent adj. 依赖的，依赖于，取决于 5. capacitiv e adj.电容的，容性的 capacitor n.电容器 capacitance n.电容值 6.discharge n.放电v.放电 charge n.电荷，充电v.充电 7.universal 普遍的, 全体的, 通用的, 课三B RL Time Constant RL时序常数 1.inductor n.电感器 inductance n.电感值（量） inductive adj.感应的; 电感的 2. function n.功能, 函数,作用, 3. Decay n.衰减v. 衰减 decay constant 衰减常数 decay factor 衰减因子 4. reverse adj.反向的, 相反, 逆转的 5. peak value 峰值
LCD专业术语中英文版 Backlight:背光。 CCFL(CCFT) (Cold Cathode Fluorescent Light/Tube):冷阴极荧光灯。 Composite vide复合视频。 Component vide分量视频。 COB(Chip On Board):IC裸片通过邦定固定于印刷线路板上。 COF(Chip On Film):将IC封装于柔性线路板上。 COG(Chip On Glass):将IC封装于玻璃上。 CRT(Cathode Radial Tube):阴极射线管。 DPI(Dot Per Inch):点每英寸。
Duty:占空比，高出点亮的阀值电压的部分在一个周期中所占的比率。 DVI(Digital Visual Interface):（VGA）数字接口。 ECB(Electrically Controlled Birefringence):电控双折射。 EL(Electro luminescence):电致发光。EL层由高分子量薄片构成 FSTN(Formulated STN):薄膜补偿型STN,用于黑白显示。 HTN(High Twisted Nematic):高扭曲向列的显示类型。 IC(Integrate Circuit):集成电路。 Inverter:逆变器。 ITO(Indium-Tin Oxide):氧化铟锡。
LCD(Liquid Crystal Display):液晶显示器。 LCM(Liquid Crystal Module): 液晶模块。 LED(Light Emitting Diode):发光二极管。 LVDS(Low Voltage Differential Signaling):低压差分信号。 NTSC(National Television Systems Committee):NTSC制式,全国电视系统委员会制式 OSD(On Screen Display):在屏上显示。 PAL(Phase Alternating Line)AL制式(逐行倒相制式)。 PCB(Print Circuit Board):印刷线路板。 PDP(Plasma Display Panel):等离子体显示。 SECAM(SE quential Couleur Avec Memoire):SECAM
电力系统power system 发电机generator 励磁excitation 励磁器exciter电压voltage 电流current 升压变压器step-up transformer 母线bus 变压器transformer 空载损耗：no-load loss铁损：iron loss 铜损：copper loss 空载电流：no-load current无功损耗：reactive loss有功损耗：active loss 输电系统power transmission system 高压侧high side 输电线transmission line 高压: high voltage低压：low voltage 中压：middle voltage 功角稳定angle stability稳定stability 电压稳定voltage stability 暂态稳定transient stability 电厂power plant 能量输送power transfer 交流AC直流DC 电网power system 落点drop point 开关站switch station 调节regulation 高抗high voltage shunt reactor并列的：apposable 裕度margin 故障fault 三相故障three phase fault分接头：tap 切机generator triping 高顶值high limited value 静态static (state) 动态dynamic (state)自动电压调节器AVR Automatic voltage regulator 电抗reactance 电阻resistance 功角power angle 有功（功率）active power 电容器：Capacitor电抗器：Reactor 断路器：Breaker 电动机：motor 功率因数：power-factor 定子：stator 阻抗电压：阻抗：impedance功角：power-angle 电压等级：voltage grade 有功负载: active load/PLoad无功负载：reactive load档位：tap position 电阻：resistor电抗：reactance 电导：conductance 电纳：susceptance上限:upper limit 下限：lower limit 正序阻抗：positive sequence impedance负序阻抗：negative sequence impedance零序阻抗：zero sequence impedance 无功（功率）reactive power功率因数power factor 无功电流reactive current 斜率slope额定rating 变比ratio 参考值reference value电压互感器PT 分接头tap 仿真分析simulation analysis下降率droop rate 传递函数transfer function 框图block diagram受端receive-side 同步synchronization 保护断路器circuit breaker 摇摆swing 阻尼damping 无刷直流电机：Brushless DC motor 刀闸(隔离开关)：Isolator机端generator terminal 变电站transformer substation 永磁同步电机：Permanent-magnet Synchronism Motor 异步电机：Asynchronous Motor 三绕组变压器：three-column transformer ThrClnTrans 双绕组变压器：double-column transformer DblClmnTrans 固定串联电容补偿fixed series capacitor compensation 双回同杆并架double-circuit lines on the same tower 单机无穷大系统one machine - infinity bus system 励磁电流：magnetizing current 补偿度degree of compensation Electromagnetic fields 电磁场失去同步loss of synchronization 装机容量installed capacity无功补偿reactive power compensation故障切除时间fault clearing time 极限切除时间critical clearing time 强行励磁reinforced excitation 并联电容器：shunt capacitor < 下降特性droop characteristics 线路补偿器LDC(line drop compensation) 电机学Electrical Machinery 自动控制理论Automatic Control Theory电磁场Electromagnetic Field微机原理Principle of Microcomputer 电工学Electrotechnics Principle of circuits 电路原理Electrical Machinery 电机学 电力系统稳态分析Steady-State Analysis of Power System 电力系统暂态分析Transient-State Analysis of Power System 电力系统继电保护原理Principle of Electrical System’s Relay Protection 电力系统元件保护原理Protection Principle of Power Syste m’s Element
transistor n 晶体管 diode n 二极管semiconductor n 半导体 resistor n 电阻器 capacitor n 电容器 alternating adj 交互的 amplifier n 扩音器，放大器integrated circuit 集成电路 linear time invariant systems 线性时不变系统voltage n 电压，伏特数 tolerance n 公差；宽容；容忍condenser n 电容器；冷凝器dielectric n 绝缘体；电解质electromagnetic adj 电磁的 adj 非传导性的 deflection n偏斜；偏转；偏差 linear device 线性器件 the insulation resistance 绝缘电阻 anode n 阳极，正极 cathode n 阴极 breakdown n 故障；崩溃 terminal n 终点站；终端，接线端emitter n 发射器 collect v 收集，集聚，集中insulator n 绝缘体，绝热器oscilloscope n 示波镜；示波器 gain n 增益，放大倍数 forward biased 正向偏置 reverse biased 反向偏置 P-N junction PN结 MOS（metal-oxide semiconductor）金属氧化物半导体 enhancement and exhausted 增强型和耗尽型 integrated circuits 集成电路 analog n 模拟 digital adj 数字的，数位的horizontal adj, 水平的，地平线的vertical adj 垂直的，顶点的amplitude n 振幅，广阔，丰富attenuation n衰减；变薄；稀薄化multimeter n 万用表 frequency n 频率，周率 the cathode-ray tube 阴极射线管 dual-trace oscilloscope 双踪示波器 signal generating device 信号发生器 peak-to-peak output voltage 输出电压峰峰值sine wave 正弦波 triangle wave 三角波 square wave 方波 amplifier 放大器，扩音器 oscillator n 振荡器 feedback n 反馈，回应 phase n 相，阶段，状态 filter n 滤波器，过滤器 rectifier n整流器；纠正者 band-stop filter 带阻滤波器 band-pass filter 带通滤波器 decimal adj 十进制的，小数的hexadecimal adj/n十六进制的 binary adj 二进制的；二元的octal adj 八进制的 domain n 域；领域 code n代码，密码，编码v编码 the Fourier transform 傅里叶变换 Fast Fourier Transform 快速傅里叶变换microcontroller n 微处理器；微控制器assembly language instrucions n 汇编语言指令 chip n 芯片，碎片 modular adj 模块化的；模数的 sensor n 传感器 plug vt堵，塞，插上n塞子，插头，插销coaxial adj 同轴的，共轴的 fiber n 光纤relay contact 继电接触器 single instruction programmer 单指令编程器 dedicated manufactures programming unit 专 供制造厂用的编程单元 beam n （光线的）束，柱，梁 polarize v（使）偏振，（使）极化 Cathode Ray Tube（CRT）阴极射线管 neuron n神经元；神经细胞 fuzzy adj 模糊的 Artificial Intelligence Shell 人工智能外壳程序 Expert Systems 专家系统 Artificial Intelligence 人工智能 Perceptive Systems 感知系统 neural network 神经网络 fuzzy logic 模糊逻辑 intelligent agent 智能代理 electromagnetic adj 电磁的 coaxial adj 同轴的，共轴的 microwave n 微波 charge v充电，使充电 insulator n 绝缘体，绝缘物 nonconductive adj非导体的，绝缘的 antenna n天线；触角 modeling n建模，造型 simulation n 仿真；模拟 prototype n 原型 array n 排队，编队 vector n 向量，矢量 wavelet n 微波，小浪 sine 正弦cosine 余弦 inverse adj倒转的，反转的n反面；相反v 倒转 high-performance 高精确性，高性能 two-dimensional 二维的；缺乏深度的 three-dimensional 三维的；立体的；真实的 object-oriented programming面向对象的程序 设计 spectral adj 光谱的 attenuation n衰减；变薄；稀释 distortion n 失真，扭曲，变形 wavelength n 波长 refractive adj 折射的 ATM 异步传输模式Asynchronous Transfer Mode ADSL非对称用户数字线Asymmetric digital subscriber line VDSL甚高速数字用户线very high data rate digital subscriber line HDSL高速数据用户线high rate digital subscriber line FDMA频分多址(Frequency Division Multiple Access) TDMA时分多址(Time Division Multiple Access) CDMA同步码分多址方式(Code Division Multiple Access) WCDMA宽带码分多址移动通信系统(Wideband Code Division Multiple Access) TD-SCDMA(Time Division Synchronous Code Division Multiple Access)时分同步码分多址 SDLC(synchronous data link control)同步数据 链路控制 HDLC(high-level data link control)高级数据链路 控制 IP/TCP(internet protocol /transfer Control Protocol)网络传输控制协议 ITU (International Telecommunication Union) 国际电信联盟 ISO国际标准化组织（International Standardization Organization）； OSI开放式系统互联参考模型（Open System Interconnect） GSM全球移动通信系统（Global System for Mobile Communications） GPRS通用分组无线业务(General Packet Radio Service) FDD(frequency division duplex)频分双工 TDD(time division duplex)时分双工 VPI虚路径标识符（Virtual Path Identifier）； ISDN（Integrated Services Digital Network）综 合业务数字网 IDN综合数字网（integrated digital network） HDTV (high definition television)高清晰度电视 DCT(Discrete Cosine Transform)离散余弦变换 VCI(virtual circuit address)虚通路标识 MAN城域网Metropolitan area networks LAN局域网local area network WAN广域网wide area network 同步时分复用STDM Synchronous Time Division Multiplexing 统计时分复用STDM Statistical Time Division Multiplexing 单工传输simplex transmission 半双工传输half-duplex transmission 全双工传输full-duplex transmission 交换矩阵Switching Matrix 电路交换circuit switching 分组交换packet switching 报文交换message switching 奇偶校验parity checking 循环冗余校验CRC Cyclic Redundancy Check 虚过滤Virtual filter 数字滤波digital filtering 伪随机比特Quasi Random Bit 带宽分配Bandwidth allocation 信源information source 信宿destination 数字化digitalize 数字传输技术Digital transmission technology 灰度图像Grey scale images 灰度级Grey scale level 幅度谱Magnitude spectrum 相位谱Phase spectrum 频谱frequency spectrum 智能设备Smart Device 软切换Soft handover 硬切换Hard Handover 相干检测Coherent detection 边缘检测Edge detection 冲突检测collision detection 业务集合service integration 业务分离/综合service separation/ integration 网络集合network integration 环形网Ring networks 令牌环网Token Ring network 网络终端Network Terminal 用户终端user terminal 用户电路line circuit 电路利用率channel utilization（通道利用率） 相关性coherence 相干解调coherent demodulation 数字图像压缩digital image compression 图像编码image encoding 有损/无损压缩lossy/lossless compression 解压decompression 呼叫控制Call Control 误差控制error control 存储程序控制stored program control 存储转发方式store-and-forward manner 语音\视频传输voice\video transmission 视频点播video-on-demand(VOD) 会议电视Video Conference 有线电视cable television 量化quantization 吞吐量throughput 话务量traffic 多径分集Multipath diversity 多媒体通信MDM Multimedia Communication 多址干扰Multiple Access Interference 人机交互man machine interface 交互式会话Conversational interaction