STM8S第1章~第5章

STM8S系列单片机原理与应用复习第1章基础知识1.1计算机的基本认识(11)地址总线，寻址范围,STM8寻址2陀16MB y (2)数据总线，字长,STM8为8位单片机J3)控制总线Q)时钟周期Y(2)机器周期:完成一个基本动作的时间。

1(3)指令周期：一条指令所需的时间。

STM8S: 一个机器周期仅包含一个时钟周期。

1. 1. 1计算机系统的工作过程及其内部结构ALU:算术运算和逻辑运算存储器：ROM, RAM1.1.2指令、指令系统及程序指令：操作码+操作数STM8:属CISC1?2寻址方式确定指令中操作数所在存储单元地址的方式，就称为寻址方式。

2.4 了解单片机特点及其发展趋势第2章STM8S系列MCU芯片内部结构P21STM8S103, STM8S105, STM8S207, STM8S208STM8S103(EEPR0M 64kB), STM8S003(EEPROM 128kB), ID2. 1 STM8S系列MCU性能概述16M地址空间,I/O引脚输入/输出可编程选择，内置HSI各LSI。

内核:高级STM8内核，具有3级流水线的哈佛结构扩展指令集存储器@中等密度程序和数据存储器：@ —最多32K字节Flash； 10K次擦写⑥55° C环境下数据可保存20年◎—数据存储器：多达1K字节真正的数据EEPROM；可达塑万次擦写@ RAM：多达2K字节时钟、复位和电源管理⑥3.L5.5V工作电压，内核电压 1.8V, Vcap⑥灵活的时钟控制，4个主时钟源⑥-低功率晶体振荡器⑥-外部时钟输入⑥-用户可调整的内部16MHz RC令-内部低功耗128kHz RC⑥带有时钟监控的时钟安全保障系统电源管理：⑥-低功耗模式（等待.活跃停机、停机）@ -外设的时钟可单独关闭⑥　永远打开的低功耗上电和掉电复位中断管理⑥带有32个中断的嵌套中断控制器⑥6个外部中断向量,最多37个外部中断定时器2个16位通用定时器，带有2+3个CAPCOM通道（IC、0C或PWM)@高级控制定时器：16位，4个CAPCOM◎通道，3个互补输出，死区插入和灵活的自动唤醒定时器2个看门狗定时器：窗口看门狗和独立看门狗通信接口⑥带有同步时钟输出的UART ,智能卡，红外IrDA, LIN接口<$> SPI 接口最高到8Mb i t/s⑥12C接口最高到400Kb i t/s2. 2 STM8S系列MCU内部结构P222. 2. 1 STM8 内核CPU P24PC 为24位，可寻址224=1 6Mb累加器(A),堆栈指针(SP),索引寄存器(X 和Y), 条件码寄存器(CC):令V: Overflow H: Half-carry令 N: NegativeZ: Zero令C: Carry? IO, 11: interruptmasklevel 0, 12.2.2 STM8S 封装与引脚排列2.3掌握通用I/O 口GPIO 初始化P31?可选择的输出模式：推挽式输出和开漏输出PB_DDR, PB_CR1,PB_CR22. 3. 1 2.3.2 2.3.3 2.3.4I/O 引脚结构I/O 端口数据寄存器与控制寄存器输入模式输出模式每一个端口都有一个输出数据寄存器(ODR), 一个引脚输入寄存器(IDR)和一个数据方向寄存器(DDR)总是同相关的。

数据手册STM8S105xx 基础型系列，16MHz STM8S 8位单片机，多达32K字节Flash 集成数据EEPROM，10位ADC，定时器，UART，SPI，I²C芯片特点内核高级STM8内核，具有3级流水线的哈佛结构扩展指令集存储器中等密度程序和数据存储器：─最多32K字节Flash；10K次擦写后在55°C环境下数据可保存20年─数据存储器：多达1K字节真正的数据EEPROM；可达30万次擦写RAM：多达2K字节时钟、复位和电源管理2.95 ~ 5.5V工作电压灵活的时钟控制，4个主时钟源– 低功率晶体振荡器– 外部时钟输入– 用户可调整的内部16MHz RC– 内部低功耗128kHz RC带有时钟监控的时钟安全保障系统电源管理：– 低功耗模式(等待、活跃停机、停机) – 外设的时钟可单独关闭永远打开的低功耗上电和掉电复位中断管理带有32个中断的嵌套中断控制器6个外部中断向量，最多37个外部中断定时器2个16位通用定时器，带有2+3个CAPCOM通道(IC、OC 或 PWM)高级控制定时器：16位，4个CAPCOM 通道，3个互补输出，死区插入和灵活的同步带有8位预分频器的8位基本定时器自动唤醒定时器2个看门狗定时器：窗口看门狗和独立看门狗通信接口带有同步时钟输出的UART ，智能卡，红外IrDA，LIN接口SPI接口最高到8Mbit/sI2C接口最高到400Kbit/s模数转换器(ADC)10位，±1LSB的ADC，最多有10路通道，扫描模式和模拟看门狗功能I/O端口48脚封装芯片上最多有38个I/O，包括16个高吸收电流输出非常强健的I/O设计，对倒灌电流有非常强的承受能力开发支持单线接口模块(SWIM)和调试模块(DM)，可以方便地进行在线编程和非侵入式调试表1产品列表系列型号STM8S105xxSTM8S105K4, STM8S105K6,STM8S105S4, STM8S105S6,STM8S105C4, STM8S105C6本文档英文原文下载地址：/stonline/products/literature/ds/14771.pdf目录1简介 (4)2详细描述 (5)3模块框图 (6)4产品概述 (7)4.1STM8的中央处理单元 (7)4.2单线接口模块(SWIM)和调试模块(DM) (7)4.3中断控制器 (8)4.4Flash程序存储器和数据EEPROM存储器 (8)4.5时钟控制器 (9)4.6电源管理 (9)4.7看门狗定时器 (10)4.8自动唤醒计数器 (10)4.9蜂鸣器 (10)4.10TIM1 — 16位高级控制定时器 (10)4.11TIM2、TIM3 — 16位通用定时器 (10)4.12TIM4 — 8位基本定时器 (11)4.13模数转换器(ADC1) (11)4.14通信接口 (11)4.14.1UART2 (11)4.14.2SPI (12)4.14.3I2C (12)5引脚及其描述 (13)5.1封装引脚 (13)5.1.1备选功能重映射 (19)6存储器和寄存器映像 (20)6.1存储器映像 (20)6.2寄存器映像 (21)7中断向量映像 (28)8选项字节 (29)9电气特性 (32)9.1参数条件 (32)9.1.1最小和最大值 (32)9.1.2典型数值 (32)9.1.3典型曲线 (32)9.1.4典型电流消耗 (32)9.1.5引脚的负载条件 (32)9.1.6负载电容 (32)9.1.7引脚输入电压 (33)9.2绝对最大额定值 (33)9.3工作条件 (34)9.3.1VCAP外部电容 (35)9.3.2供电电流特性 (35)9.3.3外部时钟源和时间特性 (41)9.3.4内部时钟源和时间特性 (43)9.3.5存储器特性 (44)9.3.6I/O端口管脚特性 (45)9.3.7复位管脚特性 (50)9.3.8串行外设接口(SPI) (52)9.3.9I2C接口特性 (54)9.3.1010位ADC特性 (55)9.3.11EMC特性 (57)10封装特性 (60)10.1封装机械数据 (60)10.1.1LQFP封装尺寸 (60)10.1.2VFQFPN封装机械数据 (63)10.1.3SDIP32封装机械数据 (64)10.2热特性 (64)10.2.1参考文档 (65)10.2.2选择产品的温度范围 (65)11订购信息 (66)12STM8开发工具 (本章从略) (67)12.1仿真和在线调试工具 (67)12.2软件工具 (67)12.2.1STM8工具套件 (67)12.2.2C和汇编工具 (67)12.3编程工具 (67)13(英文)版本修改记录 (68)1 简介这本数据手册描述了STM8S105xx基础型系列单片机的特点、引脚分配、电气特性、机械特性和订购信息。

ＳＴＭ８教程第一章：ＬＥＤ实验作为入门的第一章，本章将如何新建工程跟简单的寄存器操作进行讲解新建工程的方法如下：１、点击ＦＩＬＥ，Ｎｅｗ，新建Ｗｏｒｋｓｐａｃｅ２、点击Ｐｒｏｊｅｃｔ，Ｃｒｅａｔｅ　Ｎｅｗ　Ｐｒｏｊｅｃｔ，创建新项目３、选择Ｃ，点确定４、弹出另存为对话框，选择ｐｒｏｊｅｃｔ保存的路径，并输入ｐｒｏｊｅｃｔ的名字５、创建工程后的界面如下图所示６、保存Ｗｏｒｋｓｐａｃｅ，指定要保存的路径，并输入Ｗｏｒｋｓｐａｃｅ的名字７、工程选项的有关配置：在Ｗｏｒｋｓｐａｃｅ窗口，选中ｐｒｏｊｅｃｔ名，右键选择Ｏｐｔｉｏｎｓ或者在工具菜单栏选择ｐｒｏｊｅｃｔ－＞Ｏｐｔｉｏｎｓ８、在Ｃａｔｅｇｏｒｙ中选择Ｇｅｎｅｒａｌ　Ｏｐｔｉｏｎｓ，右边Ｔａｒｇｅｔ的Ｄｅｖｉｃｅ选择设备型号，由于我们采用的是ｓｔｍ８ｓ１０５ｋ６ｔ６，故选择相应的型号即可，其他的按默认设置９、左边选择Ｃ／Ｃ＋＋　Ｃｏｍｐｉｌｅｒ，在Ｃ／Ｃ＋＋　Ｃｏｍｐｉｌｅｒ　－＞　Ｐｒｅｐｒｏｃｅｓｓｏｒ中的Ａｄｄｉｔｉｏｎａｌ栏中是设置＊．ｈ文件所在的位置，填入如下１０、左边选择Ｏｕｔｐｕｔ　Ｃｏｎｖｅｒｔｅｒ，在Ｏｕｔｐｕｔ　Ｃｏｎｖｅｒｔｅｒ　－＞　Ｏｕｔｐｕｔ中勾选Ｇｅｎｅｒａｔｅ在Ｏｕｔｐｕｔ　ｆｉｌｅ下的栏中输入生成ｈｅｘ的文件名好了，工程建好了，接下来开始给力的时候咯，迫不及待吧，哈哈，别急纳在这里讲几句唠叨的，在用某个单片机之前，先要看看数据手册对它的简单描述，个人觉得这点很重要，在往后的学习中就会发现，并养成这个习惯的唠叨部分：查看ｓｔｍ８ｓ１０５的数据手册，大概浏览时钟跟引脚的一些描述如上大概知道这个芯片上电后的时钟默认为２ＭＨｚ，并且可以配置不同的时候源，大概先了解这些先，多了就不好受了。

关于这个表，可以大概看出引脚作为输出时，可以配置不同的速率。

输出输入的的模式也有好几种。

哎呀，啥时候才实际操刀啊，好过过手隐啊好吧。

大展拳脚：板子的ＬＥＤ连接图：实验内容：先点亮ＬＥＤ，然后再让它一闪一闪这是一个配置引脚的数据方向寄存器，为输入或者输出。

STM8S单片机入门3（AD转换及锂电池管理）锂电池以其容量大、充电性能好的优点，已经得到了广泛引用，特别在小型的需电池供电的电子设备上。

但是锂电池的充电和使用条件比较严格，比如充电必须以恒流恒压方式，使用时电压不能低于3V等锂电池以其容量大、充电性能好的优点，已经得到了广泛引用，特别在小型的需电池供电的电子设备上。

但是锂电池的充电和使用条件比较严格，比如充电必须以恒流恒压方式，使用时电压不能低于3V 等，所以用锂电池供电的系统一般都需要专门的锂电池管理功能，确保锂电池在正确的工作状态下。

这部分内容以讲述在STM8S单片机系统中，如何使用典型的锂电池充电管理芯片TP4056来实现锂电池的充电，以及如何使用单片机内置的AD转换功能测量电池电压，实现电池电量监控。

1、电路设计电路图如下，使用TP4056做充电管理，TP4056是一款采用恒定电流/恒定电压线性锂电池充电管理IC，电路简单，只需要外接一个编程电容即可实现恒流恒压充电，充电电流取决编程于电阻的阻值，电阻和电流大致有这个关系：R=1200/I(误差10%)，如2K编程电阻下，充电电流为580mA。

下图中R1即编程电阻。

发光二极管D1和限流电阻R2组成充电指示电路，正在向锂电池充电时，D1发光。

D2稳压管TL431，和R2一起组成稳定的2.5V参考电压。

这个参考电压输入到STM8S单片机的PD2引脚上（同时也是模拟输入3AIN3），通过单片机的ADC功能可以测量到AIN3（2.5V固定电压）的ADC读数，从而反推出电池的电压。

外部充电电源通过MircoUSB接口P1接入电路。

2、软件设计锂电池充电功能不需要软件参与，TP4056芯片可独立完成。

但是开机状态下的锂电池电量监控需要软件配合实现。

软件要实现的功能是，周期性的采集AIN3的ADC读数，然后计算出电池电压，当电池电压低于3V时，需要自动关机。

STM8S单片机的ADC是10位的，即最大读数是1023，VCC就是其AD转换参考电压，所以有如下关系：1023/AIN3读数=VCC电压/2.5V所以，VCC电压，也即是电池电压=2.5V*1023/AIN3读数1）设置ADC工作模式可以使用STM8S_StdPeriph_Lib库中的ADC1_Init(), ADC1_DeInit(), ADC1_Cmd()来实现ADC工作模式的设置。

UM0560User manualSTM8L/S bootloader 1 IntroductionThis user manual contains the bootloader specifications for STM8L/S devices which containa bootloader embedded in the system memory of the device (the ROM). Through thisfirmware, the device memory can be erased and programmed using one of the standardcommunication interfaces present on the particular device. For each device, please refer tothe corresponding datasheets to know if the bootloader is present and which peripherals aresupported by it.The document describes the features and operation of the STM8L/S integrated bootloaderprogram. This code allows memories, including Flash program, data EEPROM, and RAM, tobe written into the device using the standard serial interfaces UART, CAN, and SPI.The bootloader code is similar for all STM8L/S versions. However, even though a peripheralmay be present in a product, the product may not support it (for example the SPI is notsupported in STM8S20xxx devices). In addition, different cuts support different peripherals:for example, the bootloader code can be accessed via the UART1, UART3 and CANperipherals in STM8S20xxx devices, via the UART2 and SPI in STM8S105xx devices, andvia the UART only in STM8L15xxx devices.For further information on the STM8L/S family features, pinout, electrical characteristics,mechanical data and ordering information, please refer to the STM8L/S datasheets.November 2009Doc ID 14798 Rev 21/62Contents UM0560Contents1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Bootloader introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.1Bootloader activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Peripheral settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.1UART settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.1.1UART in “reply” mode settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.2SPI settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.3CAN settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114Bootloader command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.1Get command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.1.1Get command via UART1/ UART2/UART3 . . . . . . . . . . . . . . . . . . . . . . 144.1.2Get command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164.1.3Get command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184.2Read memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.2.1Read memory command via UART1/UART2/UART3 . . . . . . . . . . . . . . 204.2.2Read memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224.2.3Read memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.3Erase memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264.3.1Erase memory command via UART1/UART2/UART3 . . . . . . . . . . . . . . 274.3.2Erase memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304.3.3Erase memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324.4Write memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344.4.1Write memory command via UART1/UART2/UART3 . . . . . . . . . . . . . . 344.4.2Write memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374.4.3Write memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 404.5Speed command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.5.1Speed command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.6Go command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.6.1Go command via UART1/UART2/UART3 . . . . . . . . . . . . . . . . . . . . . . . 454.6.2Go command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 2/62Doc ID 14798 Rev 2UM0560Contents4.6.3Go command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494.7Sector codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505Software model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545.1RAM erase/write routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 6Error management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 7Programming time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Appendix A How to upload ROP protected device . . . . . . . . . . . . . . . . . . . . . . . 57A.1Rules for upgrading ROP protected devices. . . . . . . . . . . . . . . . . . . . . . . 57 Appendix B Bootloader entry points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Appendix C SPI with busy state checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59C.1Modified erase/write RAM routines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Appendix D PC software support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Doc ID 14798 Rev 23/62List of tables UM0560 List of tablesTable 1.Initial checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 2.Serial interfaces associated with STM8L/S devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3.Bootloader commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4.Bootloader codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 5.Examples of delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 6.STM8L/S sector codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 7.Error table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 8.UART1/UART2/UART3 programming times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 9.SPI programming time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 10.CAN programming time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 11.Bootloader entry points. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 12.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4/62Doc ID 14798 Rev 2UM0560List of figures List of figuresFigure 1.Bootloader activation flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2.CAN frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 3.Get command via UART1/UART2/UART3 - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 4.Get command via UART1/UART2/UART3 - device side . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 5.Get command via SPI - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 6.Get command via SPI - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 7.Get command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8.Get command via CAN - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 9.Read memory command via UART1/UART2/UART3 - host side. . . . . . . . . . . . . . . . . . . . 20 Figure 10.Read memory command via UART1/UART2/UART3 - device side. . . . . . . . . . . . . . . . . . 21 Figure 11.Read memory command via SPI - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 12.Read memory command via SPI - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 13.Read memory command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 14.Read memory command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 15.Erase memory command via UART1/UART2/UART3 - host side . . . . . . . . . . . . . . . . . . . 27 Figure 16.Erase memory command via UART1/UART2/UART3 - device side. . . . . . . . . . . . . . . . . . 29 Figure 17.Erase memory command via SPI - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 18.Erase memory command via SPI - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 19.Erase memory command via CAN - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 20.Erase memory command via CAN - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 21.Write memory command via UART1/UART2/UART3 - host side. . . . . . . . . . . . . . . . . . . . 34 Figure 22.Write memory command via UART1/UART2/UART3 - device side . . . . . . . . . . . . . . . . . . 36 Figure 23.Write memory command via SPI - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 24.Write memory command via SPI - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 25.Write memory command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 26.Write memory command via CAN -device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 27.Speed command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 28.Speed command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 29.Go command via UART1/UART2/UART3 -host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 30.Go command via UART1/UART2/UART3 - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Figure 31.Go command via SPI - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 32.Go command via SPI - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 33.Go command via CAN - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 34.Go command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 35.Delay elimination in modified RAM routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 36."Flash loader demonstrator" software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Doc ID 14798 Rev 25/62Bootloader introduction UM05606/62Doc ID 14798 Rev 22 Bootloader introductionThe main task of the bootloader is to download the application program into the internalmemories through the integrated peripherals (UART1, UART2, UART3, SPI, CAN) withoutusing the SWIM protocol and dedicated hardware. Data are provided by any host which iscapable of sending the required protocol data through one of the required interfaces.The bootloader permits downloading of application software into the device memories,including the program memory, using standard serial interfaces. It is a complementarysolution to programming via the SWIM debugging interface.The bootloader code is stored in the internal boot ROM. After a reset, the bootloader codechecks whether the program memory is virgin or whether a specific option byte is setallowing code modifications.If these conditions are not fulfilled, the bootloader resumes and the user application isstarted.In case of a successful check the bootloader is executed.When the bootloader procedure starts, the main tasks are:●Polling all supported serial interfaces to check which peripheral is used ●Programming code, data, option bytes and/or vector tables at the address(es) received from the host.2.1 Bootloader activationThe STM8L/S hardware reset vector is located at the beginning of the boot ROM (6000h),while the other interrupt vectors are in the Flash program memory starting at address8004h.The device executes the boot ROM (jumps inside the boot ROM area) and after checkingcertain address locations (see Table 1: Initial checking on page 9), it starts to execute thebootloader or the user code defined by the reset vector (8000h).The bootloader activation flowchart is described in Figure 1: Bootloader activation flowchart .UM0560Bootloader introduction Doc ID 14798 Rev 27/621.See Flow chart description on page 8 for explanation of points 1 to 8.2.Dotted routines are loaded in RAM by the host. They are removed by the go command before jumping to the Flash program memory to execute an application.Bootloader introduction UM0560Flow chart description1.Disable all interrupt sources.2. The host can start the bootloader process according to checks shown in Table1 (inkeeping with the content of the first Flash program memory location (8000h) and“bootloader enable” option bytes). The host checks the following bootloader startconditions:Condition 1: the host checks if the device memory is empty by inspecting the content ofaddress 8000h (reset vector). If the content is not equal to 82h or ACh, the device isrecognized as being empty and the bootloader remains active and waits for hostcommands without timeouts.Condition 2: the host checks if the bootloader option bytes (two bytes) are set to enablethe bootloader or not. The bootloader is enabled with a value of 55AAh and disabled byall other values (see the device datasheets for the bootloader option byte locations). Ifthe option bytes are enabled, the bootloader remains active and waits for hostcommands with a 1-second timeout. If the host does not send a command within thistimeout, the bootloader jumps directly to the application user vector (jump to address8000h).Condition 3: If the option bytes disable the bootloader (by a value different from55AAh), the bootloader jumps directly to the application user vector (jump to address8000h).The above checking process is summarized in T able1.3. When readout protection (ROP) is active, the Flash program memory is readoutprotected. In this case, the bootloader stops and the user application starts. If ROP isinactive, the bootloader continues to be executed. (How to upload ROP protecteddevice with bootloader support - see Appendix A: How to upload ROP protecteddevice.)4. The CAN peripheral can only be used if an external clock (8 MHz, 16 MHz, or 24 MHz)is present. It is initialized at 125 kbps. The UART and SPI peripherals do not require anexternal clock.5. Set the high speed internal RC oscillator (HSI) to 16 MHz and initialize the UARTs RxDpins in input pull-up mode in the GPIO registers. Initialize the SPI in slave mode.6. Interface polling: The bootloader polls all peripherals waiting for a synchronizationbyte/message (SYNCHR = 7Fh) within a timeout of 1 s. If a timeout occurs,either theFlash program memory is virgin in which case it waits for a synchronizationbyte/message in an infinite loop, or the Flash program memory is not virgin and thebootloader restores the registers’ reset status and jumps to memory address given bythe reset vector (located at 8000h).Note: When synchronization fails (the bootloader receives a byte/message different to‘SYNCHR’ = 7Fh) two different situations can be distinguished according to theperipheral:With the UART peripheral, a device reset or power-down is necessary beforesynchronization can be tried again.With the CAN or SPI peripheral, the user can continue to poll the interfaces until asynchronization or a timeout occurs.8/62Doc ID 14798 Rev 2UM0560Bootloader introduction Doc ID 14798 Rev 29/627. If the synchronization message is received by the UART , the bootloader automaticallydetects the baud rate, initializes the UART, and goes to step 8 below. If thesynchronization message is received by the CAN or SPI, the bootloader goes directlyto step 8 below.Note: Once one of the available interfaces receives the synchronization message, allothers are disabled.8. Waiting for commands: Commands are checked in an infinite loop and executed. To exitfrom the bootloader, the host has to send a ‘GO’ command. When this is done, thebootloader removes the EM and WM routines from the RAM and jumps to the addressselected by the host.Note : To be able to write/erase data in Flash and EEPROM the host must write intoRAM executable routines for writing and erasing. Those routines (*.s19 files) areprovided with the bootloader. Host must upload those routines at address 0xA0. Seesection 5.1: RAM erase/write routines for more information.Some bootloader versions are not required to write executable routines because suchroutines are automatically loaded into the RAM from the Flash device memory whenthe bootloader starts. See Table 2.Note:After interface initialization, the ROP bit is checked to avoid non-authorized read operationsto the Flash program memory and data EEPROM.Table 1.Initial checking ChecksProgram memory location 8000h Bootloader check opt_bytes Actual Flash program memory status -> Flash action 1stXXh != (82h or ACh)XXXXh Flash program memory virgin. -> jump to bootloader 2nd XXh == (82h or ACh)55AAh Flash program memory already written, bootloader enabled by option bytes.-> jump to bootloader3rd XXh == (82h or ACh)XXh != 55AAhFlash program memory already written,bootloader disabled by option bytes.-> jump to Flash program memory resetPeripheral settings UM056010/62Doc ID 14798 Rev 23 Peripheral settingsThis section describes the hardware settings of the STM8L/S communication peripherals:●UARTs ●SPI ●CANNote:During bootloading only one (first addressed) peripheral is enabled. All others are disabled.Note:The above table reflects only current bootloader versions and device states.3.1 UART settingsThis peripheral supports asynchronous serial communication.The UART settings are:●Data frame: 1 start bit, 8 data bit, 1 parity bit set to even, 1 stop bit ●Baud rate: The baud rate is automatically detected by the bootloader. When the user sends the synchronization byte, 7Fh, the bootloader automatically detects the baudrate and sets the UART to the same baud rate. Maximum baud rate = 1 Mbps;minimum baud rate = 4800 bps.To perform the automatic speed detection, the RxD line must be stable in the applicationboard (internal pull-up is enabled on RxD line by bootloader).3.1.1 UART in “reply” mode settingsSettings are:●Data frame: 1 start bit, 8 data bit, 1 parity bit even, 1 stop bit ●Baud rate: The baud rate is automatically detected by the bootloader. When the user sends the synchronization byte 7Fh, the bootloader automatically detects the baud rateand sets the UART to the same baud rate. Maximum baud rate = 550 kbps; minimumbaud rate = 4800 bps.To perform automatic speed detection, the RxD line must be stable in the application board(by enabling the internal pull-up on the RxD line by the bootloader).Reply modeThe host must reply to all the bytes sent from the bootloader. If TxD and RxD lines share thesame physical medium (for example, 1-wire communication), then host replies are notnecessary since RxD and TxD pins coincide.Table 2.Serial interfaces associated with STM8L/S devicesDevice Serial interfaceSTM8S20xxxUART1, UART3 (in “reply” mode), CAN STM8S105xxUART2 (in “reply” mode), SPI STM8L15xxxUARTUM0560Peripheral settingsDoc ID 14798 Rev 211/623.2 SPI settingsThe SPI settings are:●8 data bit, MSB first●Bit rate: Set by the host which acts as a master ●Peripheral set in slave mode with NSS not used●Data polarity: CPOL =0 (SCK to 0 when idle), CPHA = 0 (the first clock transition is thefirst data capture edge).Note:1Before sending a ‘token’ byte, the host has to wait for a delay of a specified period of time. If this period is not quantified, it is equal to 6 µs.2The SPI peripheral is accessible via SPI_SCK, SPI_MOSI and SPI_MISO pins.3.3 CAN settingsTo address additional devices on the same bus, the CAN protocol provides a standardidentifier field (11-bit) and an optional extended identifier field (18-bit) in the frame. Figure 2 shows the CAN frame that uses the standard identifier only.The CAN settings are the following:●Standard identifier (not extended)●Bit rateBy default, it is 125kbps. The runtime can be changed via the speed command to achieve a maximum bit rate of 1 Mbps.The transmit settings (from the STM8L/S to the host) are:●Tx mailbox0: On●Tx mailbox1 and Tx mailbox2: Off ●Tx identifier: 02h●Outgoing messages contain 1 data bytePeripheral settingsUM056012/62Doc ID 14798 Rev 2The receive settings (from the host to the STM8L/S) are:●The synchronization byte, 7Fh, is in the RX identifier and not in the data field ●The RX identifier depends on the command (00h, 03h, 11h, 21h, 31h, 43h)●Error checking: If the error field (bit [6:4] in the CESR register) is different from 000b, the message is discarded and a NACK is sent to the host.●In FIFO overrun condition, the message is discarded and a NACK is sent to the host.●Incoming messages can contain from 1 to 8 data bytes.Note:The CAN peripheral is accessible via CAN_TX and CAN_RX pins.UM0560Bootloader command setDoc ID 14798 Rev 213/624 Bootloader command setThe commands supported by the bootloader are listed in Table 3 below.Table 4.Bootloader codesWhen the bootloader receives a command via the UART, CAN or SPI peripherals, the general protocol is as follows:1.The bootloader sends an ACK byte (79h) to the host and waits for an address and for a checksum byte, both of which are checked when received.2.When the address is valid and the checksum is correct, the bootloader transmits an ACK byte (79h), otherwise it transmits a NACK byte (1Fh) and aborts the command. The bootloader waits for the number of bytes to be transmitted (N bytes) and for its complemented byte (checksum). –If the checksum is correct, it then carries out the command, starting from the received address.–If the checksum is incorrect, it sends a NACK (79h) byte before aborting the command.The bootloader protocol via UART and SPI are identical on the device side, but differregarding the host. A token byte is needed when sending each byte to the host via SPI (see Figure 5, Figure 11, Figure 17, Figure 23, and Figure 31). The bootloader protocol via CAN differs from all other peripherals.Table 3.Bootloader commandsCommandCommand codeCommand descriptionGet 00h Gets the version and the allowed commands supported bythe current version of the bootloaderRead memory 11h Reads up to 256 bytes of memory starting from an address specified by the hostErase memory43hErases from one to all of the Flash program memory/data EEPROM sectorsWrite memory31h Writes up to 128 bytes to the RAM or the Flash program memory/data EEPROM starting from an address specified by the hostSpeed 03h Allows the baud rate for CAN runtime to be changed Go21hJumps to an address specified by the host to execute a loaded codeName Code DescriptionSYNCH 7Fh Synchronization byte ACK 79h Acknowledge NACK1FhNo acknowledgeBootloader command setUM056014/62Doc ID 14798 Rev 2The following sections are organized as follows:●Commands via UART1/ UART2/ UART3●Commands via SPI ●Commands via CAN4.1 Get commandThe get command allows the host to get the version of the bootloader and the supportedcommands. When the bootloader receives the get command, it transmits the bootloader version and the supported command codes to the host.4.1.1 Get command via UART1/ UART2/UART3The host sends the bytes as followsByte 1: 00h - Command ID Byte 2:FFh- ComplementUM0560Bootloader command setThe STM8L/S sends the bytes as followsByte 1: ACK (after the host has sent the command)Byte 2: N = 5 = the number of bytes to be sent -1 (1 <= N +1 <= 256)Byte 3: Bootloader version (0 < version <= 255)Byte 4: 00h- Get commandByte 5: 11h- Read memory commandByte 6: 21h- Go commandByte 7: 31h- Write memory commandByte 8: 43h- Erase memory commandByte 9: ACKDoc ID 14798 Rev 215/62Bootloader command set UM0560 4.1.2 Get command via SPI16/62Doc ID 14798 Rev 2UM0560Bootloader command setThe host sends the bytes as followsByte 1: 00h- Command IDByte 2: FFh - ComplementByte 3 (token): XYh; host waits for ACK or NACKByte 4 (token): XYh; host waits for 05h...Byte 11(token): XYh; host waits for ACK or NACK.The STM8L/S sends the bytes as followsByte 1: ACKByte 2: N = 5 = the number of bytes to be sent -1 (1 <= N +1 <= 256)Byte 3: Bootloader version (0 < version <= 255)Byte 4: 00h- Get commandByte 5: 11h- Read memory commandByte 6: 21h- Go commandByte 7: 31h- Write memory commandByte 8: 43h- Erase memory commandByte 9: ACKDoc ID 14798 Rev 217/62Bootloader command set UM0560 4.1.3 Get command via CANThe host sends the messages as followsCommand message: Std ID = 00h, data length code (DLC) = ‘not important’.18/62Doc ID 14798 Rev 2UM0560Bootloader command setThe STM8L/S sends the messages as followsMessage 1: Std ID = 02h, DLC = 1, data = ACKMessage 2: Std ID = 02h, DLC = 1 data = N = 6 = the number of bytes to be sent -1(1 <= N +1 <= 256)Message 3: Std ID = 02h, DLC = 1, data = bootloader version (0 < version <= 255)Message 4: Std ID = 02h, DLC = 1, data = 00h - Get commandMessage 5: Std ID = 02h, DLC = 1, data = 03h - Speed commandMessage 6: Std ID = 02h, DLC = 1, data = 11h - Read memory commandMessage 7: Std ID= 02h, DLC = 1, data = 21h - Go commandMessage 8: Std ID = 02h, DLC = 1, data = 31h - Write memory commandMessage 9: Std ID= 02h, DLC = 1, data = 43h - Erase memory commandMessage 10: Std ID = 02h, DLC = 1, data = ACKDoc ID 14798 Rev 219/62。

UM0560User manualSTM8 bootloader 1 IntroductionThis document describes the features and operation of the STM8 integrated bootloaderprogram. This code embedded in the system memory of the device (ROM memory allowsmemories, including Flash program, data EEPROM, and RAM, to be written into the deviceusing the standard serial interfaces LINUART/UART/USART, SPI, and CAN.The bootloader code is similar for all STM8 versions. However, even though a peripheralmay be present in a product, the product may not support it (for example the SPI is notsupported in 128 Kbyte devices. In addition, different STM8 device types support differentperipherals (see Table5: Serial interfaces associated with STM8 devices for detailedinformation.For further information on the STM8 family features, pinout, electrical characteristics,mechanical data and ordering information, please refer to the STM8 datasheets.March 2011Doc ID 14798 Rev 41/70Contents UM0560Contents1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Bootloader introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.1Bootloader activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73Peripheral settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.1USART/UARTs settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.1LINUART/UARTs in “reply” mode settings . . . . . . . . . . . . . . . . . . . . . . . 11 3.2SPI settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.3CAN settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134Bootloader command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.1Get command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154.1.1Get command via USART/LINUART/UART1/ UART2/UART3 . . . . . . . . 15 4.1.2Get command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.1.3Get command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.2Read memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.2.1Read memory command via USART/LINUART/UART1/UART2/UART3 214.2.2Read memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234.2.3Read memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264.3Erase memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274.3.1Erase memory command via USART/LINUART/UART1/UART2/UART3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284.3.2Erase memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.3.3Erase memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334.4Write memory command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.4.1Write memory command via USART/LINUART/UART1/UART2/UART3 364.4.2Write memory command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 384.4.3Write memory command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414.5Speed command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.5.1Speed command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.6Go command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 454.6.1Go command via USART/LINUART/UART1/UART2/UART3 . . . . . . . . . 454.6.2Go command via SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472/70Doc ID 14798 Rev 4UM0560Contents4.6.3Go command via CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494.7Sector codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504.8Software model (STM8A/L/S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 564.8.1RAM erase/write routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575Error management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 586Programming time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Appendix A How to upload ROP protected device . . . . . . . . . . . . . . . . . . . . . . . 60A.1Rules for upgrading ROP protected devices. . . . . . . . . . . . . . . . . . . . . . . 60 Appendix B Bootloader entry points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61Appendix C SPI peripheral timing options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62C.1SPI with busy state checking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62C.2Modified erase/write RAM routines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Appendix D PC software support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Appendix E Bootloader UART limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64E.1Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64E.1.1UART automatic baudrate calculation. . . . . . . . . . . . . . . . . . . . . . . . . . . 64E.1.2Description of UART limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64E.2Workaround for UART limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Appendix F Limitations and improvements versus bootloader versions. . . . . 66 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68Doc ID 14798 Rev 43/70List of tables UM0560 List of tablesTable 1.STM8 subfamilies featuring abootloader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. STM8 subfamilies without bootloader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table3.Bootloader versions for which bootloader activation flowchart isvalid. . . . . . . . . . . . . . . . . 7 Table 4.Initialchecking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5.Serial interfaces associated with STM8devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 6.Bootloadercommands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 7.Bootloader codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Table 8.Examples ofdelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table9.STM8 sector codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Table 10.Errortable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table ART/LINUART/UART1/UART2/UART3 programmingtimes. . . . . . . . . . . . . . . . . . . . . 59 Table 12.SPI programmingtime . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 13.CAN programming time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 14.Bootloader entrypoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table15.Description of limitation, improvements and addedfeatures . . . . . . . . . . . . . . . . . . . . . . . 66 Table 16.Document revisionhistory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 4/70Doc ID 14798 Rev 4UM0560List of figures List of figuresFigure 1.Bootloader activation flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 2.CANframe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 3.Get command via USART/LINUART/UART1/UART2/UART3 - hostside . . . . . . . . . . . . . 15 Figure 4.Get command viaUSART/LINUART/UART1/UART2/UART3 - device side. . . . . . . . . . . . 16 Figure5.Get command via SPI - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Figure 6.Get command via SPI - deviceside . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7.Get command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 8.Get command via CAN - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 9.Read memory command via USART/LINUART/UART1/UART2/UART3 - host side. . . . . 21 Figure 10.Read memory command viaUSART/LINUART/UART1/UART2/UART3 - device side . . . 22 Figure 11.Read memory command via SPI - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 12.Read memory command via SPI - deviceside. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 13.Read memory command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 14.Read memory command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 15.Erase memory command via USART/LINUART/UART1/UART2/UART3 - host side. . . . . 28 Figure 16.Erase memory command viaUSART/LINUART/UART1/UART2/UART3 - device side. . . 30 Figure 17.Erase memory command via SPI - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 18.Erase memory command via SPI - deviceside . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 19.Erase memory command via CAN - host side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 20.Erase memory command via CAN - device side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 21.Write memory command via USART/LINUART/UART1/UART2/UART3 - hostside . . . . . 36 Figure 22.Write memory command viaUSART/LINUART/UART1/UART2/UART3 - device side . . . 37 Figure 23.Write memory command via SPI - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 24.Write memory command via SPI - deviceside. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 25.Write memory command via CAN - host side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 26.Write memory command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 27.Speed command via CAN - hostside. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 28.Speed command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 29.Go command via USART/LINUART/UART1/UART2/UART3 - host side. . . . . . . . . . . . . .45 Figure 30.Go command via USART/LINUART/UART1/UART2/UART3 - device side . . . . . . . . . . . . 46 Figure 31.Go command via SPI - hostside . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Figure 32.Go command via SPI - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Figure 33.Go command via CAN - hostside . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 34.Go command via CAN - device side. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure35.Delay elimination in modified RAMroutines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 36."Flash loader demonstrator" software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Doc ID 14798 Rev 45/706/70Doc ID 14798 Rev 42 Bootloader introductionThe main task of the bootloader is to download the application program into the internalmemories through the integrated peripherals (UARTs, SPI, or CAN without using the SWIM protocol and dedicated hardware. Data are provided by any device (host which is capable of sending information through one of the above-mentioned serial interfaces.The bootloader permits downloading of application software into the device memories, including RAM, program and data memory, using standard serial interfaces. It is a complementary solution to programming via the SWIM debugging interface.The bootloader code is stored in the internal boot ROM memory. After a reset, thebootloader code checks whether the program memory is virgin or whether a specific option byte is set allowing code modifications.If these conditions are not fulfilled, the bootloader resumes and the user application is started.In case of a successful check the bootloader is executed.When the bootloader procedure starts, the main tasks are:●Polling all supported serial interfaces to check which peripheral is used●Programming code, data, option bytes and/or vector tables at the address(es received from the host.Each STM8 device embeds a specific bootloader code which is common to a whole group of STM8 devices. The correspondence between STM8 groups and STM8 part numbers is given in Table 1. Group names are used all over this user manual.Table 2 gives the list of STM8 devices without embedded bootloader (no ROM bootloader is implemented inside the microcontroller. When using these devices, youhave to write your own bootloader code and save it in the UBC program area (refer to STM8S and STM8A families reference manual for information on the UBC area.Table 1.STM8 subfamilies featuring a bootloaderSTM8 group STM8 part numbersSTM8A/S-128KSTM8AF52xx, STM8AF6269/8x/Ax, STM8AF51xx, STM8AF6169/7x/8x/9x/Ax,STM8S20xxx STM8A/S-32KSTM8AF622x/4x, STM8AF6266/68, STM8AF612x/4x, STM8AF6166/68,STM8S105xxSTM8L-64k STM8L15xx8, STM8L15xR6, STM8L16xx8STM8L-32KSTM8L15xC4, STM8L15xK4, STM8L15xG4,STM8L15xC6, STM8L15xK6, STM8L15xG6(x = 1 or 2STM8L-8KSTM8L15xC2, STM8L15xK2, STM8L15xG2, STM8L15xC3, STM8L15xK3, STM8L15xG3(x = 1 or 2Doc ID 14798 Rev 47/702.1 Bootloader activationThe STM8 hardware reset vector is located at the beginning of the boot ROM(0x006000,while the other interrupt vectors are in the Flash program memory starting at address 0x008004.The device executes the boot ROM (jumps inside the boot ROM area and after checking certain address locations (see Table 4: Initial checking on page 10, it starts to execute the bootloader or the user code defined by the reset vector (0x008000.The bootloader activation flowchart is described in Figure 1: Bootloader activation flowchart . In previous bootloader versions, a return to the “wait for SYNCHR” state (see dashed line in Figure 1 was performed when the “Flash virgin” test was positive. In newer versions, it has been replaced by a software (SW reset to prevent the customer firmware from remaining in a infinite loop (e.g. due to EMC disturbance. This bootloader modification is referred to as "EMC lockup protection" in T able 15. Table 3 lists the bootloader versions for which the dashed line was replaced by a SW reset.The bootloader version number of a given device is obtained by the “Get command” (see Section 4.1: Get command . The bootloader version is represented by a two-digitbinary-coded decimal (BCD number (with a decimal point between the two digits which is coded into one byte in the “Get command” result. For example, 0x21 version byte is bootloader version 2.1.Table 2.STM8 subfamilies without bootloaderSTM8 group STM8 part numbersSTM8A/S-8K STM8Sx03xx STM8L-8KSTM8L101xxTable 3.Bootloader versions for which bootloader activation flowchart is validSTM8 group Bootloader versionSTM8A/S-128K v2.2STM8A/S-32K v1.3STM8L-64K v1.0STM8L-32K v1.2STM8L-8Kv1.01.See Flow chart description on page9 for explanation of points 1 to 8.2.See Table4: Initial checking.3.Dotted routines are loaded in RAM by the host. They are removed by the go command before jumping to the Flash programmemory to execute an application.8/70Doc ID 14798 Rev 4Flow chart description1.Disable all interrupt sources.2. The host can start the bootloader process according to checks shown in Table4 (inkeeping with the content of the first Flash program memory location (0x008000 and “bootloader enable” option bytes. The host checks the following bootloader startconditions:Condition 1: the host checks if the device memory is empty by inspecting the content of address 0x00 8000 (reset vector. If the content is not equal to 0x82 or 0xAC, thedevice is recognized as being empty and the bootloader remains active and waits for host commands without timeouts.Condition 2: the host checks if the bootloader option bytes (two bytes are set to enable the bootloader or not. The bootloader is enabled with a value of 0x55AA and disabled by all other values (see the device datasheets for the bootloader option byte locations.If the option bytes are enabled, the bootloader remains active and waits for hostcommands with a 1-second timeout. If the host does not send a command within this timeout, the bootloader jumps directly to the application user vector (jump to address0x008000.Condition 3: If the option bytes disable the bootloader (by a value different from0x55AA, the bootloader jumps directly to the application user vector (jump to address 0x00 8000.The above checking process is summarized in T able4.3. When readout protection (ROP is active, the Flash program memory is readoutprotected. In this case, the bootloader stops and the user application starts. If ROP is inactive, the bootloader continues to be executed (see Appendix A: How to upload ROP protected device.4. The CAN peripheral can only be used if an external clock (8 MHz, 16 MHz, or 24 MHzis present. It is initialized at 125 kbps. The UARTs and SPI peripherals do not require an external clock.5. Set the high speed internal RC oscillator (HSI to 16 MHz and initialize the UARTsreceiver pins in input pull-up mode in the GPIO registers. Initialize the SPI in slave mode. Then, wait 4 ms for I/O pin voltage level stabilization. It is recommended that the host waits 10 ms from the STM8 reset before sending the SYNCHR byte/message.This is the time needed for bootloader initialization.Doc ID 14798 Rev 49/7010/70Doc ID 14798 Rev 46.Interface polling: The bootloader polls all peripherals waiting for a synchronizationbyte/message (SYNCHR = 0x7F within a timeout of 1 s. If a timeout occurs, either the Flash program memory is virgin in which case it waits for a synchronizationbyte/message in an infinite loop through a software reset, or the Flash programmemory is not virgin and the bootloader re stores the registers’ reset status and jumps to the memory address given by the reset vector (located at 0x008000. For thebootloader versions listed in Table 3, a software reset is generated after a timeout has elapsed, in case the Flash program memory is empty (this is because it is safer to stay in an infinite loop if there is a hardware chip error.Note:When synchronization fails (the bootloader receives a byte/message different to‘SYNCHR’ = 0x7F two different situations can be distinguished according to the peripheral:With the UART peripherals, a device reset or power-down is necessary beforesynchronization can be tried again. Refer to Appendix E: Bootloader UART limitation With the CAN or SPI peripheral, the user can continue to poll the interfaces until a synchronization or a timeout occurs.7.If the synchronization message is received by the UARTs, the bootloader automatically detects the baud rate, initializes the UART and goes to step 8 below. If thesynchronization message is received by the CAN or SPI, the bootloader goes directly to step 8 below.Note: Once one of the available interfaces receives the synchronization message, all others are disabled.8.Waiting for commands: Commands are checked in an infinite loop and executed. To exit from the bootloader, the host has to send a ‘GO’ command. When this is done, the bootloader removes the EM and WM routines from the RAM memory and jumps to the address selected by the host.Note:To be able to write/erase data in Flash and EEPROM the host must write into RAMexecutable routines for writing and erasing. Those routines (*.s19 files are provided with the bootloader. Host must upload those routines at address 0xA0. See section 4.8.1: RAM erase/write routines for more information.Note:After interface initialization, the ROP bit is checked to avoid non-authorized reading of the Flash program memory and data EEPROM.Table 4.Initial checkingChecksProgram memory byte location [0x008000]Bootloader check option bytes[BL_OPT](11.See device datasheet for the [BL_OPT] location in the option byte area memory map.Actual Flash program memory status-> Flash action1st [0x00 8000] <>(0x82 or 0xAC[BL_OPT] = 0x00XXXX Flash program memory virgin.-> jump to bootloader 2nd[0x00 8000] <>(0x82 or 0xAC[BL_OPT] = 0x0055AA Flash program memory already written, bootloader enabled by option bytes.-> jump to bootloader 3rd[0x00 8000] <>(0x82 or 0xAC[BL_OPT] <> 0x0055AAFlash program memory already written,bootloader disabled by option bytes.-> jump to Flash program memory resetUM0560Peripheral settingsDoc ID 14798 Rev 411/703 Peripheral settingsThis section describes the hardware settings of the STM8 communication peripherals:●UARTs/LINUART ●SPI ●CANNote:During bootloading only one peripheral (first addressed is enabled. All others are disabled.3.1 USART/UARTs settingsThis peripheral supports asynchronous serial communication.The USART/UARTs settings are:●Data frame: 1 start bit, 8 data bit, 1 parity bit set to even, 1 stop bit●Baud rate: The baud rate is automatically detected by the bootloader. When the usersends the synchronization byte, 0x7F , the bootloader automatically detects the baud rate and sets the USART/UARTs to the same baud rate. Maximum baud rate = 1 Mbps (115200 baud for STM8L-64K; minimum baud rate = 4800 bps.To perform the automatic speed detection, the RxD line must be stable in the application board (internal pull-up is enabled on the RxD line by the bootloader.3.1.1 LINUART/UARTs in “reply” mode settingsSettings are:●Data frame: 1 start bit, 8 data bit, no parity bit, 1 stop bit●Baud rate: The baud rate is automatically detected by the bootloader. When the user sends the synchronization byte 0x7F , the bootloader automatically detects the baud rate and sets the UARTs to the same baud rate. Maximum baud rate = 550 kbps (115200 baud for STM8L-64K; minimum baud rate = 4800 bps.To perform automatic speed detection, the RxD line must be stable in the application board (internal pull-up is enabled on the RxD line by the bootloader.Table 5.Serial interfaces associated with STM8 devices (11.The above table reflects only current bootloader versions and device states.STM8 groups Serial interfaceSTM8A-128K USART , LINUART (in “reply” mode, CAN STM8A-32K LINUART, SPISTM8S-128K UART1, UAR T3 (in “reply” mode, CAN STM8S-32K UART2 (in “reply” mode, SPI STM8L-8K UART, SPI STM8L-32K UARTSTM8L-64KUART1, UART2, UART3 (in “reply” mode,SPI1, SPI2Peripheral settings UM056012/70Doc ID 14798 Rev 4Reply modeThe host must reply to all the bytes sent from the bootloader. If TxD and RxD lines share the same physical medium (for example, 1-wire communication, then host replies are not necessary since RxD and TxD pins coincide.3.2 SPI settingsThe SPI settings are:●8 data bit, MSB first●Bit rate: S et by the host which acts as a master●Peripheral set in slave mode with software management of NSS●Data polarity : CPOL = 0 (SCK to 0 when idle, CPHA = 0 (the first clock transition is thefirst data capture edge.Note:1Before sending a ‘token’ byte, th e host has to wait for a delay of a specified period of time. If this period is not quantified, it is equal to 6 µs.2The SPI peripheral is accessible via SPI_SCK, SPI_MOSI and SPI_MISO pins.UM0560Peripheral settingsDoc ID 14798 Rev 413/703.3 CAN settingsTo address additional devices on the same bus, the CAN protocol provides a standardidentifier field (11-bit and an optional extended identifier field (18-bit in the frame. Figure 2 shows the CAN frame that uses the standard identifier only.The CAN settings are as follows:●Standard identifier (not extended●Bit rateBy default, it is 125 kbps. The runtime can be changed via the speed command to achieve a maximum bitrate of 1 Mbps.The transmit settings (from the STM8 to the host are:●Tx mailbox0: On●Tx mailbox1 and Tx mailbox2: Off ●Tx identifier: 0x02●Outgoing messages contain 1 data byteThe receive settings (from the host to the STM8 are:●The synchronization byte, 0x7F , is in the RX identifier and not in the data field●The RX identifier depends on the command (0x00, 0x03, 0x11, 0x21, 0x31, 0x43●Error checking: If the error field (bit [6:4] in the CESR register is different from 000b, the message is discarded and a NACK is sent to the host.●In FIFO overrun condition, the message is discarde d and a NACK is sent to the host.●Incoming messages can contain from 1 to 8 data bytes.Note:The CAN peripheral is accessible via CAN_TX and CAN_RX pins.Bootloader command set UM056014/70Doc ID 14798 Rev 44 Bootloader command setThe commands supported by the bootloader are listed in Table 6 below.Table 7.Bootloader codesWhen the bootloader receives a command via the UARTs, CAN or SPI peripherals, the general protocol is as follows:1.The bootloader sends an ACK byte (0x79 to the host and waits for an address and for a checksum byte, both of which are checked when received.2.When the address is valid and the checksum is correct, the bootloader transmits an ACK byte (0x79, otherwise it transmits a NACK byte (0x1F and aborts the command. The bootloader waits for the number of bytes to be transmitted (N bytes and for its complemented byte (checksum. –If the checksum is correct, it then carries out the command, starting from the received address.–If the checksum is incorrect, it sends a NACK (0x1F byte before aborting the command.Table 6.Bootloader commandsCommandCommand codeCommand descriptionGet 0x00Gets the version and the allowed commands supported bythe current version of the bootloaderRead memory 0x11Reads up to 256 bytes of memory starting from an address specified by the hostErase memory0x43Erases from one to all of the Flash program memory/data EEPROM sectorsWrite memory0x31Writes up to 128 bytes to RAM or the Flash programmemory/data EEPROM starting from an address specified by the hostSpeed 0x03Allows the baud rate for CAN runtime to be changed Go0x21。