M-Flash SikaMembran_00 Intro letter_2007-04

Flash Programmer User’s GuideMacraigor Systems LLCThis application lets you program your Flash EEPROM devices via the On-Chip Debug connector (BDM or JTAG) on your target system using a Macraigor hardware device. Download the demo version which will allow you to test the ERASE, FILL, BLANK CHECK, CHECKSUM, UPLOAD flash content, and VIEW MEMORY functions of the software with your flash devices. Purchasing this license will turn the DEMO into a full working application that will allow you to program and verify your flash device using Motorola(.s19), Intel(.hex), and ELF(.elf) format files in addition to the functionality provided in the demo. The demo version will provide you with a COMPUTER ID which you MUST have when you purchase a license to use with a Raven or Wiggler. Licensing for use with usb2Sprite, usb2Demon, and mpDemon is done outside of the Flash Programmer. The Flash Programmer is supported under Windows 98/ME, NT, 2000, 2003, XP, and Vista32 operating systems, as well as under Red Hat Linux versions 7.2, 9.0, Fedora Core 2 - 6(2.6.20). The software may work with other operating systems and versions but has not been verified against such and is not guaranteed to work. Only our mpDemon, Usb2Demon/Sprite and UsbWiggler are supported under Linux. On Vista-32, only the mpDemon and theUsb2Demon/Sprite and UsbWiggler are supported.Quick Start:Attach the interface (Wiggler, usb2Demon, whatever) to the target board and power up the board. Got to Configuration -> Communications and make sure you have the correct choices.Go to File -> Open ocd file … and find the file for your target board. If there is not one for your specific board, you may have to make one. You should start with the closest you can find.If there correct OCD file exists, choose it.You should be all set to go. Try hitting the Flash ID button and see if you get valid values. If so, you can try erasing, blank check, and program!If you are not able to communicate with the target, check your connections, the communications dialog, and power. If you still cannot communicate, leave the application and, if you are using a JTAG based target (i.e.: not BDM) try to run the JTAG Scan Chain Analyzer and see what it says. It should see your target board.First a quick overview of the menu options.The File menu item contains two choices:Open .ocd file …Save .ocd file …An OCD file is a configuration file that describes the target board. Macraigor Systems supplies many .ocd file. A good number of these are for factory evaluation boards. If a .ocd file does not exist for your board, you will need to generate one. The best way to do that is to start with a .ocd file that is closest to your board, minimally the same CPU.The Configuration menu item contains four items:CommunicationsPrefix Hex Numbers with …Default Program File Type …SpecificTargetThe Communications option will bring up a dialog box for you to enter information about how you are connected to the target. If you are having problems connecting, it is always a good idea to select a lower Debug Port Clock Rate to see if that solves the problem.Prefix Hex Numbers with … is an option that allows you to choose “0x” or “$” as the preferred prefix for when you specify a number has a hex string.Default Program File Type … this option asks you to specify what format your object code is in (i.e.: Motorola S records, Intel Hex records or ELF format).Target Specific…Various CPUs have very CPU specific settings and options available and this is where you will find them. It is important to look at this menu item anytime you start to work with a new target board to see what is available.The Help menu item has two choices:About ……ContentsAbout will show the version number of the application.Contents will bring up the help screens.The main window of the Flash Programmer will have UP TO five tabbed pages depending on the target CPU and the configuration of the target board. Additionally, some buttons may be ‘grayed out’ and not usable, and this depends upon the target CPU, target flash memory devices and whether or not the Flash Programmer is in demo mode.Most of the values on the Program tab are actually specified on other tabbed pages. The one important value to specify here is Target RAM Starts at: For the vast majority of target CPUs the Flash Programmer uses RAM for the programming. You must specify an address in RAM that has at least 2K available. Any registers or CPU resources that must be set up for the RAM to be available (chip selects, DRAM parameters, etc.) will be specified on the CPU tab.The Flash Programmer needs to know how to set up the target system upon a hard reset. This information is usually found in the first couple of hundred lines of boot source code for the board. It may include, and not be limited to, how to shut the watchdog timer, setting up chip selects for flash memory and RAM, DRAM or SRAM control parameters, etc.First choose your CPU from the tree structure in the CPU Type window. Second, fill in any new values necessary in the System Integration Module Register grid. Third, add any memory locations that need to be read or written in the Write To (or Read From) These Memory Location: grid. If your target processor has an option for making it Big or Little Endian, then the CPU Endian Configuration drop down will be available. Make sure to set it to the same value as your hardware. Finally, if the CPU is not the only device on the JTAG scan chain, check the Multiple Targets On Scan Chain box. Note that if there are multiple devices on the scan chain inside the CPU chip itself, you must check this box, as on the iMX31 for example.The Flash tab is where you specify the target flash device(s). Using the tree on the left, choose the flash chip that is on your target board.Next, specify the starting address of the flash memory in the Starts at: box. You then specify the physical arrangement of the flash chip(s) in the Width and X Chip(s) boxes. The example above shows a single flash memory chip that is 16 bits wide.The Endian Changed box is to be checked if the flash memory chip is attached to the address bus in such a fashion that the flash memories native endian is modified. In other words, if you have a 16 bit flash device and address bit A0 of the flash chip is attached to the lower order address line of the processor, then DO NOT check this box. If, for instance, flash memory chip address line A0 is attached to CPU address line A8 and flash memory chip address line A8 is attached to CPU address line A0, then the native endian of the flash chip is being changed and you would check the Endian Changed box.If the Multiple Targets On Scan Chain box on the CPU tab is checked, this tabbed page will be available. This is where you must describe the JTAG scan chain that exists on the target board.The order of devices must be the same as they are on your board, the first device in this list is the first device on the scan chain, that is the first device to get data that comes out of the JTAG header to the target board, the chip that is directly connected to TDI on the JTAG header. The last device in the list is the device that directly sends data to the JTAG header via TDO.If the device is not a known device (not available in the Manufacturer and Chip dropdowns in the Device Properties area), then choose “Unknown” and specify the IR Length of the JTAG state machine for that chip and the Bypass Length (almost always ‘1’).Make sure to choose the device that drives the flash memory you want to program and check off the box Use To Program Flash (as in the above example for the iMX31).If the processor chosen has a TLB the TLB Entries tab will be available. Any entries that are necessary for the CPU to access the Flash Memory and RAM must be entered here.Under the main menu, Configuration -> Target Specific brings up this dialog. Only some of the options will be available, depending on the target CPU.If the target CPU comes out of reset at a slow speed, you must set the JTAG speed in the Speed Before Reset selection. Setting on the CPU tab page will then increase the speed, usually by setting a PLL or something, so that the Flash Programmer will be more efficient. The Delay After Reset is how long the Flash Programmer should wait, in milliseconds, after removing the reset signal and before doing any actions specified on the CPU tab page.Some ARM implementations, both on chip and on the target board, are a bit more complicated when it comes to reset. Time To Hold Reset (ARM) is how long, in milliseconds, to hold the reset line active. Time for Reset Settle (ARM) is how long after releasing reset before sending any JTAG commands to the CPU. Additionally, some implementations do not have the ARM CPU hardware reset line attached to the JTAG header. The Flash Programmer defaults to a software reset. If you want to force hardware resets to occur, check the Use Hard Resets (ARM) box. Improved flash programming times will be seen with the XScale family of processors if you use an external RAM buffer. You can enable this by checking the Program From RAM (XScale) box. Additionally, some XScale boards need the external RAM scrubbed, please specify, in Bytes, the size of this RAM in the Scrub RAM Size (XScale).The Reset Config Word ISB Addr: is the Internal Space Base defined for the Freescale 82xx family of processors.Back to the Program tab …The button names are self-explanatory. Most will bring up a dialog box for you to supply some additional information.Blank CheckYou can specify either the entire chip or just specified sectors to be checked.EraseYou can specify if you want the entire chip erased or just specific sectors.ProgramRead Program from: is where you specify the object code file to be programmed into the flash memory. You can use the Browse button to find the file. Note that the Flash Programmer requires files be in Intel Hex, Motorola S-record or ELF format. The Flash Programmer will show you where it believes the image starts and ends. You can specify where to Start Programming at Flash Address: which will then offset the image to the appropriate memory space.Compare Flash To: is where you specify the object code file to be compared to the flash memory. You can use the Browse button to find the file. Note that the Flash Programmer requires files be in Intel Hex, Motorola S-record or ELF format. The Flash Programmer will show you where it believes the image starts and ends. You can specify where to Start Verifying at Flash Address: which will then offset the image to the appropriate memory space.ChecksumYou can specify if you want the entire chip checksumed or just specific sectors.You can see and optionally (depending on flash chip(s) and your hardware) protect the entire chip or various secots.FillYou can specify a Value and its Size in bits to use to fill a range of addresses.Upload FlashYou may specify a filename, start address and end address for the program to read and convert into a Motorola S-record formatted file.Target MemoryReset TargetSimply resets the target CPU. No dialog is associated with this button.。

ATMEGA8系列规格书,Datasheet资料FeaturesHigh-performance, Low-power AtmelAVR 8-bit Microcontroller Advanced RISC Architecture–130 Powerful Instructions – Most Single-clock Cycle Execution –32 × 8 General Purpose Working Registers –Fully Static Operation–Up to 16 MIPS Throughput at 16MHz–On-chip 2-cycle MultiplierHigh Endurance Non-volatile Memory segments–8Kbytes of In-System Self-programmable Flash program memory–512Bytes EEPROM–1Kbyte Internal SRAM–Write/Erase Cycles: 10,000 Flash/100,000 EEPROM–Data retention: 20 years at 85°C/100 years at 25°C(1)–Optional Boot Code Section with Independent Lock BitsIn-System Programming by On-chip Boot ProgramTrue Read-While-Write Operation–Programming Lock for Software SecurityPeripheral Features–Two 8-bit Timer/Counters with Separate Prescaler, one Compare Mode–One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode–Real Time Counter with Separate Oscillator–Three PWM Channels–8-channel ADC in TQFP and QFN/MLF packageEight Channels 10-bit Accuracy–6-channel ADC in PDIP packageSix Channels 10-bit Accuracy–Byte-oriented Two-wire Serial Interface–Programmable Serial USART–Master/Slave SPI Serial Interface–Programmable Watchdog Timer with Separate On-chip Oscillator–On-chip Analog ComparatorSpecial Microcontroller Features–Power-on Reset and Programmable Brown-out Detection–Internal Calibrated RC Oscillator–External and Internal Interrupt Sources–Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, andStandbyI/O and Packages–23 Programmable I/O Lines–28-lead PDIP, 32-lead TQFP, and 32-pad QFN/MLFOperating Voltages–2.7V - 5.5V (ATmega8L)–4.5V - 5.5V (ATmega8)Speed Grades–0 - 8MHz (ATmega8L)–0 - 16MHz (ATmega8)Power Consumption at 4Mhz, 3V, 25°C–Active: 3.6mA–Idle Mode: 1.0mA–Power-down Mode: 0.5µA 8-bit with 8KBytes In-System ProgrammableATmega8ATmega8L SummaryPinConfigurationsOverview The ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8 achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption ver-sus processing speed.Block Diagram Figure 1. Block DiagramThe AVR core combines a rich instruction set with 32 general purpose working registers. All the32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than con-ventional CISC microcontrollers.The ATmega8 provides the following features: 8 Kbytes of In-System Programmable Flash withRead-While-Write capabilities, 512 bytes of EEPROM, 1 Kbyte of SRAM, 23 general purposeI/O lines, 32 general purpose working registers, three flexible Timer/Counters with comparemodes, internal and external interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, a 6-channel ADC (eight channels in TQFP and QFN/MLF packages) with10-bit accuracy, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port,and five software selectable power saving modes. The Idle mode stops the CPU while allowingthe SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip func-tions until the next Interrupt or Hardware Reset. In Power-save mode, the asynchronous timercontinues to run, allowing the user to maintain a timer base while the rest of the device is sleep-ing. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronoustimer and ADC, to minimize switching noise during ADC conversions. In Standby mode, thecrystal/resonator Oscillator is running while the rest of the device is sleeping. This allows veryfast start-up combined with low-power consumption.The device is manufactured using Atmel’s high density non-volatile memory technology. TheFlash Program memory can be reprogrammed In-System through an SPI serial interface, by aconventional non-volatile memory programmer, or by an On-chip boot program running on theAVR core. The boot program can use any interface to download the application program in theApplication Flash memory. Software in the Boot Flash Section will continue to run while theApplication Flash Section is updated, providing true Read-While-Write operation. By combiningan 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the AtmelATmega8 is a powerful microcontroller that provides a highly-flexible and cost-effective solutionto many embedded control applications.The ATmega8 AVR is supported with a full suite of program and system development tools,including C compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators,and evaluation kits.Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Minimum and Maxi-mum values will be available after the device is characterized.Pin DescriptionsVCC Digital supply voltage. GND Ground.Port B (PB7..PB0) XTAL1/XTAL2/TOSC1/ TOSC2Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscil-lator amplifier and input to the internal clock operating circuit.Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator amplifier.If the Internal Calibrated RC Oscillator is used as chip clock source, PB7..6 is used as TOSC2..1 input for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.The various special features of Port B are elaborated in “Alternate Functions of Port B” on page 58 and “System Clock andClock Options” on page 25.Port C (PC5..PC0)Port C is an 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port C pins that are externally pulled low will source current if the pull-upresistors are activated. The Port C pins are tri-stated when a reset condition becomes active,even if the clock is not running.If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical char-acteristics of PC6 differ from those of the other pins of Port C.If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pinfor longer than the minimum pulse length will generate a Reset, even if the clock is not running.The minimum pulse length is given in Table 15 on page 38. Shorter pulses are not guaranteed togenerate a Reset.The various special features of Port C are elaborated on page 61.Port D (PD7..PD0)Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port D pins that are externally pulled low will source current if the pull-upresistors are activated. The Port D pins are tri-stated when a reset condition becomes active,even if the clock is not running.Port D also serves the functions of various special features of the ATmega8 as listed on page63.Reset input. A low level on this pin for longer than the minimum pulse length will generate areset, even if the clock is not running. The minimum pulse length is given in Table 15 on page38. Shorter pulses are not guaranteed to generate a reset.AV CC AV CC is the supply voltage pin for the A/D Converter, Port C (3..0), and ADC (7..6). It should be externally connected to V CC, even if the ADC is not used. If the ADC is used, it should be con-nected to V CC through a low-pass filter. Note that Port C (5..4) use digital supply voltage, V CC. AREF AREF is the analog reference pin for the A/D Converter.ADC7..6 (TQFP and QFN/MLF Package Only)In the TQFP and QFN/MLF package, ADC7..6 serve as analog inputs to theA/D converter. These pins are powered from the analog supply and serve as 10-bit ADC channels.Resources A comprehensive set of development tools, application notes and datasheets are available for download on /doc/9e818e5c767f5acfa1c7cdaf.html /avr.Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C.Register SummaryAddress Name Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Page0x3F (0x5F)SREG I T H S V N Z C11 0x3E (0x5E)SPH–––––SP10SP9SP813 0x3D (0x5D)SPLSP7SP6SP5SP4SP3SP2SP1SP013 0x3C (0x5C)Reserved0x3B (0x5B)GICR INT1INT0––––IVSEL IVCE49, 67 0x3A (0x5A)GIFR INTF1INTF0––––––67 0x39 (0x59)TIMSKOCIE2TOIE2TICIE1OCIE1A OCIE1B TOIE1–TOIE072, 100, 119 0x38 (0x58)TIFR OCF2TOV2ICF1OCF1A OCF1B TOV1–TOV072, 101, 119 0x37 (0x57)SPMCR SPMIE RWWSB–RWWSRE BLBSET PGWRT PGERS SPMEN206 0x36(0x56)TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN–TWIE165 0x35 (0x55)MCUCR SESM2SM1SM0ISC11ISC10ISC01ISC0033, 66 0x34 (0x54)MCUCSR––––WDRF BORF EXTRF PORF41 0x33(0x53)TCCR0–––––CS02CS01CS0071 0x32 (0x52)TCNT0Timer/Counter0 (8 Bits)72 0x31 (0x51)OSCCAL Oscillator Calibration Register31 0x30 (0x50)SFIOR––––ACME PUD PSR2PSR1058, 74, 120, 186 0x2F (0x4F)TCCR1ACOM1A1COM1A0COM1B1COM1B0FOC1A FOC1B WGM11WGM1096 0x2E (0x4E)TCCR1B ICNC1ICES1–WGM13WGM12CS12CS11CS1098 0x2D (0x4D)TCNT1H Timer/Counter1 – Counter Register High byte99 0x2C(0x4C)TCNT1L Timer/Counter1 – Counter Register Low byte99 0x2B (0x4B)OCR1AH Timer/Counter1 – Output Compare Register A High byte99 0x2A (0x4A)OCR1AL Timer/Counter1 – Output Compare Register A Low byte99 0x29(0x49)OCR1BH Timer/Counter1 – Output Compare Register B High byte99 0x28 (0x48)OCR1BL Timer/Counter1 – Output Compare Register B Low byte99 0x27 (0x47)ICR1H Timer/Counter1 – Input Capture Register High byte100 0x26(0x46)ICR1L Timer/Counter1 – Input Capture Register Low byte100 0x25(0x45)TCCR2FOC2WGM20COM21COM20WGM21CS22CS21CS20114 0x24 (0x44)TCNT2Timer/Counter2 (8 Bits)1160x23 (0x43)OCR2Timer/Counter2 Output Compare Register116 0x22 (0x42)ASSR––––AS2TCN2UB OCR2UBTCR2UB117 0x21 (0x41)WDTCR–––WDCE WDE WDP2WDP1WDP0430x20(1) (0x40)(1)UBRRH URSEL–––UBRR[11:8]152 UCSRC URSEL UMSEL UPM1UPM0USBSUCSZ1UCSZ0UCPOL1500x1F (0x3F)EEARH–––––––EEAR820 0x1E (0x3E)EEARL EEAR7EEAR6EEAR5EEAR4EEAR3EEAR2EEAR1EEAR020 0x1D (0x3D)EEDR EEPROM Data Register20 0x1C (0x3C)EECR––––EERIE EEMWE EEWE EERE20 0x1B(0x3B)Reserved0x1A (0x3A)Reserved0x19 (0x39)Reserved0x18 (0x38)PORTB PORTB7PORTB6PORTB5PORTB4PORTB3PORTB2PORTB1PORTB065 0x17 (0x37)DDRBDDB7DDB6DDB5DDB4DDB3DDB2DDB1DDB065 0x16 (0x36)PINBPINB7PINB6PINB5PINB4PINB3PINB2PINB1PINB065 0x15 (0x35)PORTC–PORTC6PORTC5PORTC4PORTC3PORTC2PORTC1PORTC065 0x14 (0x34)DDRC–DDC6DDC5DDC4DDC3DDC2DDC1DDC065 0x13 (0x33)PINC–PINC6PINC5PINC4PINC3PINC2PINC1PINC065 0x12 (0x32)PORTD PORTD7PORTD6PORTD5PORTD4PORTD3PORTD2PORTD1PORTD065 0x11 (0x31)DDRDDDD7DDD6DDD5DDD4DDD3DDD2DDD1DDD065 0x10 (0x30)PINDPIND7PIND6PIND5PIND4PIND3PIND2PIND1PIND065 0x0F (0x2F)SPDR SPI Data Register127 0x0E (0x2E)SPSR SPIF WCOL–––––SPI2X126 0x0D (0x2D)SPCR SPIE SPE DORD MSTR CPOL CPHA SPR1SPR0125 0x0C (0x2C)UDR USART I/O Data Register148 0x0B (0x2B)UCSRA RXC TXC UDRE FE DOR PE U2X MPCM148 0x0A (0x2A)UCSRB RXCIE TXCIE UDRIE RXEN TXEN UCSZ2RXB8TXB8149 0x09 (0x29)UBRRL USART Baud Rate Register Low byte152 0x08 (0x28)ACSR ACD ACBG ACO ACI ACIE ACIC ACIS1ACIS0186 0x07 (0x27)ADMUX REFS1REFS0ADLAR–MUX3MUX2MUX1MUX0199 0x06 (0x26)ADCSRA ADEN ADSC ADFR ADIF ADIE ADPS2ADPS1ADPS0200 0x05(0x25)ADCH ADC Data Register High byte201 0x04 (0x24)ADCL ADC Data Register Low byte201 0x03 (0x23)TWDR Two-wire Serial Interface Data Register167 0x02 (0x22)TWAR TWA6TWA5TWA4TWA3TWA2TWA1TWA0TWGCE167 Register Summary (Continued)Address Name Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Page0x01 (0x21)TWSR TWS7TWS6TWS5TWS4TWS3–TWPS1TWPS0166 0x00 (0x20)TWBR Two-wire Serial Interface Bit Rate Register165 Notes: 1.Refer to the USART description (“USART” on page 129) for details on how to access UBRRH and UCSRC (“Accessing UBRRH/UCSRC Registers” on page 146)2.For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written3.Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate onall bits in the I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers 0x00 to 0x1F onlyInstruction Set SummaryMnemonics Operands Description Operation Flags#Clocks ARITHMETIC AND LOGIC INSTRUCTIONSADD Rd, Rr Add two Registers Rd ← Rd + Rr Z, C, N, V, H1 ADC Rd, Rr Add with Carry two Registers Rd ← Rd + Rr + C Z,C, N, V, H1 ADIW Rdl,K Add Immediate to Word Rdh:Rdl ← Rdh:Rdl + K Z, C, N, V, S2 SUB Rd, Rr Subtract two Registers Rd ← Rd - Rr Z, C, N, V, H1 SUBI Rd, K Subtract Constant from Register Rd ← Rd - K Z, C, N, V, H1 SBC Rd, Rr Subtract with Carry two Registers Rd ← Rd - Rr - C Z, C, N, V, H1 SBCI Rd, K Subtract with Carry Constant from Reg.Rd ← Rd - K - C Z, C, N ,V, H1 SBIW Rdl,K Subtract Immediate from Word Rdh:Rdl ← Rdh:Rdl - K Z, C, N, V, S2 AND Rd, Rr Logical AND Registers Rd ← Rd ? Rr Z, N, V1 ANDI Rd, K Logical AND Register and Constant Rd ← Rd ? K Z, N, V1OR Rd, Rr Logical OR Registers Rd ← Rd v Rr Z, N, V1 ORI Rd, K Logical OR Register and Constant Rd ← Rd v K Z, N, V1 EOR Rd, Rr Exclusive OR Registers Rd ← Rd ⊕ Rr Z, N, V1 COM Rd One’s Complement Rd ← 0xFF ? Rd Z, C, N, V1 NEG Rd Two’s Complement Rd ← 0x00 ? Rd Z, C, N, V, H1 SBR Rd,K Set Bit(s) in Register Rd ← Rd v K Z, N, V1 CBR Rd,K Clear Bit(s) in Register Rd ← Rd ? (0xFF - K)Z, N, V1 INC Rd Increment Rd ← Rd + 1Z, N, V1 DEC Rd Decrement Rd ← Rd 1 Z, N, V1 TST Rd Test for Zero or Minus Rd ← Rd ? Rd Z, N, V1 CLR Rd Clear Register Rd ← Rd ⊕ Rd Z, N, V1 SER Rd Set Register Rd ← 0xFF None1 MUL Rd, Rr Multiply Unsigned R1:R0 ← Rd x Rr Z, C2 MULS Rd, Rr Multiply Signed R1:R0← Rd x Rr Z, C2 MULSU Rd, Rr Multiply Signed with Unsigned R1:R0 ← Rd x Rr Z, C2 FMUL Rd, Rr Fractional Multiply Unsigned R1:R0 ← (Rd x Rr) << 1Z, C2FMULS Rd, Rr Fractional Multiply Signed R1:R0 ← (Rd x Rr) << 1Z, C2 FMULSU Rd, Rr Fractional Multiply Signed with Unsigned R1:R0 ← (Rd x Rr) << 1Z, C2 BRANCH INSTRUCTIONSRJMP k Relative Jump PC ← PC + k + 1None2 IJMP Indirect Jump to (Z)PC ← Z None2 RCALL k Relative Subroutine Call PC ← PC + k + 1None3 ICALL Indirect Call to (Z)PC ←Z None3 RET Subroutine Return PC ← STACK None4 RETI Interrupt Return PC ← STACK I4 CPSE Rd,Rr Compare, Skip if Equal if (Rd = Rr) PC ← PC + 2 or 3None 1 / 2 / 3 CP Rd,Rr Compare Rd ? Rr Z, N, V, C, H 1 CPC Rd,Rr Compare with Carry Rd ? Rr ? C Z, N, V, C, H1 CPI Rd,K Compare Register with Immediate Rd ? K Z, N, V, C, H1 SBRC Rr, b Skip if Bit in Register Cleared if (Rr(b)=0) PC ← PC + 2 or 3 None 1 / 2 / 3 SBRS Rr, b Skip if Bit in Register is Set if (Rr(b)=1) PC ← PC + 2 or 3None 1 / 2 / 3 SBIC P, b Skip if Bit in I/O Register Cleared if (P(b)=0) PC ← PC + 2 or 3 None 1 / 2 / 3 SBIS P, b Skip if Bit in I/O Register is Set if (P(b)=1) PC ← PC + 2 or3None 1 / 2 / 3 BRBS s, k Branch if Status Flag Set if (SREG(s) = 1) then PC←PC+k + 1None 1 / 2 BRBC s, k Branch if Status Flag Cleared if (SREG(s) = 0) then PC←PC+k + 1None 1 / 2 BREQ k Branch if Equal if (Z = 1) then PC ← PC + k +1None 1 / 2 BRNE k Branch if Not Equal if (Z = 0) then PC ← PC + k + 1None 1 / 2 BRCS k Branch if Carry Set if (C = 1) then PC ← PC + k + 1None 1 / 2 BRCC k Branch if Carry Cleared if (C = 0) then PC ← PC + k + 1None 1 / 2 BRSH k Branch if Same or Higher if (C = 0) then PC ← PC + k + 1None 1 / 2 BRLO k Branch if Lower if (C = 1) then PC ← PC + k + 1None 1 / 2 BRMI k Branch if Minus if (N = 1) then PC ← PC + k + 1None 1 / 2 BRPL k Branch if Plus if (N = 0) then PC ← PC + k +1None 1 / 2 BRGE k Branch if Greater or Equal, Signed if (N ⊕ V= 0) then PC ← PC + k + 1None 1 / 2 BRLT k Branch if Less Than Zero, Signed if (N ⊕ V= 1) then PC ← PC + k + 1None 1 / 2 BRHS k Branch if Half Carry Flag Set if (H = 1) then PC ←PC + k + 1None 1 / 2 BRHC k Branch if Half Carry Flag Cleared if (H = 0) then PC ← PC + k + 1None 1 / 2 BRTS k Branch if T Flag Set if (T = 1) then PC ← PC + k + 1None 1 / 2 BRTC k Branch if T Flag Cleared if (T = 0) then PC ← PC + k + 1None 1 / 2 BRVS k Branch if Overflow Flag is Set if (V = 1) then PC ← PC + k + 1None 1 / 2 BRVC k Branch if Overflow Flag is Cleared if (V = 0) then PC ← PC + k + 1None 1 / 2Instruction Set Summary (Continued)Mnemonics Operands Description Operation Flags#ClocksBRIE k Branch if Interrupt Enabled if ( I = 1) then PC ← PC + k + 1None 1 / 2 BRID k Branch if Interrupt Disabled if ( I = 0) then PC ← PC + k + 1None 1 / 2 DATA TRANSFER INSTRUCTIONSMOV Rd, Rr Move Between Registers Rd ← Rr None1 MOVW Rd, Rr Copy Register Word Rd+1:Rd ← Rr+1:Rr None1 LDI Rd, K Load Immediate Rd ←K None1LD Rd, X Load Indirect Rd ← (X)None2LD Rd, X+Load Indirect and Post-Inc.Rd ← (X), X ← X + 1None2LD Rd, - X Load Indirect and Pre-Dec.X ← X - 1, Rd ← (X)None2LD Rd, Y Load Indirect Rd ← (Y)None2LD Rd, Y+Load Indirect and Post-Inc.Rd ← (Y), Y ← Y + 1None2LD Rd, - Y Load Indirect and Pre-Dec.Y ← Y - 1, Rd ← (Y)None2 LDD Rd,Y+q Load Indirect with Displacement Rd ← (Y + q)None2LD Rd, Z Load Indirect Rd ← (Z)None2LD Rd, Z+Load Indirect and Post-Inc.Rd ← (Z), Z ← Z+1None2LD Rd, -Z Load Indirect and Pre-Dec.Z ← Z - 1, Rd ← (Z)None2 LDD Rd, Z+q Load Indirect with Displacement Rd ← (Z +q)None2 LDS Rd, k Load Direct from SRAM Rd ← (k)None2ST X, Rr Store Indirect(X) ← Rr None2ST X+, Rr Store Indirect and Post-Inc.(X) ← Rr, X ← X + 1None2ST- X, Rr Store Indirect and Pre-Dec.X ← X - 1, (X) ← Rr None2ST Y, Rr Store Indirect(Y) ← Rr None2ST Y+, Rr Store Indirect and Post-Inc.(Y) ← Rr, Y ← Y + 1None2ST- Y, Rr Store Indirect and Pre-Dec.Y ← Y - 1, (Y) ← Rr None2 STD Y+q,Rr Store Indirect with Displacement(Y + q) ← Rr None2ST Z, Rr Store Indirect(Z) ← Rr None2ST Z+, Rr Store Indirect and Post-Inc.(Z) ← Rr, Z ← Z + 1None2ST-Z, Rr Store Indirect and Pre-Dec.Z ← Z - 1, (Z) ← Rr None2 STD Z+q,Rr Store Indirect with Displacement(Z + q) ← Rr None2 STS k, Rr Store Direct to SRAM(k) ← Rr None2 LPM Load Program Memory R0 ← (Z)None3 LPM Rd, Z Load Program Memory Rd ← (Z)None3 LPM Rd, Z+Load Program Memory and Post-Inc Rd ← (Z), Z ← Z+1None3 SPM Store Program Memory(Z) ← R1:R0None-IN Rd, P In Port Rd ←P None1 OUT P, Rr Out Port P ← Rr None1 PUSH Rr Push Register on Stack STACK ← Rr None2 POP Rd Pop Register from Stack Rd ← STACK None2 BIT AND BIT-TEST INSTRUCTIONSSBI P,b Set Bit in I/O Register I/O(P,b) ←1None2 CBI P,b Clear Bit in I/O Register I/O(P,b) ←0None2 LSL Rd Logical Shift Left Rd(n+1) ← Rd(n), Rd(0) ← 0Z, C, N, V1 LSR Rd Logical Shift Right Rd(n) ← Rd(n+1), Rd(7) ← 0Z, C, N, V1 ROL Rd Rotate Left Through Carry Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7)Z, C, N, V1 ROR Rd Rotate Right Through CarryRd(7)←C,Rd(n)← Rd(n+1),C←Rd(0)Z, C, N, V1 ASR Rd Arithmetic Shift Right Rd(n) ← Rd(n+1), n=0..6Z, C, N, V1 SWAP Rd Swap Nibbles Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0)None1 BSET s Flag Set SREG(s) ← 1SREG(s)1 BCLR s Flag Clear SREG(s) ← 0 SREG(s)1 BST Rr, b Bit Store from Register to T T ← Rr(b)T1 BLD Rd, b Bit load from T to Register Rd(b) ←T None1 SEC Set Carry C ←1C1 CLC Clear Carry C ← 0 C1 SEN Set Negative Flag N ←1N1 CLN Clear Negative Flag N ← 0 N1 SEZ Set Zero Flag Z ←1Z1 CLZ Clear Zero Flag Z ← 0 Z1 SEI Global Interrupt Enable I ←1I1 CLI Global Interrupt Disable I ← 0 I1 SES Set Signed Test Flag S ←1S1 CLS Clear Signed Test Flag S ← 0 S1 SEV Set Twos Complement Overflow.V ←1V1 CLV Clear Twos Complement Overflow V ← 0 V1 SET Set T in SREG T ←1T1Instruction Set Summary (Continued)Mnemonics Operands Description Operation Flags#ClocksCLT Clear T in SREG T ← 0 T1 SEH Set Half Carry Flag in SREG H ←1H1 CLH Clear Half Carry Flag in SREG H ← 0 H1 MCU CONTROL INSTRUCTIONSNOP No Operation None1 SLEEP Sleep(see specific descr. for Sleep function)None1Notes:1.This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering informationand minimum quantities2.Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also Halide free and fully Green3.Tape & ReelSpeed (MHz)Power Supply (V)Ordering Code (2)Package (1)Operation Range8 2.7 - 5.5A Tmega8L-8AU A Tmega8L-8AUR (3)A Tmega8L-8PU A Tmega8L-8MU A Tmega8L-8MUR (3)32A 32A 28P332M1-A32M1-A Industrial (-40°C to 85°C)16 4.5 - 5.5A Tmega8-16AU A Tmega8-16AUR (3)A Tmega8-16PU A Tmega8-16MU A Tmega8-16MUR (3)32A 32A 28P332M1-A 32M1-APackage Type32A 32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)28P328-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP)32M1-A32-pad, 5 × 5 × 1.0 body, Lead Pitch 0.50mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)32AErrata The revision letter in this section refers to the revision of the ATmega8 device.ATmega8 Rev. D to I, M ?First Analog Comparator conversion may be delayedInterrupts may be lost when writing the timer registers in the asynchronous timerSignature may be Erased in Serial Programming ModeCKOPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when 32KHz Oscillator is Used to Clock the Asynchronous Timer/Counter2Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request1.First Analog Comparator conversion may be delayedIf the device is powered by a slow rising V CC, the first Analog Comparator conversion will take longer than expected on some devices.Problem Fix / WorkaroundWhen the device has been powered or reset, disable then enable theAnalog Comparator before the first conversion.2.Interrupts may be lost when writing the timer registers in the asynchronous timerThe interrupt will be lost if a timer register that is synchronized to the asynchronous timer clock is written when the asynchronous Timer/Counter register(TCNTx) is 0x00.Problem Fix / WorkaroundAlways check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register(TCCRx), asynchronous Timer Counter Register(TCNTx), or asynchronous Output Compare Register(OCRx).3.Signature may be Erased in Serial Programming ModeIf the signature bytes are read before a chiperase command is completed, the signature may be erased causing the device ID and calibration bytes to disappear. This is critical, espe-cially, if the part is running on internal RC oscillator.Problem Fix / Workaround:Ensure that the chiperase command has exceeded before applying the next command.4.CK OPT Does not Enable Internal Capacitors on XTALn/TOSCn Pins when 32K HzOscillator is Used to Clock the Asynchronous Timer/Counter2When the internal RC Oscillator is used as the main clock source, it is possible to run the Timer/Counter2 asynchronously by connecting a 32KHz Oscillator between XTAL1/TOSC1 and XTAL2/TOSC2. But when the internal RC Oscillator is selected as the main clock source, the CKOPT Fuse does not control the internal capacitors on XTAL1/TOSC1 and XTAL2/TOSC2. As long as there are no capacitors connected to XTAL1/TOSC1 and XTAL2/TOSC2, safe operation of the Oscillator is not guaranteed.Problem Fix / WorkaroundUse external capacitors in the range of 20pF - 36pF on XTAL1/TOSC1 and XTAL2/TOSC2.This will be fixed in ATmega8 Rev. G where the CKOPT Fuse will control internal capacitors also when internal RC Oscillator is selected as main clock source. For ATmega8 Rev. G, CKOPT = 0 (programmed) will enable the internal capacitors on XTAL1 and XTAL2. Cus-tomers who want compatibility between Rev. G and older revisions, must ensure that CKOPT is unprogrammed (CKOPT = 1).5.Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interruptrequest.Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-ister triggers an unexpected EEPROM interrupt request.Problem Fix / WorkaroundAlways use OUT or SBI to set EERE in EECR.Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision.Changes from Rev. 2486Y- 10/10 to Rev. 2486Z- 02/111.Updated the datasheet according to the Atmel new Brand Style Guide.2.Updated “Ordering Information” on page 13. Added Ording Information for“Tape&Reel” devicesChanges from Rev. 2486X- 06/10 to Rev. 2486Y- 10/101.Max Rise/Fall time in Table 102 on page 239 has been corrected from 1.6ns to 1600ns.2.Note is added to “Performing Page Erase by SPM” on page 209.3.Updated/corrected several short-cuts and added some new ones.4.Updated last page according to new standard.Changes from Rev. 2486W- 02/10 to Rev. 2486X- 06/101.Updated “DC Characteristics” on page 235 with new V OL maximum value (0.9V and0.6V).Changes from Rev.2486V- 05/09 toRev. 2486W- 02/101.Updated “ADC Characteristics” on page 241 with V INT maximum value (2.9V).Changes from Rev. 2486U- 08/08 to Rev. 2486V- 05/091.Updated “Errata” on page 289.2.Updated the last page with Atmel’s new adresses.Changes from Rev.2486T- 05/08 toRev. 2486U- 08/081.Updated “DC Characteristics” on page 235 with I CC typical values.Changes from Rev. 2486S- 08/07 to Rev. 2486T- 05/081.Updated Table 98 on page 233.2.Updated “Ordering Information” on page 285.- Commercial Ordering Code removed.- No Pb-free packaging option removed.。

Automotive DDR4 SDRAM MT40A2G8MT40A1G16FeaturesNotes:1.Not all options listed can be combined to define an offered product. Use the part catalog search on for available offerings.2.The ×4 device is not offered and the mode is not supported by the x8 or x16 device even tho ugh some ×4 mode descriptions exist in the data sheet.3.The UT option use based on automotive usage model. Contact Micron sales representative if you have questions.Notes:1.Refer to the Speed Bin Tables for additional details.•V DD = V DDQ = 1.2V ±60mV •V PP = 2.5V, –125mV, +250mV •On-die, internal, adjustable V REFDQ generation •1.2V pseudo open-drain I/O •Refresh time of 8192-cycle at T C temperature range:–64ms, at –40°C to 85°C–32ms, at >85°C to 95°C–16ms, at >95°C to 105°C–8ms, at >105°C to 125°C•16 internal banks (x8): 4 groups of 4 banks each•8 internal banks (x16): 2 groups of 4 banks each•8n -bit prefetch architecture•Programmable data strobe preambles•Data strobe preamble training•Command/Address latency (CAL)•Multipurpose register READ and WRITE capability•Write leveling•Self refresh mode•Low-power auto self refresh (LPASR)•Temperature controlled refresh (TCR)•Fine granularity refresh•Self refresh abort•Maximum power saving•Output driver calibration•Nominal, park, and dynamic on-die termination(ODT)•Data bus inversion (DBI) for data bus•Command/Address (CA) parity•Databus write cyclic redundancy check (CRC)•Per-DRAM addressability•Connectivity test•JEDEC JESD-79-4 compliant•sPPR and hPPR capability•AEC-Q100•PPAP submission Options 1Marking •Configuration –2 Gig x 82G8–1 Gig x 161G16•78-ball FBGA package (Pb-free) – x8–7.5mm x 11mm – Rev. F AG •96-ball FBGA package (Pb-free) – x16–7.5mm x 13mm – Rev. F TD •Timing – cycle time –0.625ns @ CL = 22 (DDR4-3200)-062E •Product certification –Automotive A •Operating temperature –Industrial (–40° ≤ T C ≤ 95°C)IT –Automotive (–40° ≤ T C ≤ 105°C)AT –Ultra-high (–40° ≤ T C ≤ 125°C)UT •Revision :F Table 1: Key Timing Parameters Speed Grade 1Data Rate (MT/s)Target CL-n RCD-n RP t AA (ns)t RCD (ns)t RP (ns)-062E 320022-22-2213.7513.7513.75Table 2: AddressingParameter2048 Meg x 81024 Meg x 16 Number of bank groups42Bank group address BG[1:0]BG0Bank count per group44Bank address in bank group BA[1:0]BA[1:0]Row addressing 128K (A[16:0])128K (A[16:0])Column addressing 1K (A[9:0]) 1K (A[9:0])Page size11KB2KBNotes:1.Page size is per bank, calculated as follows:Page size = 2COLBITS× ORG/8, where COLBIT = the number of column address bits and ORG = the number of DQ bits. Figure 1: Order Part Number ExampleExample Part Number: MT40A1G16KH-062E AAT:EContentsImportant Notes and Warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 General Notes and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Industrial Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Automotive Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Ultra-high Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 General Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Definitions of the Device-Pin Signal Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Definitions of the Bus Signal Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Functional Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Ball Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Ball Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 RESET and Initialization Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Power-Up and Initialization Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 RESET Initialization with Stable Power Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Uncontrolled Power-Down Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Programming Mode Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Mode Register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Burst Length, Type, and Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 CAS Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Test Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Write Recovery (WR)/READ-to-PRECHARGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 DLL RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Mode Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 DLL Enable/DLL Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Output Driver Impedance Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 ODT R TT(NOM) Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Additive Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Rx CTLE Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Write Leveling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Termination Data Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Mode Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 CAS WRITE Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Low-Power Auto Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Dynamic ODT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Write Cyclic Redundancy Check Data Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Mode Register 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Multipurpose Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 WRITE Command Latency When CRC/DM is Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Fine Granularity Refresh Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Temperature Sensor Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Per-DRAM Addressability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Gear-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Mode Register 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Hard Post Package Repair Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Soft Post Package Repair Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 WRITE Preamble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55READ Preamble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 READ Preamble Training . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Temperature-Controlled Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Command Address Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Internal V REF Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Maximum Power Savings Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Mode Register 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Data Bus Inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Data Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 CA Parity Persistent Error Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 ODT Input Buffer for Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 CA Parity Error Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 CRC Error Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 CA Parity Latency Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Mode Register 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Data Rate Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V REFDQ Calibration Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V REFDQ Calibration Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V REFDQ Calibration Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 NOP Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 DESELECT Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 DLL-Off Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 DLL-On/Off Switching Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 DLL Switch Sequence from DLL-On to DLL-Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 DLL-Off to DLL-On Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Input Clock Frequency Change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Write Leveling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 DRAM Setting for Write Leveling and DRAM TERMINATION Function in that Mode . . . . . . . . . . . . . . . . . . . . . . . 73 Procedure Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Write Leveling Mode Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Command Address Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Low-Power Auto Self Refresh Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Manual Self Refresh Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Multipurpose Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 MPR Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 MPR Readout Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 MPR Readout Serial Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 MPR Readout Parallel Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 MPR Readout Staggered Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 MPR READ Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 MPR Writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 MPR WRITE Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 MPR REFRESH Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 Gear-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 Maximum Power-Saving Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Maximum Power-Saving Mode Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Maximum Power-Saving Mode Entry in PDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 CKE Transition During Maximum Power-Saving Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Maximum Power-Saving Mode Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Command/Address Parity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Per-DRAM Addressability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107V REFDQ Range and Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .111V REFDQ Step Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .111V REFDQ Increment and Decrement Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112V REFDQ Target Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116Connectivity Test Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118Minimum Terms Definition for Logic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119Logic Equations for a x4 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119Logic Equations for a x8 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120Logic Equations for a x16 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120CT Input Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120Excessive Row Activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122Post Package Repair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123Post Package Repair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123Hard Post Package Repair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123hPPR Row Repair - Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124hPPR Row Repair – WRA Initiated (REF Commands Allowed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124hPPR Row Repair – WR Initiated (REF Commands NOT Allowed) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126sPPR Row Repair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127hPPR/sPPR/MBIST-PPR Support Identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130ACTIVATE Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130PRECHARGE Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131REFRESH Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132Temperature-Controlled Refresh Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134Normal Temperature Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134Extended Temperature Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134Fine Granularity Refresh Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136Mode Register and Command Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136 t REFI and t RFC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136 Changing Refresh Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139Usage with TCR Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139Self Refresh Entry and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139SELF REFRESH Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141Self Refresh Abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143Self Refresh Exit with NOP Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .144Power-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .146Power-Down Clarifications – Case 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .151Power-Down Entry, Exit Timing with CAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152ODT Input Buffer Disable Mode for Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .154CRC Write Data Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156CRC Write Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156WRITE CRC DATA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156DBI_n and CRC Both Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157DM_n and CRC Both Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157DM_n and DBI_n Conflict During Writes with CRC Enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157CRC and Write Preamble Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157CRC Simultaneous Operation Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157CRC Polynomial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157CRC Combinatorial Logic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158Burst Ordering for BL8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .159CRC Data Bit Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .159CRC Enabled With BC4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160。

The Allen-Bradley® GuardShield™ 450L-E Safety Light Curtains fromRockwell Automation are based on a unique patented transceiver technology which allows each stick to be used as a transmitter or as a receiver. The full functionality of a transceiver is provided by plug-ins inserted at the bottom of the sticks. By using only one stick type with the optimal plug-ins selected based on the requirements of the application, the GuardShield 450L portfolio is a simple, cost effective solution that offers enhanced flexibility while maintaining the highest level of safety.The enhanced Integrated Laser Alignment System (ILAS) of the GuardShield 450L-E reduces installation time by providing multiple visible laser points that optimize setup with a simple touch of the ILAS symbol on the front window of the stick. Plus, the compact design and full length protective field make it easy to integrate a GuardShield 450L-E system in hand and finger protection applications from 150 mm (5.9 in.) up to 1950 mm (76.7 in.) in increments of 150 mm (0.5 ft).The enhanced GuardShield 450L-E light curtain system is also ideal for special applications requiring advanced functions such as muting and blanking,easily set up through DIP switches located on the dedicated plug-in modules. For muting, the common set ups like 4-sensor or 2-sensor with L- and T-configuration and override function can be selected. Blanking, reducedresolution, floating blanking and teach-in fixed blanking features are available. Configure up to eight protection zones via CCW software. A cascading plug-in can also be installed for series connection of additional GuardShield 450L Safety Light Curtain systems for multi-sided machine guarding (up to four sides). All these special functions combined with the inherent flexibility of the GuardShield 450L transceiver design help to simplify your engineering logistics and minimize the stock required to address your full range of applications.For configuration, monitoring and troubleshooting, our free Connected Components Workbench software is available at our website. A separate optical interface tool is required if using Connected Components Workbench software for diagnostic information.Features and Benefits• Extended features and functionality compared to the 450L-B such as cascading, built-in muting,blanking and multiple applications configuration• Embedded functions configured quickly and easily via DIP switches or software, significantly reducing engineering effort. These include:– M uting, blanking, start mode, external device monitoring (EDM), scanning range• Leverages patented transceiver technology – each stick can be used as a transmitter or receiver via innovative plug-in modules• Enhanced Integrated Laser Alignment System (ILAS) for quick installation and reliable operation• Active protective field provides sensing over the entire length of a transceiver• Compact design 30 mm x 30 mm (1.18 in. x 1.18 in.)• Wide range of protection heights 150…1950 mm (5.9…76.7 in.) in increments of 150 mm (0.5 ft)• Resolutions:– F inger resolution (14 mm): 0.5 to 9 m (1.64…29.53 ft)– H and resolution (30 mm): 0.9 to 16.2 m (2.95…53.15 ft)• Supports cascading of multiple systems in series• Flexible mounting options allow for quick and easy installation• Configure, monitor and troubleshoot via Connected Components Workbench (CCW) software.Pre-configure multiple configurations. • IP65 enclosure rating• TÜV certified Type 4 IEC 61496-1/-2, Ple, SILcl3 per EN ISO 13849-1,IEC 62061Allen-Bradley GuardShield 450L-E Safety Light CurtainEnhanced Flexibility and Advanced Features in a Cost-Effective Safety SolutionRequired Accessories 1Replace the x with 2 (6.6 ft), 5 (16.4 ft), 10 (32.8 ft), 15 (49.2 ft), 20 (65.6 ft), or 30 (98.4 ft) for available lengths in metersOptional Accessories*Requires 450L fw version 4.00x and CCW R12 at minimum.1xxxx = 0150…1950 mm (0.5…6.4 ft) in increments of 150 mm (0.5 ft)Innovative plug-in modulesestablish transceiver as an emitter orreceiver and provide other advanced functions.Integrated Laser Alignment System accelerates setup for optimal performance at the touch of a button.General Ordering InformationLight Curtain System: Order two identical transceivers/catalog numbers. Plug-in Modules: Order one transmitter and one receiver plug-in with the desired functionality for one system – or – Order two universal plug-ins for one system. Each universal plug-in can be used as a transmitter or a receiver. To cascade systems or for muting options use thecascading plug-in.1xxxx = 0150 … 1950 mm (0.5 … 6.4 ft) in increments of 150 mm (0.5 ft).For example: “450L-E4HL 0900YD” indicates an order for 900 mm hand detection light curtain transceiver.2Optional side mounting bracket kit is available below.1 The 8-pin transmitter plug-in option allows two 8-pin cordsets to be used in one system.2Order two universal plug-ins for one system. Each universal plug-in can be used as a transmitter or a receiver.Publication 450L-PP002B-EN-P – May 2020 | Supersedes Publication 450L-PP002A-EN-P – January 2018Copyright © 2020 Rockwell Automation, Inc. All Rights Reserved. Printed in USA.Allen-Bradley, Connected Components Workbench, Expanding human potential and GuardShield are trademarks of Rockwell Automation, Inc.Trademarks not belonging to Rockwell Automation are property of their respective companies.Connect with us.。

Minimum Essential Medium Eagle (MEM)Minimum Essential Medium (MEM), developed by Harry Eagle, is one of the most widely used of all synthetic cell culture media. Early attempts to cultivate normal mammalian fibroblasts and certain subtypes of HeLa cells revealed that they had specific nutritional requirements that could not be met by Eagle’s Basal Medium (BME). Subsequent studies using these and other cells in culture indicated that additions to BME could be made to aid growth of a wider variety of fastidious cells. MEM, which incorporates these modifications, includes higher concentrations of amino acids so that the medium more closely approximates the protein composition of cultured mammalian cells. MEM has been used for cultivation of a wide variety of cells grown in monolayers. Optional supplementation of non-essential amino acids to the formulations that incorporate either Hanks’ or Earle’s salts has broadened the usefulness of this medium. The formulation has been further modified by optional elimination of calcium to permit growth of cells in suspension culture.M 4655 M 4780 M 0268 [1X] M 4642 [1X] M 0643 M 1018 COMPONENT g/L g/L g/L g/L g/L g/L INORGANIC SALTS CaCl 2•2H 2O 0.265 0.265 0.185 0.185 0.265 0.185 MgSO 4 (anhyd) 0.09767 0.09767 0.09767 0.09767 0.09767 0.09767 KCl0.4 0.4 0.4 0.4 0.4 0.4 KH 2PO 4 (anhyd) — — 0.06 0.06 — 0.06 NaHCO 3 — 2.2 — 0.35 — — NaCl6.8 6.8 8.08.06.8 8.0Na 2HPO 4 (anhyd) — — 0.04788 0.04788 — 0.04788 NaH 2PO 4 (anhyd) 0.122 0.122 — — 0.122 — AMINO ACIDS L-Alanine— — — — 0.0089 0.0089 L-Arginine•HCl 0.126 0.126 0.126 0.126 0.126 0.126 L-Asparagine•H 2O — — — — 0.015 0.015 L-Aspartic Acid — — — — 0.0133 0.0133 L-Cystine•2•HCl 0.0313 0.0313 0.0313 0.0313 0.0313 0.0313 L-Glutamic Acid — — — — 0.0147 0.0147 L-Glutamine 0.292 0.292 0.292 0.292 0.292 0.292 Glycine— — — — 0.0075 0.0075 L-Histidine•HCl•H 2O 0.042 0.042 0.042 0.042 0.042 0.042 L-Isoleucine 0.052 0.052 0.052 0.052 0.052 0.052 L-Leucine 0.052 0.052 0.052 0.052 0.052 0.052 L-Lysine•HCl 0.0725 0.0725 0.0725 0.0725 0.0725 0.0725 L-Methionine 0.015 0.015 0.015 0.015 0.015 0.015 L-Phenylalanine 0.032 0.032 0.032 0.032 0.032 0.032 L-Proline — — — — 0.0115 0.0115 L-Serine — — — — 0.0105 0.0105 L-Threonine 0.048 0.048 0.048 0.048 0.048 0.048 L-Tryptophan0.01 0.01 0.01 0.01 0.01 0.01 L-Tyrosine•2Na•2H 2O 0.0519 0.0519 0.0519 0.0519 0.0519 0.0519 L-Valine 0.046 0.046 0.046 0.046 0.046 0.046 VITAMINS Choline Chloride 0.001 0.001 0.001 0.001 0.001 0.001 Folic Acid 0.001 0.001 0.001 0.001 0.001 0.001 Myo-Inositol 0.002 0.002 0.002 0.002 0.002 0.002 Niacinamide0.001 0.001 0.001 0.001 0.001 0.001 D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.001 0.001 0.001 Pyridoxal•HCl 0.001 0.001 0.001 0.001 0.001 0.001 Riboflavin 0.0001 0.0001 0.0001 0.0001 0.0001 0.0001 Thiamine•HCl 0.001 0.001 0.001 0.001 0.001 0.001 Vitamin B-12 — — — — — — OTHER Glucose1.0 1.0 1.0 1.0 1.0 1.0 Phenol Red•Na 0.011 0.011 0.011 0.011 0.011 0.011 ADD NaHCO 32.2 — 0.35 — 2.2 0.35 Grams of powder required to prepare 1 L9.6N/A10.7N/A9.710.8ProductInformationMinimum Essential Medium Eagle (MEM) continuedM 3911 M 3786 M 2289 M 2414M 3024 M 3149 [1X] [1X] [1X] [1X] COMPONENT g/L g/L g/L g/L g/L g/L INORGANIC SALTSCaCl2•2H2O 0.265 0.185 0.265 0.265 0.265 0.265 MgSO4 (anhyd) 0.09767 0.09767 0.09767 0.09767 0.09767 0.09767 KCl 0.4 0.4 0.4 0.4 0.4 0.4KH2PO4 (anhyd) — 0.060 — — — —NaHCO3 — — 2.2 2.2 2.2 0.85NaCl 6.8 8.0 6.8 6.8 6.8 6.8Na2HPO4 (anhyd) — 0.04788 — — — —NaH2PO4 (anhyd) 0.122 — 0.122 — 0.122 0.122 AMINO ACIDSL-Alanine 0.0089 0.0089 — — — —L-Arginine•HCl 0.126 0.126 0.126 0.126 0.126 0.126 L-Asparagine•H2O 0.015 0.015 — — — —L-Aspartic Acid 0.0133 0.0133 — — — —L-Cystine•2HCl 0.0313 0.0313 0.0313 — — 0.0313 L-Glutamic Acid 0.0147 0.0147 — — — —L-Glutamine — — 0.292 — — —Glycine 0.0075 0.0075 — — — —L-Histidine•HCl•H2O 0.042 0.042 0.042 0.042 0.042 0.042 L-Isoleucine 0.052 0.052 0.052 0.052 0.052 0.052 L-Leucine 0.052 0.052 0.052 0.052 0.052 0.052 L-Lysine•HCl 0.0725 0.0725 0.0725 0.0725 0.0725 0.0725 L-Methionine 0.015 0.015 — 0.015 — 0.015 L-Phenylalanine 0.032 0.032 0.032 0.032 0.032 0.032 L-Proline 0.0115 0.0115 — — — —L-Serine 0.0105 0.0105 — — — —L-Threonine 0.048 0.048 0.048 0.048 0.048 0.048 L-Tryptophan 0.01 0.01 0.01 0.01 0.01 0.01L-Tyrosine•2Na•2H2O 0.0519 0.0519 0.0519 0.0519 0.0519 0.0519 L-Valine 0.046 0.046 0.046 0.046 0.046 0.046 VITAMINSCholine Chloride 0.001 0.001 0.001 0.001 0.001 0.001 Folic Acid 0.001 0.001 0.001 0.001 0.001 0.001 myo-Inositol 0.002 0.002 0.002 0.002 0.002 0.002 Niacinamide 0.001 0.001 0.001 0.001 0.001 0.001 D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.001 0.001 0.001 Pyridoxal•HCl 0.001 0.001 0.001 0.001 0.001 0.001 Riboflavin 0.0001 0.0001 0.0001 0.0001 0.0001 0.0001 Thiamine•HCl 0.001 0.001 0.001 0.001 0.001 0.001 OTHERGlucose 1.0 1.0 1.0 1.0 1.0 1.0Phenol Red•Na — — 0.011 0.011 0.011 0.11ADDNaHCO3 2.2 0.35 — — — —L-Cystine•2HCl — — — — 0.313 —L-Glutamine 0.292 0.292 — — 0.292 0.292 L-Leucine — — — — — —L-Lysine — — — — — —L-Methionine — — 0.015 — 0.015 —NaH2PO4 (anhyd) — — — 0.122 — —Grams of powder required to prepare 1 L 9.4 10.5 N/A N/A N/A N/AMinimum Essential Medium Eagle (MEM) continued M 0894 M 0644 M 2645 M 0769 COMPONENT g/L g/L g/L g/L INORGANIC SALTSCaCl2•2H2O 0.265 0.265 0.265 0.265MgSO4 (anhyd) 0.09767 0.09767 0.09767 0.09767 KCl 0.4 0.4 0.4 0.4NaCl 6.8 6.8 5.5 6.8NaH2PO4 (anhyd) 0.122 0.122 0.122 0.122Na Succinate•6H2O — — — 0.1Succinic Acid (free acid) — — — 0.075AMINO ACIDSL-Alanine 0.025 0.025 — —L-Arginine•HCl 0.126 0.126 0.126 0.126L-Asparagine•H2O 0.05 0.05 — —L-Aspartic Acid 0.03 0.03 — —L-Cysteine•HCl•H2O 0.1 0.1 — —L-Cystine•2HCl 0.0313 0.0313 0.0313 0.0313 L-Glutamic Acid 0.075 0.075 — —L-Glutamine 0.292 0.292 0.292 —Glycine 0.05 0.05 — —L-Histidine•HCl•H2O 0.042 0.042 0.042 0.042L-Isoleucine 0.052 0.052 0.052 0.052L-Leucine 0.052 0.052 0.052 0.052L-Lysine•HCl 0.0725 0.0725 0.0725 0.0725 L-Methionine 0.015 0.015 0.015 0.015L-Phenylalanine 0.032 0.032 0.032 0.032L-Proline 0.04 0.04 — —L-Serine 0.025 0.025 — —L-Threonine 0.048 0.048 0.048 0.048L-Tryptophan 0.01 0.01 0.01 0.01L-Tyrosine 2Na•2H2O 0.0519 0.0519 0.0519 —L-Tyrosine (free base) — — — 0.036L-Valine 0.046 0.046 0.046 0.046VITAMINSL-Ascorbic Acid•Na 0.05 0.05 — —Biotin 0.0001 0.0001 — —Choline Bitartrate — — — 0.0018 Choline Chloride 0.001 0.001 0.001 —Folic Acid 0.001 0.001 0.001 0.001myo-Inositol 0.002 0.002 0.002 0.002Niacinamide 0.001 0.001 0.001 0.001D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.001Pyridoxal•HCl 0.001 0.001 0.001 0.001Riboflavin 0.0001 0.0001 0.0001 0.0001 Thiamine•HCl 0.001 0.001 0.001 0.001Vitamin B-12 0.00136 0.00136 — —OTHERAdenosine — 0.01 — —Cytidine — 0.01 — —2'-Deoxyadenosine — 0.01 — —2'-Deoxycytidine•HCl — 0.011 — —2'-Deoxyguanosine — 0.01 — —Glucose 1.0 1.0 1.0 1.00Guanosine — 0.01 — —HEPES — — 5.958 —Phenol Red•Na 0.011 0.011 0.011 0.0064 Pyruvic Acid•Na 0.11 0.11 — —Thioctic Acid 0.0002 0.0002 — —Thymidine — 0.01 — —Uridine — 0.01 — —ADDNaHCO3 2.2 2.2 2.2 2.2L-Glutamine — — — 0.292Grams of powder required to prepare 1 L 10.1 10.2 14.2 9.4Minimum Essential Medium Eagle (MEM) continuedM 8167M 0518 M 4144 M 4767 [1X] M 7270 M 7395 COMPONENT g/L g/L g/L g/L g/L g/L INORGANIC SALTSCaCl2•H2O — 0.265 — — 0.265 0.265MgCl•6H2O 0.2 — — — — —MgSO4 (anhyd) — 0.09767 0.09767 0.09767 0.09767 0.09767 KCl 0.4 0.4 0.4 0.4 0.4 0.4NaCl 6.5 6.8 6.8 6.8 6.8 6.8NaH2PO4 (anhyd) 1.154 0.122 1.22 1.22 0.122 0.122AMINO ACIDSL-Arginine•HCl 0.126 0.126 0.126 0.126 0.126 0.126L-Cystine•2HCl 0.0324 0.0313 0.0313 0.0313 0.0313 0.0313 L-Glutamine 0.292 — 0.292 — 0.292 0.292L-Histidine•HCl•H2O 0.042 0.042 0.042 0.042 0.042 0.042L-Isoleucine 0.052 0.052 0.052 0.052 0.052 0.052L-Leucine 0.052 0.052 0.052 0.052 — 0.052L-Lysine•HCl 0.0725 0.0725 0.0725 0.0725 — 0.0725 L-Methionine 0.015 0.015 0.015 0.015 — 0.015L-Phenylalanine 0.032 0.032 0.032 0.032 0.032 0.032L-Threonine 0.048 0.048 0.048 0.048 0.048 0.048L-Tryptophan 0.01 0.01 0.01 0.01 0.01 0.01L-Tyrosine•2Na•2H2O 0.05452 0.0519 0.0519 0.0519 0.0519 0.0519 L-Valine 0.046 0.046 0.046 0.046 0.046 —D-Valine — — — — — 0.092VITAMINSCholine Chloride 0.001 0.001 0.001 0.001 0.001 0.001Folic Acid 0.001 0.001 0.001 0.001 0.001 0.001myo-Inositol 0.002 0.002 0.002 0.002 0.002 0.002Niacinamide 0.001 0.001 0.001 0.001 0.001 0.001D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.001 0.001 0.001Pyridoxal•HCl 0.001 0.001 0.001 0.001 0.001 0.001Riboflavin 0.0001 0.0001 0.0001 0.0001 0.0001 0.0001 Thiamine•HCl 0.001 0.001 0.001 0.001 0.001 0.001OTHERGlucose 2.0 1.0 1.0 1.0 1.0 1.0Phenol Red•Na 0.011 — 0.011 0.011 0.011 0.011NaHCO3 — — — 2.2 — —ADDL-Glutamine — 0.292 — 0.292 — —L-Leucine — — — — 0.052 —L-Lysine — — — — 0.0725 —L-Methionine — — — — 0.015 —NaHCO3 2.0 2.2 2.2 — 2.2 2.2Grams of powder required to prepare 1 L 11.2 9.3 10.4 — 9.4 9.6Minimum Essential Medium Eagle (MEM) continuedM 2279 M 4526 M 5775 M 8292M 7399M 7647 [1X] [1X] [1X] [1X] COMPONENTS g/L g/L g/L g/L g/L INORGANIC SALTSCaCl2•2H2O 0.265 0.265 0.265 0.185 0.265MgSO4 (anhyd) 0.09767 0.09767 0.09767 0.09767 0.09767 KCl 0.4 0.4 0.4 0.4 0.4KH2PO4 (anhyd) — — — 0.06 —NaHCO3 — 2.2 2.2 0.35 2.2NaCl 6.8 6.8 6.8 8.0 6.8Na2HPO4 (anhyd) — — — 0.04788 —NaH2PO4 (anhyd) 0.122 0.122 0.122 — 0.122AMINO ACIDSL-Alanine 0.0089 — 0.025 — 0.025L-Arginine•HCl 0.126 0.126 0.126 0.126 0.126L-Asparagine•H2O 0.015 — 0.05 — 0.05L-Aspartic Acid 0.0133 — 0.03 — 0.03L-Cysteine•HCl•H2O — — 0.1 — 0.1L-Cystine•HCl 0.0313 0.0313 0.0313 0.0313 0.0313 L-Glutamic Acid 0.0147 — 0.075 — 0.075L-Glutamine 0.292 — — — —Glycine 0.0075 — 0.05 — 0.05L-Histidine•HCl•H2O 0.042 0.042 0.042 0.042 0.042L-Isoleucine 0.052 0.052 0.052 0.052 0.052L-Leucine 0.052 0.052 0.052 0.052 0.052L-Lysine•HCl 0.0725 0.0725 0.0725 0.0725 0.0725 L-Methionine 0.015 0.015 0.015 0.015 0.015L-Phenylalanine 0.032 0.032 0.032 0.032 0.032L-Proline 0.0115 — 0.04 — 0.04L-Serine 0.0105 — 0.025 — 0.025L-Threonine 0.048 0.048 0.048 0.048 0.048L-Tryptophan 0.01 0.01 0.01 0.01 0.01L-Tyrosine•2Na•2H2O 0.0519 0.0519 0.0519 0.0519 0.0519 L-Valine 0.046 0.046 0.046 0.046 0.046VITAMINSL-Ascorbic Acid•Na — — 0.05 — 0.05Biotin — — 0.0001 — 0.0001 Choline Chloride 0.001 0.001 0.001 0.001 0.001Folic Acid 0.001 0.001 0.001 0.001 —myo-Inositol 0.002 0.002 0.002 0.002 0.002Lipoic Acid — — 0.0002 — 0.0002 Niacinamide 0.001 0.001 0.001 0.001 0.001D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.001 0.001Pyridoxal•HCl 0.001 0.001 0.001 0.001 0.001Pyruvic Acid — — 0.11 — 0.11Riboflavin 0.0001 0.0001 0.0001 0.0001 0.0001 Thiamine•HCl 0.001 0.001 0.001 0.001 0.001Vitamin B-12 — — 0.00136 — 0.00136 OTHERGlucose 1.0 1.0 1.0 1.0 1.0Lactalbumin Hydrolysate 0.5 — — — —Phenol Red•Na 0.011 0.011 0.011 0.011 0.011ADDL-Glutamine — 0.292 0.292 0.292 0.292NaHCO3 2.2 — — — —Grams of powder required to prepare 1 L10.2 N/A N/A N/A N/AMinimum Essential Medium Eagle (MEM) continuedM 5650 M 8028 M 7278 M 0275 M 9288[1X] [1X] [1X] [10X] [10X]COMPONENT g/L g/L g/L g/L g/LINORGANIC SALTSCaCl2•2H2O 0.265 — 0.265 2.65 1.85MgCl•6H2O — 0.2 — — —MgSO4 (anhyd) 0.09767 — 0.09767 0.9767 0.9767KCl 0.4 0.4 0.4 4.0 4.0KH2PO4 — — — — 0.6NaHCO3 2.2 2.0 2.2 — —NaCl 6.8 6.5 5.5 68.0 80.0NaH2PO4 (anhyd) 0.122 1.154 0.122 1.22 —Na2HPO4 — — — — 0.4788AMINO ACIDSL-Alanine 0.0089 — — — —L-Arginine•HCl 0.126 0.126 0.126 1.26 1.26L-Asparagine•H2O 0.015 — — — —L-Aspartic Acid 0.0133 — — — —L-Cystine•2HCl 0.0313 0.0324 0.0313 0.313 0.313L-Glutamic Acid 0.0147 — — — —Glycine 0.0075 — — — —L-Histidine•HCl•H2O 0.042 0.042 0.042 0.42 0.42L-Isoleucine 0.052 0.052 0.052 0.52 0.52L-Leucine 0.052 0.052 0.052 0.52 0.52L-Lysine•HCl 0.0725 0.0725 0.0725 0.725 0.725L-Methionine 0.015 0.015 0.015 0.15 0.15L-Phenylalanine 0.032 0.032 0.032 0.32 0.32L-Proline 0.0115 — — — —L-Serine 0.0105 — — — —L-Threonine 0.048 0.048 0.048 0.48 0.48L-Tryptophan 0.01 0.01 0.01 0.1 0.1L-Tyrosine•2Na•2H2O 0.0519 0.05452 0.0519 0.519 0.519L-Valine 0.046 0.046 0.046 0.46 0.46VITAMINSCholine Chloride 0.001 0.001 0.001 0.01 0.01Folic Acid 0.001 0.001 0.001 0.01 0.01myo-Inositol 0.002 0.002 0.002 0.02 0.02Niacinamide 0.001 0.001 0.001 0.01 0.01D-Pantothenic Acid •½Ca 0.001 0.001 0.001 0.01 0.01Pyridoxal•HCl 0.001 0.001 0.001 0.01 0.01Riboflavin 0.0001 0.0001 0.0001 0.001 0.001Thiamine•HCl 0.001 0.001 0.001 0.01 0.01OTHERGlucose 1.0 2.0 1.0 10.0 10.0Phenol Red•Na 0.011 0.011 0.011 0.11 0.11HEPES — — 5.958 — —ADDL-Glutamine 0.292 0.292 0.292 0.292 at 1X 0.292 at 1X NaHCO3 — — — 2.2 at 1X 0.35 at 1XREFERENCES1. Eagle, H. et al (1956) myo-Inositol as an Essential Growth Factor for Normal and Malignant HumanCells in Tissue Culture. J.Biol. Chem. 214, 845-847.2. Eagle, H. (1976) Media for Animal Cell Culture. Tissue Culture Association Manual. 3, 517-520.3. Eagle, H. (1959). Amino Acid Metabolism in Mammalian Cell Cultures. Science. 130, 432-437.4. Eagle, H. (1955) Nutrition Needs of Mammalian Cells in Culture. Science. 122, 501.MEM Alpha5. Stanners, C.P., Eliceiri, G.L. and Green, H. (1971). Two Types of Ribosome in Mouse-HampsterHybrid Cells. Nature New Biology. 230, 52-54.6. Stanners, C.P. and Goldberg, V.J. (1975). On the Mechanism of Neutropism of Vesicular StomatitisVirus in Newborn Hampsters. Studies With Temperature-Sensitive Mutants. J. Gen. Virol. 29, 281-296. MEM Auto-Mod7. Yamane, I., Matsuya, Y. and Jimbo, K. (1968). An Autoclavable Powdered Cultured Medium forMammalian Cells. Proc. Soc. Exp. Biol. and Med. 127, 335-336.8. McLimans, W.F., Davis,E.V., Glover, F.L. and Rake, G.W. (1957). The Submerged Culture ofMammalian Cell: The Spinner Culture. J. of Immunology, 79, 428-433.MEM D-VAL9. Gilbert, S.F. and Migeon, B.R. (1975) D-Valine as a Selective Agent for Normal Human and RodentEpithelial Cells in Culture. Cell. 5, 11-17.。

AC CharacteristicsIn the following AC specifications, output HIGH-Z is defined as the point where data out is no longer driven; however, this is not applicable to the M25PX64 device.Table 21: Device Grade and AC Table CorrelationTable 22: AC Measurement ConditionsFigure 23: AC Measurement I/O WaveformInput and output timing reference levelsInput levels 0.8V CC0.2V CC0.7V CC 0.3V CC0.5V CCTable 23: CapacitanceNote:1.Values are sampled only, not 100% tested, at T A =25°C and a frequency of 25MHz.Table 24: Instruction Times, Process TechnologyNotes: 1.Applies to the entire table: 110nm technology devices are identified by the process iden-tification digit 4 in the device marking and the process letter B in the part number.2.When using the PAGE PROGRAM command to program consecutive bytes, optimizedtimings are obtained in one sequence that includes all the bytes rather than in severalsequences of only a few bytes (1 < n < 256).Table 25: AC Specifications (25 MHz, Device Grade 3, V CC[min]=2.7V)Table 25: AC Specifications (25 MHz, Device Grade 3, V CC[min]=2.7V) (Continued)Notes: 1.READ DATA BYTES at HIGHER SPEED, PAGE PROGRAM, SECTOR ERASE, BLOCK ERASE,DEEP POWER-DOWN, READ ELECTRONIC SIGNATURE, WRITE ENABLE/DISABLE, READ ID,READ/WRITE STATUS REGISTER2.The t CH and t CL signals must be greater than or equal to 1/f C.3.The t CLCH, t CHCL, t SHQZ, t HHQX, t HLQZ, t DP, t RES1, and t RES2 signal values are guaranteed bycharacterization, not 100% tested in production.4.The t CLCH and t CHCL signals clock rise and fall time values are expressed as a slew-rate.5.The t WHSL and t SHWL signals are only applicable as a constraint for a WRITE STATUS REGIS-TER command when SRWD bit is set at 1.Table 26: AC Specifications (50 MHz, Device Grade 6, V CC[min]=2.7V)Table 26: AC Specifications (50 MHz, Device Grade 6, V CC[min]=2.7V) (Continued)Notes: 1.READ DATA BYTES at HIGHER SPEED, PAGE PROGRAM, SECTOR ERASE, BLOCK ERASE,DEEP POWER-DOWN, READ ELECTRONIC SIGNATURE, WRITE ENABLE/DISABLE, READ ID,READ/WRITE STATUS REGISTER2.The t CH and t CL signals must be greater than or equal to 1/f C.3.The t CLCH, t CHCL, t SHQZ, t HHQX, t HLQZ, t DP, t RES1, and t RES2 signal values are guaranteed bycharacterization, not 100% tested in production.4.The t CLCH and t CHCL signals clock rise and fall time values are expressed as a slew-rate.5.The t WHSL and t SHWL signals are only applicable as a constraint for a WRITE STATUS REGIS-TER command when SRWD bit is set at 1.Table 27: AC Specifications (40 MHz, Device Grade 6, V CC[min]=2.3V)。

The new Atmel ® AVR ® ATmegaS128 microcontroller (MCU) brings the industry-leading AVR core to the aerospace industry. The ATmegaS128 MCU is designed for enhanced radiation performance and increased reliability in space applications. It takes advantage of mature Atmel AVR tools designed and used in the mass market worldwide for many years. The ATmegaS128 microcontroller targets many of the most common space applications, which typically require a small footprint, low power and analog control of motors and sensors.Key FeaturesHigh-performance, Low-power 8-bit Atmel AVR MCU• Advanced RISC architecture / Up to 8MIPS• On-chip 2-cycle multiplier• 3V-3.6V / 0 - 8MHz operating voltages & speed grades High-endurance Non-volatile Memory • 128 Kbytes of Flash program memory• 4 Kbytes EEPROM – 4 Kbytes internal SRAM1Advance Risc Architecture 8 Mips3.0 3-55 • Up to 64 Kbytes optionalexternal memory space • SPI interface for in-system programmingPeripheral Features • Two 8-bit and two 16-bit timers/counters • 6 PWM channels • 8-channel, 10-bit ADC• TWI/USARTs/SPI serial interface • Programmable watchdog timer • On-chip analog comparator Special Microcontroller Features• Power-on reset and programmable brown-out detection• Internal calibrated RC oscillator • External and internal interrupt sources• Six Sleep modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended StandbyKey Highlights for Space Environment• Full wafer lot traceability • 64-lead ceramic package (CQFP) • Space screening • Space qualification• Total ionizing Dose: up to 30 Krad (Si)• Single event latch-up LET > 62.5MeV.cm²/mg• Single event upset LET > 3 MeV.cm²/mg•SEU 10-3 to 10-1 error/ device/dayATmegaS128 Starter kitTo ease your design process and reduce time-to-market, Atmel delivers a complete starter kit STK600 and development system for the ATmegaS128 AVR microcontroller. With its advanced features for proto-typing and testing new designs, the kit gives designers a head start for developing code on AVR devices. Customers can start with the industrial version using the ATmega128 MCU or the Space Version ATme-gaS128 device as both share the same pinout.Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T : (+1)(408) 441. 0311 F : (+1)(408) 436. 4200 | © 2015 Atmel Corporation. / Rev.: Atmel-45160A-ATmegaS128-Aerospace-Rad-Tolerant-Flyer_E_US_102015Atmel,® Atmel logo and combinations thereof, Enabling Unlimited Possibilities,® and others are registered trademarks or trademarks of Atmel Corporation in U. S. and other countries. Other terms and product names may be trademarks of others.Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RE-LATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.Atmel StudioAtmel Studio is the integrated development platform (IDP) for developing and debugging Atmel AVR and Atmel | SMART ARM ® processor-based MCU applications. The Atmel Studio IDP gives you a seamless and easy-to-use environment to write, build and debug your applications written in C/C++ or assembly code. Atmel Studio supports all 8- and 32-bit AVR MCUs. It also connects seamlessly to Atmel debuggers and development kits.Atmel Software FrameworkThe Atmel Software Framework (ASF) is an MCU software library providing a 1,600 project examples of embedded software for Atmel Flash-based MCUs, including AVR and Atmel | SMART devices. This library contains basic C code examples for all ATmegaS128 peripherals.Application NotesIn addition to the Atmel Software framework, Atmel provides a broad range of application notes to implement different peripherals of the ATmegaS128 device. Most of those ap-plication notes are provided with source code in C language.。

微星M-Flash图解和教学本文图片和教学以P55-GD65主板为例。

一.保证U盘(FAT/FAT32格式)能被M-FLASH识别,可以热拔插或重启一下.二.BIOS要放在U盘根目录,文件名必须为微星官方名称,不可更换.三.BIOS可能需要设置为U盘第一启动.一、准备U盘准备一个U盘，格式化为FAT/FAT32。

可以用XP的格式化工具。

大于1GB的U盘，如果想做成可以启动DOS 的U盘，可以用HP的格式化工具。

不要用USBOOT软件格式化和制作可启动DOS的U盘。

二、M-FLASH菜单介绍开机时按Delete（DEL）键，进入BIOS设置界面。

右边有M-FLASH选项，光标移到此项，敲ENTER进入。

进入M-FLASH菜单后，可以看到菜单分为2大部分。

第一部分是：BIOS Update or Boot 2nd BIOS From USB Drive。

这里包括2项功能：更新BIOS和从U盘的BIOS 启动。

第二部分是：Backup BIOS to USB Drive。

这是备份BIOS到U盘。

第一部分的右侧帮助栏提示：[BIOS Update]是从选定的文件更新BIOS ROM芯片数据。

[Boot]是指定BIOS文件后，系统将从存储在U盘的BIOS启动。

特别要注意的是红色文字提示：仅支持文件名为[A7583IMS]的BIOS文件和FAT/FAT32格式。

这里说明U盘必须是FAT/FAT32格式的，而且必须是该主板的BIOS。

在右侧下部可以看到主板的当前BIOS版本。

此例是[A7583IMS.141]。

三、更新BIOS我们先看看“更新BIOS”的操作。

先把下载的BIOS拷贝到U盘，插入U盘开机。

光标移动到M-Flash Function as（M-Flash功能为），敲ENTER看到下拉菜单，除默认的Disabled外，还有2项：BIOS Update和Boot。

现在我们选BIOS Update，就是更新BIOS。

计算机过去和现在的变化英语作文全文共5篇示例，供读者参考篇1Computers Are So Cool Now!Have you ever thought about how different computers are today compared to a long time ago? My dad showed me some pictures of the first computers and they look nothing like what we use nowadays. Computers used to be these huge, clunky machines that took up entire rooms! Can you imagine having a computer bigger than your house? That would be crazy!The very first computer was invented back in the 1800s and it was just for doing calculations and math stuff. It was basically a really big calculator made out of gears and levers. The guy who made it was named Charles Babbage and he called his invention the "Analytical Engine." What a weird name! If I had made the first computer, I would have called it something way cooler like the "Math Master 3000" or the "Calculation Station."For a really long time after that, computers were still these giant room-sized machines. They had no screens, no keyboards, and no mouse. All they did was calculations really slowly by usingpunch cards with holes in them. Can you believe people actually had jobs where they just sat around punching holes into cards all day? I'm glad I wasn't around for that!Computers didn't get their first real screens until the 1960s and even then, the images were just plain green text on a black background. There were no graphics, no pictures, no colors, nothing! Just boring green words. My dad said people thought it was the most amazing thing ever back then. I would have been so bored if that's all computers could do.The first real computer that was kind of like what we use today didn't come around until the 1970s. It was called the Xerox Alto and it actually had a mouse, a keyboard, and graphical windows on the screen. That's where the idea for Windows on PCs came from later on. But these computers were still super expensive, like hundreds of thousands of dollars! Only rich companies and universities could afford them back in those days.Things really started changing quickly in the 1980s and 1990s after personal computers were invented. Regular people could finally buy affordable home computers to use for writing, playing games, and other fun stuff. My favorite old computers were the Apple II and the Commodore 64 which had awesome8-bit graphics and games like Super Mario Bros and Prince of Persia. Does anybody still play those today? Probably not, but they were so rad back in the day!The 1990s also brought us the internet and the World Wide Web which totally changed everything. All of a sudden, we could connect our home computers to this global network and visit websites, send emails, and chat with people anywhere in the world. It must have been mind-blowing for parents and grandparents who grew up when computers were justroom-sized calculator machines.Nowadays, computers are nothing like they used to be. We have lightning-fast laptops, phones, and tablets that are a million times more powerful than those old dinosaur machines. We can play incredibly realistic 3D video games, watch movies, create amazing artwork and music, and do almost anything you can imagine, all on these little portable devices. My gaming PC at home has a powerful graphics card that can render unbelievable graphics way better than the fanciest 3D movies from 20 years ago.The internet has also completely transformed into the online world we know today, filled with social media, streaming videos, virtual worlds, and a wealth of information on every topicimaginable. I can video chat with my cousins across the country in real-time, download unlimited games and apps, and learn about any subject by watching free online courses or looking it up on Wikipedia. Computers have gone from simplenumber-crunchers to gateways providing instantaneous access to all of human knowledge and capabilities.Sometimes I try to picture what computers will be like 30 or 40 years from now when I'm an adult, but it's impossible to imagine that far ahead. Maybe we'll have hyper-realistic virtual reality worlds to explore. Or cybernetic implants directly connecting our brains to an omniscient cloud intelligence. Or domesticated robot assistants to help out with chores and tutoring. Who knows what amazing computer technologies the future will bring?All I know is that today's computers and the internet are already straight-up magical compared to what my parents and grandparents had. I'll never take these powerful devices for granted, but I also can't wait to see what mind-bending computer innovations are still to come. Computers have evolved so much already, and the best is yet to arrive!篇2The Evolution of Computers: From Bulky Behemoths to Sleek MarvelsComputers have come a long, long way since the olden days! Can you imagine a world without iPads, laptops, and smartphones? It's hard to picture, isn't it? But believe it or not, that's how things used to be not too long ago. Let me tell you all about the fascinating journey computers have taken to become the awesome gadgets we know and love today.Way back when, computers were these gigantic, room-sized machines that looked like weird science experiments straight out of a sci-fi movie. They were made up of thousands of glowing tubes, tangled wires, and strange-looking switches. Just to operate these ancient computers, you needed a team of people in lab coats programming them with punched cards and reels of tape. It was like a secret code that only the super smart scientists could understand!These early computers could really only do basic math calculations and simple data processing tasks. That might not seem very impressive now, but back then it was revolutionary! Imagine having a machine that could crunch numbers faster than the greatest mathematicians on the planet. Pretty mind-blowing, right?As time went on, computers started becoming smaller and more powerful. Instead of taking up an entire room, they shrank down to the size of a large refrigerator. That's still huge compared to what we have today, but it was a vast improvement. These "minicomputers" were used by businesses, universities, and research labs for more advanced calculations and data storage.Then came the era of "microcomputers" – compact little boxes that could finally fit on a desk! Companies started selling these home computers that regular people could actually buy and use themselves. Of course, by today's standards, these early personal computers were primitive. They had tiny, pixelated black-and-white displays, you had to type in commands using a keyboard, and they could only run basic programs and games. But for their time, they were cutting-edge marvels that kicked off the digital revolution.Fast forward to the present day, and computers have transformed into the high-tech wonders we can't live without. Our smartphones are like handheld supercomputers that make those ancient mainframes look like clunky toys. With just a few taps on a sleek glass screen, we can video call our friends around the world, watch movies, play intense 3D games withmind-blowing graphics, and find answers to virtually any question – things that would have seemed like magical science fiction fantasies back in the older days of computing.And that's just our phones! Modern desktop and laptop computers are absolute powerhouses for productivity, creativity, and entertainment. We can type up stories, create stunning art and animations, edit videos, compose music, and build incredible virtual worlds for video games with ease. Our computers are the hard-working sidekicks that help us at school, at work, and at play every single day.Who knows what amazing computer technologies the future will bring? Maybe one day we'll have hologram computer displays or mind-controlled interfaces straight out of the wildest imaginations of science fiction writers. Perhaps our gadgets will become even smarter and more intuitive, able to understand us like our own personal robot assistants. Or we might discover entirely new and unbelievable ways to use computers that we can't even dream up yet.One thing's for sure – the evolution of computers over the decades has been an incredible transformation. From hulking, room-sized code-crunchers to sleek pocket-sized wonders, computers have shaped our modern world in so many ways. Andthis is just the beginning! Who can say what mindblowing computing advancements the future will hold? I can't wait to see what comes next in this awesome high-tech journey.篇3Computers Are Totally Different Now Than They Used To Be!Computers have changed so much over the years, it's crazy! The computers we use today are nothing like the big, clunky machines from when our parents and grandparents were kids. Let me tell you all about how different computers used to be back in the day compared to the awesome devices we get to use now.Way back in the 1900s, computers were these massive things that took up entire rooms! They were made up of all these different parts wired together. Can you imagine having a computer that's literally the size of your classroom? That's how huge the first digital computers were. They were called "mainframe" computers and they looked like a ton of refrigerators and oven tops all connected together with miles of wires and cables. Just one of those ancient mainframes weighed as much as a couple of elephants!Those early mainframe computers could only do very basic calculations and processes. They weren't connected to a screen, mouse, or keyboard either. The only way to interact with them was using punch cards and miles of printed output paper. You had to write instructions by punching holes into these stacks of thick cards in different patterns, then feed the punch cards into the computer's card reader. After chugging away for a while, the computer would print out your results on these huge spreadsheets of greenbar paper. It seems so complicated compared to how we use computers today!As time went on in the 1900s, computers got a little bit smaller and more advanced, but they were still really big and bulky compared to what we have now. Computers from the 1970s and 80s were a lot more compact than those giant mainframes, but they were still basically big greyclunky boxes or towers that took up a bunch of space and had to stay in one place on a desk. You had to connect them to a separate monitor screen, as well as printers, storage devices, and other accessories with all these tangled cordBy the 1990s, computers finally started becoming a lot more portable and mobile. Companies started making laptop and notebook computers that you could take with you and useon-the-go instead of having to stay in one place. Laptops back then were still pretty chunky and heavy compared to today's slim ultrabooks, but it was a big step forward in mobility.Speaking of portability, one of the biggest and most amazing changes in computers over the last couple decades has been the invention of smartphones and tablets! Can you imagine life without an iPad or iPhone? Before the 2000s, the idea of having a super powerful computer that fits in your pocket was just science fiction. But now, pretty much everyone has amulti-purpose mobile computer that doubles as a phone, web browser, gaming device, camera, and more - all in one sleek gadget you can take absolutely anywhere. It's incredible how much technology has advanced in a relatively short period of time.Not only are today's computers waaaay more portable than they used to be, but they're also a bajillion times more powerful too! A basic smartphone or tablet today has way more processing power and storage than those gigantic room-sized mainframe computers from the 1900s. My Nintendo Switch game console at home is probably even more powerful than some of the desktops PCs my parents used when they were kids. It's mind-blowing how quickly computers have evolved fromthose clunky boxes into these tiny pocket supercomputers we have now.The software and operating systems have changed massively as well. Those ancient 1900s computers could only run very basic programs and had to be programmed manually using confusing codes and punch cards. Nowadays, our laptops, phones, and tablets can run thousands of different apps and programs at once using simple point-and-click icons and menus. We have such awesome software for doing basically anything - creating documents, editing videos, playing games, browsing the internet, you name it! Plus with WiFi and cloud computing, we can sync our stuff across multiple devices and access information from basically anywhere. Back in the day, every computer was aself-contained box of hardware and software that couldn't interact with anything else.My favorite parts about modern computers have to be videogames and the internet though. Those old dinosaur computers could never handle the epic 3D graphics, sprawling online worlds, and hyper-realistic gameplay that we have now. And being able to get on the world wide web to learn about absolutely any topic, watch unlimited videos, talk to people across the planet, and discover new things is just the coolest! Ican't even picture how boring and limited life must have been without access to the entire internet's knowledge at your fingertips. I feel so lucky to be growing up in a time when we have such incredible ever-evolving technology.Computers have transformed so unbelievably much in the last 50-100 years, and they keep getting more and more advanced every single day! Who knows what kind ofmind-blowing devices and capabilities we'll have by the time I'm an adult. Maybe we'll have computers we can control with our brains or hologram displays you can walk through instead of a screen. Or possibly super-intelligent robots that can do all our work and chores for us. One thing's for sure - I can't wait to see what sort of future computer technology is in store for us next!篇4The Amazing Changes in Computers Over TimeComputers are totally awesome machines that have changed so much since they were first invented! They used to be these huge, clunky things that took up entire rooms. But now they can fit right in your pocket as a tiny smartphone or tablet. How crazy is that?Way back in the old days, computers were just big dumb boxes that could only do really basic math stuff. The first computers were invented in the 1930s and 1940s by scientists and engineers. They made them by connecting a bunch of switches, wires, and vacuum tubes together. Vacuum tubes are these glass doodads that allow electricity to flow through in a particular way. Pretty weird, right?These early computers filled entire rooms and weighed like a bajillion pounds. They were massively huge! The ENIAC computer built in 1946 weighed 30 tons. That's as heavy as two adult elephants! It also had 18,000 vacuum tubes, 1,500 relays, and hundreds of thousands of resistors, capacitors, and other components. Just setting it up took a whole team of engineers and technicians. Wow!Operating these ancient computers was no easy task either. You had to physically re-wire and re-program them for each new calculation using hundreds of cable connections and switches. It must have been a giant hassle! And if even one single vacuum tube burned out, the entire computer could stop working. No thanks!Thankfully, computers have come a really, really long way since those caveman days. The first big leap happened in 1947when the transistor was invented. A transistor is this tiny little chip that can control and direct the flow of electricity way better than vacuum tubes. This allowed computers to become way smaller, faster, cheaper, more reliable, and more energy-efficient.Then in 1971, the microprocessor chip was invented. This incredible chip could pack hundreds of transistors onto a single tiny piece of silicon. It basically crammed an entire CPU (the brains of a computer) into one little chip the size of a penny. This led to personal computers and home computers getting invented in the 1970s, which were way more compact and usable compared to the giant room-sized models before.As years went by, microchips just kept getting smaller, faster, and more powerful following something called Moore's Law. They can now pack billions upon billions of tiny transistors onto a single chip no bigger than a postage stamp. It's mind-blowing! That's what allows our laptops, smartphones, and gaming consoles today to be so unbelievably powerful and advanced compared to old computers.Another huge change is that modern computers and phones can now connect to the internet and tap into a vast wealth of information online. The first basic versions of the internet got started way back in the 1960s, but it wasn't until the 1990s that itreally took off and went mainstream for regular people like you and me.By going online, our computers and phones can do all sorts of incredible things. We can video chat with friends on other continents, watch movies and shows, play multiplayer games with people around the world, learn absolutely anything by browsing websites, and so much more. It's like having a window into a boundless library and entertainment center at our fingertips!Our devices today can also take photos, record videos, play music, and run millions upon millions of apps and programs. We've got apps for everything - games, productivity, social media, news, sports, cooking, learning, and you name it. It's almost like these devices are small powerful robots ready to do our bidding.Computers have also gotten way better at understanding human speech and language thanks to advances in artificial intelligence (AI). We can now talk to our phones and computers using voice commands. Some AIs are even learning how to understand and communicate like humans through natural language processing. Who knows, maybe one day we'll be chatting with computers as easily as we talk to our friends!It absolutely boggles my mind how far computers have progressed in the past 70-80 years. We've gone from simplistic number-crunchers to portable multimedia machines that can handle basically any task we throw at them. I can't wait to see what new awesome breakthroughs and innovations happen in the world of computers and technology over the years to come. Imagine where we might be 20 or 30 years from now! One thing's for sure - the future of computing is going to be totally wicked.篇5The Awesome Evolution of ComputersComputers are super cool gadgets that have changed a ton over the years! It's crazy to think about how different they used to be from the ones we use today. Computers used to be these giant, clunky machines that took up entire rooms. Now we have slim laptops and tiny smartphones that are a bajillion times more powerful!Way back in the old days, like a really really long time ago in the 1930s and 1940s, computers were just room-sized calculators. They were made up of switches, cables, and vacuum tubes (those big glassy light bulb thingies). You had to physicallyrewire them to perform different calculations! Can you imagine how much of a pain that must have been? It's like having to rebuild your whole laptop from scratch every time you wanted to do something different on it. No thanks!Then in the 1950s and 1960s, computers started using transistors instead of vacuum tubes. Transistors are these tiny devices that control electric signals, kind of like their own miniature on/off switches. Using transistors made computers way more compact, efficient, and reliable. Although they were still mastodons compared to today's munchkin machines!In the 1970s, microprocessors came along and that's when the real magic started happening. A microprocessor is like a super tiny computer brain crammed into a single chip. It allowed engineers to cram a whole computer's worth of power into a compact box. Groovy personal computers like the Apple II hit the scene, bringing computing power into homes and schools. Of course, they were still lightweights compared to today's technology!The 1980s were a blast for computers. That's when machines got serious graphics capabilities to show more than just text and basic shapes. Games became insanely popular on home computers and game consoles. Computing was finally gettingfun and not just for dataheads crunching numbers! Although the graphics were laughably pixelated potatoes compared to what we're used to now.But trust me, you wouldn't want to game on computers from the 1990s either. Their 3D graphics look like melted PlayDough models next to today's photorealistic visuals. Still, the 90s kicked off some huge advances like optical/laser disc storage, the earliest multimedia computers, and of course...drumroll... the world wide web! Yup, the internet as we know it today was born in the 90s, even if it was a newborn baby back then.And then KABAM! The new millennium arrived and computers started rapidly evolving year after year like an overclocked mutant virus. Processer speeds went through the roof, storage capacities exploded, and graphics becamemovie-quality. Computing got mobile and wireless with laptops, smartphones, and tablets going mainstream.Nowadays computers are total powerhouses smashed into pint-sized packages. A typical new smartphone trounces the mightiest supercomputers of the 1960s! And intelligent AI assistants like Siri and Alexa are quickly getting smarter atunderstanding our voices and queries. Who knows, maybe one day they'll be as intelligent as us humans! Although I hope the robot overlords will at least let us keep playing video games in our free time.But what's really crazy is that computers are still just getting started! Every year they steadily get faster, smarter, and more mind-blowing. New technologies like quantum computing, neural networks, and augmented reality are primed to revolutionize computing all over again. It's going to be an awesome blast observing how computers will continue morphing and evolving over my lifetime. Maybe one day they'll be impossible-to-comprehend hyper-intelligent machines cybernetically fused to our brains! Or maybe they'll be extinct antiques buried under towering stacks of next-next-next generation technology we can't even fathom right now. Only time will tell!。