华为公司是如何开展信号完整性和电源完整性分析研究工作的
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电源完整性测试刘婷婷;邓豹;韩嫚莉【摘要】随着电子产品小型化以及复杂化的发展,电源完整性的设计已经成为了制约高速电路设计成败的关键因素之一.能够正确地测试到电源完整性参数对于产品调试来说是最根本、最重要的一部分.为了能够获取精确测试电源完整性参数,从测试设备以及被测物两个角度出发,结合原理分析以及建模仿真的方法,得出了电源完整性测试的正确方法,并且提供了测试步骤.【期刊名称】《微型机与应用》【年(卷),期】2015(034)008【总页数】4页(P29-31,34)【关键词】高速电路;电源完整性;仿真设计;信号完整性【作者】刘婷婷;邓豹;韩嫚莉【作者单位】中航工业西安航空计算技术研究所,陕西西安710065;中航工业西安航空计算技术研究所,陕西西安710065;中航工业西安航空计算技术研究所,陕西西安710065【正文语种】中文【中图分类】TN41随着电子技术的飞速发展,电子元器件正朝着微型化、高集成度、多功能化、高功率密度的方向发展。
后摩尔时代,集成电子器件的规模越来越大,一个芯片核中集成几十亿只晶体管,由此带来芯片的时钟频率不断提高,供电电压在不断降低,相应的功率和电流量级显著提高。
供电电路的品质或者说电源完整性的测试与验证,正愈来愈成为影响设计成败的关键因素。
本文将结合仿真分析的方法,介绍一种电源完整性的测试方法。
电源完整性是指电源供给的准确性和稳定性。
实际的电路设计中,由于晶体管的开关以及实际互连线的特性等原因导致电源在一定范围内波动。
当实际供电值高于波动上限时,就会引起芯片工作的可靠性问题;当实际供电值低于下限时会导致芯片的工作性能降低甚至不能工作;当电压波动幅度较大时,可能会直接影响相关电路的信号质量[1]。
基于上述这些问题,随着单板高速高密度的发展,电源完整性已经成为制约设计的一个重要因素。
在硬件设计和调测过程中,必须首先保证电源电路高质量工作。
高速电路的设计复杂性使得电源完整性的测试工作也变得很困难。
前华为互连部技术老屌丝回忆之(三)----电源完整性(PI)仿真电源完整性(PI)仿真阿毛 20140912PI仿真(POWER INTEGRITY)又称电源完整性仿真,它是对单板+封装+DIE构成的电源系统的直流压降,平面载流能力,过孔电流大小,电源平面阻抗及电容种类,数量,位置等进行评估及优化的工作,具体形式如下图1所示。
图1 电源完整性仿真示图我是2004年加入PI(POWER INTEGRITY电源完整性)仿真团队的,PI仿真团队那时候由张坤带领,鼎盛时期主要员工有:张坤,张胜利(华为互连第二位博士),晋赵国,全青山,贾俊,王瑜(实习生),吴炎京及我。
这个团队的组合在当时部门算是实力很强大的,因“每人都有一把刷子”。
加入PI团队前这个团队前期已有部分技术积累:电容的S参数测试,一些理论的研究,但仿真操作流程很复杂且在UNIX环境下,离实用阶段还有一段距离。
华为的PI仿真初期与cadence也有着很紧密的联系。
SQPI是陈兰兵在CADENCE主导开发的一个项目并选华为作为试用客户,经过华为内部的优化及各种关键技术的钻研,最后华为成功应用了SQPI,可惜CADENCE就缺少最后一步没有把这个软件大面积推广开来,也许是算法上对单板一些特殊的情况没有处理好,最重要是其它公司没有象华为这样的团队为这个流程的顺利进行作进一步的技术研究及写上一些辅助的程序。
我一直认为SQPI很好用且效率特别高,因为它与LAYOUT平台是同一平台,无需各种转换,使用我开发的自动赋模型程序及构建的仿真环境,一个板级的PI仿真最多1个小时内就可以完成。
当初CADENCE的PI仿真平台切换是有历史故事的,开始时CADENCE是在UNIX平台上运行PI仿真,这个平台使用的仿真引擎是SPECCTRA。
SPECCTRA是频域引擎而网表则类似于SPICE的工具,可以直接使用电容的S参数,在UNXI环境下此工具操作起来很不方便,这就是为啥刚开始时部门没法推广的重要原因,后来CADENCE 把它的PI仿真工具移到了WINDOWS平台,使用引擎是TLSIM,这样就比较符合大家的使用习惯了,但这个在WINDOWS平台中运行的PI仿真软件不能使用电容的S参数库,而是使用一阶RLC模型,一阶的RLC钽电容是没法拟合的。
信号完整性与电源完整性的仿真分析与设计1简介信号完整性是指信号在通过一定距离的传输路径后在特定接收端口相对指定发送端口信号的还原程度。
在讨论信号完整性设计性能时,如指定不同的收发参考端口,则对信号还原程度会用不同的指标来描述。
通常指定的收发参考端口是发送芯片输出处及接收芯片输入处的波形可测点,此时对信号还原程度主要依靠上升/下降及保持时间等指标来进行描述。
而如果指定的参考收发端口是在信道编码器输入端及解码器输出端时,对信号还原程度的描述将会依靠误码率来描述。
电源完整性是指系统供电电源在经过一定的传输网络后在指定器件端口相对该器件对工作电源要求的符合程度。
同样,对于同一系统中同一个器件的正常工作条件而言,如果指定的端口不同,其工作电源要求也不同(在随后的例子中将会直观地看到这一点)。
通常指定的器件参考端口是芯片电源及地连接引脚处的可测点,此时该芯片的产品手册应给出该端口处的相应指标,常用纹波大小或者电压最大偏离范围来表征。
图一是一个典型背板信号传输的系统示意图。
本文中“系统”一词包含信号传输所需的所有相关硬件及软件,包括芯片、封装与PCB板的物理结构,电源及电源传输网络,所有相关电路实现以及信号通信所需的协议等。
从设计目的而言,需要硬件提供可制作的支撑及电信号有源/无源互联结构;需要软件提供信号传递的传输协议以及数据内容。
图1 背板信号传输的系统示意图在本文的以下内容中,将会看到由于这些支撑与互联结构对电信号的传输呈现出一定的频率选择性衰减,从而会使设计者产生对信号完整性及电源完整性的担忧。
而不同传输协议及不同数据内容的表达方式对相同传输环境具备不同适应能力,使得设计者需要进一步根据实际的传输环境来选择或优化可行的传输协议及数据内容表达方式。
为描述方便起见以下用“完整性设计与分析”来指代“信号完整性与电源完整性设计与分析”。
2 版图完整性问题、分析与设计上述背板系统中的硬件支撑及无源互联结构基本上都在一种层叠平板结构上实现。
An Integrated Signal and Power Integrity Analysis for Signal Traces Through the Parallel Planes Using Hybrid Finite-Element andFinite-Difference Time-Domain TechniquesWei-Da Guo,Guang-Hwa Shiue,Chien-Min Lin,Member,IEEE,and Ruey-Beei Wu,Senior Member,IEEEAbstract—This paper presents a numerical approach that com-bines thefinite-element time-domain(FETD)method and thefi-nite-difference time-domain(FDTD)method to model and ana-lyze the two-dimensional electromagnetic problem concerned in the simultaneous switching noise(SSN)induced by adjacent signal traces through the coupled-via parallel-plate structures.Applying FETD for the region having the source excitation inside and FDTD for the remaining regions preserves the advantages of both FETD flexibility and FDTD efficiency.By further including the transmis-sion-line simulation,the signal integrity and power integrity is-sues can be resolved at the same time.Furthermore,the numer-ical results demonstrate which kind of signal allocation between the planes can achieve the best noise cancellation.Finally,a com-parison with the measurement data validates the proposed hybrid techniques.Index Terms—Differential signaling,finite-element andfinite-difference time-domain(FETD/FDTD)methods,power integrity (PI),signal integrity(SI),simultaneous switching noise(SSN), transient analysis.I.I NTRODUCTIONI N RECENT years,considerable attention has been devotedto time-domain numerical techniques to analyze the tran-sient responses of electromagnetic problems.Thefinite-differ-ence time-domain(FDTD)method proposed by Yee in1966 [1]has become the most well-known technique because it pro-vides a lot of attractive advantages:direct and explicit time-marching scheme,high numerical accuracy with a second-order discretization error,stability condition,easy programming,and minimum computational complexity[2].However,it is often in-efficient and/or inaccurate to use only the FDTD method to dealManuscript received March3,2006;revised November6,2006.This work was supported in part by the National Science Council,Republic of China,under Grant NSC91-2213-E-002-109,by the Ministry of Education under Grant93B-40053,and by Taiwan Semiconductor Manufacturing Company under Grant 93-FS-B072.W.-D.Guo,G.-H.Shiue,and R.-B.Wu are with the Department of Electrical Engineering and Graduate Institute of Communication Engi-neering,National Taiwan University,10617Taipei,Taiwan,R.O.C.(e-mail: f92942062@.tw;d9*******@.tw;rbwu@.tw).C.-M.Lin is with the Packaging Core Competence Department,Advanced Assembly Division,Taiwan Semiconductor Manufacturing Company,Ltd., 30077Taiwan,R.O.C.(e-mail:chienmin_lin@).Color versions of one or more of thefigures in this paper are available online at .Digital Object Identifier10.1109/TADVP.2007.901595with some specific structures.Hybrid techniques,which com-bine the desirable features of the FDTD and other numerical schemes,are therefore being developed to improve the simula-tion capability in solving many realistic problems.First,the FDTD(2,4)method with a second-order accuracy in time and a fourth-order accuracy in space was incorporated to tackle the subgridding scheme[3]and a modified form was employed to characterize the electrically large structures with extremely low-phase error[4].Second,the integration with the time-domain method of moments was performed to analyze the complex geometries comprising the arbitrary thin-wire and inhomogeneous dielectric structures[5],[6].Third,theflexible finite-element time-domain(FETD)method was introduced locally for the simulation of structures with curved surfaces [6]–[8].With the advent of high-speed digital era,the simultaneous switching noise(SSN)on the dc power bus in the multilayer printed circuit boards(PCBs)causes paramount concern in the signal integrity and power integrity(SI/PI)along with the electromagnetic interference(EMI).One potential excitation mechanism of this high-frequency noise is from the signal traces which change layers through the via transition[9]–[11]. In the past,the transmission-line theory and the two-dimen-sional(2-D)FDTD method were combined successfully to deal with the parallel-plate structures having single-ended via transition[12],[13].Recently,the differential signaling has become a common wiring approach for high-speed digital system designs in benefit of the higher noise immunity and EMI reduction.Nevertheless,for the real layout constraints,the common-mode currents may be generated from various imbal-ances in the circuits,such as the driver-phase skew,termination diversity,signal-path asymmetries,etc.Both the differential-and common-mode currents can influence the dc power bus, resulting in the SSN propagating within the planes.While applying the traditional method to manage this case,it will need a muchfiner FDTD mesh to accurately distinguish the close signals transitioning through the planes.Such action not only causes the unnecessary waste of computer memory but also takes more simulation time.In order to improve the computa-tional efficiency,this paper incorporates the FETD method to the small region with two or more signal transitions inside,while the other regions still remain with the coarser FDTD grids.While the telegrapher’s equations of coupled transmission lines are further introduced to the hybrid FETD/FDTD techniques,the1521-3323/$25.00©2007IEEEFig.1.A typical four-layer differential-via structure.SI/PI co-analysis for differential traces through the planes can be accomplished as demonstrated in Section II and the numerical results are shown in Section III.For a group of signal vias,the proposed techniques can also tell which kind of signal alloca-tion to achieve the best performance as presented in Section III. Section IV thus correlates the measurement results and their comparisons,followed by brief conclusions in Section V.II.S IMULATION M ETHODOLOGYA typical differential-via structure in a four-layer board is il-lustrated in Fig.1.Along the signal-flow path,the whole struc-ture is divided into three parts:the coupled traces,the cou-pled-via discontinuities,and the parallel plates.This section will present how the hybrid techniques integrate the three parts to proceed with the SI/PI co-simulation.At last,the stability consideration and computational complexity of the hybrid tech-niques are discussed as well.A.Circuit SolverWith reference to Fig.2,if the even/odd mode propagation coefficients and characteristic impedances are given,it is recog-nized that the coupled traces can be modeled by theequivalentladder circuits,and the lossy effects can be well approxi-mated with the average values ofindividualand overthe frequency range of interest.The transient signal propagationis thus characterized by the telegrapher’s equations with the cen-tral-difference discretization both in time and space domains.The approach to predict the signal propagation through the cou-pled-via discontinuities is similar to that through the coupledtraces except for the difference of model-extracting method.To characterize the coupled-via discontinuities as depicted inFig.1,the structure can be separated into three segments:the viabetween the two solid planes,and the via above(and under)theupper(and lower)plane.Since the time delay of signals througheach segment is much less than the rising edge of signal,the cou-pled-via structure can be transformed into a SPICE passive net-work sketched in Fig.3by full-wave simulation[14],whererepresents the voltage of SSN induced by thecurrent on Ls2.By linking the extracted circuit models of coupled-via disconti-nuities,both the top-and bottom-layer traces together with suit-able driving sources and load terminations,the transient wave-forms throughout the interconnects are then characterized andcan be used for the SIanalyses.Fig.2.The k th element of equivalent circuit model of coupled transmissionlines.Fig.3.Equivalent circuit model of coupled-via structures.B.Plane SolverAs for the parallel-plate structure,because the separationbetween two solid planes is much smaller than the equiva-lent wavelength of signals,the electromagneticfield inside issupposed to be uniform along the vertical direction.Thence,the2-D numerical technique can be applied to characterizethe SSN effects while the FETD method is set for the smallregion covering the signal transitions and the FDTD scheme isconstructed in the most regular regions.The FETD algorithm[15]starts from Maxwell’s two curl-equations and the vector equation is obtainedbyin(1)whereand denote the electricfield and current density,re-spectively,in the losslessvolume.Applying the weak-formformulation or the Galerkin’s procedure to(1)gives(2)where is the weighting function that can be arbitrarily de-fined.In use of thefinite-element method,the variational for-mula is thus discretized to implement the later numerical com-putation.In the present case,the linear basis function is chosento express thefields inside each triangular element.After takingthe volume integration over each element and assembling theFig.4.FEM mesh in the source region and its interface with the FDTD grids. integrals from all the elements,(2)can be simplified into a ma-trix formof(3)whereand are the coefficient vectors of electricfield andcurrent density,respectively.In addition,the values of all matrixelements in(3)are formulatedasand(4)For the mesh profile as illustrated in Fig.4,the FETD re-gion is chosen to be a block replacing the prime FDTD regioninto which the via transition penetrates.This is an initial valueproblem in time with thepreviousand being theinitial conditions as well as the boundary value problem in spacewith being Dirichlet boundary condition.To solve theinitial value problem in(3),the time derivative of electricfieldis approximated by the central difference,thatis(5)As for the electricfield in the second term of(3),it can be for-mulated by the Newmark–Beta scheme[16]to be readas(6)Fig.5.Simulationflowchart of hybrid FETD and FDTD techniques to performthe SI/PI co-analysis for the coupled-via structure as illustrated in Fig.1.Moreover,in the triangular elements with the via transitioninside,the term in(3)as expressedbygridarea(7)is needed to serve as the excitation of the parallel-plate structurewith thecurrent shown in Fig.3through the via structurebetween Layers2and3.It is worth noting that the via transitionshould be placed on the bary-center of each triangular elementto achieve better accuracy.The hand-over scheme for thefield in the overlapped region ofFDTD and FETD can be depicted in Fig.5.Given the boundaryfield calculated by the FDTD algorithm at the timestep,all thefield in the FETD region can be acquiredthrough the matrix solution of(3).The SSNvoltage in Fig.3is then determinedby(8)where is the averaging value of nodal electric-fieldsenclosing the via transition,and is the separation between theplanes.Onceand at the FETD mesh nodes(node1,2,3,and4in Fig.4)become available,together with the ob-tained voltage/current values from the circuit solver and electric/magneticfields of the FDTD region,the hybrid time-marchingscheme for the next time step can be implemented and so on.As a result of using the integrated schemes,thecurrent,arisen from the input signal through the via structure,can havethe ability to induce the voltage noise propagating within theFig.6.Physical dimensions of coupled traces and via pair.(a)Top view (Unit =mil ).(b)Side view.parallel plates.After a period of time,owing to the plane reso-nance and return path,the induced noise will cause the unwanted voltage fluctuation on the coupled traces by the presence of the finite SSNvoltage .C.Stability Problem and Computational Complexity It is not dif ficult to manifest that the FETD algorithm is un-conditionally stable.Substituting (5),(6),and (7)into (3)yields the following differenceequation:(9)where(10)the superscript “1”denotes the matrix inverse and thefactorgridareaWithout loss of generality,the time-stepping scheme in (9)is restatedas(11)Applyingthe -transform technique to (11)and solvingfor,de fined asthe -transformof ,the resultreads(12)along with thedependent ,de fined asthe -transformof in (11).Regardless of the timestep ,it can be easily de-duced that the poles of (12)is just on the unit circleof plane.This proves that the time marching by (9)is absolutely stable.The stability condition of these hybrid techniques is thus gov-erned by the transmission-line theory and the FDTD algorithm in the regular region,which are already known.Concerning the computational complexity,because of the consistence of simulation engines used for the circuitsolver,parison of differential-mode S -parameters from HFSS simulation and the equivalent circuit as depicted in Fig.3.the only work is to compare the ef ficiency of the hybrid FETD/FDTD technique with that of the traditional FDTD method.In use of only the FDTD scheme for cell discretization,the grid size should be chosen at most the spacing between the adjacent via transitions.However,as depicted in Fig.4,the hybrid techniques adopting the FEM mesh for the source region exhibit the great talent to segment the whole plane with the coarser FDTD grids.Owing to the sparsity of the FETD matrices in (4)and the much smaller number of unknowns,the computational time needed for each FETD operation can be negligible.The complexity of the hybrid techniques is therefore dominated by the FDTD divisions in the regular region.It is ev-ident that the total simulation time of the 2-D FDTD algorithmis,where denotes the number of the division in the whole space [7].The coarser the FDTD grids,the smaller the number of the grids and unknowns.Hence,the present hybrid techniques can preserve high accuracy without sacri ficing the computational ef ficiency.III.N UMERICAL R ESULTSA.Coupled via TransitionConsider the geometry in Fig.1but with the coupled-via structure being 2cm away from the center of parallel plates,which is set as the origin ofthe–plane.The size of the plane is1010cm and the separation between the two metal planes is 20mils(0.05cm).The physical dimensions of the coupled traces and via pair are depicted in Fig.6.After extractingthe -parameters from the full-wave simulation,their equivalent circuit models of coupled-via structures as sketched in Fig.3can be thus constructed.In Fig.7,it is found that the differen-tial-mode -parameters of equivalent circuit models are in good agreement with those from the HFSS simulations [14]and the extracted parasitic values of inductive and capacitive lumped-el-ements are also listed in the attached table.The top-layer coupled traces are driven by differential Gaussian pulses with the rise time of 100ps and voltage ampli-tude of 2V while the traces are terminated with the matchedFig.8.Simulated TDR waveforms on the positive-signaling trace.(a)Late-time response for the signal skew of 10ps excluding the multire flection phe-nomenon of common-mode signal.(b)Late-time response while no signal skew.TABLE IC OMPARISON OF C OMPUTATIONAL C OMPLEXITY B ETWEEN THE T WO M ETHODS(T IME D URATION =2:5ns)(CPU:Intel P43.0GHz,RAM:2GHz)loads at their ends.For simplicity,the transmission-line losses are not considered in the following analyses for the transient responses.By using the same mesh discretization as illustrated in Fig.4,the resultant segmentation for the plane con fines the flexible FEM mesh in the vicinity of via transitions and the coarser FDTD division with the size of22mm elsewhere.Employing the perfect magnetic conductors for boundary conditions of the parallel-plate structure,the simulated TDR waveforms with and without the signal skew on the posi-tive-signaling trace are presented in Fig.8.In comparison of hybrid FETD/FDTD techniques and finer FDTD method with center-to-center via spacing(0.66mm)as the grid size,the simulation results are in good agreement.Note that the voltage fluctuation before 900ps is induced by the incident signal passing through the coupled-via structure while the occurrence of late-time response is accompanied by the parallel-plate resonances.As for the signal skew of 10ps,the voltage level of late-time response is found to be greater than that of no signal skew because of the existence of common-mode currents produced by the timing skew of differential signals.Moreover,the simulation time of both methods should be pro-portional to the number of grids multiplied by the total time steps.As the physical time duration is fixed,the decrease of the FDTD division size would correspond to the increase of thetotalFig.9.Parallel plane with three current sources inside.(a)3-D view.(b)Zoom-in view of three sources on the plane in (a).(c).FETD/FDTD meshdiscretization.Fig.10.Simulated noise waveforms at the preallocated probe in reference to Fig.9(a).time steps.Consequently,as shown in Table I,it is demonstrated that the computational ef ficiency of the hybrid techniques is in-deed much better than that of the finer FDTD method.B.Multiple Source TransitionIn addition to a pair of differential-via structure,there can be a group of signaling vias distributed in the various regions of planes.Considering the parallel-plate structure in Fig.9(a),three current sources are distributed around the center (0,0)and a probe is located at (1mm,9mm)to detect the voltage noise induced on the planes.The FEM meshes for the source region and the interface with the FDTD region are shown inFig.11.Parallel-plate structure with two differential pairs of current sources inside in reference to Fig.9(a).(a)Two differential pairs of sources on the plane in Fig.9(a).(b)FETD/FDTD meshdiscretization.parison of the simulated noise waveforms between three cases of differential-sources on the plane as in Fig.9(a).Fig.9(c).The current sources are Gaussian pulses with the rise time of 100ps and different current amplitudes of 0.5,0.25,and 0.3A.With the same settings of boundary conditions,the simulated voltage noise waveforms at the preallocated probe re-ferred to Fig.9(a)are presented in Fig.10.It is indicated that the hybrid FETD/FDTD techniques still reserves the great accuracy in predicting the traveling-wave behavior of plane noise.In the modern digital systems,many high-speed devices employ the multiple differential-traces for the purpose of data transmission.These traces are usually close to each other and may simultaneously penetrate the multilayered planes through via transitions.Hence,it is imperious for engineers to know how to realize the best power integrity by suitably arranging the positions of differential vias.Reconsidering the parallel plates in Fig.9(a),instead,two dif-ferential-current sources around the center and the probe is re-located at (25mm,25mm)as shown in Fig.11along with their corresponding mesh pro file.After serving for the same Gaussian pulses as input signals,the simulated waveformsatFig.13.At time of 400ps,the overall electric-field patterns of three cases of differential-source settings in reference to Fig.12.(a)Case 1:one pair of dif-ferential sources.(b)Case 2:two pairs of differential sources with the same polarity.(c)Case 3:two anti-polarity pairs of differential sources.the probe are presented in Fig.12while three cases of source settings are pared with the noise waveform of one pair of differential sources,the signal allocations of mul-tiple differential-sources diversely in fluence the induced voltage noise.For the more detailed understanding,Fig.13displays the overall electric-field patterns at the time of 400ps for three casesFig.14.Speci fications and measurement settings of test board.(a)Top view.(b)Sideview.parisons between the simulated and measured waveforms at both the TDR end and the probe as in Fig.14.(a)The TDR waveforms.(b)The waveforms at the probe.of differential-source settings on the plane.Note that the out-ward-traveling electric field of Case 3(the differential-sources with antipolarity)is the smallest fluctuation since the appear-ance of two virtual grounds provided by the positive-and-nega-tive polarity alternates the signal allocation.IV .E XPERIMENTAL V ERIFICATIONIn order to verify the accuracy of hybrid techniques,a test board was fabricated and measured by TEK/CSA8000B time-domain re flectometer.The designed test board comprises the single-ended and differential-via structures,connecting with the corresponding top-and bottom-layer traces.The design speci fi-cations and measurement settings of test board are illustrated in Fig.14.To perform the time-domain simulation,the launching voltage sources are drawn out of re flectometer.As thedrivingFig.16.Frequency-domain magnitude of the probing waveforms corre-sponding to Fig.15(b)and the plane resonances.signals pass through the differential vias,the parallel-plate structure is excited,incurring the SSN within the ter,the quiet trace will suffer form this voltage noise through the single-ended via transition.After extracting the equivalent circuit models of coupled-via structures and well dividing the parallel plates,the SI/PI co-analysis for test board can be achieved.Simulation results are compared with the measure-ment data as shown in Fig.15accordingly.As observed in Fig.15(a),the differential signals have the in-ternal skew of about 30ps and the bulgy noise arising at about 500ps is due to the series-wound connector used in the measure-ment.The capacitive effect of via discontinuities is occurred at about 900ps,while the deviations between the simulation and measurement are attributed to the excessive high-frequency loss of input signals.For the zoom-in view of probing waveforms as in Fig.15(b),it is displayed that the comparison is still in good agreement except for the lossy effect not included in the time-domain simulation.Applying the fast Fourier transform,the frequency-domain magnitude of probing waveforms is ob-tained in Fig.16.In addition to the similar trend of time-domain simulation and measurement results,the peak frequencies cor-respond to the parallel-plate resonances of test board exactly.Hence,the exactitude of the proposed hybrid techniques can be veri fied.V .C ONCLUSIONA hybrid time-domain technique has been introduced and applied successfully to perform the SI/PI co-analysis for the differential-via transitions in the multilayer PCBs.The signalpropagation on the differential traces is characterized by the known telegrapher’s equations and the parallel-plate structure is discretized by the combined FETD/FDTD mesh schemes.The coarser FDTD segmentation for most of regular regions inter-faces with an unconditionally stable FETD mesh for the local region having the differential-via transitions inside.In use of hybrid techniques,the computational time and memory requirement are therefore far less than those of a traditional FDTD space with thefiner mesh resolution but preserve the same degrees of numerical accuracy throughout the simulation.In face of the assemblages of multiple signal transitions in the specific areas,the hybrid techniques still can be adopted by slightly modifying the mesh profiles in the local FETD re-gions.Furthermore,the numerical results demonstrate that the best signal allocation for PI consideration is positive-and-nega-tive alternate.Once the boundary conditions between the FETD and FDTD regions are well defined,it is expected that the hy-brid techniques have a great ability to deal with the more real-istic problems of high-speed interconnect designs concerned in the signal traces touted through the multilayer structures.R EFERENCES[1]K.S.Yee,“Numerical solution of initial boundary value problemsinvolving Maxwell’s equations in isotropic media,”IEEE Trans.Antennas Propag.,vol.AP-14,no.3,pp.302–307,May1966.[2]K.S.Kunz and R.J.Luebbers,The Finite Difference Time DomainMethod for Electromagnetics.Boca Raton,FL:CRC,1993,ch.2,3.[3]S.V.Georgakopoulos,R.A.Renaut,C.A.Balanis,and C.R.Birtcher,“A hybrid fourth-order FDTD utilizing a second-order FDTD subgrid,”IEEE Microw.Wireless Compon.Lett.,vol.11,no.11,pp.462–464,Nov.2001.[4]M.F.Hadi and M.Piket-May,“A modified FDTD(2,4)scheme formodeling electrically large structures with high-phase accuracy,”IEEETrans.Antennas Propag.,vol.45,no.2,pp.254–264,Feb.1997.[5]A.R.Bretones,R.Mittra,and R.G.Martin,“A hybrid technique com-bining the method of moments in the time domain and FDTD,”IEEEMicrow.Guided Wave Lett.,vol.8,no.8,pp.281–283,Aug.1998.[6]A.Monorchio,A.R.Bretones,R.Mittra,G.Manara,and R.G.Martin,“A hybrid time-domain technique that combines thefinite element,fi-nite difference and method of moment techniques to solve complexelectromagnetic problems,”IEEE Trans.Antennas Propag.,vol.52,no.10,pp.2666–2674,Oct.2004.[7]R.-B.Wu and T.Itoh,“Hybridfinite-difference time-domain modelingof curved surfaces using tetrahedral edge elements,”IEEE Trans.An-tennas Propag.,vol.45,no.8,pp.1302–1309,Aug.1997.[8]D.Koh,H.-B.Lee,and T.Itoh,“A hybrid full-wave analysis of via-hole grounds usingfinite-difference andfinite-element time-domainmethods,”IEEE Trans.Microw.Theory Tech.,vol.45,no.12,pt.2,pp.2217–2223,Dec.1997.[9]S.Chun,J.Choi,S.Dalmia,W.Kim,and M.Swaminathan,“Capturingvia effects in simultaneous switching noise simulation,”in Proc.IEEEpat.,Aug.2001,vol.2,pp.1221–1226.[10]J.-N.Hwang and T.-L.Wu,“Coupling of the ground bounce noise tothe signal trace with via transition in partitioned power bus of PCB,”in Proc.IEEE pat.,Aug.2002,vol.2,pp.733–736.[11]J.Park,H.Kim,J.S.Pak,Y.Jeong,S.Baek,J.Kim,J.J.Lee,andJ.J.Lee,“Noise coupling to signal trace and via from power/groundsimultaneous switching noise in high speed double data rates memorymodule,”in Proc.IEEE pat.,Aug.2004,vol.2,pp.592–597.[12]S.-M.Lin and R.-B.Wu,“Composite effects of reflections and groundbounce for signal vias in multi-layer environment,”in Proc.IEEE Mi-crowave Conf.APMC,Dec.2001,vol.3,pp.1127–1130.[13]“Simulation Package for Electrical Evaluation and Design(SpeedXP)”Sigrity Inc.,Santa Clara,CA[Online].Available:[14]“High Frequency Structure Simulator”ver.9.1,Ansoft Co.,Pittsburgh,PA[Online].Available:[15]J.Jin,The Finite Element Method in Electromagnetics.New York:Wiley,1993,ch.12.[16]N.M.Newmark,“A method of computation for structural dynamics,”J.Eng.Mech.Div.,ASCE,vol.85,pp.67–94,Jul.1959.Wei-Da Guo was born in Taoyuan,Taiwan,R.O.C.,on September25,1981.He received the B.S.degreein communication engineering from Chiao-TungUniversity,Hsinchu,Taiwan,R.O.C.,in2003,andis currently working toward the Ph.D.degree incommunication engineering at National TaiwanUniversity,Taipei,Taiwan,R.O.C.His research topics include computational electro-magnetics,SI/PI issues in the design of high-speeddigitalsystems.Guang-Hwa Shiue was born in Tainan,Taiwan,R.O.C.,in1969.He received the B.S.and M.S.de-grees in electrical engineering from National TaiwanUniversity of Science and Technology,Taipei,Taiwan,R.O.C.,in1995and1997,respectively,and the Ph.D.degree in communication engineeringfrom National Taiwan University,Taipei,in2006.He is a Teacher in the Electronics Depart-ment of Jin-Wen Institute of Technology,Taipei,Taiwan.His areas of interest include numericaltechniques in electromagnetics,microwave planar circuits,signal/power integrity(SI/PI)and electromagnetic interference (EMI)for high-speed digital systems,and electrical characterization ofsystem-in-package.Chien-Min Lin(M’92)received the B.S.degreein physics from National Tsing Hua University,Hsinchu,Taiwan,R.O.C.,the M.S.degree in elec-trical engineering from National Taiwan University,Taipei,Taiwan,R.O.C.,and the Ph.D.degree inelectrical engineering from the University of Wash-ington,Seattle.He was with IBM,where he worked on the xSeriesserver development and Intel,where he worked onadvanced platform design.In January2004,he joinedTaiwan Semiconductor Manufacturing Company, Ltd.,Taiwan,as a Technical Manager in packaging design and assembly vali-dation.He has been working on computational electromagnetics for the designs of microwave device and rough surface scattering,signal integrity analysis for high-speed interconnect,and electrical characterization ofsystem-in-package.Ruey-Beei Wu(M’91–SM’97)received the B.S.E.E.and Ph.D.degrees from National Taiwan Univer-sity,Taipei,Taiwan,R.O.C.,in1979and1985,respectively.In1982,he joined the faculty of the Departmentof Electrical Engineering,National Taiwan Univer-sity,where he is currently a Professor and the De-partment Chair.He is also with the Graduate Instituteof Communications Engineering established in1997.From March1986to February1987,he was a Vis-iting Scholar at the IBM East Fishkill Facility,NY. From August1994to July1995,he was with the Electrical Engineering Depart-ment,University of California at Los Angeles.He was also appointed Director of the National Center for High-Performance Computing(1998–2000)and has served as Director of Planning and Evaluation Division since November2002, both under the National Science Council.His areas of interest include computa-tional electromagnetics,microwave and millimeter-wave planar circuits,trans-mission line and waveguide discontinuities,and interconnection modeling for computer packaging.。
用于集成电路信号完整性分析的仿真方法摘要:随着集成电路技术的飞速进步,信号完整性分析变得越来越重要。
信号完整性分析是指为保证信号在设计预期的时间内到达目标点并保持一定的质量的过程。
为了达到这个目标,需要对电路中的信号进行仿真分析,以发现和解决潜在的信号完整性问题。
本文介绍了现代集成电路信号完整性分析的观点和仿真方法,包括电源噪声分析、阻抗匹配与反射分析、时序分析等。
同时,本文还简要探讨了仿真工具的应用和通用电路设计流程。
关键词:集成电路;信号完整性;仿真方法;电源噪声;阻抗匹配;反射分析;时序分析;仿真工具;通用电路设计流程。
I. 前言随着集成电路技术的不息进步,目前的芯片集成度已高达几十亿个,更多的器件被集成在一个芯片上。
在此背景下,当信号在IC晶片上传播时,信号完整性的问题变得越来越重要。
信号完整性意味着信号在设计预期的时间内到达目标点并保持一定的质量。
实现这个目标需要进行电路参数仿真,以确保在设计中不会出现潜在的信号完整性问题。
本文将介绍,这些方法包括电源噪声分析、阻抗匹配与反射分析、时序分析等。
本文将还将简要讲解仿真工具的应用和通用电路设计流程。
II. 信号完整性观点信号完整性是指保证信号在设计预期的时间内到达目标点并保持一定的质量的过程。
信号完整性是集成电路设计的重要思量因素之一,因为信号完整性问题的出现可能会使电路失效,导致重大影响。
当信号在IC晶片上传播时,一些传输媒介效应、耦合效应、意外反射和其他一些信号完整性问题往往会导致信号完整性失效。
III.随着集成电路技术的不息进步,信号完整性分析的仿真方法也越来越成熟。
下面将介绍现代集成电路信号完整性分析的主要仿真方法。
1. 电源噪声分析电源噪声是指由于电源电压的不纯净引起的电路中的噪声。
在IC设计中,电源噪声可能会对信号完整性产生多种不良影响,例如振荡、时序偏移、电压饱和等。
为了检测和纠正这些问题,需要进行电源噪声仿真分析。
2. 阻抗匹配与反射分析阻抗匹配和反射分析是集成电路设计中分外重要的模拟分析方法。
集成电路设计中的信号完整性集成电路(IC)设计是现代电子工程的核心。
随着技术的进步,集成电路的复杂性不断增加,这给信号完整性(SI)带来了更大的挑战。
信号完整性是指信号在传输过程中保持其完整性和正确性的能力。
在集成电路设计中,信号完整性是一个至关重要的因素,因为它直接影响到系统的性能和可靠性。
信号完整性问题的产生信号完整性问题的产生主要是由于集成电路中的传输线路特性以及电磁干扰。
传输线路的特性会导致信号在传输过程中发生失真,而电磁干扰则会引起信号的噪声。
这些失真和噪声会影响到信号的质量和性能。
传输线路特性集成电路中的传输线路主要包括导线和连接器。
这些传输线路的特性会影响信号的传输。
例如,导线的电阻会导致信号的延迟,而导线的电感会导致信号的衰减。
此外,传输线路的阻抗不匹配也会引起信号的反射和衰减。
电磁干扰电磁干扰是指外部电磁场对信号的影响。
在集成电路中,电磁干扰主要来自于电源线、信号线和其他电子元件。
电磁干扰会引起信号的噪声,从而影响信号的质量和性能。
信号完整性分析的方法为了确保信号完整性,集成电路设计人员需要进行信号完整性分析。
信号完整性分析主要包括时域分析和频域分析两种方法。
时域分析时域分析是一种基于时间的方法,用于分析信号在时间上的行为。
时域分析的主要工具是示波器和信号分析仪。
通过时域分析,设计人员可以观察信号的波形,从而确定信号是否发生了失真或噪声。
频域分析频域分析是一种基于频率的方法,用于分析信号在频率上的行为。
频域分析的主要工具是频谱分析仪。
通过频域分析,设计人员可以确定信号的频率成分,从而确定信号是否受到了电磁干扰。
信号完整性设计原则为了确保信号完整性,集成电路设计人员需要遵循一些基本的设计原则。
最小化导线长度导线长度是影响信号传输延迟和衰减的主要因素。
因此,设计人员应该尽量减少导线的长度,以降低信号传输的延迟和衰减。
匹配阻抗为了减少信号的反射和衰减,设计人员应该确保传输线路的阻抗与信号源和负载的阻抗相匹配。
基于LVDS电路的电源完整性分析邢荣峰摘要:如果PCB电路的故障是由电源完整性方面的问题引起的,那么对该PCB电路的调试将非常困难,且其故障很难定位。
通过电源完整性仿真可以很方便地寻找其问题所在。
以LVDS传输电路为例,阐述了分析频段的确定方法,进行了谐振分析和阻抗分析,查明了设计存在的问题。
关键词:谐振分析;阻抗分析;分析频段电源配送网络(Power Delivery Network,PDN)与印制线路板(Printed Circuit Board,PCB)上的各种器件都有着直接的连接关系,设计不合理的PDN系统会给PCB电路带来致命的隐患[1]。
通过电源完整性(Power Integrity,PI)仿真,可以查明PDN系统中潜在的问题,达到降低研发成本、缩短设计周期的目的。
1电源完整性PI指的是电源波形的质量,它与信号完整性(Signal Integrity,SI)相互影响相互制约。
从广义上来说,PI属于SI研究范畴之内,新一代的信号完整性分析必须建立在可靠的电源完整性分析的基础上[2]。
PI主要研究的对象是PDN。
PDN是电路系统中最复杂的互连结构,它的作用主要包含两个方面:1)为负载提供干净的供电电压;2)为信号提供低噪声的返回路径[3]。
如何保证PDN系统满足负载芯片对电源的要求,就是PI所要解决的问题。
PI仿真则是提高PDN系统设计质量的有效手段。
2分析频段选择PCB电路包含各种各样的信号,从直流到交流,从低频到高频,这些信号都携带着丰富的频率分量。
对信号进行描述时通常会用到两个重要的量:上升沿和带宽。
上升沿指的是信号从低电平跳变到高电平所用的时间,通常采用10%~90%上升沿来定义。
带宽则是个经验法则,用来描述信号频谱中最高有效谐波频率,一般高于带宽的谐波分量都不必考虑其影响。
对于信号带宽的定义方式多种多样,常见的有3dB带宽f3dB=0.35/tr和等效噪声带宽fRMS=0.5/tr,其中tr表示信号的10%~90%上升沿,单位为ns[3]。
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