NUIM-CS-TR-2004-05 An Introduction to NS, Nam and OTcl scripting

The Motor Industry Software Reliability AssociationMISRA-C-:2004 Guidelinesfor the useof theC languagein critical systems 中文版1背景 —— C的使用和问题 (3)1.1汽车工业中C的使用 (3)1.2语言的不安全性和C语言 (3)1.3安全相关系统中C的使用 (4)1.4标准化 (5)2MISRA-C：视野 (6)2.1MISRA-C的发布说明 (6)2.2MISRA-C的目标 (6)3MISRA-C：范围 (7)3.1基本的语言问题 (7)3.2未指出的问题 (7)3.3可应用性 (7)3.4预备知识 (7)3.5C++问题 (7)3.6自动产生代码的问题 (8)4使用MISRA-C (9)4.1软件工程环境 (9)4.2编程语言和编码环境 (9)4.3采用子集（subset） (11)4.4符合性声明（Claiming compliance） (13)4.5持续改进 (13)5规则简介 (14)5.1规则分类 (14)5.2规则的组织 (14)5.3规则的冗余 (14)5.4规则的形式 (14)5.5理解原始参考 (15)5.6规则的范围 (17)6规则 (18)6.1环境 (18)6.2语言扩展 (19)6.3文档 (19)6.4字符集 (21)6.5标识符 (21)6.6类型 (23)6.7常量 (24)6.8声明与定义 (25)6.9初始化 (27)6.10数值类型转换 (27)6.11指针类型转换 (36)6.12表达式 (37)6.13控制语句表达式 (43)6.14控制流 (45)6.15switch语句 (48)6.16函数 (50)6.17指针和数组 (51)6.18结构与联合 (54)6.19预处理指令 (57)6.20标准库 (62)6.21运行时错误 (64)7References (66)Appendix A: Summary of rules (68)Appendix B：MISRA-C :1998 到 MISRA-C :2004 规则映射 (74)Appendix C:MISRA-C:1998 – 已废除的规则 (81)Appendix D：ISO标准交互参考 (82)Appendix E : 术语表 (85)1背景——C的使用和问题1.1 汽车工业中C的使用MISRA-C:1998 [1] 发布于1998年。

2021 1st Online Workshop Practice for Very Beginner –Get Started by Quick StartSuyuMarch, 2021Agenda•NuMicro® Ecosystem•Nuvoton Golden 3 Steps•NuMaker Board Unboxing & Introduction •Practice for Very Beginner –Get Started by Quick Start •SummaryNuMicro® EcosystemDevelopment Platform Digital PlatformNuMicro ®Ecosystem –Detailed ViewNuMicro Microcontroller PlatformIoT PlatformAndroid APP iOS APPReference Design PlatformDALIBMSHMIIIoT GatewayThermostat…GUI Platform8051 / M0 / M23 / M4 / Arm9 based MicrocontrollerAlibaba CloudProduct Information / Documents / SelectionEvaluation Board NuMaker Series / NuTiny SeriesDebugger & ProgrammerNu-Link / Nu-Link-Pro / Nu-Link2-ProNu-Link-GangPinView / PinConfig / ClockConfig ICP Programming ISP ProgrammingSoftware Tool BSPMCU BSP / Linux BSPSample Code NuCodeGenGithub / Gitlab / GiteeIDENuEclipse•Sample & Buy:Nuvoton Direct / TechDesign / DigiKey / Tmall •Online Support : NuForum / Sales Support Mailbox / Online Chat•Social Media & Knowledge Base : LinkedIn / Facebook / Twitter / WeChat •Video Platform : YouTube Channel / Tencent Video Channel / bilibiliNuvoton Golden 3 StepsGolden 3 Steps2 Mass Production3 Upgrade1DevelopmentGolden 3 Steps -DevelopmentGolden 3 Steps Nu-LinkUSBDebugger &ProgrammerIDEBSPNuTool+PinViewPinConfig.NuMaker1DevelopmentGolden 3 Steps -DevelopmentSoftware Tools -PinConfigure/ PinView‐PinConfigure: GraphicalI/O setting‐PinView:Real-time I/OmonitoringIntegrated Development Environment (IDEs)‐Arm Keil MDK ‐IAR EWARM ‐NuEclipseNu-LinkDebugger & Programmer‐Nu-Link2-Pro/Nu-Link-Pro ‐Nu-Link2-Me/Nu-Link-Me ‐Nu-Link-GangBoard Supporting Package (BSPs)‐Comprehensive drivers ‐Plentiful peripheral examplesEvaluation Boards‐IC Target Board ‐On-board Nu-LinkDebugger & Programmer(Nu-Link2-Me/Nu-Link-Me)‐On-board USB Connector‐QuickStart LinkTools for Development StepBSPNuMaker Board UnboxingNuMaker Board UnboxingBuy OnlineNuMaker-M032SE (NK-M032SE)NuMaker Board IntroductionNuMaker-M032SE (NK-M032SE)M032SE3AENu-Link2-MeRESETAMMETERLEDHXTLXTUSBNuMaker Board IntroductionNuMaker-M032SE (NK-M032SE)Extension ConnectorCompatible with Arduino UNO1122NuMaker Board IntroductionNuMaker-M032SE (NK-M032SE)Power Supply1123344SWITCHICEJPR1Nu-Link2-Me (Rear)2User ManualPractice for Very Beginner –Get Started by Quick StartBased on M032Get Started by Quick StartNuMaker BoardQuick Start StepsTerminal EmulatorDownloadIDE InstallationNu-Link Driver InstallationBSP PreparationHardware Setup Sample Code in BSPProject ExecutionResultQuick Start –Step 0Terminal Emulator DownloadPuTTYAn open source SSH and telnet Client for the Windows platform.Download –“putty.exe”.https:///KEIL MDK Nuvoton edition M0 / M23Works with Nuvoton devices based on the Arm Cortex-M0 /M23 with a free-to-use professional tool. Download and Install.https:///nuvoton/M0-M23Video Instruction (CN)(EN)–Download and Install KEILQuick Start –Step 1IDE Installation1)Enter Contact Information 2)Download and Install 3)Get and Add LicenseQuick Start –Step 2Nu-Link Driver InstallationNu-Link DriverNuMaker Board has an on-board Nu-Link Debugger & Programmer.Download and Install.Nu-Link_Keil_DriverVideo Instruction (CN)(EN)–Download and Install Nu-Link KEIL DriverQuick Start –Step 3BSP PreparationBSPContains comprehensive drivers and plentiful peripheral examples.Download and Unzip.Software and Tool -> BSP; Quick Start Step3Nuvoton GitHubVideo Instruction (CN)(EN)–Board Support PackageHardware Setup1)Switch VCOM No.1 and No.2 ON.2)Connect the ICE USB connector tothe PC USB port.3)Check “Nu -Link2 Virtual COM Port”at Device Manager.Quick Start –Step 4Hardware Setup12Quick Start –Step 5Sample Code in BSPSample Code in BSPFile Path‒M031_Series_BSP_CMSIS_Vx.xxxxx‒SampleCode‒Template‒KeilProject ”Template”Open and Execute.1)Rebuild2)Successfully Compiled 3)DownloadUser Manual –Chapter 3.6Quick Start –Step 6Project Execution123Result in Terminal WindowTerminal Emulator Setup & Check the Result 1)Connection Type: Serial2)Serial Line: COM# in Device Manager 3)Speed: 1152004)Open Terminal Window.5)ResultQuick Start –Step 7Result1234SummarySummaryNuTool+PinViewPinConfig.Nu-LinkUSBDebugger & ProgrammerIDEBSPNuMaker1DevelopmentIDE InstallationNu-Link Driver InstallationBSP PreparationHardware SetupSample Code inBSPProject ExecutionResultQ&ATips填問卷抽Nu-Link2-Pro ($149USD)回卷者可抽Nu-Link2-Pro *1網路研討會限定NuMaker-M032SE一折開發板折扣碼：NEWJoeJoe HowardSUYULV.99LV.800LV.1Quick Start PinConfig(5min)PinView(5min)Q&AQuick Start PinConfig(5min)PinView(5min)Q&A軟體開發工具介紹PinConfigureSHEEPLV.999Quick Start PinConfig(5min)PinView(5min)Q&A軟體開發工具介紹PinViewDereCkLV.999JoeHowardLV.99LV.800LV.1Q&AJoeSUYUhttps://mcu.pse.is/M032SE一折NuMaker-M032SE (NK-M032SE)填問卷抽Nu-Link2-Pro ($149USD)DebuggerSWD/ETM interface ETM trace speed up to 96 MHzUnlimited breakpointStep(s) executionSupport CMSIS-DAP ProgrammerIn-circuit Programming (ICP)In-system Programming (ISP)PC control and stand-alone ICP/ISP Automated Programmer header External storage for stand alone ICP/ISP: SD Card, SPI Flash, USB DiskBridgeISP via multi-path bridge (USB, I2C, SPI, CAN, UART, RS-485) PC control and stand-alone ISP Virtual COM portAnalyzer I2C, SPI, UART, RS-485, CANPulse CaptureADC Conversion Webinar結束後系統會自動跳轉至問卷頁面，回卷者可抽Nu-Link2-Pro*1。

USER GUIDENI SMA-2164/2165 Test Fixture Differential Digital I/O AccessoryThe NI SMA-2164/2165 test fixture is a breakout box for National Instruments differential digital waveform generator/analyzer modules, arbitrary waveform generators, andNI FlexRIO™ adapter modules. This fixture provides an easy way to connect to other devices for testing and debugging.The NI SMA-2164 is intended for use with devices with a matching Infiniband connector such as NI6561/6562 modules, NI6583 adapter modules, and NI6587 adapter modules.The NI SMA-2165 is intended for use with devices with matching VHDCI connectors such as NI5421 modules and NI6585 adapter modules. The NI SMA-2164/2165 may be compatible with other NI modules depending on the connector type and pinout.This guide explains how to set up and use the NI SMA-2164/2165 test fixture. Contents Conventions (2)What You Need to Get Started (3)Related Documentation (3)Parts Locator (4)Installing Cables (6)Connecting Signals (7)Using SMA Connectors (12)Making a Solder Connection (13)Terminating Signals (15)Minimizing the Effects of Stubs (15)Differentially Terminating DIO and Control Signals (15)Using the Prototyping Area (15)Prototyping Circuits (16)Cleaning the Accessory (16)Specifications (17)Where to Go for Support (18)NI SMA-2164/2165 User Guide ConventionsThe following conventions are used in this manual:<>Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name—for example, DIO <0..3>.»The » symbol leads you through nested menu items and dialog box options to a final action. The sequence Options»Settings»General directs you to pull down the Options menu, select the Settings item, and select General from the last dialog box.This icon denotes a note, which alerts you to important information.This icon denotes a caution, which advises you of precautions to take to avoid injury, data loss, or a system crash. When this symbol is marked on a product, refer to the Specifications section for information about precautions to take.boldBold text denotes items that you must select or click in the software, such as menu items and dialog box options. Bold text also denotes parameter names.italicItalic text denotes variables, emphasis, a cross-reference, or an introduction to a key concept. Italic text also denotes text that is a placeholder for a word or value that you must supply.monospaceText in this font denotes text or characters that you should enter from the keyboard, sections of code, programming examples, and syntax examples. This font is also used for the proper names of disk drives, paths, directories, programs, subprograms, subroutines, device names,functions, operations, variables, filenames, and extensions.What You Need to Get StartedTo set up and use the NI SMA-2164/2165, you need the following items:❑(NI SMA-2164 only) NI SHB12X-B12X LVDS cable assembly❑(NI SMA-2165 only) NI SHC68-C68-D3 cable assembly❑Compatible NI digital waveform generator/analyzer, NI FlexRIO adapter module, or other NI device installed in a PXI or CompactPCI chassisYou also may need the following optional items:❑SMA cables❑Resistors for termination or characterization. The NI SMA-2164/2165 ships populated with 0Ω resistors.❑The documentation included with the digital waveform generator/analyzer and driver softwareRelated DocumentationRefer to the documentation set for the device that you are connecting to the NI SMA-2164/2165 for more information. Documentation is available at /manuals and in your hardware kit.© National Instruments Corporation3NI SMA-2164/2165 User GuideNI SMA-2164/2165 User Guide Parts LocatorRefer to Figure 1 to locate connectors and components on the NI SMA-2164.Figure 1. NI SMA-2164 Parts Locator Diagram173-Pin Infiniband Connector 2SMA Connector 3Solder Pads4Resistor Network5Area Enlarged in Figure 86Solder Pads 7Labeling Strips© National Instruments Corporation 5NI SMA-2164/2165 User GuideRefer to Figure 2 to locate connectors and components on the NI SMA-2165.Figure 2. NI SMA-2165 Parts Locator Diagram168-Pin VHDCI Connector 2SMA Connector 3Solder Pads4Resistor Network 5Solder Pads 6Labeling StripsNI SMA-2164/2165 User Guide 6Installing CablesThe NI SHB12X-B12X LVDS cable is designed for use with the NI SMA-2164 and the NI SHC68-C68-D3 cable is designed for use with the NI SMA-2165. Figure 3 shows how to connect either of these cables to another NI device.Figure 3. Connecting a Device to the NI SMA-2164/2165Refer to Figure 3 as you complete the following steps to install the NI SHB12X-B12X LVDS or the NI SHC68-C68-D3 cable.CautionDisconnect power from the device, accessory, and any other connectedhardware before connecting the cable to prevent damage to the hardware and personal injury. NI is not liable for damage resulting from improper connections.1.Install the driver software for your device using the installation instructions available with your device.NoteAlways install the module in a computer or PXI/CompactPCI chassis before attaching any cables or accessories. Refer to your device documentation for instructions on installing the module.1An NI Device Installed in a PXI Chassis2NI SHB12X-B12X LVDS or NI SHC68-C68-D3 Cable3NI SMA-2164/2165© National Instruments Corporation 7NI SMA-2164/2165 User Guide2.Attach either end of the NI SHB12X-B12X LVDS or the NI SHC68-C68-D3 cable to the appropriate connector on your other NI device and secure the cable with the captive screws on the cable connector.NotesDo not use cables other than the NI SHB12X-B12X LVDS cable with theNI SMA-2164, and do not use cables other than the NI SCH68-C68-D3 cable with the NI SMA-2165. NI is not liable for any damage resulting from improper cable connections.3.Attach and secure the other end of the NI SHB12X-B12X LVDS or the NI SHC68-C68-D3 cable to the connector on the NI SMA-2164 or NI SMA-2165, respectively, and secure them together with the captive screws on the cable connector, as shown in Figure 3.Connecting SignalsEach DIO, PFI, and clock channel on your connected NI device corresponds to a specific pin on the NI SMA-2164/2165. Most channels are routed differentially to high-bandwidth SMA connectors, but some channels may be used for other purposes depending on your NI device. Refer to you device documentation for more information.You can make connections to the DIO, PFI, or clock channels on the NI SMA-2164/2165 using an SMA coaxial cable or by soldering directly to the inline circuits. Examples of how to make these connections are provided in the following sections.CautionBefore powering down the chassis, remove power from the prototyping areaof the NI SMA-2164/2165. NI is not liable for any damage resulting from improper signal connections.CautionConnections that exceed any of the maximum ratings for theNI SMA-2164/2165 or the connected NI device can damage the module and the computer. Maximum input ratings are provided in the Specifications section and in the specifications document that shipped with the other NI device. NI is not liable forany damage resulting from such signal connections.NI SMA-2164/2165 User Guide8Figure 4 shows the pinout of the NI SMA-2164 connector. Table 1 describes the pinout signals.Figure 4. NI SMA-2164 Connector PinoutNoteIf you are designing a custom cabling solution with the NI SMA-2164 connector (779157-01) and the NI SHB12X-B12X LVDS cable (192344-01), the pinout is reversed at the end connector. Refer to your connected device documentation for more information.Table 1. NI SMA-2164 Signal DescriptionsSignal Name Signal DescriptionCLK_LVDS+Positive terminal for the LVDS exported Sample clock.CLK_LVDS–Negative terminal for the LVDS exported Sample clock.CLK_LVPECL+Positive terminal for the LVPECL exported Sample clock.CLK_LVPECL–Negative terminal for the LVPECL exported Sample clock. STROBE+Positive external Sample clock source, which can be used fordynamic acquisition.STROBE–Negative external Sample clock source, which can be used fordynamic acquisition.IO_<0..15>+Positive bidirectional digital I/O data channels 0through15.IO_<0..15>–Negative bidirectional digital I/O data channels 0through15.PFI_<1..3>+Positive input terminals to the connected device for external triggers,or positive output terminals from the connected device for events. PFI_<1..3>–Negative input terminals to the connected device for externaltriggers, or negative output terminals from the connected device forevents.GND Ground reference for signals.RESERVED These terminals are reserved for future use. Do not connect tothese pins.Refer to your device documentation for more information about the signals on your connected device. For information about how the signals on your connected device map to the SMA connectors on the NI SMA-2164/2165, visit /info and enter 216xpinmap.© National Instruments Corporation9NI SMA-2164/2165 User GuideFigure5 shows the pinout of the NI SMA-2165 connector. Table2 describes the pinout signals.Figure 5. NI SMA-2165 Connector PinoutNI SMA-2164/2165 User Table 2. NI SMA-2165 Signal DescriptionsSignal Name Signal DescriptionGLCK+Positive terminal for the global clock.GLCK–Negative terminal for the global clock.P0_DIO<0..7>+Positive bidirectional digital I/O data channels 0through7 on port 0. P0_DIO<0..7>–Negative bidirectional digital I/O data channels 0through7 on port 0. P1_DIO<0..7>+Positive bidirectional digital I/O data channels 0through7 on port 1. P1_DIO<0..7>–Negative bidirectional digital I/O data channels 0through7 on port 1. P2_PFI<0..4>+Positive input terminals to the connected device for external triggers,or positive output terminals from the connected device for events.P2_PFI<0..4>–Negative input terminals to the connected device for external triggers,or negative output terminals from the connected device for events. GND Ground reference for signals.Refer to your device documentation for more information about the signals on your connected device. For information about how the signals on your connected device map to the SMA connectors on the NI SMA-2164/2165, visit /info and enter 216xpinmap.© National Instruments Corporation11NI SMA-2164/2165 User GuideNI SMA-2164/2165 User Guide Using SMA ConnectorsEach signal pair is labeled on the NI SMA-2164/2165. These connectors are arranged so that you can make quick connections to each polarity using a standard SMA coaxial cable assembly. Connectivity is made by inserting the cable receptacle onto the appropriate connector and tightening the receptacle sufficiently.NoteRefer to the receptacle documentation to assure that proper connections are made to signal and ground.Figure 6 shows how to make an SMA coaxial cable assembly connection.Figure 6. SMA Coaxial Cable Connection1SMA Cable 2SMA ConnectorMaking a Solder ConnectionEach signal pair is routed through a simple circuit to provide solder and probe access to the signals. Signal pairs are routed to a symmetric circuit, as shown in Figure7.Figure 7. Symmetric Circuit© National Instruments Corporation13NI SMA-2164/2165 User GuideNI SMA-2164/2165 User Guide Figure 8 is an enlarged portion of Figure 1. Figure 8 shows the routing of the signal pairs and the placement of the resistors shown in Figure 7.Figure 8. Solder ConnectionNoteThis figure shows channels IO_0 and IO_1 on the NI SMA-2164. This circuit is copied on the NI SMA-2164/2165 on each pair of channels, though the reference designators vary. Figure 7 is the schematic representation of the PCB shown in Figure 8.The resistors in the locations of R3, R4, R11, R12, R101, R377, R80, R67, R84, R105, and R345 above are unpopulated and discussed further in the Cleaning the Accessory and Prototyping Circuits sections. These pads are available for probing and for soldering.© National Instruments Corporation 15NI SMA-2164/2165 User GuideTerminating SignalsTermination of high-speed digital signals is necessary to prevent signal reflections and force signal channels to a known state when no signal is present. Pads for terminating resistors are connected to all DIO and control channels on the NI SMA-2164/2165. These pads are labeled in Figures 1 and 2 and are shown in more detail in Figure 8.NoteProper termination needs are application-specific. For some special considerations for choosing resistor values, refer to the Cleaning the Accessory section.Minimizing the Effects of StubsStubs are unterminated tributaries from the original signal path. Stubs decrease the signal quality of the system by adding reflections to the transmission channels. To minimize the effect of stubs, termination is placed at the end of the signal path.NoteRefer to your connected device documentation for more information about proper signal termination.If your signal transmission line ends on the NI SMA-2164/2165, you can use the provided resistor pads to solder termination resistors. If your signal terminates somewhere other than the NI SMA-2164/2165, NI recommends terminating the transmission line at the final signal destination. Each signal pair is routed through a symmetric circuit, shown in Figure 7.Differentially Terminating DIO and Control SignalsUnpopulated resistors like R80, R63, R67, and R84 in Figure 8 can be populated with 0402-sized resistors to provide termination. It is recommended that these resistors are each populated with 50Ω resistors to provide the expected 100Ω of differential termination.Using the Prototyping AreaThe NI SMA-2164/2165 prototyping area is designed to aid you in the following tasks:•Prototyping and testing circuits—Use the NI SMA-2164/2165 in conjunction with other NI devices for prototyping, evaluating, and testing custom circuits and/or components.•Creating custom interfaces—Use the NI SMA-2164/2165 for creating custom interfaces to other cables or devices. You can use the prototyping area to mount and interface the integrated circuits (ICs) or connectors required for your application.•Prototyping a DUT load board—Use the NI SMA-2164/2165 as a simple DUT interface board or as a prototype of a custom DUT load board.The prototyping area is labeled in Figure 1.Also labeled in that diagram are the erasable labelingstrips for your notes as you use the prototyping area.Prototyping CircuitsEach signal pair is routed to a simple debug and prototyping circuitry illustrated in Figure7. By placing or removing components, each circuit can be configured to accomplish one of the following tasks, which are described in more detail in the following sections.•Differentially terminate the signals—For more information about differential termination, refer to the Differentially Terminating DIO and Control Signals section.•Externally provide a common mode or offset voltage to a differential signal—If an application requires an externally provided offset voltage, you may populate the R3, R4, R11, and R12 resistor locations with 0603-sized resistors to provide a connection point. For balanced application to a differential signal, it is recommended that R0 and R1 each be populated with a 3.74 kΩ resistor.The node shared by the resistors in the R3, R4, R11, and R12 location is electricallyconnected between all DIO circuits.•Externally probe or measure the common mode or offset of a differential signal—If an application requires that the offset voltage be measured on a differential signal, you can populate the R80 and R63 resistor locations. R80 and R63 are connected at a node which is connected to an SMA pad through a 0Ω jumper. This SMA can be populated for coaxial connectivity to the offset voltage of the signal. The R80 and R63 resistor locations should each be 50Ω if termination is required, else, larger values of 3.74kΩ are more appropriate.•Channel-to-channel connectivity—If it is required that two channels be connected to one another (for round-trip delay elimination for example), you can connect neighboringchannels by populating a size 1206 0 jumper on resistor locations R345 and R377 inFigure8. By populating these resistors, IO_0 connects to IO_1, IO_2 connects to IO_3, and so on, and CLKOUT_LVDS connects to STROBE.Cleaning the AccessoryDisconnect all cables to the NI SMB-2164/2165 before cleaning. To remove light dust, use a soft, nonmetallic brush. To remove other contaminants, use alcohol wipes. The unit must be completely dry and free from contaminants before returning to service.NI SMA-2164/2165 User SpecificationsDigital I/ODIO channels....................................................16, differentialControl I/O channels.........................................6, differentialResistors Number (44)VoltageMaximum voltage.............................................5 VPrototyping Area Dimensions.......................................................4 cm × 9 cm(1.57 in. × 3.54 in.)Solder pads.......................................................154, unconnectedTraces Type..................................................................Matched length to 100 milsAC impedance...................................................100 Ω differentialPhysical Dimensions.......................................................17.55 cm × 2.07 cm × 20.32 cm(6.91 in. × 0.816 in. × 8 in.)I/O connectors...................................................One 73-pin Infiniband connector or one 68-pinVHDCI connector, and 44SMA connectors Weight...............................................................216 g (7.6 oz)CE ComplianceRefer to the regulatory statement for this product for additional compliance information. To obtain this information for this product, visit /certification, search by model number or product line, and click the appropriate link in the Certification column.interference. In a residential environment, the user may be required to take adequatemeasures to reduce the radio interference.© National Instruments Corporation17NI SMA-2164/2165 User GuideWhere to Go for SupportThe National Instruments Web site is your complete resource for technical support. At/support you have access to everything from troubleshooting and application development self-help resources to email and phone assistance from NI Application Engineers.A Declaration of Conformity (DoC) is our claim of compliance with the Council of the European Communities using the manufacturer’s declaration of conformity. This system affords the user protection for electromagnetic compatibility (EMC) and product safety. You can obtain the DoC for your product by visiting /certification. If your product supports calibration, you can obtain the calibration certificate for your product at /calibration. National Instruments corporate headquarters is located at 11500North Mopac Expressway, Austin, Texas, 78759-3504. National Instruments also has offices located around the world to help address your support needs. For telephone support in the United States, create your service request at /support and follow the calling instructions or dial 5127958248. For telephone support outside the United States, visit the Worldwide Offices section of / niglobal to access the branch office Web sites, which provide up-to-date contact information, support phone numbers, email addresses, and current events.NI SMA-2164/2165 User LabVIEW, National Instruments, NI, , the National Instruments corporate logo, and the Eagle logo are trademarks of National Instruments Corporation. Refer to the Trademark Information at /trademarks for other National Instruments trademarks. Other product and company names mentioned herein are trademarks or trade names of their respective companies. For patents covering National Instruments products/technology, refer to the appropriate location: Help»Patents in your software, the patents.txt file on your media, or the National Instruments Patents Notice at /patents. Refer to the Export Compliance Information at /legal/export-compliance for the National Instruments global trade compliance policy and how to obtain relevant HTS codes, ECCNs, and other import/export data.© 2005–2011 National Instruments Corporation. All rights reserved.374063B-01Oct11。

ICP Tool Revision HistoryNuEclipseRevision HistoryThe information described in this document is the exclusive intellectual property ofNuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.Nuvoton is providing this document only for reference purposes of NuMicro ® microcontroller based systemdesign. Nuvoton assumes no responsibility for errors or omissions.All data and specifications are subject to change without notice.For additional information or questions, please contact: Nuvoton Technology Corporation .TABLE OF CONTENTS1REVISION HISTORY (3)2SUPPORTED MICROCONTROLLER (4)3RESOURCES (8)ICP Tool Revision HistoryICP Tool Revision History1 Revision History Version Release Date Description1.02.022 2023/03/21 • Added supported microcontroller:– Nuvoton M0 Family: M091 Series.– Nuvoton M7 Family: KM1M7C Series.1.02.021 2022/11/15 • Added supported microcontroller:– Nuvoton M0 Family: M0A23OC1ACU, M0A23EC1ACU, M029GGC0AE.– Nuvoton M23 Family: NUC1263 Series, M2354LJFCE.1.02.020 2022/06/24 • Added supported microcontroller:– NuMicro M4 Family: M467H3SJHAE, M467H3KJHAE, M467H3JJHAE, M460KGCAE, M460SGCAE, M460AGCAE, M460LGCAE, M460YGCAE.– NuMicro MA35 Family: MA35D16H8A7C and MA35D16H0A7C.1.02.019 2022/04/29 • Added supported microcontroller:– NuMicro MA35 Family: MA35D1 series.• Upgraded eclipse version from Mars to 2021 and supported 64bits OS only.1.01.019 2021/12/01 • Added supported microcontroller:– NuMicro M4 Family: M460, I94100 series.– NuMicro M7 Family: KM1M7A.1.01.018 2021/03/12 • Added supported microcontroller:– NuMicro M0 Family: M030G/M031G series.– NuMicro M23 Family: NUC1262 series.1.01.017 2020/09/30 • Added supported microcontroller:– NuMicro M0 Family: M030G, M071, M0A21 series.– NuMicro M23 Family: M251 series.– NuMicro M4 Family: M471 series.1.01.016 2020/03/06 • Added supported microcontroller:– NuMicro M0 Family: M031BT, NUC1311 series.– NuMicro M23 Family: M2354 series.– NuMicro M4 Family: M479 series.1.01.015 2019/08/09 • Added supported microcontroller:– NuMicro M0 Family: M031 series.– NuMicro M23 Family: M261 series.– NuMicro M4 Family: M480LD series.ICP Tool Revision History 2Supported MicrocontrollerProduct Line Series Part NumberNuMicro®M0 FamilyM0A21M0A21EB1AC, M0A21EC1AC, M0A21OB1AC, M0A21OC1AC,M0A23EC1AC, M0A23OC1AC, M0A23EC1ACU, M0A23OC1ACU M029G/M030G/M031GM029GGC0AE, M030GGD1AE, M030GGC1AE, M030GTC1AE,M030GTD1AE M030GGC0AE, M030GTC0AE, M031GGD2AE,M031GTD2AE, M031GGC2AE, M031GTC2AE, M031GGC1AE,M031GTC1AEM031M030FD2AE, M030LD2AE, M030TD2AE, M031BTYD2AN, M031BTYE3AN,M031EB0AE, M031EC1AE, M031FB0AE, M031FC1AE, M031KG6AE,M031KG8AE, M031KIAAE, M031LC2AE, M031LD2AE, M031LE3AE,M031LG6AE, M031LG8AE, M031SC2AE, M031SD2AE, M031SE3AE,M031SG6AE, M031SG8AE, M031SIAAE, M031TB0AE, M031TC1AE,M031TD2AE, M031TE3AE, M032EC1AE, M032FC1AE, M032KG6AE,M032KG8AE, M032KIAAE, M032LC2AE, M032LD2AE, M032LE3AE,M032LG6AE, M032LG8AE, M032SE3AE, M032SG6AE, M032SG8AE,M032SIAAE, M032TC1AE, M032TD2AEM071M071MC2AE, M071MD2AE, M071R1D3AE, M071R1E3AE, M071SD3AE,M071SE3AE, M071VG4AEM091M091TC2AE, M091TD2AE, M091YC2AE, M091YD2AEM051DNM0516LDN, M0516ZDN, M052LDN, M052ZDN, M054LDN, M054ZDN,M058LDN, M058ZDNM051DEM0515LDE, M0516LDE, M0516ZDE, M052LDE, M052ZDE, M054LDE,M054ZDE, M058LDE, M058MDE, M058ZDEM0518AE M0518LC2AE, M0518LD2AE, M0518SC2AE, M0518SD2AEM0519AE M0519LD3AE, M0519LE3AE, M0519SD3AE, M0519SE3AE, M0519VE3AEM0564M0564LE4AE, M0564LG4AE, M0564SE4AE, M0564SG4AE, M0564VG4AEM058SAN M058SFAN, M058SLAN, M058SSAN, M058SZANMINI51DEMINI51FDE, MINI51LDE, MINI51QDE, MINI51TDE, MINI51ZDE,MINI52FDE, MINI52LDE, MINI52QDE, MINI52TDE, MINI52ZDE,MINI54FDE, MINI54FHC, MINI54LDE, MINI54QDE, MINI54TDE,MINI54ZDEMINI55MINI55LDE, MINI55TDE, MINI55ZDEMINI57MINI57EDE, MINI57FDE, MINI57TDE, MINI57XDEMINI58MINI58FDE, MINI58LDE, MINI58QDE, MINI58TDE, MINI58ZDENano100ANNano100LC2AN, Nano100LD2AN, Nano100LD3AN, Nano100SC2AN,Nano100SD2AN, Nano100SD3AN, Nano100VD2AN, Nano100VD3AN,Nano100ZC2AN, Nano100ZD2AN, Nano100ZD3AN, Nano120LC2AN,Nano120LD2AN, Nano120LD3AN, Nano120SC2AN, Nano120SD2AN,Nano120SD3AN, Nano120VD2AN, Nano120VD3AN, Nano120ZC2AN,ICP Tool Revision History Nano120ZD2AN, Nano120ZD3AN, Nano130VD3ANNano100BN Nano100KC2BN, Nano100KD2BN, Nano100KD3BN, Nano100KE3BN,Nano100LC2BN, Nano100LD2BN, Nano100LD3BN, Nano100LE3BN,Nano100ND2BN, Nano100ND3BN, Nano100NE3BN, Nano100SC2BN,Nano100SD2BN, Nano100SD3BN, Nano100SE3BN, Nano100WE3BN,Nano110KC2BN, Nano110KD2BN, Nano110KD3BN, Nano110KE3BN,Nano110RC2BN, Nano110RD2BN, Nano110RD3BN, Nano110SC2BN,Nano110SD2BN, Nano110SD3BN, Nano110SE3BN, Nano120KC2BN,Nano120KD2BN, Nano120KD3BN, Nano120KE3BN, Nano120LC2BN,Nano120LD2BN, Nano120LD3BN, Nano120LE3BN, Nano120SC2BN,Nano120SD2BN, Nano120SD3BN, Nano120SE3BN, Nano130KC2BN,Nano130KD2BN, Nano130KD3BN, Nano130KE3BN, Nano130SC2BN,Nano130SD2BN, Nano130SD3BN, Nano130SE3BNNano103 Nano103SD3AE, Nano103LD3AE, Nano103ZD3AENano102/112AN Nano102LB1AN, Nano102LC2AN, Nano102SC2AN, Nano102ZB1AN,Nano102ZC2AN, Nano112LB1AN, Nano112LC2AN, Nano112RB1AN,Nano112RC2AN, Nano112SB1AN, Nano112SC2AN, Nano112VC2ANNUC029AN NUC029LAN, NUC029TANNUC029AE NUC029FAE, NUC029TAENUC029xDE NUC029LDE, NUC029SDENUC029xEE NUC029LEE, NUC029SEENUC029xGE NUC029KGE, NUC029LGE, NUC029SGENUC029ZAN NUC029ZANNUC130/140CN NUC130LC1CN, NUC130LD2CN, NUC130LE3CN, NUC130RC1CN,NUC130RD2CN, NUC130RE3CN, NUC130VE3CN, NUC140LC1CN,NUC140LD2CN, NUC140LE3CN, NUC140RC1CN, NUC140RD2CN,NUC140RE3CN, NUC140VE3CNNUC100/120DN NUC100LC1DN, NUC100LD1DN, NUC100LD2DN, NUC100LD3DN,NUC100LE3DN, NUC100RC1DN, NUC100RD1DN, NUC100RD2DN,NUC100RD3DN, NUC100RE3DN, NUC100VD2DN, NUC100VD3DN,NUC100VE3DE, NUC100VE3DN, NUC120LC1DN, NUC120LD1DN,NUC120LD2DE, NUC120LD2DN, NUC120LD3DN, NUC120LE3DN,NUC120RC1DN, NUC120RD1DN, NUC120RD2DN, NUC120RD3DN,NUC120RE3DN, NUC120VD2DN, NUC120VD3DN, NUC120VE3DN,NUC122LC1DN, NUC122LD2DN, NUC122SC1DN, NUC122SD2DN,NUC122ZC1DN, NUC122ZD2DNNUC121 NUC121SC2AE, NUC121LC2AE, NUC121ZC2AE, NUC125SC2AE,NUC125LC2AE, NUC125ZC2AENUC123AN NUC123LC2AN1, NUC123LD4AN0, NUC123SC2AN1, NUC123SD4AN0,NUC123ZC2AN1, NUC123ZD4AN0NUC123AE NUC123LC2AE1, NUC123LD4AE0, NUC123SC2AE1, NUC123SD4AE0,NUC123ZC2AE1, NUC123ZD4AE0ICP Tool Revision HistoryNUC126NUC126LE4AE, NUC126LG4AE, NUC126NE4AE, NUC126SE4AE,NUC126SG4AE, NUC126VG4AENUC1261NUC1261LG4AE, NUC1261LE4AE, NUC1261NE4AE, NUC1261SG4AE,NUC1261SE4AENUC131AENUC131LC2AE, NUC131LC2AEU, NUC131LD2AE, NUC131LD2AEU,NUC131SC2AE, NUC131SC2AEU, NUC131SD2AE, NUC131SD2AEU NUC1311NUC1311LC2AE, NUC1311LD2AENUC200/220ANNUC200LC2AN, NUC200LD2AN, NUC200LE3AN, NUC200SC2AN,NUC200SD2AN, NUC200SE3AN, NUC200VE3AN, NUC220LC2AN,NUC220LD2AN, NUC220LE3AN, NUC220SC2AN, NUC220SD2AN,NUC220SE3AN, NUC220VE3ANNUC230/240AENUC230LC2AE, NUC230LD2AE, NUC230LE3AE, NUC230SC2AE,NUC230SD2AE, NUC230SE3AE, NUC230VE3AE, NUC240LC2AE,NUC240LD2AE, NUC240LE3AE, NUC240SC2AE, NUC240SD2AE,NUC240SE3AE, NUC240VE3AENUC2201NUC2201LE3AE, NUC2201SE3AENuMicro®M23 FamilyM251M251EC2AE, M251FC2AE, M251KE3AE, M251KG6AE, M251LC2AE,M251LD2AE, M251LE3AE, M251LG6AE, M251SC2AE, M251SD2AE,M251SE3AE, M251SG6AE, M251ZC2AE, M251ZD2AE, M252EC2AE,M252FC2AE, M252KE3AE, M252KG6AE, M252LC2AE, M252LD2AE,M252LE3AE, M252LG6AE, M252SC2AE, M252SD2AE, M252SE3AE,M252SG6AE, M252ZC2AE, M252ZD2AE, M254KE3AE, M254SD3AE,M254SE3AE, M256KE3AE, M256SE3AE, M258KE3AE, M258SE3AE,M254SD2AE, M256MD2AE, M256SD2AE, M254MD2AE, M258KG6AE,M254KG6AE, M258SG6AE, M254SG6AEM253M253LD3AE, M253LE3AE, M253ZE3AEM261M261ZIAAE, M261SIAAE, M261KIAAE, M262ZIAAE, M262SIAAE,M262KIAAE, M263ZIAAE, M263SIAAE, M263KIAAEM2351M2351KIAAE, M2351SFSIAAP, M2351SIAAE, M2351ZIAAEM2354M2354KJFAE, M2354LJFAE, M2354SJFAE, M2354LJFCENUC1262NUC1262LE4AE, NUC1262NE4AE, NUC1262SE4AENUC1263NUC1263LD4AE, NUC1263ND4AE, NUC1263SD4AE, NUC1263ZD4AENDA102NDA102SD2, NDA102SE3NuMicro®M4 FamilyM451M451LC3AE, M451LD3AE, M451LE6AE, M451LG6AE, M451MLC3AE,M451MLD3AE, M451MLE6AE, M451MLG6AE, M451MSC3AE,M451MSD3AE M451RC3AE, M451RD3AE, M451RE6AE, M451RG6AE,M451VE6AE, M451VG6AE, M452LC3AE, M452LD3AE, M452LE6AE,M452LG6AE, M452RD3AE, M452RE6AE, M452RG6AE, M453LC3AE,M453LD3AE, M453LE6AE, M453LG6AE, M453RD3AE, M453RE6AE,M453RG6AE, M453VD3AE, M453VE6AE, M453VG6AE, M4TKVG6AE,M4TKVE6AE, M4TKRG6AE, M4TKRE6AE, M4TKLG6AE, M4TKLE6AEM4521M4521LD6AE, M4521LE6AE, M4521RD6AE, M4521RE6AE, M4521SD6AE, M4521SE6AEM460M467SJHAE, M467KJHAE, M467JJHAE, M467HJHAE, M467H3KJHAE, M467H3JJHAE, M467SJHAN, M467KJHAN, M467JJHAN, M467HJHAN, M467S2JHAE, M467K2JHAE, M467J2JHAE, M467H2JHAE, M463KGCAE, M463VGCAE, M463SGCAE, M463LGCAE, M463YGCAE, M460KGCAE, M460SGCAE, M460LGCAE, M460YGCAEM471M471KI8AE, M471MD6AE, M471R1D6AE, M471R1E6AE, M471SD6AE, M471SE6AE, M471VG7AE, M471VI8AE, M471CI8AEM479M479SG8AEE, M479LG8AEE, M479NG8AEEM480M481SIDAE, M481LIDAE, M481ZIDAE, M482KIDAE, M482SIDAE, M482LIDAE, M482ZIDAE, M483KIDAE, M483SIDAE, M485KIDAE, M485SIDAE, M485LIDAE, M487JIDAE, M487KIDAE, M487SIDAE, M487KMCANM480LD M481SGCAE, M481SE8AE, M481SGCAE2A, M481LGCAE, M481LE8AE, M481ZGCAE, M481ZE8AE, M482KGCAE, M482SGCAE, M482SE8AE, M482LGCAE, M482LE8AE, M482ZGCAE, M482ZE8AE, M483KGCAE, M483SGCAE, M483SE8AE, M483KGCAE2A, M483SGCAE2ANUC442/472AE NUC442JG8AE, NUC442JI8AE, NUC442KG8AE, NUC442KI8AE, NUC442RG8AE, NUC442RI8AE, NUC442VG8AE, NUC442VI8AE, NUC472HG8AE, NUC472HI8AE, NUC472JG8AE, NUC472JI8AE, NUC472KG8AE, NUC472KI8AE, NUC472VG8AE, NUC472VI8AENUC505NUC505YO13Y, NUC505DS13Y, NUC505DSA, NUC505DL13Y, NUC505DLA, NUC505YLA2Y, NUC505YLAKM1M4BF0KM1M4BF02KXW/E, KM1M4BF02GXY/G, KM1M4BF03KXW/E, KM1M4BF03GXY/G, KM1M4BF04KXW/E, KM1M4BF04GXY/G, KM1M4BF05KXW/E, KM1M4BF05GXY/GKM1M4BF5KM1M4BF52KXW/E, KM1M4BF52GXY/G, KM1M4BF53KXW/E, KM1M4BF53GXY/G, KM1M4BF54KXW/E, KM1M4BF54GXY/G, KM1M4BF55KXW/E, KM1M4BF55GXY/GARM® Cortex®-M7 MCUs KM1M7AF0KM1M7AF00N/M/K, KM1M7AF02N/M/KKM1M7AF5KM1M7AF50N/M/K, KM1M7AF52N/M/KKM1M7CFKM1M7CF03N/K, KM1M7CF04N/K, KM1M7CF05N/K, KM1M7CF06N/K,KM1M7CF13N/K, KM1M7CF14N/K, KM1M7CF15N/K, KM1M7CF16N/KNuMicro® A35 Family MA35D1MA35D16F787C, MA35D16H8A7C, MA35D16A887C, MA35D16H0A7C,MA35D16A087C, MA35D16F987CICP Tool Revision HistoryICP Tool Revision History 3ResourcesWebsite Details NuEclipse on https:///tool-and-software/ide-and-compiler/•Download the latest NuEclipse installation file.•View the NuEclipse revision history.NuTool on GitHubhttps:///OpenNuvoton/Nuvoton_Tools•Check the open source example code of NuEclipse for easierdevelopment.https:///OpenNuvoton/Nuvoton_Tools/blob/master/Latest_NuLink_Firmware/README.md•View the Nu-Link firmware revision history.Important NoticeUsing this software indicates your acceptance of the disclaimer hereunder: THIS SOFTWARE IS FOR YOUR REFERENCE ONLY AND PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. YOUR USING THIS SOFTWARE/FIRMWARE IS BASED ON YOUR OWN DISCRETION, IN NO EVENT SHALL THE COPYRIGHT OWNER OR PROVIDER BE LIABLE TO ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.。

ARM® Cortex®-M32-bit MicrocontrollerNuMicro® FamilyNuGang ProgrammerUser ManualThe information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions.All data and specifications are subject to change without notice.For additional information or questions, please contact: Nuvoton Technology Corporation.Table of Contents1Introduction (3)2Driver and Application Program (5)2.1Installing the Driver (5)2.2Installing the Application Program (5)2.3Introduction to the GUI (5)3Starting to Use the NuGang Programmer (6)3.1Example-1: Nano102LB1AN (6)3.2Example-2: M0516LDN (7)3.3Verifying Single Chip (8)Verifying All Chips (9)3.43.5Reading Chip (11)Updating Chips (12)3.63.7Automatic Detection of ‘Chip-Removed-then-Placed’ (13)3.8Special Alert for Failed Programming (13)4Tool Project File (TPJ) (14)5Programmer Information (15)5.1Checking through Application Program (15)Checking through LCD Display (16)5.26Advanced Functions (17)6.1Serial Number Programming (17)Chip Counter (19)6.27REVISION HISTORY (20)1 INTRODUCTIONThe “NuGang Programmer” provides the four-chip gang programming functionality, which is designed especially for mass-production in the customer site. After online downloading the programming data into the programmer, user may start the off-line gang programming by pressing the AUTO-key on the programmer.The Picture of “NuGang Programmer”AUTO-key DC9VPower SwitchDC9VPower InputUSB ConnectorChips (#1~#4) to be programmed#1#2#3#4PASS/FAILLEDsREADY/BUSYLEDAdapter Board Main BoardBuzzer LCD Display+ _Component DescriptionMain Board and Adapter Board:The programmer consists of a main board for gang programming control and an adapter boardcontaining the sockets for the MCU chips to be programmed. Note that different chip package willhave different adapter board.USB Connector:Connect to a PC for online downloading the programming data.LCD Display:Show the programmer’s information and status.Buzzer:Show the programmer’s status by a sound message.AUTO-key:Press this key to start off-line gang programming.READY/BUSY LED:NUGANG PROGRAMMER USER MANUALShow the Gang Programmer’s status; ‘On’ means READY and ‘Off’ means BUSY.DC9V Power Input and Switch:Supply DC 9V power for off-line operation. Note that the programmer is always powered On by host when it is connected to the USB port.PASS/FAIL LEDs:Show the individual programming result for chips #1 to #4; ‘Green’means PASS and ‘Red’means FAIL.NUGANG PROGRAMMER USER MANUAL2 DRIVER AND APPLICATION PROGRAMInstalling the Driver2.1The NuGang Programmer has a built-in USB-to-Serial bridge chip (PL-2303). When connected to host, it will appear as a USB-to-Serial COM port in the System\Hardware\Device Manager. Before starting to use this programmer, the driver must be installed if the PL-2303 driver has never been installed in this host. The driver is included in the folder [(1) Driver].Installing the Application Program2.2Doubly-click the setup file included in the folder [(2) Application Program] to install the application program. After the installation is completed successfully, a new item “Nuvoton Tools \ Nuvoton NuGang Programmer, v?.??” will appear in the Windows START-menu.Introduction to the GUI2.3Load file forAPROM/DataFlash/LDROM buffer Select wanted Part No.Select updated items when 'Update Chip'is clickedClick to show APROM buffer Click to show DataFlash buffer Information of the loaded file Set CONFIG bitsShow the programming data downloaded in the programmerVerify the MCU chipRead the MCU chip Update the MCU chipsDownload the current GUI setting and buffer data into the programmer Note:Click 'APROM Buffer' and then click 'Load File' for APROM buffer. Click 'DataFlash Buffer' and then click 'Load File' for DataFlash buffer. Click 'LDROM Buffer' and then click 'Load File' for LDROM buffer.(See Note)Processing statusClick to show LDROM bufferAdvanced function Current CONFIG Settings3 STARTING TO USE THE NUGANG PROGRAMMERThe NuGang Programmer always functions as an ‘ICP Gang Programmer’ for the NuMicro® family products.Example-1: Nano102LB1AN3.1To do the ICP gang programming for Nano102LB1AN, please follow the steps below:Step 1: Set the programmer type as ‘ICP Gang Programmer’ (set as default).Step 2: Select the wanted part number (e.g. Nano102LB1AN).Step 4: Set the CONFIG bits. (Note: Step 2 - 4 can be completed by loading a TPJ file. Please refer to Section 4.)Step 5: Download the buffers’ data and CONFIG setting into the programmer.Step 6: Disconnect the programmer from the host, and press the AUTO-key on the programmer to start off-line gang programming.Step1Step2Step3Step5 Step4NUGANG PROGRAMMER USER MANUALExample-2: M0516LDN3.2To do the ICP gang programming for M0516LDN, please follow the steps below: Step 1: Set the programmer type as ‘ICP Gang Programmer ’ (set as default). Step 2: Select the wanted part number (e.g. M0516LDN).Step 4: Set the CONFIG bits. (Note: Step 2 - 4 can be completed by loading a TPJ file. Please refer to Section 4.)Step 5: Download the buffers ’ data and CONFIG setting into the programmer.Step 6: Disconnect the programmer from the host and press the AUTO -key on the programmer to start off-line gang programming.Step1Step2Step3Step5Step4Verifying Single Chip3.3Although the gang programming operation (by pressing the AUTO-key) includes verifying a chip, user may verify the chip again. To verify a single chip, please follow the steps below:Step 1: Set the programmer type as ‘ICP Gang Programmer’ (set as default).Step 2: Select the wanted part number.thenStep 4: Set the CONFIG bits. (Note: Step 2 - 4 can be completed by loading a TPJ file. Please refer to Section 4.)Step 5: Compare the chip’s contents with the buffers’ data and CONFIG setting.Note: The chip can be verified only when it was not locked.Step1Step2Step3Step5Step4NUGANG PROGRAMMER USER MANUALVerifying All Chips3.4In NuGang Programmer, a special mode, Verify mode, can be used to verify all chips placed in the sockets simultaneously. To enter Verify mode, please follow the steps below:Step 2: Select the Verify Mode (do Verify only) option in the Gang Mode Setting section.Step 4 - Step 8: Do the same steps as Section 3.3.Step 9: Disconnect the programmer from the host, and press the AUTO -key on the programmer to start off-line all chips verification.Note: User cannot update the code of the chip placed in the socket under this mode.Step2Step3Step1Step4Step5Step6Step8 Step7Reading Chip3.5To dump the chip’s contents, please follow the steps below:Step 1: Set the programmer type as ‘ICP Gang Programmer’ (set as default). Step 2: Select the wanted part number.Step 3: Read the chip.Note: The chip can be dumped only when it was not locked.Step1Step2Step3NUGANG PROGRAMMER USER MANUALUpdating Chips3.6In addition to off-line gang programming (by pressing the AUTO-key on the programmer), you can also do online gang programming by clicking the Update Chips button on the GUI, as shown below. Note: Before starting online operation, ‘Download Programmer’ should be completed or you will be requested to do it. Also, the programming result of each chip will be shown through its individual LEDs on the adapter board.To do on-linegang programmingAutomatic Detection of ‘Chip-Removed-then-Placed’3.7Every time the gang programming is finished, the green/red LEDs on the adapter board will keep showing the last programming result until pressing the AUTO-key next. Sometimes the operator might forget to press the AUTO-key after placing new chips into the sockets, thus the new chips are un-programmed and regarded as programmed ‘PASS’. To prevent from this carelessness, the auto-detection function of ‘chip-removed-then-placed’ is supported. That is, the green/red LEDs will turn to Off state once the ‘chip-removed-then-placed’condition is detected. After the new chips are placed into the sockets, the green/red LEDs will become Off to indicate the chips have not been programmed yet.3.8Special Alert for Failed ProgrammingWhen programming is finished, if there is any chip failed, the buzzer will beep for 3 seconds to alert the operator. At this time, the operator should check the red LEDs to determine which chip(s) is/are failed.4 TOOL PROJECT FILE (TPJ)All the GUI settings can be saved into a Tool Project (TPJ) file and retrieved by loading the previously saved TPJ file. A variety of programming data can be managed by the ‘project’ type.The GUI settings or the contents of the TPJ file include:(1) Programmer type(2) Part number(3) Items to be updated(4) APROM buffer data if APROM is one of the updated items(5) DataFlash buffer data if DataFlash is one of the updated items(6) LDROM buffer data if LDROM is one of the updated items(7) CONFIG setting if CONFIG is one of the updated itemsSave the GUI settingto a TPJ fileRetrieve the GUI settingfrom a TPJ fileNUGANG PROGRAMMER USER MANUAL5 PROGRAMMER INFORMATIONChecking through Application Program5.1To check the information of downloaded data saved in the programmer, connect the programmer to host and then click the Programmer Information button. The Programmer Information form will appear to show the downloaded data, as shown below.The programming data saved in the NuGang Programmer.Checking through LCD Display5.2Every time the NuGang Programmer is powered on, the LCD module will sequentially display the previously downloaded programming data, as shown below.The target chip's Part No.When APROM is to be programmed,its checksum will be displayed.Programmer ready.Now, the user may press the AUTO-key to start gang programming.When DataFlash is to be programmed, its checksum will be displayed.When LDROM is to be programmed, its checksum will be displayed.When CONFIG is to be programmed, its checksum will be displayed.6 ADVANCED FUNCTIONS6.1Serial Number ProgrammingSerial number (S/N) programming is used when the programmer is operated in Online mode. Theserial number is BCD coded and 8 bytes long with 16 decimal digits supported. Only the APROM canbe programmed with the serial number. To proceed with serial number programming, please followthe steps below:Step 2: Make sure the Enable option in the Serial Number (S/N)Programming section is selected.Step 3: Specify the address, increment, and serial number to be programmed.Note: The next time NuGang Programmer is started, the serial number shown in the lower-left cornerwill depend on the previously programmed serial number.Step2NUGANG PROGRAMMER USER MANUALStep3Step1Step4As shown in the figure above, ‘2468000012345678’is set as the serial number for programming ataddress 0x3FF8 in APROM. The BCD-coded serial number programmed in the chip has a ‘what yousee is what you get’ format, as shown below.NUGANG PROGRAMMER USER MANUALChip Counter6.2Chip counter is used to calculate the number of chips successfully programmed. To enable the chip counter and related settings, please follow the steps below:Step 2: Make sure the Enable option in the Chip Counter section is selected.Step 3: Click the Count Up (Count Down) button to set the counter as up counter (down counter),and then specify the initial counter value.Note: The next time NuGang Programmer is started, the chip counter shown in the lower-right corner will depend on the previously programmed chip counter.Step2Step1Step3Step47 REVISION HISTORY2015.11.19 7.02 1. Fixed a minor firmware bug for ISD Series.2. Supported the NUC123SD4SN3.2015.08.13 7.01 1. Fixed a minor firmware bug.2015.07.15 7.00 1. Supported the NUC123AE and Mini55 Series.2015.06.03 6.27 1. Supported the M451, NUC442/472, M0519, and Mini58Series.2. Supported the NUC220LE3AE, NUC123SD4SN0.3. Supported the NANO100 BN Series QFN48 and LQFP64package.2015.01.12 6.24 1. Fixed CONFIG Setting dialog GUI for Nano102/112Series.2. Fixed Read Chip dialog GUI for all series in the NuMicroCortex-M0 Family.2014.12.09 6.23 1. Supported the NUC029AN/AE, NUC120DE,NANO102/112AN, NUC230/240AE, NUC131AE, M0518AE series.2. Updated the CONFIG Setting GUI for all series in theNuMicro Cortex-M0 Family.3. Removed the "Exit" button and moved "AdvancedFunction" to the main window.2014.04.10 6.22 1. Fixed the CONFIG Setting dialog GUI bugs(Clock Sourceand DataFlash) for NUC123 series.2014.01.24 6.21 1. Supported the NUC100 DN, NUC200AN, M051 DN/DE,M058S AN, Mini51 DE and AU9110 series.2012.11.01 6.191. Supported the NUC123 AN series.2. Modified ISD Family related GUI settings.2012.10.03 6.18 1. Supported the NUC103 and NUC105 AN series.2. Supported the Nano100 BN Series.3. Supported the NUC122SD2BN.4. Fixed minor bugs of ISD Family.2012.05.25 6.15 1. Fixed a minor software bug. 2012.05.16 6.14 1. Supported NUC101LE3AN.2012.04.26 6.12 1. Supported Serial Number Programming.2. Supported Chip Counter function.3. Fixed a minor software bug.2012.03.15 6.051. Supported the NUC130 and NUC140 CN series.2. Supported the Mini51 Series TAN and QAN parts.2012.02.14 6.02 1. Supported the N512 series.2. Fixed minor software bugs.3. Supported verifying all chips mode.2011.12.20 6.00 1. Supported the Nano100 series.2011.11.22 5.73 1. Corrected the Device ID of M051 B-version.2. Supported to show the failed sockets number on the LCDpanel when gang programming is finished.2011.11.04 5.70 1. Improved programming stability when NuGang ispowered by the USB port instead of a DC9V power adaptor.2011.10.20 5.60 1. Supported the M051 B-version parts.2. Updated the Mini51 parts.3. Supported to show the PASS/FAIL message on the LCDpanel when gang programming is finished.2011.08.18 5.52 1. Fixed minor GUI bugs. 2011.07.28 5.511. Supported the Mini51 Series.2. Fixed minor software bugs.2011.06.15 5.50 1. Supported to show “PASS”or “FAIL”on the LCD panelfor programming results.2. Supported to beep for 3 seconds for any failedprogramming.3. Supported to turn Off the green/red LEDs when theprogrammed chip is taken out from the socket and a new chip is placed into the socket.4. Supported the ‘Update Chips’ function.2011.04.07 5.31 1. Adjusted the NUC102/NUC122 parts list.2011.03.18 5.30 1. Supported Tool Project File (TPJ) for GUI settingmanagement.2. Supported read/verify operation of single chip in one ofthe 4 sockets.3. Supported the NUC102/NUC122 series.4. Fixed some software bugs.2010.11.09 1.00 1. Preliminary versionImportant NoticeNuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, “Insecure Usage”.Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life.All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims to Nuvoton as a result of customer’s Insecure Usage, custome r shall indemnify the damages and liabilities thus incurred by Nuvoton.。

LAUREL ELECTRONICS, INC.4-20 mA & Serial Data Output Transmitter for Dual Channel Pulse Totalizer InputFeatures•4-20 mA, 0-20 mA, 0-10V or -10V to +10V transmitter output, 16 bits, isolated•RS232 or RS485 serial data output, Modbus or Laurel ASCII protocol, isolated•Dual 120 mA solid state relays for alarm or control, isolated•Two independently field-scalable pulse input channels•Up counting from zero to preset value using positive scale factor•Down counting from preset to zero using negative scale factor•Inputs from NPN or PNP proximity switches, contact closures, digital logic, ormagnetic pickups down to 12 mV, pulse rates to 1 MHz•Analog output resolution 0.0015% of span (16 bits), accuracy ±0.02% of span•5V, 10V or 24V dc transducer excitation output, isolated•Universal 85-264 Vac / 90-300 Vdc or 10-48 Vdc / 12-32 Vac powerDescriptionThe Laureate pulse input totalizer transmitter accepts twoindependently scalable input channels from a wide range of pulsesources, such as NPN or PNP proximity switches, contactclosures, digital logic, magnetic pickups down to 12 mV, or ACvoltages to 250 Vac. Input pulse rates can be as high as 1 MHz.With a Standard Main Board, the transmitter output can bescaled to track total (such as gallons) or rate (such as gallons perminute). Square root extraction is standard.With an Extended Main Board, the transmitter can also:•Count up to a preset or down from a preset to zero. Suchapplications typically utilize the transmitter’s two solid staterelays, which are standard. External reset of totals is via aspecial three-position screw terminal connector.•Perform custom-curve linearization on rate or total, forexample to extend the range of transducers. Exceptionallyaccurate custom-curve linearization is provided by a curvi-linear spline fit with up to 180 data points.•Combine channels A and B arithmetically so that thetransmitter output tracks A+B (e.g., sum of two flows or totals),A-B (e.g., difference of two flows or totals), AxB (e.g., horse-power as product of force and RPM), A/B (ratio of two flow ortotals), and A/B-1 (draw or relative elongation of materialbetween rollers).The dual-channel signal conditioner used for pulse detectionaccepts inputs from proximity switches with PNP or NPN output,TTL or CMOS logic, magnetic pickups, contact closures, andother signals from 12 mV to 250 Vac. Jumper selections provideoptimum operation for different sensor types and noise condi-tions. A built-in 5V, 10V or 24V dc excitation supply can powerproximity switches and other sensors, and eliminate the need foran external power supply.Standard features of Laureate transmitters include:•4-20 mA, 0-10V or -10V to +10V analog transmitter output,isolated, jumper-selectable and user scalable. All selectionsprovide 16-bit (0.0015%) resolution of output span and 0.02%output accuracy of a reading from -99,999 to +99,999 countsthat is also transmitted digitally. Output isolation from signaland power grounds eliminates potential ground loops.•Serial communications output, isolated. User selectableRS232 or RS485, half or full duplex. Three protocols are userselectable: Modbus RTU, Modbus ASCII, or Laurel ASCII.Modbus operation is fully compliant with Modbus Over SerialLine Specification V1.0 (2002). The Laurel ASCII protocolallows up to 31 Laureate devices to be addressed on thesame RS485 data line. It is simpler than the Modbus protocoland is recommended when all devices are Laureates.•Dual solid state relays, isolated. Available for local alarm orcontrol. Rated 120 mA at 130 Vac or 170 Vdc.•Transducer excitation output, isolated. User selectable5V@100 mA, 10V@120 mA or 24V@50 mA.•Universal 85-264 Vac power. Low-voltage 10-48 Vdc or12-32 Vac power is optional.Easy Transmitter programming is via Laurel's InstrumentSetup Software, which runs on a PC under MS Windows. Thissoftware can be downloaded from our website at no charge. Therequired transmitter-to-PC interface cable is available from Laurel(P/N CBL04).SpecificationsPulse InputSignal Types GroundingChannel A Frequency Channel B Frequency Minimum Signal Maximum Signal Noise FilterContact Debounce AC, pulses from NPN, PNP transistors, contact closures, magnetic pickups. Common ground for channels A & B0.005 Hz to 1 MHz0.005 Hz to 250 kHzNine ranges from (-12 to +12 mV) to (+1.25 to +2.1V)250 Vac1 MHz, 30 kHz, 250 Hz (selectable)0, 3, 50 ms (selectable)Analog Output (standard)Output Levels Compliance, 4-20 mA Compliance, 0-10V Output Resolution Output Accuracy Output Update Rate Output Isolation 4-20 mA, 0-20 mA, 0-10 Vdc, -10 to +10Vdc (user selectable) 10V (0-500Ω load)2 mA (5 kΩ load)16 bits (65,536 steps)0.02% of output spanProgrammed gate time + 30 ms + 0-2 signal periods250V rms working, 2.3 kV rms per 1 minute testSensor Excitation Output (standard)Output Levels Output Isolation 5V@100 mA, 10V@120 mA, 24V@50 mA (jumper selectable) 50V from signal groundDual Relay Output (standard)Relay Type Load Rating Two solid state relays, SPST, normally open, Form A 120 mA at 140 Vac or 180 VdcSerial Communications (standard)Signal TypesData RatesOutput Isolation Serial Protocols Modbus Modes Modbus Compliance Digital Addressing RS232 or RS485 (half or full duplex)300, 600, 1200, 2400, 4800, 9600, 19200 baud250V rms working, 2.3 kV rms per 1 min testModbus RTU, Modbus ASCII, Laurel ASCIIRTU or ASCIIModbus over Serial Line Specification V1.0 (2002)247 Modbus addresses. Up to 32 devices on an RS485 line without a repeaterPower InputStandard Power Low Power Option Power Frequency Power Isolation Power Consumption 85-264 Vac or 90-300 Vdc10-48 Vdc or 12-32 VacDC or 47-63 Hz250V rms working, 2.3 kV rms per 1 min test 2W typical, 3W with max excitation outputMechanicalDimensions MountingElectrical Connections 129 x 104 x 22.5 mm case35 mm rail per DIN EN 50022 Plug-in screw-clamp connectorsEnvironmentalOperating Temperature Storage Temperature Relative Humidity Cooling Required 0°C to 55°C-40°C to 85°C95% at 40°C, non-condensingMount transmitters with ventilation holes at top and bottom. Leave 6 mm (1/4") between transmitters, or force air with a fan.PinoutMechanicalApplication Examples of Totalizing Meters and TransmittersCombining Two TotalsA+B, A-B, A/B and AxB arithmetic functions are available with the Extended totalizing transmitter. A+B can sum two totals, while A-B subtracts the outflow total from inflow total. A/B ratio applied to two totals helps assure the proper mixing of components.Up or Down Counting with PresetA single Laureate dual-channel totalizing transmitter will handle two repetitive fill operations by counting from zero up to a preset, or down from a preset to zero. The dual relay option is required.Machine ON Time and UtilizationAn easy way to measure the ON time of machines is to count AC line cycles and scale the total to hours. To displaymachine utilization or duty cycle in percent, use the Extended totalizing transmitter. Connect Channel A to switched AC and Channel B to the AC line, and apply a 100 multiplier to the A/B ratio.Custom Curve LinearizationThe Extended version of the Laureate dual channel totalizing transmitter can transmit scaled rate or total for the same channel at the push of a button, and alarm both the rate and total. The Extended version can also do curve linearization, thereby extending the working range and accuracy of flow transducers.Ordering GuideCreate a model a model number in this format: LT60FR, CBL04Transmitter Type LT Laureate 4-20 mA & RS485 Transmitter Main Board6 Standard Main Board 8 Extended Main BoardWith Standard Main Board: Scalable to ±999,999 for frequency, rate, square root of rate, up or down total, period, A-to-B time interval.With Extended Main Board: Above, plus rate and total simultaneously, ratio (A/B), draw (A/B-1), other arithmetic functions (AxB, A+B, A-B), phase angle, stopwatch, up/down counting, batching operation, linearization of nonlinear inputs.Power 0 Isolated 85-264 Vac or 90-300 Vdc 1 Isolated 12-32 Vac or 10-48 Vdc Input Type FR Dual-Channel FrequencyAccessoriesCBL04 RS232 cable, 7ft. Connects RS232 screw terminals of LT transmitter to DB9port of PC.CBL02 U SB to RS232 adapter cable. Combination of CBL02 and CBL04 connectstransmitter RS232 terminals to PC USB port.。

最新一代手动带有微调系统的三坐标测量机Manual Coordinate Measuring Machine with adjust device.技术描述 Technical Description主机 Machine：该测量机系统是同类产品性能价格比非常好的一款测量仪器。

它填补了传统精密测量仪器和测量机之间的空白。

This coordinate measuring system is the only one of its class that offers high price/performance ratio;it’s the missing link between the conventional precision measuring tool and the coordinate machine.这是真正的由瑞士在Renens生产和制造的产品，它尤其可以满足工业生产对高性能测量产品的要求。

This true SWISS MADE product is produced at Renens, in a cell specially laid out to meet the high requirements of its manufacturer.TESA的新型MICRO-HITE 3D_F测量机的精度可以达到微米，令人感到惊奇的是操作非常简单，即使操作者并不熟悉测量操作。

该测量机所使用的测量软件REFLEX软件具有用户友好的界面操作方式，操作者在使用它几个小时后就可以测量复杂的工件。

TESA’s new MICRO-HITE3D_F measures to the micron. Surprisingly easy to operate, there’s noneed of for the operator to be an expert. Owing to the interactive TESA REFLEX application software,he will be able to take complex part measurements after just a few hours of use.该类测量机带有精密调节系统，方便用户的使用。

On the computational power of a continuous-spaceoptical model of computationThomas J.Naughton and Damien WoodsTASS Research Group,Department of Computer Science,National University of Ireland,Maynooth,Ireland.Email:tomn,dwoods@cs.may.ieURL:http://www.cs.may.ie/TASSDate:January2001Technical Report:NUIM-CS-TR-2001-01Key words:model of computation,analog computation,real computation,computability, non-Turing computation,continuous space,Type-2machine,optical information processing, optical computing architectures and algorithmsAbstractOur continuous-space model of computation was developed for the analysis of analog optical computing architectures and algorithms.We show a lower boundon the computational power of this model by Type-2machine simulation.Weview each Type-2computation as a sequence of repeated instantiations of a singlehalting Turing machine.We also illustrate,by example,a problem solvable withour model that is not Type-2computable.1IntroductionIn this paper we introduce to the theoretical computer science community a continuous-space model of computation.The model was developed for the analysis of(analog)Fourier optical computing architectures and algorithms,specifically pattern recognitionand matrix algebra processors[4].The functionality of the model is limited to opera-tions routinely performed by optical scientists.The model uses afinite number of twodimensional(2-D)images offinite size and infinite resolution for data storage.Themodel’s data processing unit(finite control)can navigate,copy,and perform other op-tical operations on its images.A useful analogy would be to describe the model as arandom access machine,without conditional branching and with registers that each holdan image of infinite resolution.This model has previously[3,2]been shown to be atleast as computationally powerful as a universal Turing machine(TM).However,its ex-act computational power has not yet been characterised.To demonstrate a lower boundon computational power we simulate a Type-2machine with the model.Interestingly,we have evidence that the model can decide at least one language that a Type-2machinecan not.In Sect.2,we give a more formal introduction to the optical model of compu-tation.In Sect.3,we outline some relevant points from Type-2theory of effectivity,andpresent our working view of Type-2machines.In Sect.4,we present our simulation ofa Type-2machine andfinish with a discussion and conclusion(Sects.5and6).2The optical computational modelEach instance of our machine[3,2]consists of a memory containing a program(anordered list of operations)and an input.The memory structure is in the form of a2-Dgrid of rectangular elements,as shown in Fig.1(a).The grid hasfinite size and a schemeto address each element uniquely.Each grid element is a2-D continuous complex-valued image.Three of these images are represented in the machine by the identifiersa,b,and sta(two global storage locations and a program start location,respectively).The program is a list of instructions for the data processing unit and is stored in memorywith the input.The most basic operations available to the programmer,ld and st(bothparameterised by two column addresses and two row addresses),copy rectangular (,)subsets of the grid into and out of image a,respectively. Upon such loading and storing the image information is rescaled to the full extent of thetarget location(as depicted in Fig.1(b)).Two additional real-valued parameters lowerand upper,specifying lower and upper cut-off values,filter the rectangle’s contents byamplitude before rescaling,lower Re lowerupper Re upperotherwiseOther atomic operations perform horizontal and vertical1-D Fourier transforms(h andv,respectively)on the2-D image a,multiply()a by b(point by point),perform acomplex addition(+)of a and b,and produce the complex conjugate()of the imagein a.By default,the result of any such operation will be found in a.Finally,there aretwo controlflow commands br and hlt,which unconditionally branch to another partof the program,and halt execution,respectively.A more formal specification of the123123ab (a )(b )staFigure 1:Schematics of (a )the grid memory structure of our model of computation,showing ex-ample locations for the ‘well-known’addresses a ,b and sta ,and (b )loading (and automaticallyrescaling)a subset of the grid into grid element a .The program ld 33hlt instructs the machine to load into default location a the portion of the grid addressed by columns 2through 3and rows 1through 3.model including sample machines and citations to previous optical models can be found in [3,2].As might be expected for an analog processor,its programming language does not support comparison of arbitrary image values.Fortunately,not having such a compar-ison operator will not impede us from simulating a branching instruction (see Sect.4).In addition,address resolution is possible since (i )our set of possible images is finite (each memory grid has a fixed size),and (ii )we anticipate no false positives (we will never seek an address not from this finite set).Each syntactically-correct program must form a word in the language defined by the following grammar,ld st brhlth vwhere we use capital letters for nonterminals and lowercase letters for terminals.Someexplanation of the symbols follows.,by convention,is the first nonterminal.Mem-ory and control operations,,and optical processing operations,,can be combined sequentially.Load (ld )and store (st )operations address a portion of the memory using two column,two row,and the two real-valued numbers mentioned previously.(In this work,these real-valued numbers are expressed as quotients.)Branching requires row and column coordinates.The optical operations require no parameters;they act on images a and b by default.The symbol represents an empty or undefined image.Al-though not part of the programmer’s set of operations,empty or undefined grid elements can appear in the absence of a programming symbol.The symbol denotes an image that encodes a binary number and can be used to specify a row or column of the memory grid.Such an address encoding scheme would have to be determined by the designer of any physical realisation of the theoretical machine.The symbol ‘’is used to sepa-rate the numerator and denominator when specifying the amplitude filter lower upperFigure2:Our working view of a Type-2machine:(T)a halting TM;()the output tape;() the input tape;()the nonvolatile‘work tape’.Controls A,B,and C represent the functionality to read from,write to,and read/write to,respectively.with rational numbers.The symbol‘’may be required to separate symbols under some encoding schemes.3Type-2Theory of EffectivityStandard computability theory[6]describes a set of functions that map from one count-ably infinite set offinite sequences to another.In the“Type-2Theory of Effectivity”(TTE)[7],“computation”refers to processing over infinite sequences of symbols,that is,infinite input sequences are mapped to infinite output sequences.If we use two or more symbols the set of such sequences is uncountable;TTE describes computation over uncountable sets and their subsets.The following is a definition of a Type-2ma-chine as taken from[7].Definition1.A Type-2machine M is a Turing machine with k input tapestogether with a type specification with,giv-ing the type for each input tape and the output tape.In this definition,is afinite alphabet of two or more symbols,is the set of allfinite length strings over,is the set of all infinite length strings over.There are two possible input/output tape types,one holds words from and the other from.Input tapes are one-way read only and the output tape is one-way write only.If the output tape restriction was not in place any part of an infinite output would not be guaranteed to befixed as it could possibly be overwritten at a future time.Hence,finite outputs from Type-2computations are useful for approximation or in the simulation of possibly infinite processes.A Type-2machine eitherfinishes its computation infinite time with afinite number of symbols on its output tape,or computes forever writing an infinite sequence.Machines that compute forever while outputting only afinite number of symbols are undefined in Type-2theory[7].3.1A new view of Type-2computationsWe maintain that a Type-2machine can be viewed as a repeatedly instantiated halting TM that has an additional(read-only)input tape and an additional(write-only)output tape.(Without loss of generality,thefinite number of input tapes from Def.1can bemapped to a single tape.)The machine also has a nonvolatile‘work tape’that stores symbols between repeated instantiations(‘runs’)of the halting TM.This is illustrated in Fig.2.T is the halting TM.Control A represents the functionality to read from .Control B represents the functionality to write to.Control C represents the functionality to write to and read from.A Type-2computation will proceed as follows.T is instantiated at its initial state with blank internal tape(s).It reads a symbol bining this with symbols (if any)left on by the previous instantiations,it can,if required,write symbols on and.T then halts,is instantiated once more with blank internal tape(s),and the iteration continues.The computation will either terminate with afinite sequence of symbols on the output tape or compute forever writing out an infinite sequence.In this light,an infinite Type-2machine computation corresponds to an infinite sequence of instantiations of a single halting TM(plus extra computation steps for controls A,B, and C).4SimulationWe use simulation as a technique to measure computational power.If we can show that machine can simulate every operation that machine performs,we can say thatis at least as powerful as,without ever having to explicitly compare functionality. Universality for our machine has already been proved[3,2]following Minsky’s arith-metization of TMs[1](representing a TM in terms of quadruples of integers).Four images were used to represent Minsky’s four registers,s,m,n,and z.Image s was the symbol under the TM tape head,image m encoded a stack holding all symbols on the tape to the left of the tape head,n encoded a stack holding all symbols on the tape to the right of the tape head,and z was used for temporary storage.We have since significantly simplified our technique of TM simulation.In general,a TM could be simulated by a look-up table and the two stacks m and n, as shown in Fig.3.A given TM(e.g.Fig.3(a))is written in the imperative form illus-trated in Fig.3(b),where the simulation of state changes and TM tape head movements can be achieved with two stacks and two variables as shown in Fig.3(c).In order to simulate a stack we previously effected indirect addressing with a com-bination of program self-modification and direct addressing.We also simulated condi-tional branching by combining indirect addressing and unconditional branching[3,2]. This was based on a technique by Rojas[5]that relied on the fact that our set of sym-bols isfinite.Without loss of generality,in our simulation we will restrict ourselves to three possible symbols,‘0’,‘1’and a blank symbol‘b’.Then,the conditional branching instruction“if(=‘1’)then jump to address,else jump to”is written as the uncon-ditional branching instruction“jump to address”.We are only required to ensure that the code corresponding to addresses and is always at addresses‘1’and‘0’,respec-tively.In a2-D memory,multiple such branching instructions are possible.The data in the stack can be encoded as a sequence of images,compressed recursively into a single grid image.0R 1R b R b Lstate;halt:=false;while(halt=false)select case(q,s)(0,0):fn(1,R,1);(0,1):fn(0,R,1);(0,b):fn(b,R,2);(1,b):fn(b,L,3);else:halt:=true;(b)void fn(s’,d,q’)if(d=R)m.push(s’);s:=pop(n);elsem.push(s’);s:=pop(m)q=q’;(c)Figure3:Figure showing(a)an example TM table of behaviour.This machineflips the binary value at its tape head and halts in an accepting state.If there is a blank at its tape head it halts in a rejecting state;(b)an illustration of how an arbitrary TM table of behaviour might be simulated with pseudocode;(c)how one might effect a TM computation step with stacks m and n.4.1Push and pop routinesIn Sect.2we mentioned the images a and b that are in every machine.For the push and pop routines,we make use of a third image c.When the pop routine,illustrated by the pseudocode below,is called the column number of the intended stack will have already been copied to a,pop:st(&)//overwrite four blanks()below with symbol in ald(r r0/11/1)st(ab)//rescale contents of a over both registers a,bst(c)ld(b)st(r r0/11/1)ld(c)(All stacks will be located on a‘well-known’row.Therefore,the row number,depicted by‘r’in the routine above,can be hardcoded into the machine.)In thefirst three state-ments,we use self-modification to load the contents of the stack into a and rescale it over both a and b.Image a now contains the top element and b contains the remaining contents of the stack.The top element is temporarily stored in c,the contents of the stack stored back in its original location,and the top element returned to a before the routine ends.The following pseudocode for the push routine,psh:st(&)ld(r r0/11/1)st(b)ld(c)ld(ab)st(r r0/11/1)is called with the address of the intended stack in a and the new element in c.The contents of the stack are copied into b and the new element moved to a.Then both aand b are rescaled into one image,pushing the new element onto the top of the stack,and the contents stored back in the stack’s original location.We use these push and poproutines to simulate the movement of the TM tape head as illustrated in Fig.3(c).4.2Shorthand conventionsTo facilitate persons reading and writing programs,a shorthand notation is used.Suchnotations used in our simulation are summarised in Fig.5.Note that in this shorthand,instead of having to specify exact addresses,we give images a temporary name(suchas‘x1’)and refer to the address of that image with the ampersand(‘&’)character.Ex-pansion from this shorthand to the long-form programming language is a mechanicalprocedure that could be performed as a‘tidying-up’phase by the programmer or by apreprocessor.Unless otherwise stated,we assume that the bounds on image amplitudevalues are MIN and MAX.The load and store commands contain()and ()for their lower and upper parameters,respectively,indicating that the complete image is to be accessed.As a convention we use boldface and underlining in programgrid elements whose images can be modified by the machine and italics to highlightpoints of machine termination within the grid.4.3Type-2machine simulationAn arbitrary Type-2machine is incorporated into our simulation as follows.Firstly,transform the Type-2machine into a Type-2machine that operates over our alphabet.Then rewrite the machine to conform to the form shown in Fig2.For the purposesof this simulation we represent with T’s internal tape(effectively using the semi-infinite tape to the left of the tape head).When T halts it will either be in an acceptingor rejecting state.T’s accepting state is equivalent to the simulator’s initial state(i.e.Tpasses control back to the simulator when it halts).At the simulator’s initial state itchecks if T’s tape head was at a non-blank symbol when T halted.If so it writes thatsymbol to.All symbols to the left of the tape head(equivalent to the contents of)will be retained for the next instantiation of T.Next,the simulator reads a symbol fromand writes it on T’s tape in the cell being scanned by T’s tape head.It then passescontrol to T,by going into T’s initial state.If at any time T halts in a rejecting statewe branch to the simulator’s halt state.In Fig.4,we provide a specific example of aType-2machine thatflips the bits of its binary input.If the input is an infinite sequenceit computes forever,writing out an infinite sequence offlipped bits.If the input isfiniteit outputs afinite sequence offlipped bits.4.4Explanation of Fig.4The simulation by our model is shown in Fig.4.It consists of two parts(separated in thediagram for clarity).The larger is the simulator(consisting of functionality A,B,and Cfrom Fig.2,stacks and,and a universal TM).A TM table of behaviour must beinserted into this simulator[the example TM is that from Fig.3(a)].It has a straight-forward encoding.Notice how for each row of the table of behaviouran ordered triple is placed at the location addressed by the coordinates. Stacks and represent the one-way tapes from Fig.2.We pop from and push to.The stack m encodes all symbols on T’s tape to the left of tape head,and them snY Y‘0’‘1’‘b ’s t a abc1602b r 2p o p :8&x 1&x 2&x 3&x 4x 1x 2s t s t l ds tc s t s ts ts tl db ca bx 7x 8r e tm v r :6m n sP h P p s tr e t a c c :40h l t 2Y 1s q S1s Y 002R Lr e jl d P h b r 2‘0’q 1b r01234...0q 0R a c cq Sq 0q 1q 2q 3Figure 4:Simulating Type-2machines on our model of computation.The machine is in two parts for clarity.The larger is a universal Type-2machine simulator and the smaller is its halting TM table of behaviour.[The example TM we use here is that in Fig.3(a ).]The simulator is written in a compact shorthand notation.The expansions into sequences of atomic operations are shown in Fig.5.(a)Y ld brm ld brn ld brm st ld brn st ld brY st ld br(b)q0s&y1q0br*s ld st br y2(c)R‘b’mvr q2R‘0’mvr q1R‘1’mvr q1L‘b’mvl q3(d)Y ld599/11ld79901/m ld099/11 ld39901/ Y st599/11 st79901/m st099/11 st39901/s ld299/11 ld219901/c ld2299/11st29901/b st2199/11st229901/ab ld2199/11 st209901/‘0’ld999/11 ld109901/‘b’ld1199/11 br0psh br7br0mvl br5br0rej br3st9801/ld ld99/11 st st99/11stack n encodes all symbols on T’s tape to the right of the tape head.Image s encodes the symbol currently being scanned by T’s tape head.Execution of the simulator begins with an input encoded in stack[grid element]and thefinite control pointing at sta[grid element].Controlflow always proceeds from left to right unless one of br or hlt is encountered.The stacks are indirectly addressed to allow push and pop operations to take a stack as an argument(e.g.the image at address labelled m contains the column number of stack m).The simulation is written in a shorthand whose long form is given in Fig.5.5DiscussionType-2machines do not describe all of the computational capabilities of our model.The model’s atomic operations operate on a continuum of values in constant time(indepen-dent of input size)and would not have obvious TM or Type-2machine implementations.Consider the language defined by the following characteristic function,whereifotherwiseand where is an infinite sequence over alphabet.This language is acceptable but not decidable by a Type-2machine[7](Ex.2.1.4.6).In our model,we encode a boolean value in an image by letting a-function at its origin denote a‘1’and an empty image (or an image with low background noise)denote a‘0’.An infinite sequence of boolean-valued images appear concatenated together in one image without loss of information (by definition,images in our machine have infinite spatial resolution).An off-centre peak can be centred for easy detection through Fourier transformation(using the fol-lowing shorthand program ld h stAcknowledgementsWe gratefully acknowledge advice and assistance from J.Paul Gibson and the Theoret-ical Aspects of Software Systems group,NUI Maynooth.References[1]Marvin putation:Finite and Infinite Machines.Series in AutomaticComputation.Prentice Hall,Englewood Cliffs,New Jersey,1967.[2]Thomas J.Naughton.Continuous-space model of computation is Turing universal.In Sunny Bains and Leo J.Irakliotis,editors,Critical Technologies for the Future of Computing,Proceedings of SPIE vol.4109,San Diego,California,August2000.To appear.[3]Thomas J.Naughton.A model of computation for Fourier optical processors.InRoger A.Lessard and Tigran Galstian,editors,Optics in Computing2000,Proceed-ings of SPIE vol.4089,pages24–34,Quebec,Canada,June2000.[4]Thomas Naughton,Zohreh Javadpour,John Keating,Miloˇs Kl´ıma,and Jiˇr´ıRott.General-purpose acousto-optic connectionist processor.Optical Engineering, 38(7):1170–1177,July1999.[5]Ra´u l Rojas.Conditional branching is not necessary for universal computation invon Neumann computers.Journal of Universal Computer Science,2(11):756–768, 1996.[6]Alan M.Turing.On computable numbers,with an application to the Entschei-dungsproblem.Proceedings of the London Mathematical Society ser.2,42(2):230–265,1936.Correction in vol.43,pp.544–546,1937.[7]Klaus putable Analysis.Springer,Berlin,2000.11。