HDSP-3903中文资料

Data Sheet 26301.100†The A3933SEQ is a three-phase MOSFET controller for use with bipolar brushless dc motors. It drives all n-channel external power FETs, allowing system cost savings and minimizing r (DS)on power loss.The high-side drive block is implemented with bootstrap capacitors at each output to provide the floating positive supply for the gate drive.The high-side circuitry also employs a unique “intelligent” FETmonitoring circuit that ensures the gate voltages are at the proper levels before turn-on and during the ON cycle. This device is targeted for applications with motor supplies from 12 V to 28 V.Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. The peak load-current limit is set by the user’s selection of an input reference voltage and external sensing resistor. The fixed off-time pulse duration is set by a user-selected external RC timing network.A power-loss braking circuit brakes the motor on an under-voltage condition. The device is configured to either coast or dynamically brake the motor when this occurs.The A3933SEQ is supplied in a 32-lead rectangular (9 x 7) plasticchip carrier (quad pack) for minimum-area, surface-mount applica-tions.3933FEATURES AND BENEFITSI Drives External N-Channel FETs I Intelligent High-Side Gate DriveI Selectable Coast or Dynamic Brake on Power Down I Adjustable Dead Time for Cross-Conduction Protection I Selectable Fast or Slow Current-Decay Modes I Internal PWM Peak Current Control I Reset/Coast InputI 120° Hall Commutation with Internal Pullup I Internal 5-V RegulatorI Low-Side Synchronous Rectification I Direction ControlI PWM Speed-Control Input I Fault-Diagnostic Output IUnder-Voltage ProtectionTHREE-PHASE POWER MOSFET CONTROLLER115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-********THREE-PHASE POWER MOSFET CONTROLLERCopyright © 1999, Allegro MicroSystems, Inc.Functional Block DiagramRECOMMENDED OPERATING CONDITIONSSupply Voltage, V BB ...................................... 15 V to 28 Vor, if V BB = V CCOUT ................................... 12 V ±10%Logic Input Voltage Range, V IN .............. -0.3 V to +4.8 V Sense Voltage Range, V SENSE ........................ -1 V to +1 V RC Resistance.......................................... 10 k Ω to 100 k ΩPWM Frequency, f PWM ....................... 20 kHz to 100 kHzLOW-SIDE Dwg. FP-045V 1 OF 3 HIGH-SIDE DRIVERSTO 1 OF 3MOTOR PHASES TO LCAP3933THREE-PHASE POWER MOSFET CONTROLLERELECTRICAL SPECIFICATIONS at T A = 25°C, V BB = V CCOUT = 12 V, C load = 1000 pF, C boot = 0.047 µF (unless noted otherwise).LimitsParameterSymbolConditionsMinTypMaxUnitsSupply CurrentQuiescent Current I BB RESET low, f PWM = 40 kHz –1619mA RESET high–1517mA Reference Voltage V LCAP4.755.0 5.25V Ref. Volt. Load Regulation ∆V LCAP(∆ILCAP)I LCAP = 0 to -2 mA –1025mV Output VoltageV CCOUTV BB = 28 V10.81213.2V Output Voltage Regulation∆V CCOUT(∆ICCOUT)V BB = 28 V, I CCOUT = 0 to -10 mA––25mV Digital Logic LevelsLogic Input Voltage V IH 2.0––V V IL ––0.8V Logic Input CurrentI IH V IH = 2 V –<1.010µA I ILV IL = 0.8 V-70–-130µA Gate DriveLow-Side Output Voltage V GLxH 9.510.511.5V V GLxL I GLx = 1 mA––0.30V High-Side Output Voltage V GHxH 9.010.511.5V V GHxL I GHx = 1 mA ––0.25V Low-Side Output t rGLx 1 V to 8 V –50–ns Switching Time t fGLx 8 V to 1 V –40–ns High-Side Output t rGHx 1 V to 8 V –100–ns Switching Time t fGHx 8 V to 1 V –100–ns DEAD Timet DEADI DEAD = 10 µA –3000–ns (Source OFF to Sink ON)I DEAD = 215 µA –180–nsContinued —NOTES: 1.Typical Data is for design information only.2.Negative current is defined as coming out of (sourcing) the specified device terminal.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERELECTRICAL SPECIFICATIONS at T A = 25°C, V BB = V CCOUT = 12 V, C load = 0.001 µF, C boot = 0.047 µF (unless noted otherwise), continued.LimitsParameterSymbolConditions MinTypMaxUnitsBootstrap CapacitorBootstrap Charge Current I Cx 50100150mA Bootstrap Output Voltage V Cx Reference Sx9.510.511.5V Leakage CurrentI Cx High side switched high, Sx = V BB–1520µA Current LimitOffset Voltage V io –0±5.0mV Input bias current I SENSE ––-1.0µA RC Charge Current I RC 8509451040µA RC Voltage Threshold V RCL 1.0 1.1 1.2V V RCH 2.73.0 3.2V PWM frequency Rangef PWM Operating 20–100kHz Protection CircuitryUndervoltage Threshold UVLO Increasing V BB 9.710.210.7V Decreasing V BB 9.35–10.35V Boot-Strap Capacitor Volt.V CxSx V BB = 12 V 9.5––V High-Side Gate-Source Volt.V GHxSx – 6.3–V Fault Output VoltageV FAULT I O = 1 mA––0.8V Brake FunctionBrake Cap. Supply Current I BRKCAP V BB = 8 V, BRKSEL ≥ 2 V –30–µA Low-Side Gate VoltageV GLxHV BB = 0, BRKCAP = 8 V–6.6–VNOTES: 1.Typical Data is for design information only.2.Negative current is defined as coming out of (sourcing) the specified device terminal.3933THREE-PHASE POWER MOSFET CONTROLLERTerminalName1PGND 2RESET 3GLC 4SC 5GHC 6CC 7GLB 8SB 9GHB 10CB 11GLA 12SA 13GHA 14CA 15V CCOUT 16LCAP 17FAULT 18MODE 19V BB 20H121H322H223DIR 24BRAKE 25BRKCAP 26BRKSEL 27PWM 28RC 29SENSE 30REF 31DEAD 32AGNDRESET — A logic input used to enable the device, internally pulled up to V LCAP (+5 V). A logic HIGH will disable the device and force all gate drivers to 0 V, coasting the motor. A logic LOW allows the gate drive to follow commutation logic.This input overrides BRAKE.GLA/GLB/GLC — Low-side, gate-drive outputs for external NMOS drivers. External series-gate resistors (as close aspossible to the NMOS gate) can be used to control the slew rate seen at the power-driver gate, thereby controlling the di/dt and dv/dt of the SA/SB/SC outputs. Each output is designed and specified to drive a 1000 pF load with a rise time of 50 ns.SA/SB/SC — Directly connected to the motor, these terminals sense the voltages switched across the load. These terminals are also connected to the negative side of the bootstrap capaci-tors and are the negative supply connections for the floating high-side drive.GHA/GHB/GHC — High-side, gate-drive outputs for external NMOS drivers. External series-gate resistors (as close aspossible to the NMOS gate) can be used to control the slew rate seen at the power-driver gate, thereby controlling the di/dt and dv/dt of the SA/SB/SC outputs. Each output is designed and specified to drive a 1000 pF load with a rise time of 100 ns.CA/CB/CC — High-side connections for the bootstrap capaci-tors, positive supply for high-side gate drive. The bootstrap capacitor is charged to approximately V CCOUT when theassociated output SA/SB/SC terminal is low. When the output swings high, the voltage on this terminal rises with the output to provide the boosted gate voltage needed for n-channel power FETs.Terminal Descriptionscontinued next page115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERFAULT — Open-drain output to indicate fault condition; will go active high for any of the following:1 – invalid HALL input code,2 – high-side, gate-source voltage less than 7 V,3 – bootstrap capacitor not sufficiently charged, or4 – under-voltage condition detected at V CCOUT .The fault state for gate-source and bootstrap monitors are cleared at each commutation. If the motor has stalled, then the fault can only be cleared by toggling the RESET terminal or power-up sequence.MODE — A logic input to set current-decay method, internally pulled up to V LCAP (+5 V). When in slow-decay mode (logic HIGH), only the high-side FET is switched open during a PWM OFF cycle. The fast-decay mode (logic LOW) switches both the source and sink FETs.H1/H2/H3 — Hall-sensor inputs; internally pulled up to V LCAP (+5 V). Configured for 120° electrical spacing.DIR — A logic input to reverse rotation, see commutation logic table. Internally pulled up to V LCAP (+5 V).BRAKE — A logic input to short out the motor windings for a braking function. A logic HIGH will turn ON the low-side FETs, turn OFF the high-side FETs. Internally pulled up to V LCAP (+5 V). The braking torque applied will depend on the speed.BRKCAP — Connection for reservoir capacitor. This terminal is used to provide a positive power supply for the sink-drive outputs for a power-down condition. This will allow predict-able braking, if desired. A blocking diode to V CCOUT is re-quired. A 4.7 µF capacitor will provide 6.5 V gate drive for 300 ms. If a power-down braking option is not needed(BRKSEL = LOW) then this terminal should be tied to V CCOUT .BRKSEL — A logic input to enable/disable braking on power-down condition. Internally pulled up to V LCAP (+5 V). If held low, the motor will coast on a power-down condition.PWM — Speed control input, internally pulled up to V LCAP(+5 V). A logic LOW turns OFF all drivers, a logic HIGH will turn ON selected drivers as determined by H1/H2/H3 input logic. Holding the terminal high allows speed/torque control solely by the current-limit circuit via REF analog voltage command.RC — An analog input used to set the fixed off time with an external resistor (R T ) and capacitor (C T ). The t blank time is controlled by the value of the external capacitor (see Applica-tions Information). As a rule, the fixed off time should not be less than 10 µs. The resistor should be in the range of 10 k Ω to 100 k Ω.SENSE — An analog input to the current-limit comparator.A voltage representing load current appears on this terminal during ON time, when it reaches REF voltage, the comparator trips and load current decays for the fixed off-time interval.Voltage transients seen at this terminal when the drivers turn ON are ignored for time t blank .REF — An analog input to the current-limit comparator.Voltage applied here sets the peak load current.I peak = V REF /R S .V CCOUT — A regulated 12 V output; supply for low-side gate drive and bootstrap capacitor charge circuits. It is good practice to connect a decoupling capacitor from this terminal to AGND,as close to the device terminals as possible. The terminal should be shorted to V BB for 12 V applications.V BB — The A3933 supply voltage. It is good practice toconnect a decoupling capacitor from this terminal to AGND, as close to the device terminals as possible. This terminal should be shorted to V CCOUT for 12 V applications.LCAP — Connection for decoupling capacitor for the internal 5 V reference. This terminal can source no more than 2 mA.DEAD — An analog input. A resistor between DEAD and LCAP is selected to adjust turn-off to turn-on time. This delay is needed to prevent shoot-through in the external power FETs.The allowable resistor range is 20 k Ω to 430 k Ω, whichconverts to deadtime of 210 ns to 2.1 µs, using the following equation:t DEAD = (6.75 x 10-12 x R DEAD ) + (75 x 10-9).AGND — The low-level (analog) reference point for the A3933.PGND — The reference point for all low-side gate drivers.Terminal Descriptions (cont’d)3933 THREE-PHASE POWER MOSFET CONTROLLER Commutation Truth TableLogic Inputs Driver OutputsH1H2H3DIR GLA GLB GLC GHA GHB GHC SA SB SCH L H H L L H H L L H Z L H L L H L L H L H L Z H L H H L H H L L L H L L H Z L H L H H L L L L H L Z H L H H H L H L L L H Z L H L L H H L H L H L L H L Z H L H L H L L L L H L Z H H L L L L H L L L H Z L H H H L L L H L H L L H L Z L H L L L L H H L L H Z L L H H L L L H L H L Z H L L L H L H L L L H L L H ZInput LogicMODE PWM RESET Mode OperationL L L Fast decay PWM chop mode, current decayL H L Fast decay Peak current limit, selected drivers ONH L L Slow decay PWM chop mode. current decayH H L Slow decay Peak current limit, selected drivers ONX X H Coast All gate drive outputs OFF, clear fault logicBrake ControlBRAKE BRKSEL Normal Operation Under Voltage or Power Loss ConditionL L Normal run mode Coast, all gate drive outputs OFFL H Normal run mode Dynamic brake, all sink gate drives ONH L Dynamic brake, all sink gate drives ON Coast, all gate drive outputs OFFH H Dynamic brake, all sink gate drives ON Dynamic brake, all sink gate drives ONL = Low Level, H = High Level, X = Don’t Care, Z = High Impedance115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERApplications Informationbootstrap capacitor. When the bootstrap capacitor has been properly charged, the high side is turned back ON. The circuit will allow three faults of this type within one commutation cycle before signaling a fault and coast the motor (all gate outputs go low).2)Bootstrap Monitor. The bootstrap capacitor is charged whenever a sink-side MOSFET is ON, Sx output goes low, and the load current recirculates. This happens constantly during normal operation. A 60 µs timer is started at the beginning of this cycle and the capacitor is charged with typically 100 mA.The bootstrap capacitor voltage is clamped at approximately 87% of V CCOUT . If the capacitor is not charged to the clamp voltage in 60 µs, a fault is signaled and the motor will coast.3)Undervoltage. The internal V CCOUT regulator supplies the low-side gate driver and the bootstrap charge current. It is critical to ensure that the voltages are at a proper level before enabling any of the outputs. The undervoltage circuit is active during power up and will force a motor coast condition until V CCOUT is greater than approximately 10 V.4)Hall Invalid. Illegal codes for the HALL inputs (000 or 111) will force a fault and coast the motor.Faults are cleared at the beginning of each commutation. If a stalled motor results from a fault, the fault can only be cleared by toggling the RESET terminal or by a power-up sequence.Current Control. Internal fixed off-time PWM circuitry is implemented to limit load current to a desired value. The external sense resistor combined with the applied analog voltage to REF terminal will set the peak current level approximatelyI TRIP ≈ V REF /R S .After the peak level is reached, the sense comparator trips and the load current will decay for a fixed off time.An external resistor (R T ) and capacitor (C T ) are used to set the fixed off-time period (t off = R T x C T ). The t off should be in the range of 10 µs to 50 µs. Longer values for t off can result in audible noise problems.Torque control can be implemented by varying the REF input voltage as long as the PWM input stays high. If direct control of the torque/current is desired by PWM input, a voltage can be applied to the REF input to set an absolute maximum current limit.Bootstrap Capacitor Selection. The high-side bootstrap circuit operates on a charge-transfer principle. The gate charge (Q g ) specification of the external power MOSFET must betaken into consideration. The bootstrap capacitor must be large enough to turn on the MOSFET without losing significant gate voltage. If the bootstrap capacitor is too large, it would take too long to charge up during the off portion of the PWM cycle. The capacitor value must be selected with both of these constraints in mind.1)Minimum bootstrap capacitor value to transfer charge. The charge on the bootstrap capacitor should be 20x greater than the gate charge (Q g ) of the power MOSFET.Example: For Q g = 0.025 µC, selectC boot = 20 x Q g /10.5 V = 0.047 µF.Check for maximum V g drop at turn on: dq = C boot x dV g , where Q g = dq.dV g = dq/C boot = 0.025 µC/0.047 µF = 532 mV.2)Calculate minimum PWM “OFF” cycle with C boot = 0.047 µF.dt = r o x C boot x ln(0.036/[Q g /C boot + 0.036])where r o = 20 ohms, the equivalent internal series resistance of the bootstrap capacitor monitor circuit.The sink-side MOSFET will be held OFF for this minimum time such that the bootstrap capacitor can be recharged independently of the PWM input frequency.The above equation is valid for PWM cycles after the bootstrap capacitor has been charged once. For the first cycle after a motor phase commutates from Hi-Z to GHx ON, or during the first charging cycle at power-up, the circuit will ignore PWM signals until it has been charged.The time required to charge up at power up and at commutation change is approximately:t = C boot x 7 V/0.1 AProtection Circuitry. The A3933 will protect the external MOSFETs by shutting down the gate drive if any of the following conditions are detected:1)Gate Source Monitor (high side only). The voltage on the GHx terminals must stay 7 V higher than the source. If this voltage droops below the threshold, the high side turns OFF,and the low-side gate will turn ON in an attempt to recharge the3933 THREE-PHASE POWER MOSFET CONTROLLER Applications Information (cont’d)PWM Blank. The capacitor (C T) also serves as the means to set the blank time duration. After the off time expires, the selected gates are turned back ON. At this time, large current transients can occur during the reverse recovery time (t rr) of the intrinsic body diodes of the external MOSFETs. To prevent the current-sense comparator from thinking the current spikes are a real overcurrent event, the comparator is blanked:t blank = 1.9 x C T/(1 mA-2/R T)The user must ensure that C T is large enough to cover the current-spike duration.Load Current Recirculation. If MODE has been set for slow decay, the high-side (source) driver will turn OFF forcing the current to recirculate through the pair of sink MOSFETs. If MODE has been selected for fast decay, both the selected high-and low-side gates are turned OFF, which will force the current to recirculate through one sink MOSFET and the high-side clamp diode. Synchronous rectification (only on the low side) allows current to flow through the MOSFET, rather than the clamp diode, during the decay time. This will minimize power loss during the off period. It is important to take into account that, when switching, the intrinsic diodes will conduct during the adjustable deadtime.Braking. The A3933 will dynamically brake by forcing all sink-side MOSFETs ON. This will effectively short out the BEMF. During braking, the load current can be approximated by:I BRAKE = V BEMF/R LPower Loss Brake. The BRKCAP and BRKSEL terminals provide a power-down braking option. By applying a logic level to input BRKSEL, the system can control if the motor is dynamically braked or is allowed to coast during an undervoltage event. The reservoir capacitor on the BRKCAP terminal provides the power to hold the sink-side gates ON after supply voltage is lost. A logic high on BRKSEL will brake the motor, a logic low and it will coast.Layout. Careful consideration must be given to PCB layout when designing high-frequency, fast-switching, high-current circuits.1)The analog ground (AGND), the power ground (PGND), and the high-current return of the external MOSFETs (the negative side of the sense resistor) should return separately to the negative side of the motor supply filtering capacitor. This will minimize the effect of switching noise on the device logic and analog reference.2)Minimize stray inductances by using short, wide copper runs at the drain and source terminals of all power MOSFETs. This includes motor lead connections, the input power buss, and the common source of the low-side power MOSFETs. This will minimize voltages induced by fast switching of large load currents.3)Kelvin connect the SENSE terminal PC trace to the positive side of the sense resistor.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50003933THREE-PHASE POWER MOSFET CONTROLLERDimensions in Inches(controlling dimensions)Dwg. MA-006-32 in5NOTES: 1. Lead spacing tolerance is non-cumulative.2. Exact body and lead configuration at vendor’s option within limits shown3933THREE-PHASE POWER MOSFET CONTROLLERDimensions in Millimeters(for reference only)Dwg. MA-006-32 mm5201413NOTES: 1. Lead spacing tolerance is non-cumulative.2. Exact body and lead configuration at vendor’s option within limits shownThe products described here are manufactured under one or more U.S.patents or U.S. patents pending.Allegro MicroSystems, Inc. reserves the right to make, from time totime, such departures from the detail specifications as may be required topermit improvements in the performance, reliability, or manufacturabilityof its products. Before placing an order, the user is cautioned to verify thatthe information being relied upon is current.Allegro products are not authorized for use as critical components inlife-support devices or systems without express written approval.The information included herein is believed to be accurate and reliable.However, Allegro MicroSystems, Inc. assumes no responsibility for its use;nor for any infringement of patents or other rights of third parties whichmay result from its use.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-********THREE-PHASE POWER MOSFET CONTROLLERMOTOR DRIVERS FunctionOutput Ratings*Part Number †INTEGRATED CIRCUITS FOR BRUSHLESS DC MOTORS3-Phase Power MOSFET Controller —28 V 39333-Phase Power MOSFET Controller —50 V 39323-Phase Power MOSFET Controller —50 V 76002-Phase Hall-Effect Sensor/Driver 400 mA 26 V 3626Bidirectional 3-Phase Back-EMF Controller/Driver ±600 mA 14 V 89062-Phase Hall-Effect Sensor/Driver 900 mA 14 V 36253-Phase Back-EMF Controller/Driver ±900 mA 14 V 8902–A3-Phase Controller/Drivers ±2.0 A 45 V 2936 & 2936-120INTEGRATED BRIDGE DRIVERS FOR DC AND BIPOLAR STEPPER MOTORSDual Full Bridge with Protection & Diagnostics ±500 mA 30 V 3976PWM Current-Controlled Dual Full Bridge ±650 mA 30 V 3966PWM Current-Controlled Dual Full Bridge ±650 mA 30 V 3968PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 2916PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 2919PWM Current-Controlled Dual Full Bridge ±750 mA 45 V 6219PWM Current-Controlled Dual Full Bridge ±800 mA 33 V 3964PWM Current-Controlled Full Bridge ±1.3 A 50 V 3953PWM Current-Controlled Dual Full Bridge ±1.5 A 45 V 2917PWM Current-Controlled Dual Full Bridge ±1.5 A 45 V 2918PWM Current-Controlled Microstepping Full Bridge ±1.5 A 50 V 3955PWM Current-Controlled Microstepping Full Bridge ±1.5 A 50 V 3957PWM Current-Controlled Dual DMOS Full Bridge ±1.5 A 50 V 3972Dual Full-Bridge Driver ±2.0 A 50 V 2998PWM Current-Controlled Full Bridge ±2.0 A 50 V 3952DMOS Full Bridge PWM Driver ±2.0 A 50 V 3958Dual DMOS Full Bridge ±2.5 A 50 V 3971UNIPOLAR STEPPER MOTOR & OTHER DRIVERSVoice-Coil Motor Driver ±500 mA 6 V 8932–A Voice-Coil Motor Driver ±800 mA 16 V 8958Unipolar Stepper-Motor Quad Drivers 1 A 46 V 7024 & 7029Unipolar Microstepper-Motor Quad Driver 1.2 A 46 V 7042Unipolar Stepper-Motor Translator/Driver 1.25 A 50 V 5804Unipolar Stepper-Motor Quad Driver 1.8 A 50 V 2540Unipolar Stepper-Motor Quad Driver 1.8 A 50 V 2544Unipolar Stepper-Motor Quad Driver 3 A 46 V 7026Unipolar Microstepper-Motor Quad Driver 3 A 46 V 7044*Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits or over-current protection voltage limits. Negative current is defined as coming out of (sourcing) the output.†Complete part number includes additional characters to indicate operating temperature range and package style.Also, see 3175, 3177, 3235, and 3275 Hall-effect sensors for use with brushless dc motors.。

DevicesPart Number HDSP-ColorDescriptionFront View0781High-Efficiency Red Numeric, Right Hand DP A 0782Low Power Numeric, Left Hand DP B 0783Over Range ±1C 0784HexadecimalD 0791High-Efficiency Red Numeric, Right Hand DP A 0792High Brightness Numeric, Left Hand DP B 0793Over Range ±1C 0794HexadecimalD 0881YellowNumeric, Right Hand DP A 0882Numeric, Left Hand DP B 0883Over Range ±1C 0884HexadecimalD 0981High-Performance GreenNumeric, Right Hand DP A 0982Numeric, Left Hand DP B 0983Over Range ±1C 0984HexadecimalDHDSP-078x HDSP-079x HDSP-088x HDSP-098xFeatures• Three Character Options Numeric, Hexadecimal, Over Range• Three ColorsHigh Efficiency Red, Yellow,High Performance Green• 4x 7 Dot Matrix Character • High Efficiency Red, Yellow and High Performance Green • Two High Efficiency Red OptionsLow Power, High Brightness • Performance Guaranteed Over Temperature• High Temperature Stabilized • Memory Latch/Decoder/DriverTTL Compatible• Categorized for Luminous IntensityDescriptionThese standard solid state displays have a 7.4 mm (0.29 inch) dot matrix character and an on-board IC with data memory latch/decoder and LED drivers in a glass/ceramic package.The hermetic HDSP-078x,-079x/-088x displays utilize a solder glass frit seal. The HDSP-098X displays utilize an epoxy glass-to-ceramic seal.The numeric devices decode posi-tive BCD logic into characters “0-9,” a “–” sign, decimal point,and a test pattern. Thehexadecimal devices decodeGlass/Ceramic Numeric and Hexadecimal Displays for Industrial Applications Technical Datapositive BCD logic into 16characters, “0-9, A-F.” An input is provided on the hexadecimal devices to blank the display (all LEDS off) without losing the contents of the memory.The over range device displays “±1” and right hand decimal point and is typically driven via external switching transistors.COUNTRY CODEPackage DimensionsAbsolute Maximum RatingsNotes:1. The nominal thermal resistance of a display mounted in a socket that is soldered onto a printed circuit board isRθJA=50°C/W/device. The device package thermal resistance is RθJ-PIN = 15°C/W/device. The thermal resistance device pin-to-ambient through the PC board should not exceed 35°C/W/device for operation up to T A = +100°C.2. Voltage values are with respect to device ground, pin 6.3. These displays are categorized for luminous intensity with the intensity category designated by a letter code located on the back ofthe display package. Case temperature of the device immediately prior to the light measurement is equal to 25°C.Electrical/Optical Characteristics T A = –55°C to +100°CNotes:4. The luminous intensity at a specific operating ambienttemperature, I v(T A), may be approximated from the following exponential equation: I v(T A)=I v(25°C) e[k(T-25°C)].Device KHDSP-078 Series–0.0131/°CHDSP-079x SeriesHDSP-088x Series–0.0112/°CHDSP-098x Series–0.0104/°C 5. The dominant wavelength, λd, is derived from the CIE chroma-ticity diagram and represents the single wavelength whichdefines the color of the device.6. The HDSP-088X and HDSP-098X series devices are categor-ized as to dominant wavelength with the category designated by a number on the back of the display package.7. All typical values at V CC = 5.0 V and T A = 25°C.Operational ConsiderationsElectricalThese devices use a modified4x7 dot matrix of light emitting diodes to display decimal/ hexadecimal numeric informa-tion. The high efficiency red and yellow displays use GaAsP/GaP LEDs and the high performance green displays use GaP/GaP LEDs. The LEDs are driven by constant current drivers, BCD information is accepted by the display memory when the enable line is at logic low and the data islatched when the enable is atlogic high. Using the enable pulsewidth and data setup and holdtimes listed in the RecommendedOperating Conditions allows datato be clocked into an array ofdisplays at a 6.7MHz rate.The decimal point input is activelow true and this data is latchedinto the display memory in thesame fashion as the BCD data.The decimal point LED is drivenby the on-board IC.The blanking control input on thehexadecimal displays blanks(turns off) the displayedinformation without disturbingthe contents of display memory.The display is blanked at aminimum threshold level of 2.0volts. When blanked, the displaystandby power is nominally 250mW at T A = 25°C.The ESD susceptibility of the ICdevices is Class A of MIL-STD-883 or Class 2 of DOD-STD-1686and DOD-HDBK-263.AMechanicalThese displays are hermetically sealed for use in environments that require a high reliability device. These displays are designed and tested to meet a helium leak rate of5x10-8cc/sec.These displays may be mounted by soldering directly to a printed circuit board or insertion into a socket. The lead-to-lead pin spacing is 2.54 mm (0.100 inch) and the lead row spacing is 15.24 mm (0.600 inch). These displays may be end stacked with 2.54 mm (0.100 inch) spacing between outside pins of adjacent displays. Sockets such as Augat 324-AG2D (3 digits) or Augat 508-AG8D (one digit, right anglemounting) may be used.The primary thermal path forpower dissipation is through thedevice leads. Therefore, to insurereliable operation up to anambient temperature of +100°C,it is important to maintain abase-to-ambient thermalresistance of less than35°C watt/device as measured ontop of display pin 3.For further information onsoldering and post soldercleaning, see Application Note1027, Soldering LEDComponents.PreconditioningThese displays are 100% pre-conditioned by 24 hour storage at125°C, at 100°C for the HDSP-098x Series.Contrast EnhancementThese display devices aredesigned to provide an optimumON/OFF contrast when placedbehind an appropriate contrastenhancement filter. For furtherinformation on contrastenhancement, see ApplicationNote 1015, ContrastEnhancement for LEDDisplays.Over Range DisplayThe over range devices display“±1” and decimal point. Thecharacter height and packageconfiguration are the same as thenumeric and hexadecimaldevices. Character selection isobtained via external switchingtransistors and current limitingresistors.Absolute Maximum RatingsDescription Symbol Min Max Unit Storage Temperature, Ambient T S–65+125°C Operating Temperature, Ambient T A–55+100°C Forward Current, Each LED I F10mA Reverse Voltage, Each LED V R5VPackage DimensionsLuminous Intensity per LED(Digit Average) at T= 25°C Figure 3. Typical Driving Circuit.Notes:0: Line switching transistor in Figure 7 cutoff.1: Line switching transistor in Figure 7 saturated.X: ‘don’t care.’Electrical Characteristics T A = –55°C to +100°CColor Bin Limits (Dominant Wavelength)Note:Bin categories are established for classification of products. Productsmay not be available in all bin categories. Please consult your localAgilent Technologies representative./semiconductorsFor product information and a complete list ofdistributors, please go to our web site.For technical assistance call:Americas/Canada: +1 (800) 235-0312 or(916) 788-6763Europe: +49 (0) 6441 92460China: 10800 650 0017Hong Kong: (+65) 6756 2394India, Australia, New Zealand: (+65) 6755 1939Japan: (+81 3) 3335-8152 (Domestic/Interna-tional), or 0120-61-1280 (Domestic Only)Korea: (+65) 6755 1989Singapore, Malaysia, Vietnam, Thailand,Philippines, Indonesia: (+65) 6755 2044Taiwan: (+65) 6755 1843Data subject to change.Copyright © 2004 Agilent Technologies, Inc.Obsoletes 5964-6390EJuly 14, 20045988-2261EN。

HDSP-431G中文资料Agilent HDSP-431G, HDSP-433G,QDSP-499G 10 mm Three Digit Slim Font with 2-Colons Seven Segment Displays Data SheetFeaturesExcellent appearance ?Slim font design ?Mitered corners, evenly illuminated segmentsGray face for optimum on/off contrast ?Choice of colors: green ?Choice of character size: 10 mm (0.4 inch)?Characterized for luminous intensityDescriptionThe 10 mm (0.4 inch) Three Digit Slim Font with 2-Colons Seven Segment Displays incorporates a new slim font character design. This slim font features narrow width,specially mitered segments to give a fuller appearance to the illuminated character. Faces of these displays are painted a neutral gray for enhanced on/off contrast.Devices GreenDescriptionHDSP-431G 3 Digit, Common Anode, Untinted-Diffused, 0.4" Display HDSP-433G 3 Digit, Common Cathode, Untinted-Diffused, 0.4" Display QDSP-499G3 Digit, Common Anode, Untinted-Diffused, 0.4" Display,without Pin 6 and No DP.All devices are available in either common anode or common cathode configuration with tinted green segments.Part Numbering System5082- x xx x-x x x xxHDSP- x xx x-x x x xxMechanical Options[1]00: No Mechanical OptionColor Bin Options[1,2]0: No Color Bin LimitationMaximum Intensity Bin[1,2]0: No Maximum Intensity Bin LimitationMinimum Intensity Bin[1,2]0: No Minimum Intensity Bin LimitationDevice Configuration/Color[1]G: GreenDevice Specific Configuration[1]Refer to Respective Data SheetPackage[1]Refer to Respective Data SheetNotes:1.For codes not listed in the figure above, please refer to the respective data sheet or contact your nearest Agilent representativefor details.2.Bin options refer to shippable bins for a part-number. Color and Intensity Binbs are typically restricted to 1 bin per tube (exceptions may apply). Please refer to respective data sheet for specific bin limit information.Package Dimensions (HDSP-431G/HDSP-433G/QDSP-499G)NOTES:1. ALL DIMENSIONS ARE IN MILLIMETERS (INCHES).2. UNLESS OTHERWISE STATED, TOLERANCES ARE ± 0.25 mm.FRONT VIEWRIGHT SIDENOTE: QDSP-499G DOES NOT HAVE PIN 6 AND THEREFORE DP1, DP2, AND DP3 ARE NOT DISPLAYED.PIN 123456789101112131415FUNCTIONDIGIT 1 COMMON A/CE C DDIGIT 2 COMMON A/C DPDIGIT 3 COMMON A/CG NO PIN NO PIN B A NO PINL1, L2, & L3 COMMON A/CFAbsolute Maximum Ratings at T A = 25?CDescriptionGreen Units Average Power per Segment or DP65mW Peak Forward Current per Segment or DP 100mA DC Forward Current per Segment or DP 25mA Operating Temperature Range –40 to +105?C Storage Temperature Range –40 to +105?C Reverse Voltage per Segment or DP3V Wave Soldering Temperature for 3 Seconds 1.59 mm below Body250?CNote:1. Derate above 40?C at 0.33 mA/?C for Green.Electrical/Optical Characteristics at T A = 25?C Device Series ParameterSymbol Min.Typ.Max.Units Test Conditions HDSP-431G/Luminous Intensity/I V3.2005.000mcdI F = 10 mAHDSP-433G/Segment (Digit QDSP-499GAverage)Forward Voltage/V F 2.25 2.50V I F = 20 mA Segment or DP Peak Wavelength λPEAK 568nm I F = 20 mA Dominant Wavelength λd 573nm I F = 20 mA Reverse CurrentI R100μAV R = 5 VNotes:1. Typical specification for reference only. Do not exceedabsolute maximum ratings.2.The do minant wavelength, λ, is derived from the CIE chromaticity diagram and is that single wavelength which defines the color of the device.Internal Circuit Diagram (Common Cathode)Internal Circuit Diagram (Common Anode)157A 12B 11C 3D 4E 2F 15G 8DP 6NOTE: QDSP-499G DOES NOT HAVE PIN 6 CONNECTED.15712113421586NOTE: QDSP-499G DOES NOT HAVE PIN 6 CONNECTED.HDSP-301G/303G/561G/563GIV Bin Category Min.Max.K 1.800 3.600L 2.800 5.600M 4.5009.000Intensity Bin Limits (mcd)GreenDominant Wavelength (nm)ColorBin Min.Max.Green3570.00574.504567.00571.00Color CategoriesNote:1. All categories are established for classification of products.Products may not be available in all categories. Please contact your Agilent representatives for further clarification/information.Contrast EnhancementFor information on contrast enhancement, please see Application Note 1015.Soldering/CleaningCleaning agents from the ketone family (acetone, methyl ethyl ketone, etc.) and from the chlori-nated hydrocarbon family(meth-ylene chloride, trichloroethylene,carbon tetrachloride, etc.) are not recommended for cleaning LED parts. All of these various solvents attack or dissolve the encapsulating epoxies used to form the package of plastic LED parts.For information on soldering LEDs, please refer to Application Note 1027.Figure 1. Maximum allowable DC current vs.ambient temperature.Figure 2. Forward current vs. forward voltage.Figure 3. Relative luminous intensity vs. DC forward current.I D C – M A X I M U M D C C U R R E N T P E R S E G M E N T – m AT A – AMBIENT TEMPERATURE –°C403010205152535I F – F O R W A R D C U R R E N T P E R S E G M E N T – m AV F – FORWARD VOLTAGE – VR E L A T I V E L U M I N O U S I N T E N S I T Y (N O R M A L I Z E D T O 1 A T 10 mA F O R G R E E N )I F – DC FORWARD CURRENT – mA8642/semiconductors For product information and a complete list of distributors, please go to our web site.For technical assistance call:Americas/Canada: +1 (800) 235-0312 or (916) 788-6763Europe: +49 (0) 6441 92460China: 10800 650 0017Hong Kong: (+65) 6756 2394India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152 (Domestic/Interna-tional), or 0120-61-1280 (Domestic Only) Korea: (+65) 6755 1989Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843Data subject to change.Copyright ? 2004 Agilent Technologies, Inc. July 17, 20045988-4824EN。

Features•High light outputTypical intensities of up to 7.0 mcd/seg at 100 mA pk 1 of 5duty factor•Capable of high current driveExcellent for long digit string multiplexing •Four character sizes7.6 mm, 10.9 mm, 14.2 mm, and 20.3 mm •Choice of two colors High Efficiency Red Yellow•Excellent character appearance Evenly lighted segments Wide viewing angleGray body for optimum contrast•Categorized for luminous intensity; Yellow categorized for colorUse of like categories yields a uniform display •IC compatible•Mechanically ruggedHigh Efficiency Red: HDSP-553x/-3900 SeriesYellow: HDSP-4030/-4130/-5730/-4200 SeriesDescriptionThe HDSP-553x/-3900 and HDSP-4030/-4130/-5730/-4200 are 7.6 mm, 10.9 mm/14.2 mm/20.3 mm high efficiency red and yellow displays designed for use in high light ambient condition. The four sizes of displays allow for viewing distances at 3, 6, 7, and 10 meters.These seven segment displays utilize large junction high efficiency LED chips made from GaAsP on a transparent GaP substrate. Due to the large junction area, these displays can be driven at high peak current levels needed for high ambient conditions or many character multiplexed operation.These displays have industry standard packages, and pin configurations and ±1 overflow display are available in all four sizes. These numeric displays are ideal for applications such as Automotive and Avionic Instrumentation, Point of Sale Terminals, and Gas Pump.HDSP-553xSeven Segment Displays for High Light Ambient ConditionsData SheetDevicesPart No.Package HDSP-Color Description Drawing 4030Yellow7.6 mm Common Anode Left Hand Decimal A 40317.6 mm Common Anode Right Hand Decimal B 40337.6 mm Common Cathode Right Hand Decimal C 40367.6 mm Universal Overflow ±1 Right Hand Decimal D 4130Yellow10.9 mm Common Anode Left Hand Decimal E 413110.9 mm Common Anode Right Hand Decimal F 413310.9 mm Common Cathode Right Hand Decimal G 413610.9 mm Universal Overflow ±1 Right Hand Decimal H 5537High Efficiency Red14.2 mm Overflow ±1 Common Anode K 553814.1 mm Overflow ±1 Common Cathode L 5731Yellow14.2 mm Common Anode Right Hand Decimal I 573314.2 mm Common Cathode Right Hand Decimal J 573714.2 mm Overflow ±1 Common Anode K 573814.1 mm Overflow ±1 Common Cathode L 3900High Efficiency Red20.3 mm Common Left Hand Decimal M 390120.3 mm Common Anode Right Hand Decimal N 390320.3 mm Common Cathode Right Hand Decimal O 390520.3 mm Common Cathode Left Hand Decimal P 390620.3 mm Universal Overflow ±1 Right Hand Decimal Q 4200Yellow20.3 mm Common Left Hand Decimal M 420120.3 mm Common Anode Right Hand Decimal N 420320.3 mm Common Cathode Right Hand Decimal O 420520.3 mm Common Cathode Left Hand Decimal P 420620.3 mm Universal Overflow ±1 Right Hand Decimal Q Note: Universal pinout brings the anode and cathode of each segment’s LED out to separate pins. See internal diagrams D and H. Absolute Maximum Ratings (All Products)Average Power per Segment or DP (T A = 25°C).................................................................................105 mW Peak Forward Current per Segment or DP (T A = 25°C)...............................135 mA (Pulse Width = 0.16 ms) DC Forward Current per Segment[2] or DP (T A = 25°C)........................................................................40 mA Operating Temperature Range.................................................................................................-40°C to +85°C Storage Temperature Range....................................................................................................-40°C to +85°C Reverse Voltage per Segment or DP........................................................................................................5.0 V Wavesolder Temperature (1.59 mm [1/16 inch] below body).................................................250°C for 3 sec Notes:1. See Figure 1 to establish pulsed operating conditions2. Derate maximum DC current above T A = 25°C at 0.50 mA/°C per segment, see Figure 2.Package Dimensions (HDSP-4130 Series)Package Dimensions (-3900/-4200 Series)Package Dimensions (-553x/-5730 Series)Internal Circuit Diagram (HDSP-4030 Series)Internal Circuit Diagram (HDSP-4130 Series)Internal Circuit Diagram (HDSP-3900/-4200 Series)Electrical/Optical Characteristics at T= 25°C Array Notes:9. Case temperature of the device immediately prior to the intensity measurement is 25°C.10. The digits are categorized for luminous intensity with the intensity category designated by a letter on the side of the package.11. The dominant wavelength, λd, is derived from the CIE chromaticity diagram and is that single wavelength which defines the color of thedevice.12. The yellow displays are categorizes as to dominant wavelength with the category designated by a number adjacent to the intensitycategory letter.Figure 2. Maximum Allowable DC Current per Segment vs. Ambient Temperature.ElectricalThese display devices arecomposed of eight light emitting diodes, with light from each LED optically stretched to form individual segments and a decimal point.The devices utilize LED chips which are made from GaAsP on a transparent GaP substrate.These display devices aredesigned for strobed operation.The typical forward voltage values, scaled from Figure 4,should be used for calculating the current limiting resistor value and typical power dissipation.Expected maximum V F values, for the purpose of driver circuit design and maximum power dissipation, may be calculated using the following V F MAX models:V F MAX = 2.15 V + I PEAK (13.5 Ω)For: I F ≥ 30 mAV F MAX = 1.9 V + I DC (21.8 Ω)For: 10 mA ≤ I F ≤ 30 mA Temperature derated strobedoperating conditions are obtained from Figures 1 and 2. Figure 1relates pulse duration (t p ), refresh rate (f), and the ratio of maxi-mum peak current to maximumFigure 1. Maximum Allowed Peak Current vs. Pulse Duration.HDSP-553x/-3900 SeriesHDSP-553x/-3900 Seriesdc current (I PEAK MAX/I DC MAX). Figure 2 presents the maximum allowed dc current vs. ambient temperature. Figure 1 is based on the principle that the peak junc-tion temperature for pulsed operation at a specified peak current, pulse duration and refresh rate should be the same as the junction temperature at maximum DC operation. Refresh rates of 1 kHz or faster minimize the pulsed junction heating effect of the device resulting in the maximum possible time average luminous intensity.The time average luminous inten-sity can be calculated knowing the average forward current and relative efficiency characteristic,η|PEAK, of Figure 3. Time average luminous intensity for a device case temperature of 25°C, I V (25°C), is calculated as follows:I AVGI V (25°C) = [–––––] [η|PEAK] [I V DATA SHEET]20 mAExample: For HDSP-4030 series η|PEAK = 1.00 at I PEAK = 100 mA. For DF = 1/5:20 mAI V (25°) = [––––––] [1.00][4.5 mcd]20 mA= 4.5 mcd/segmentThe time average luminous inten-sity may be adjusted for operat-ing junction temperature by the following exponential equation: I V (T J) = I V (25°C) e[k(T J + 25°C)] where T J = T A + P D • RθJ-A MechanicalThese devices are constructedutilizing a lead frame in astandard DIP package. The LEDdice are attached directly to thelead frame. Therefore, thecathode leads are the directthermal and mechanical stresspaths to the LED dice. Theabsolute maximum allowedjunction temperature, T J MAX, is105°C. The maximum powerratings have been established sothat the worst case V F device doesnot exceed this limit.Worst case thermal resistancepin-to-ambient is 400°C/W/Segwhen these devices are solderedinto minimum trace width PCboards. When installed in a PCboard that provides RθPIN-A lessthan 400°C/W/Seg these displaysmay be operated at higheraverage currents as shown inFigure2.OpticalThe radiation pattern for thesedevices is approximately Lam-bertian. The luminous sterancemay be calculated using one ofthe two following formulas.I V(cd)L V(cd/m2) =––––––A(m2)πI V(cd)L V(footlamberts) =–––––––A(ft2)Contrast EnhancementThe objective of contrast enhance-ment is to optimize displayreadability. Adequate contrastenhancement can be achieved inindoor applications throughluminous contrast techniques.Luminous contrast is theobserved brightness of theilluminated segment compared tothe brightness of the surround.Appropriate wavelength filtersmaximize luminous contrast byreducing the amount of lightreflected from the area aroundthe display while transmittingmost of the light emitted by thesegment. These filters aredescribed further in ApplicationNote 1015.Chrominance contrast can furtherimprove display readability.Chrominance contrast refers tothe color difference between theilluminated segment and thesurrounding area. These displaysare assembled with a gray packageand untinted encapsulating epoxyin the segments to improvechrominance contrast of the ONsegments. Additional contrastenhancement in bright ambientsmay be achieved by using aneutral density gray filter such asPanelgraphic Chromafilter Gray10, or 3M Light Control Film(louvered film).Device K-553x/-3900-0.0131/°C -4030/-4130/-0.0112/°C -5730/-4200Area/Seg.Area/Seg. Device mm2in2-4030 2.50.0039-4130 4.40.0068 -553x/-57308.80.0137 -3900/-420014.90.0231For product information and a complete list of distributors, please go to our website: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved.5988-1734EN June 23, 2006。