逆变器控制芯片OZ960控制电路分析

OZ96010/23/01OZ960-DS-1.6 Page 1Intelligent CCFL Inverter ControllerFEATURES• Supports wide-range voltage input applications (8v to 20v)• Built-in intelligence to manage ignition and normal operation of CCFLs• Reduces the number of components and board size by 30% compared with conventional designs• 85% efficiency vs. typical 70% efficiency of conventional designs• Zero-voltage-switching full bridge topology • Built-in internal open-lamp and over-voltage protections• Integrated burst mode control, and wide dimming range (10% to 100%) with integrated burst mode control • Supports multiple CCFL lamps• Simple and reliable 2-winding transformer design• Constant-frequency design eliminates interference with LCDs •Low stand-by powerORDERING INFORMATIONOZ960S - 20-pin plastic SSOP 150mil OZ960I S - 20-pin plastic SSOP 150mil OZ960G - 20-pin plastic SOP 300mil OZ960I G - 20-pin plastic SOP 300mil OZ960D - 20-pin plastic DIP 300mil OZ960I D - 20-pin plastic DIP 300milGENERAL DESCRIPTIONThe OZ960 is a unique, high-efficiency, Cold Cathode Fluorescent Lamp (CCFL) backlight inverter controller that is designed for wide input voltage inverter applications. Additionally, the OZ960 performs the lamp dimming function with an analog voltage or low frequency Pulse Width Modulation (PWM) control.Operating Principle:Operating in a zero-voltage switching, full-bridge configuration, the inverter circuit achieves a very high efficiency power conversion. In addition, the transformer in the OZ960 does not require any specific gap-less arrangement. The simple, low cost transformer provides designers a high degree of design flexibility in specifying transformers. Setting the switching frequency higher than the resonant frequency of a high-quality-factor resonant tank circuit yields a good-quality waveform received, at the CCFL voltage and current.The OZ960 operates at a single, constant frequency in a phase-shift PWM mode. Intelligent open-lamp and over-voltage protections provide design flexibility so various transformer models/manufacturers may be used. The built-in burst mode control provides a wide dimming range and simplifies the application circuit designs. Both operating and burst-mode frequencies are user-programmable parameters.The single stage design results in a low cost, reliable transformer without expensive, less reliable secondary fold-back treatment. The transformer does not require a more expensive center tapped primary.The OZ960 is available in a 20-pin SSOP package. It is specified over the commercial temperature range of 0°C to +70°C, and the industrial temperature range of -40°C to +85°C.FUNCTIONAL BLOCK DIAGRAMRefer to the functional block diagram in Figure 2, page 3, and the Pin Description Table on page 4.A precision reference provides a reference voltage for both internal and external uses. An oscillator circuit generates a user-programmable operating frequency with an external capacitor and a timing resistor. In addition, another resistor to program striking frequency is provided. The drive circuit consists of four outputs. These are designed to achieve zero-voltage switching, full-bridge applications. An error amplifier is provided to regulate the CCFL current. The Soft-start circuit offers a gradual increase of the power to the CCFL during the ignition period. The over-voltage protection block offers a regulated striking voltage for CCFLs. The striking time is programmable simply through an external component. The open-lamp protection is integrated in the protection block. This block intelligently differentiates the striking condition and open-lamp condition. ENA circuitry enables the operation of the IC through a TTL signal interface. Wide-dimming control is achieved through the burst-mode control block.OZ960TYPICAL APPLICATION CIRCUITF 1V I N :8.0V ---22V E N A :0V --1.0V D i s a b l e ;2.0V ---3.3V E n a b l e D I M :3V M a x .B r i g h t n e s s ;1.2V M i n .B r i g h t n e s s S t r i k i n g f r e q u e n c y :74K H z -82K H z O p e r a t i n g f r e q u e n c y :56K H z -64K H zJ 1OZ960CTIMR OVP ENA SST VDDA GNDA REF RT1 FB CMP NDR_B PDR_A CT RT PGND LCT DIM LPWM PDR_C NDR_DACTIVE"HIGH"Figure 2. Functional Block DiagramPIN DESCRIPTIONNo. I/O DescriptionNames PinCTIMR 1 I Capacitor for CCFL ignition durationOVP 2 I Output voltage sense Vth=2.0VENA 3 I Enable input; TTL signal is applicablecapacitorSoft-startSST 4 IVDDA 5 I Voltage source for the ICGNDA 6 I Analog signal ground referenceREF 7 O Reference voltage output; 2.5V typicalRT1 8 I Resistor for programming ignition frequencyFB 9 I CCFL current feedback signalCMP 10 O Compensation output of the current error amplifierNDR_D 11 O NMOSFET drive outputPDR_C 12 O PMOSFET drive outputLPWM 13 O Low-frequency PWM signal for burst-mode dimming controlDIM 14 I Input analog signal for burst-mode dimming controlLCT 15 I Triangular wave for burst-mode dimming; frequencyPGND 16 I Power ground referenceRT 17 I Timing resistor set operating frequencyCT 18 I Timing capacitor set operating frequencyPDR_A 19 O PMOSFET drive outputNDR_B 20 O NMOSFET drive outputABSOLUTE MAXIMUM RATINGS WITHRESPECT TO INPUT POWER SOURCERETURN REFERENCEVDDA 7.0V(1)GNDA, PGND +/- 0.3VLogic inputs -0.3V to VDD +0.3VOZ960OZ960IOperating temp. 0o C to 70o C -40o C to 85o COperating junction temp. 150 o CStorage temp. -55 o C to 150 o CRECOMMENDED OPERATING RANGEVDDA 4.7V ~ 5.5VFosc 30 KHz to 150 KHzRosc 50 k to 150 kNote (1): The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The “Functional Specifications” table will define the conditions for actual device operation. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.FUNCTIONAL SPECIFICATIONSParameter Symbol Test Conditions Limits UnitVDDA=5V; Tamb = 25o C Min Typ MaxReference VoltageNominal voltage Vref I load = 0.1mA 2.37 2.5 2.63 VLine regulation VDDA = 4.7V – 5.3V - 4 - mV/V Load regulation I load = 0.025 mA to 0.25 mA - 2 - mV/mA High Frequency OscillatorInitial accuracy fosc CT = 100pF, RT = 120k(1)5357 60 KHz Ramp peak - 3.0 - VRamp valley - 1.0 - V Temp. stability TA = 0 o C to 70o C - 200 - ppm/ o CLow Frequency OscillatorInitial accuracy See Table 1, page6Ramp peak 2.85 3.0 3.15 VRamp valley 0.94 1.0 1.06 VLow Frequency PWMDuty Cycle Range 0 - 100 %Error AmplifierInput offset voltage - 7 - mVInput voltage range 0 - VDD-1.5V VOffset current at FB pin - - 100 nAReference voltage at non-inverting input pin (internal) V ADJ 1.191.251.31VOpen loop voltage gain - 80 - dB Unity gain bandwidth - 1.0 - MHz Power supply rejection - 60 - dB ThresholdOver Voltage Protection 1.90 2 2.15 V SupplySupply current I OFF ENA=low -150200µASupply current I ONENA = high; VDDA = 5V;Vdim = 2V; LPWM = 50k(2)Ca=Cb=Cc=Cd=2nF(3)HF = 60kHz; LF = 185Hz- 4.4 5.5 mASST current See Table 1, page6 CTIMR current See Table 1, page6 NDR-PDR OutputOutput resistance Rp Current source - 27 - ΩOutput resistance Rn Current sink - 14 - ΩParameterSymbolTest ConditionsLimits Unit Max. / Min. OverlapVDDA = 5V; Tamb = 25o C Min Typ MaxMin. Overlap between diagonal switches HF = 60kHz Ca=Cb=Cc=Cd=2nF (3)3.04.55.5%Max. Overlap between diagonal switches HF = 60kHz Ca=Cb=Cc=Cd=2nF (3)78 81 84 % Brake before MakePDR_A / NDR_B See Table 1, below PDR_C / NDR_DSee Table 1, belowParameterSymbol Test ConditionsLimits Unit Limits UnitMin Typ Max Min Typ MaxLow Frequency OscillatorInitial accuracyfosc LCT = 6.8nF, LPWM = 50k (2)160 220 250 Hz150220340HzSupplySST current I SST 4.9 7.5 10 µA 4.9 6.0 12 µA CTIMR current I CTIMR2.23.34.5 µA2.03.0 5.2 µABrake before MakePDR_A / NDR_B HF = 60kHz 250 380 530 ns 250 380 565 ns PDR_C / NDR_DHF = 60kHz250 380 520 ns 250 380 545 ns ThresholdEnable1.35 1.50 1.65 V 1.25 1.50 1.65 VNote (1)CT: capacitor from CT (Pin 18) to ground RT: resistor from RT (Pin 17) to groundNote (2)LCT: capacitor from LCT (Pin 15) to ground LPWM: resistor from LPWM (Pin 13) to groundNote (3)Ca: capacitor from PDR_A (Pin 19) to VDDA Cb: capacitor from NDR_B (Pin 20) to ground Cc: capacitor from PDR_C (Pin 12) to VDDA Cd: capacitor from NDR_D (Pin 11) to groundTable 1. Low Frequency Oscillator, Supply and Brake before Make Specifications for OZ960 and OZ960IFUNCTIONAL INFORMATION1. Steady-State OperationRefer to the schematic shown in Figure 1, the OZ960 drives a full-bridge power train where the transformer couples the energy from the power source to the secondary CCFL load. The switches in the bridge denoted as QA, QB, QC and QD are configured such that QA and QB, QC and QD are turned on complementarily. The duration of QA and QD, QB and QC turn on simultaneously determines an amount of energy put into the transformer which in turn delivers to the CCFL. The current in CCFL is sensed via resistor R9 and regulated through the adjustmentof the turn-on time for both diagonal switches. This is accomplished through an error amplifier in the current feedback loop. A voltage loop is also established to monitor the output voltage so thata programmable striking voltage is achieved. The OVP represents the peak-detect signal of the voltage on the output of the transformer. A soft-start circuit ensures a gradual increase in the input and output power. The soft-start capacitor determines the rate of rise of the voltage on SST pin where the voltage level determines the on-time duration of QA and QD, QB and QC diagonal switches. This minimizes the surge impacts in circuit designs.Apply enable signal to the ENA pin of the IC after the bias voltage applied to VDDA initiates the operation of the circuit. The output drives, include PDR_A, NDR_B, PDR_C and NDR_D put out a complementary square pulse. The frequency is determined by R4 and C5 where they are connected to RT and CT pins respectively. Initially, the energy converted from the power source to the CCFL is low due to the soft start function. It increases as soft start capacitor voltage increases linearly with time. The voltageat the secondary side of the transformer T1 increases correspondingly. This process continues until the CCFL current is detected and reaches a regulated value. The output of the error amplifier, CMP, follows the feedback signal, commands a proper switching among the four output drives to maintain current regulation. The operations of the four switches are implemented with zero-voltage-switching to provide a high-efficiency power conversion.In the case of open-lamp condition, the OZ960 provides a programmable striking-frequency intelligence to optimize the ignition scheme. Thisis implemented through resistor R5. Effectively,R5 is in parallel with R4 to yield a required striking frequency. In addition, the striking time is also programmable through the capacitor C8. Striking voltage, or the open-lamp voltage, is regulated through a voltage feedback loop where output voltage is monitored. The signal, being sent to the OVP pin, commands the output drivesto provide the desired output voltage. This design provides high degree of flexibility while maintaining OZ960 a very high integration device.One protection feature needed is removing the lamp during normal operation. The OZ960 senses the missing current signal through current amplifier, it shuts off the output drives and stay in the latched mode. This is differentiated intelligently with turning on the inverter while CCFL is not connected. Recycle of the IC poweris necessary to resume normal operation. Dimming control: dimming control of the inverteris implemented by adjusting the amount of energy processed and delivered to the CCFL. A PWM burst-mode scheme is internally generated which provides 0% to 100% wide dimming control. An input analog voltage signal is fed into DIM pin and determines the dimming level of the CCFL. The burst-mode frequency is programmable through a capacitor C10 as shownin the schematic.The OZ960 inverter operates in a constant frequency mode. This eliminates any undesired interference between inverter and LCD panels where the interference is usually associated with variable-frequency designs.Symmetrical drive to the power transformer givesa very dynamic choice of selecting transformers. This vulnerable design offers flexibility to the system designers to choose transformer sources. There is no limitation to the gap-less transformer. 2. CCFL Ignition TimeIgnition time for CCFLs varies with CCFL length, diameter, module package and temperature. The OZ960 provides a flexible design where a capacitor is connected to CTIMR pin to determine the necessary striking time. An approximate of the timing calculation is:T[second] = C[uF]This capacitor remains reset at no charge if lampis connected and at normal operation.3. ProtectionOpen-lamp protection in the ignition period is provided through both OVP and CTIMR to ensurea rated voltage is achieved and a required timingis satisfied. Removal of the CCFL during normal operation will trigger the current amplifier output and shuts off the inverter. This is a latch function.4. OVPThe OVP threshold is set at 2V nominal. When the output voltage reaches the threshold, it commands the PWM controller to maintain the driving level. This ensures that output gets sufficient striking voltage while operating the power transformer safely.5. ENAApplying positive TTL logic to the ENA pin enables the operation of the IC. The threshold of the ENA is set at 1.5V. Apply logic low to the ENA pin will disable the operation of the inverter. Toggle this signal allows the on/off tests for the inverter.6. Soft-Start -- SSTThe soft-start function is provided with a capacitor connected to SST pin. The soft-start time is not related to the striking time for the CCFL. It simply provides a rate of rise for the pulse width where diagonal switches are turned on. Normally, a 0.47uF capacitor is connected. 7. Error AmplifierThe CCFL current is regulated through this error amplifier. It also provides an intelligence of differentiating open-lamp striking versus removing the lamp during normal operation. The non-inverting reference is at 1.25V nominal.8. Operating frequencyA resistor RT and a capacitor CT determine the operating frequency of OZ960. The frequency is calculated as:68.5•104f[kHz] =C T[pF]•R T[kΩ]The OZ960 also provides an optional striking frequency as desired. CCFL in a LCD module possesses parasitic that may require different striking voltage and frequency. This add-on feature could optimally accomplish the ignition process so that the CCFL life could be extended. When RT1 is used, it is connected in parallel with RT during the ignition period.9. Burst-Mode Dimming ControlThe OZ960 integrates a burst-mode dimming function to perform a wide dimming control for the CCFLs. The burst-mode frequency is determined by a capacitor C10 connected to LCT pin. The frequency can be calculated approximately by:1496f[Hz] =C LCT[nF]The Dim pin compares with the triangle wave in LCT and yields a proper pulse width to modulate the CCFL current. This pulse can also be monitored through LPWM pin. The peak and valley of the LCT signal is 3V and 1V respectively.10. Output DrivesThe four output drives are designed so that switches QA and QB, QC and QD never turn on simultaneously. These include two NMOS andtwo PMOS transistors. The configurationprevents any shoot-through issue associated with bridge-type power conversion applications. Adjusting the overlap conduction between QAand QD, QB and QC, the CCFL current regulation is achieved. This overlap is also adjusted while the voltage applied from the battery varies. At a specific CCFL current, the input power is maintained almost constant.PACKAGE INFORMATION (SSOP 150mil)PACKAGE INFORMATION (SOP 300mil)PACKAGE INFORMATION (DIP 300mil)Ee Bθ°DE 1IMPORTANT NOTICENo portion of O2Micro specifications/datasheets or any of its subparts may be reproduced in any form, or by any means, without prior written permission from O2Micro.O2Micro and its subsidiaries reserve the right to make changes to their datasheets and/or products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.O2Micro warrants performance of its products to the specifications applicable at the time of sale in accordance with O2Micro’s standard warranty. Testing and other quality control techniques are utilized to the extent O2Micro deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.Copyright © 2002, O2Micro International Limited。

逆变器电路原理分析逆变器的定义逆变器是通过半导体功率开关的开通和关断作用，把直流电能转变成交流电能的一种变换装置，是整流变换的逆过程。

车载逆变器的整个电路大体上可分为两大部分，每部分各采用一只TL494或KA7500芯片组成控制电路，其中第一部分电路的作用是将汽车电瓶等提供的12V直流电，通过高频PWM (脉宽调制)开关电源技术转换成30kHz－50kHz、220V左右的交流电；第二部分电路的作用则是利用桥式整流、滤波、脉宽调制及开关功率输出等技术，将30kHz～50kHz、220V左右的交流电转换成50Hz、220V的交流电。

高频升压逆变控制电路：（1）脚第一组放大器的同相输入端，检测输出电流，与3个0.33R 电阻分压，当电流过大时，分压电阻上的电压超过（2）脚基准电压，（3）脚放大器输出端输出高电平，（3）脚为高电平时，电路进入保护状态。

（2）脚为比较器的反相输入端，接（14）脚基准，作比较器的参考电压，外部输入端的控制信号可输入至脚（4）的截止时间控制端（也叫死区时间控制），与脚（1）、（2）、（15）、（16）误差放大器的输入端，其输入端点的抵补电压为120mV，其可限制输出截止时间至最小值，大约为最初锯齿波周期时间的4%。

当13脚的输出模控制端接地时，可获得96%最大工作周期，而当(13)脚接制参考电压时，可获得48%最大工作周期。

如果我们在第4脚截止时间控制输入端设定一个固定电压，其范围由0V至3.3V之间，则附加的截止时间一定出现在输出上。

（5）、（6）脚是一个固定频率的脉冲宽度调制电路，内置了线性锯齿波振荡器，振荡频率可通过外部的一个电阻和一个电容进行调节，其振荡频率如下：输出脉冲的宽度是通过电容CT上的正极性锯齿波电压与另外两个控制信号进行比较来实现。

功率输出管Q1和Q2受控于或非门。

当双稳触发器的时钟信号为低电平时才会被选通，即只有在锯齿波电压大于控制信号期间才会被选通。

当控制信号增大，输出脉冲的宽度将减小。

OZ9938芯片原理与应用维修发表于：2010-01-12 08:56:16 阅读次数：1677简介：OZ9938也是O2公司生产的一款专用于CCFL驱动的集成电路，支持2～6个CCFL，和同类产品比，具有高效率、高可靠、高集成度、显著减少外部元件的特点。

内建PWM脉冲调光系统；恒定工作频率；通过外接场效应管扩展输出功率；内置灯管开路保护和过压过流保护电路；优化了软启动功能；通过调整外接阻容元件用户 ...OZ9938也是O2公司生产的一款专用于CCFL驱动的集成电路，支持2～6个CCFL，和同类产品比，具有高效率、高可靠、高集成度、显著减少外部元件的特点。

内建PWM脉冲调光系统；恒定工作频率；通过外接场效应管扩展输出功率；内置灯管开路保护和过压过流保护电路；优化了软启动功能；通过调整外接阻容元件用户可以自定义启动和关机延迟时间；具有多种调光模式：内部脉宽调制、外部脉宽调制及模拟调光功能；.最高工作电压7V，正常工作电压范围4.5V～5.5V；模拟调光电压范围0.7～2.7V；一、OZ9938内部结构及工作原理图1是OZ9938的内部结构方框图。

引脚功能介绍①驱动输出端1。

该脚输出方波激励信号，可以外接场效应管的栅极。

②电源供电端。

该脚电压超过欠压闭锁阈值（4.5V），芯片内部电路就可以正常启动。

③定时器设定。

该脚通过外接的阻容元件设定一个定时时间，供内部停机和保护电路采用。

④亮度控制端。

该脚根据⑾脚的设定，可以输入PWM脉冲调宽信号或者直流电压信号来控制灯管亮度。

⑤灯管电流检测。

在灯管点亮时，该脚电压大于0.7V，集成电路进入正常运行模式，脉宽调制亮度控制电路启动。

如果该脚电压在电路启动后为零，则保护电路开始动作，芯片停止激励信号输出。

所以不能采用短路电流信号的方法来判断是否存在过流故障。

⑥反馈电压检测。

该脚接受来自高频变压器的反馈电压，如果CCFL灯管损坏或者断开，该脚电压就会增加。

极限电压为3.0V，达到此值则关闭激励信号。

第7章 背光板电路分析与检修
– 157 – 电阻性的负载，通过控制LED
灯两端的电压就可以达到控制LED 灯上电流的目的。

图7-1-13 Buck 电路结构简图 图7-1-14 等效电路 第2节 逆变器电路分析与检修
（OZ964方案）
本节以奇美公司V315B1-L01液晶屏所配逆变器（OZ964方案）为例进行介绍。

该逆变器驱动16支CCFL ，具有8个输出插座，分别对应8个变压器，而每个变压器（一个变压器有两个高压绕组）驱动两支灯管发光。

此逆变器为24V 供电，背光灯的开关控制电平和亮度调节PWM
信号来自主板。

图
7-2-1
所示是奇美
V315B1-L01
液晶屏逆变器组件实物图，
图7-2-2所示为奇美V315B1-L01
液晶屏逆变器电路原理图。

图7-2-1 奇美V315B1-L01液晶屏逆变器组件实物图。

二合一电源模组的IP板电路原理分析与检修二、逆变部分电路分析与检修该二合一电源模组逆变部分采用凹凸微电子（02 MICro huer-national）生产的新型高效率CCFL背光灯控制集成电路OZ964,该集成电路主要用于单灯管以及多灯管的驱动。

亮度控制是将模拟的可变直流电压转换为低频的脉冲宽度调制（PWM）信号。

1.OZ964功能介绍OZ964与02960脚位功能一样，均支持宽电压范围输入，内置开灯启动保护和过电压保护、输入电压超低保护及关闭延迟保护、PWM调光控制、软性开机启动等电路，效率高，待机功耗低，在LG、PHILIPS等品牌液晶彩电逆变器上都得到了广泛应用。

产品封装分为DIP-20和SOP-20两种，引脚功能完全相同，不考虑安装因素可以直接代换，实际上应用较多的是SOP封装，引脚功能见表1。

表1 OZ964引脚功能2.电源供电、使能控制等相关电路分析与检修OZ964GN的供电及使能控制电路由Q121、Q105、U6（78M05）、U103B（LM358）、Q13、Q14、Q206、U102（OZ964GN）组成，见图7。

图7 OZ964GN的供电及使能控制电路（1）电源供电电路电源供电电路由Q121、Q105、U6（78M05）、U102（OZ964GN）的⑤脚内部电路组成。

背光开关控制信号（BLON）加到Q121时，Q121导通，Q105导通，24VD电压加到U6（78M05）的②脚，经三端稳压集成块U6产生稳定的Sv电压，加到OZ964GN的⑤脚，正常工作时，该脚电压应在4.5V~5.0V之间。

（2）使能控制电路02964GN的使能控制电路由U103B、Q13、Q14、Q206、U102的③脚内部电路组成。

02964GN。