专利名称：Semiconductor thin film, thin film transistor,method for manufacturing same, andmanufacturing equipment of semiconductorthin film发明人：Hiroshi Tanabe申请号：US11387709申请日：20060324公开号：US20060177974A1公开日：20060810专利内容由知识产权出版社提供专利附图：摘要：A method for manufacturing a semiconductor thin film is provided which canform its crystal grains having a uniform direction of crystal growth and being large in size and a manufacturing equipment using the above method, and a method for manufacturing a thin film transistor. In the above method, by applying an energy beam partially intercepted by a light shielding element, melt and re-crystallization occur with a light-shielded region as a starting point. The irradiation of the beam gives energy to the light-shielded region of the silicon thin film so that melt and re-crystallization occur with the light-shielded region as the starting point and so that a local temperature gradient in the light-shielded region is made to be 1200° C./μm or more. In the manufacturing method, a resolution of an optical system used to apply the energy beam is preferably 4μm or less.申请人：Hiroshi Tanabe地址：Tokyo JP国籍：JP更多信息请下载全文后查看。
Fabrication and properties of thinfilmsIntroductionThin films have become an indispensable part of modern technology as they are being used in numerous applications ranging from optical coatings, protective coatings, electronic devices and photovoltaic cells to name a few. Thin films offer unique properties such as improved mechanical, optical, and electrical properties when compared to bulk counterparts. These unique properties make thin films an attractive material for researchers and industry alike.Fabrication TechniquesThin films can be fabricated using a wide range of techniques that include physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD) and sol-gel techniques.Physical vapor deposition (PVD) is a technique that involves the transfer of energy from energetic particles (atoms or molecules) to the surface of the material to produce a thin film. PVD can be carried out using a range of methods, such as sputtering, thermal evaporation, and electron beam deposition.Chemical vapor deposition (CVD) is a technique in which the growth of thin films occurs on a substrate through the chemical reaction of a gas phase precursor. The reaction products deposit on the substrate, forming the desired thin film.Electrochemical deposition (ECD) is a process in which a thin film is grown on a substrate by electrodeposition. The substrate is made the cathode in a bath of a solution that contains the ions of the material to be deposited.Sol-gel process is a chemical method to produce thin films that involves colloidal solutions (sol) that undergo gelation to produce a cross-linked network (gel) of sub-micrometer or nanometer-sized particles.Properties of Thin FilmsThin films have unique properties when compared to bulk materials due to the large surface area to volume ratio. Some of the unique properties of thin films are mentioned below.(a) Mechanical Properties - Thin films possess high strength and hardness when compared to bulk materials due to the reduced grain size and decreased dislocation density.(b) Optical Properties - Thin films possess high transparency or high reflectivity depending on the thickness and the material used for deposition.(c) Electrical Properties - Thin films possess high electrical conductivity, low dielectric constant and capacitive properties when deposited in specific geometries and structures.(d) Magnetic Properties - Thin films possess high susceptibility and susceptibility anisotropy due to the reduced domain size and increased atomic ordering in thin films.Applications of Thin FilmsThin films have become highly essential in various applications spanning across various sectors of technology such as electronic devices, optical coatings, protective coatings, micro-electromechanical systems (MEMS), photovoltaic cells (PV), and biomedical applications.(a) Electronic Devices - Thin films are used extensively in electronic devices such as sensors, electrodes, transistors, capacitors, and memory devices.(b) Optical coatings - Thin films play a vital role in optical coatings such as antireflection coatings, high reflectivity mirrors, and optical filters.(c) Protective coatings - Thin films are used as protective coatings due to their ability to provide high wear resistance, corrosion resistance, and biocompatibility.(d) Photovoltaic cells - Thin films are used in photovoltaic cells for their unique properties such as optical absorption, electrical conductivity, and interface engineering.(e) Biomedical Applications - Thin films are used in biomedical applications such as drug delivery, tissue engineering, and biosensors.ConclusionThin films have revolutionized the field of materials science due to their unique properties and diverse applications. The fabrication of thin films and their properties have been discussed in this article to highlight their importance in various fields of technology. As technology continues to advance, thin films will continue to play a significant role in numerous applications.。
ADVANCED THIN FILM TECHNOLOGYFOR THE REALIZATION OF OPTICAL ASSEMBLIESK. Callery1 & P. Lowbridge21.Aeroflex MIC Technology Corporation, 100 Andover By Pass Suite 201, North Andover MA 01845 USATel 001-978-687-9625 Fax 001-978-687-9721 E-mail: sales@2.Novacom Microwave Ltd, Unit 6, 22 The Green, Nettleham, Lincoln, LN2 2NR, England UKTel +44-1522-751136 Fax +44-1522-754408 E-mail: paul.lowbridge@With the rapid growth in the Optoelectronics market there is now a requirement for the supply of optical modules (e.g. transmitters and receivers, etc.) in high volume and at very low costs. The realization of the Laser diode and opto receivers is obviously key to this problem, but the main issues then relate to the assembly and packaging of these element. Aeroflex MIC Technology focuses on their core technology of thin film processing, as a vehicle to solve these problems. Their increasing portfolio of capabilities offers the designer a wide flexibility for meeting the demands of today’s markets. Applications in the markets o f wireless and fiber optic telecommunication, C ATV, medical and military systems are readily solved using MIC Technology’s array of design features.1. The Thin Film SolutionThin film integrated circuits have been evolving o ver the past decade from a simple substrate medium which carries microwave/RF o r DC energy b etween active die to one which solves complex p ackaging problems including the reduction of discrete components, thermal management, packageless chip mounting, and the consolidation of digital, optical and RF functions within a single assembly. Technology to solve these unique problems has been developed by Aeroflex MIC Technology by bridging the gap between ultra-high levels of Silicon and GaAs integration and traditional chip and wire “hybrid” design approaches. Using a wide array of ceramic substrate materials and metal systems, combined with design features and capabilities, the circuit designer can now easily reduce circuit size and parts count over traditional thin film substrate design approaches, simultaneously enhancing performance.2. Materials & MetallizationThe circuit engineer usually begins a circuit design by deciding on a substrate material and thickness. This process is particularly critical for high frequency designs where substrate dielectric constant and thickness have a significant impact on circuit size, performance, and dispersive effects. In addition to providing an ideal medium for microcircuit assembly, high dielectric constant ceramic materials such as alumina and aluminum nitride offer the advantages of reduced circuit size over teflon or polymer-based dielectrics. At even higher dielectric constant values, specialty ceramics offer smaller circuit sizes and make available, extremely low transmission line impedances.1Mechanical specifications including thermal conductivity (TC) and coefficient of thermal expansion (CTE) become c ritical parameters f or high power designs w here heat conduction a nd induced stresses are of concern. Materials including beryllia and aluminum nitride, are often chosen for their function-specific mechanical properties. All of these mechanical and electrical p roperties must be weighed by the engineer for his or her particular application.Material Typical Uses CommentsAlumina (Al2O3) 99.6%Low to Medium Power DC/RF/Microwave CircuitsUsing Silicon or GaAs ICs Cost-Effective Material With Wide Range of Applications.Beryllia (BeO)High Power DC/RF/Microwave Circuits UsingSilicon or GaAs ICs. High-Power Terminations.Extremely High Thermal ConductivityAluminum Nitride (AlN)High power DC/RF/Microwave, Optical CircuitsUsing Silicon and GaAs ICs.Optimal CTE Match With Silicon DevicesTable 1: Common Substrate Materials and Their ApplicationsMaterial_r Tan_1 MHz10 Ghz SurfaceFinish(_in)CTE(ppm/°C)TC(W/M°C)25C/100CCommonThicknessesmils (mm)Al2O3, 99.6%9.8.0001.0003<1 (pol)< 4 (a.f.)7.035 / 275-100(.125-2.5)BeO, 99.5% 6.7.001.0035-6(polished)7.6290 / 24010-100(.25-2.5)AlN8.9.0005.0024-5(polished)4.5170 / 13010-100(.25-2.5)Table 2: Mechanical Properties by MaterialChoosing A Metal SystemAeroflex MIC Technology offers over 20 metal systems to suit the needs of our customers. As the complexity of any design increases, the menu of available metal systems necessarily narrows to fewer choices to enable process control and high yield. Each metal deposited on the surface of a substrate material as part of a complete system serves one or more specific purposes, namely that of resistor, adhesion, barrier, or conductor.A metal system may be chosen as a function of the integration l evel employed i n your design as well as the assembly requirements of the final product, namely solder media and wirebonding. Generally speaking, the high solubility of gold in lead-bearing solders requires additional barrier metals in the metal system to ensure reliable device attachment. Furthermore, to limit solder joint embrittlement, gold thicknesses should be limited to a maximum of 100 microinches (2.5_m). Conversely, for gold2bearing solders, thicker gold layers are desirable and barrier metals are optional. Temperature limitations for different metal systems are also an important consideration to prevent intermetallic formation at the layer boundaries as well as to limit the potential for surface oxide growth due to barrier metal migration. All of the thin film metal systems offered by Aeroflex MIC Technology are readily bonded using gold wire. For optimal bond integrity, a minimum of 100 _in gold thickness is recommended although reasonable bonding results can be achieved down to 50 _in.Material Function Types of Materials Range of Values Comments Resistor Tantalum Nitride (TaN)25-150 _/® (max)25-125 _/® (Std)Nickel Chromium (NiCr)50-250 _/® (max)As-Fired Material Adhesion Titanium Tungsten (TiW)250-750 Angstroms Ideal for High Temp.Chromium (Cr)250-750 Angstroms Low Temp. Limitation Barrier Nickel (Ni) - Sputtered750-2000 Angstoms Standard BarrierNickel (Ni) - Plated40-100 _in (1-2.5_m)High ConductivityBarrierPalladium (Pd)250-750 Angstroms Minimum 2 mil FeaturesPlatinum (Pt)250-750 Angstroms B-Side OnlyConductor Gold (Au)10-200 _in (0.4 -5_m)Tight Tolerance, FineCopper (Cu)10-200 _in (0.4 -5_m)Line Features Available High Current Conductor Gold (Au)400-1000 _in (10-25_m) 3 mil Traces, 0.3 milTol.Cu/Ni/Au 1.5-4.0 mils (37-100_m) 5 mil Traces, 0.5 milTol.Table 3: Metals and Their Functions3Metal System Bondable,Gold Wire Solderable,LeadBearingSolderable,GoldBearingFine Lines( < 2mils)Max.Temp.Cr/Au (2)Y Y Y300Cr/Cu/Au Y Y300Cr/Au/Cu/Au Y Y300NiCr/Cu/Ni/Au (1)Y Y Y350NiCr/Cu Y250NiCr/Ni/Au Y Y Y350TaN/TiW/Au (2)Y Y Y450TaN/TiW/Ni/Au Y Y Y350TaN/TiW/Pd/Au Y Y Y400TiW/Au (2)Y Y Y450TiW/Cu/Au Y Y300TiW/Ni/Au Y Y Y350TiW/Au/Ni/Au (1)Y Y Y(4)350TiW/Pd/Au Y Y Y400TiW/Pt/Au (3)Y Y Y450Notes: (1) Thick Plated Nickel (2) Selective Cu.Ni.Au Available f or Low Loss or Bump Mounting(3) B-side only (4) Selective fine-lines (5) Gold <100 microinches (6) Gold >100microinchesTable 4: Standard Metal Systems and Their Applications3. Integrated PassivesThin Film ResistorsA circuit designers need to provide voltage division, power termination and current regulation are achieved using precision thin film resistors. Resistors are patterned in thin film using a photoresist and etching process to define the outline of the resistor followed by laser trimming if needed, to precisely control the value of the resistor. Because the resistor material is of consistent thickness, laser trimmed resistors will track each other over temperature variations adding to the performance4of the circuit. With thin film resistors, sheet resistance in units of ohms per square (_/®) is often used to specify a film and resistor values are easily calculated based upon final resistor dimensions and sheet resistivity as follows:R Sheet = Sheet resistance = _ / t (_/®)Where: ® = Unit Surface Area of EqualLength and Widthand:R total = R Sheet x Length/Width (_)Resistor parameters for alumina and several other substrate materials are identified in Table 5.Table 5: Resistor Parameters on 99.6% AluminaSpiral Inductors:High quality i nductors are an essential p art of many amplifier a nd oscillator designs, o r for broadband baluns and lumped element filters. Aeroflex MIC Technology manufactures circular or rectangular inductors using low loss metallization systems and other techniques to create structures with higher Q’s (50 min @ 10Mhz) than are available on GaAs or silicon. Linewidths and spacings down to 0.0005"(12.5_m) are possible although most requirements can be met with 1.5 mil lines and 1 mil spacings. Furthermore, wider spacings permit the use of conductors up to 1 mil (25_m) thick for even lower loss characteristics. Finally, air-bridges to the center-tap of spiral inductors result in a reduced bond count, highly reliable assembly.Thin-Film CapacitorsThin-film capacitors are constructed using a Metal-Insulator-Metal approach with either a silicon-nitride or polyimide dielectric, and gold electrodes. Connections between the capacitor and adjacent thin-film circuitry are made using air-bridges. This approach to capacitor construction is in contrast to other available technologies including discrete chip capacitors manufactured using single-layer or multi-layered, high dielectric ceramics and attached to base circuitry using epoxy, solder, and wire bonds. The resultant capacitors have the advantage of small size, high Q, and reduced assembly.5Parameter Silicon Nitride Capacitor Polyimide Capacitor Dielectric Constant7.8 3.0Dielectric Thickness2200A3µmCapacitance Density0.15 pf/mil 20.0055 pf/mil2(233 pf/mm2)(8.55 pf/mm2)Standard Values10-500 pf0.5 - 50 pfStandard Tolerance10% (> 50pf)20%20% (< 50pf)Tighter Tolerances Available Special Tolerances AvailableCircuit Connection Encapsulated Air-Bridges Encapsulated BridgesTypical Q. Integrated w/ Circuit100075Breakdown Voltage30 Volts Min.100 Volts Min.Typical Insertion loss @ 10 Ghz.03 db (50 pf case)0.1 db (5 pf case)Table 6: Thin Film Capacitor Specifications4. Additional FeaturesPlated Via HolesMost circuit designers q uickly discover t he convenience o f implementing c onnections t o the backside ground-plane of their circuit through the use of metallized via holes. Aeroflex MIC Technology offers these plated holes on a full range of substrate materials.6SubstrateHeight inches (mm)Plated ViaDiam.inches (mm)Capture PadDimension*Via Spacingcntr to cntr*Via SpacingCntr to Circuit Edge*.005 (.125).007-.02(.175-.500)Diam. + .010(Diam. + 250)Diam.+ .02, .03min(Diam + 0.5)Diam/2 + .02(Diam/2 + 0.5).010 (.250).007-.04(.175-1.0)“ ”“ ”“ ”.015 (.375).009-.10(.225-2.5)“ ”“ ”“ ”.020 (.500).012- .10(.300-2.5)“ ”Diam. +.02(Diam + 0.5)“ ”.025 (.625).015- .15(.375-3.75)“ ”“ ”“ ”*inches (mm)Table 7: Plated Via Design ParametersSolid Au or Cu Filled ViasAeroflex MIC Technology’s filled via process has overcome all of the limitations of plated-through holes and brought new flexibility to the module or circuit designer. Features such as planar surface for die mounting directly on the via, wire bondable solid vias, low inductance, low resistance ground paths and isolating circuit attachment material from the circuit area are typical. Solid copper offers a superior thermal path for heat transfer from active die and a method for I/O in CSP applications. Also available are solid copper slots for improved heat transfer over a larger area.SubstrateHeight inches (mm)Filled ViaDiameter.inches (mm)Filled ViaMaterialSubstrateMaterialVia SpacingCntr to Cntr*inches (mm)Min. CapturePad sizeinches (mm)Via SpacingCntr toCircuit Edge*.010 (.250).014 (.35)Au, Cu Al203, AlN,BeO.034 (.85).019 (.475).027 (.675) .015 (.375).014 (.35)“ ”“ ”.034 (.85).019 (.475).027 (.675) .020 (.500).016 (.40)“ ”“ ”.036 (.90).021 (.525).028 (.700) .025(.625).020 (.50)“ ”“ ”.040 (1.0).025 (.625).030 (.750)Table 8: Filled Via Layout Parameters7High Conductivity TracesAeroflex MIC Technology has developed the unique capability to manufacture selective, high-conductivity traces on substrates to reduce resistive losses in high current lines. Conductor traces have a measurable resistance due to the cumulative resistances of each of the metals used. As with resistors, sheet resistance (in m_/®), are the typical unit of resistance measurement.For circuit traces carrying high currents (100's of milliamperes) over large distances (100's or 1000's of mils), the resistive losses of a narrow line can become significant, resulting in reduced voltages at the terminals of FET’s or other active circuit elements. By increasing the thickness of selected high-current lines, the engineer may now have fine-line RF structures such as Lange couplers on the same circuit with low-loss DC lines. This technology is also applicable to filter structures where high Q and performance are critical.Metal Thickness Plated Sheet Resistancem_/®Au150 _in7-8600 _in 2.0Cu2000 _in0.21Table 9: Selected Sheet ResistivitiesMetallization Options Metal Thickness MinimumLine/Tolerance(mils)Copper TiW250-750 A N/AAu100-150 _in0.6/0.1Cu2200 +/- 400 _in 5.0/0.5Ni80-250 _in“Au100-200 _in“Gold TiW250-750 A N/AAu100-150 _in0.6/0.1Au300-850 _in 3.0/0.3Table 10: Standard High Conductivity Metallizations8Laser Features and MoreLaser Machining: For customers requiring laser machined cutouts in their circuits, Aeroflex MIC Technology provides complete in-house laser machining capabilities. This capability is useful for substrates assembled i nto odd-shaped housings or for extremely high-power a ctive die being soldered to a housing floor.Selective Passivation: Circuits requiring passivation over resistors or conductors for the purpose of reduced oxidation or short circuit protection may utilize Aeroflex MIC Technology’s in-house SiO2, NiO, Vacrel, Si3N4 or polyimide insulator capabilities.Vacrel Solder MaskThickness 3.0 milsMaximum Temperature260°C, 60 seconds280°C, 20 secondsMinimum Feature Width10.0 milsMinimum Gap10.0 milsMinimum Conductor Overlap3.0 milsOnto Ceramic or PullbackMinimum Freestanding Solder10.0 x 20.0 milsDamDistance to Circuit Edge 5.0 mils MinimumApplication Side-A- or -B- or BothNiO, Si3N4, SiO2 Solder MaskLength15.0 mils MinimumWidth Full Conductor Width + 6milsDistance to Circuit Edge 5.0 mils MinimumApplication Side-A- or -B- or BothTable 11: Solder Mask & Insulator Parameters910G & 40G DC Block, Bias Tee and High Power TerminationsDC Block10G Version 1.5KHz to 16GHZ BandwidthAvailable Integrated, SMT or PackagedLess than 1dB Insertion Loss at 16GHz40G Version 1.5KHz to 50GHZAvailable Integrated or PackagedLess than 1dB Insertion Loss at 50GHzBiasTee10G Version7.5KHZ to 15GHzAvailable Packaged or SMT (0.200” x 0.200”)Less Than 1dB Insertion Loss at 15GHz40G Version15KHZ to 50GHzAvailable Packaged or WirebondedLess Than 1dB Insertion LossHigh Power Termination10G & 40G Version 50V, 40V, and 35V VariationsAvailable as Coplanar Waveguide or Microstrip Available with Integrated DCBlock15dB Minimum Return Loss5.CASE STUDY -Laser Diode Mounting Using Pre-Depositied AuSn SolderMany obstacles have been encountered in applications where Laser diodes need to be mounted so that the radiating edge is coincident with the edge of the substrate (see Figure A). The available high volume substrate manufacturing methods have in some cases resulted in decreased optical efficiency or increased thermal resistance. These undesirable conditions are caused by a lack of parallelism of the diode to the substrate or unsupported diode surface area.Cost efficient high volume manufacturing p ractices require that substrate interconnects be processed in an array format. Therefore, to have metallization terminate at the substrate edge requires patterned metal to extend into the kerf area between the arrayed die. The extended metal subsequently is cut through when separating the array. The blades used on dicing saws are specifically designed to cut (grind) through hard polycrystalline and crystalline materials and when passing through soft materials l ike Au and Cu a burr is created in the metal at the deiced edge. Unless the burrs are manually removed prior to assembly, the radiating edge of the attached diode can be elevated by the burr, resulting in the misalignment of the optical system and the creation of solder voids which could result in a loss of both optical and thermal efficiency.10Potential Solution Using Pull-Back TechniquesOne design option for “P” up configuration L aser diodes assemblies is to pull back the metallization from the edge (typically .002”). This design requires alignment of the Laser diode to the edge of the metal platform o r increased t hermal resistance c an result a t the unsupported portion of the diode (see figure B). Pulled back placement in “P” down configurations i s often not an acceptable solution due to an obstructed light path translating to a loss in optical efficiency. Additional alternatives for pulled back placement are pedestals made of high thermally conductive material, or ground 45°chamfers at the substrate edge so that the light emitting from the diode is not clipped. Pedestals h ave the added cost associated with one additional AuSn perform, the pedestal itself as well as the increased assembly cost including the associated yield loss. In general, these alternatives hamper the ability to produce in high volume competitively and add no additional value or performance advantages.Preferred Solution – Using Pre-Deposited AuSn Terminated At The Circuit EdgeAeroflex MIC Technology has worked with major OEM’s to develop an integrated 80/20 AuSn eutectic deposition process that effectively addresses the concerns of edge placement and thermal management and provides a straightforward, cost effective, solution. In addition, by integrating the eutectic solder (80/20 AuSn) into the base substrate, placement of the eutectic preforms is eliminated. By utilizing thinner integrated solder layers (from 4-6 microns in thickness), overall thermal performance i s improved compared to the 12-14 micron eutectic preforms normally utilized in these assemblies.Aeroflex MIC Technology’s eutectic solder coated diode platform terminates at the edge. This is accomplished through a multistage, additive process where the attachment pad topography is selectively tiered so that the area that approaches the edge is at a lower level than the balance of the pad (Figure C). The height difference, which begins less than .001” from the substrate edge, produces a controlled gap that fills with eutectic solder during reflow forming an integral solder joint to the edge (Figure D). The integrated 80/20, AuSn eutectic solder is offered from 3 to 6 microns in thickness and can be patterned for multiple attachment sites. Eutectic freeze times (elapsed time from liquid phase back to solid crystalline phase) at a controlled temperature of 290°C are from 3 to 5 minutes depending on solder thickness.11Substrate Material Alumina (99.5% of 99.6%) Aluminum NitrideMetal Scheme TaN (Sputtered)Ti (sputteredTiPd (sputtered)Cu (sputtered)Cu (plated)Ni (plated)Au (sputtered)AuSn (sputtered)50 100 ohms per square (optional)0.2um0.1um0.35um3 to 8um (optional) 1.0 to 3.0um0.5 to 3.0um3.0 to 6.0um (optional)Features-Lines & Spaces On Cross-under (s) (Thick Film -Cross-over / interconnect-Lines And Spaces (Thin Film)-Plated Via Diameter-Solid (Copper Filled) Filled Via Diameter 150um (min) 125um (min) 40um (min) 300um (min) 300um (min)Resistor Parameters-TCR-Tolerance (Trimmed) -Current Density -90 +/-50ppm Per Deg C 1% to 20%5 x 104 amps per sq. cm.Thermo Compression Bondable YesSolderable YesTable 12: Attributes to the Metallization Scheme1213ConclusionsThe ability to efficiently manufacture high volume thin film circuits with fine features, integral solid filled vias, resistors and cross-unders opens up possibilities which were previously discounted due to the high price of such circuits. This high volume Optical market has benefited greatly from this technology – which has enabled the complex procedure o f mounting the Laser diode onto an efficient heatsink, with the microwave/ millimeter wave circuitry on the same tile, to become a standard and common place process. The ability to integrate many fine features at a low cost has also meant that thin film is now a preferred s olution for several RF and microwave a pplications which were formerly the domain of softboard technologies.AcknowledgementsThe authors would like to acknowledge the inputs and support from colleagues at Aeroflex MIC Technology with special thanks to Malcolm Hill for his technical input, and Christine Williams for coordinating the inputs.14。
