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Digital IC：数字集成电路是将元器件和连线集成于同一半导体芯片上而制成的数字逻辑电路或系统第一章引论1、数字IC芯片制造步骤设计：前端设计（行为设计、体系结构设计、结构设计）、后端设计（逻辑设计、电路设计、版图设计）制版：根据版图制作加工用的光刻版制造：划片：将圆片切割成一个一个的管芯（划片槽）封装：用金丝把管芯的压焊块（pad）与管壳的引脚相连测试：测试芯片的工作情况2、数字IC的设计方法分层设计思想：每个层次都由下一个层次的若干个模块组成，自顶向下每个层次、每个模块分别进行建模与验证SoC设计方法：IP模块（硬核（Hardcore)、软核（Softcore)、固核（Firmcore））与设计复用 Foundry（代工）、Fabless（芯片设计）、Chipless（IP设计）“三足鼎立”——SoC发展的模式3、数字IC的质量评价标准（重点：成本、延时、功耗，还有能量啦可靠性啦驱动能力啦之类的）NRE (Non-Recurrent Engineering) 成本设计时间和投入，掩膜生产，样品生产一次性成本Recurrent 成本工艺制造（silicon processing），封装（packaging），测试（test）正比于产量综合可以相互转化加了功耗信息一阶RC网路传播延时：正比于此电路下拉电阻和负载电容所形成的时间常数功耗：emmmm自己算4、EDA设计流程IP设计系统设计（SystemC）模块设计（verilog）版图设计(.ICC) 电路级设计（.v 基本不可读）综合过程中用到的文件类型(都是synopsys)：.db（不可读） .lib（可读）.sdb .slib第二章器件基础1、保护IC的输入器件以抗静电荷（ESD保护）2、长沟道器件电压和电流的关系：3、短沟道器件电压和电流关系速度饱和：当沿着沟道的电场达到临界值ξC时，载流子的速度由于散射效应（载流子之间的碰撞）而趋于饱和。
Digital Integrated Circuit Design Course Design(English Version)AbstractDigital integrated circuit design is an important subject in thefield of electrical engineering. With the rapid development ofelectronic technology, digital integrated circuits have been widely used in various electronic devices. In this course design, the theoretical knowledge of digital integrated circuit design will be combined with practical applications, and students are required to design and simulate various digital integrated circuits.Learning GoalsThe goal of this course design is to enable students to understand the basic principles of digital integrated circuit design and to master the key design techniques and methods. By completing this course design, students will be able to:•Understand the principles and design methods of basic digital circuits•Design and simulate various digital integrated circuits•Analyze and optimize circuit performance•Apply design principles to solve practical problemsCourse OutlineChapter 1 - Introduction•Overview of digital integrated circuit design•Design flow of digital integrated circuits•Different CAD tools and simulation methodsChapter 2 - Combinational Logic Circuit Design•Boolean algebra and logic gate symbols•Minimization of Boolean function•Design of combinational logic circuits using gate-level and HDL-based methodsChapter 3 - Sequential Logic Circuit Design•Basic sequential circuits: latch and flip-flop•State machines and state diagrams•Design of sequential logic circuits using HDL-based methods Chapter 4 - Arithmetic Circuit Design•Design of half and full adders•Design of subtractors, multipliers, and dividers•Design of ALU and data path circuitsChapter 5 - Memory Circuit Design•SRAM and DRAM cell design•ROM and PLA circuit design•Design of register files and memory hierarchyChapter 6 - Verification and Testing•Overview of verification and testing•Test pattern generation and fault simulation•Design for testability and built-in self-testChapter 7 - Advanced Topics•Low-power design techniques•Clock distribution and clock gating design•Digital signal processing and custom circuitsCourse Design RequirementsThe following requirements should be met by students in the course design:1.Choose a digital integrated circuit design topic from thecourse outline.2.Write a design proposal that includes the design goal,specifications, and implementation plan.e industry-standard CAD tools to design and simulate thecircuit.4.Analyze the circuit performance and optimize the design ifnecessary.5.Write a final report that includes the circuit design,simulation results, and analysis.ConclusionBy completing this course design, students will have a deep understanding of digital integrated circuit design and simulation. They will be able to apply their knowledge to practical circuit design and bewell prepared for further study or work in the field of digital integrated circuits.。
CMOS - 数字集成电路(讲义)编著吴金东南大学无锡分校2008.09目录第一章 绪论1.1信号处理的对象方式与特点1.2教学方法与重要知识点1.3课程目标与要求1.4主要参考文献1-5第二章静态组合逻辑电路2.1概述2.2组合逻辑2.3 NMOS反相器2.4 CMOS组合逻辑的实现原理2.4.1 CMOS逻辑原理2.4.2 静态CMOS倒相器2.4.3 CMOS逻辑门2.5 NMOS组合逻辑逻辑2.5.1 NMOS基本逻辑门2.5.2 伪NMOS逻辑2.6传输门开关逻辑2.6.1 CPL逻辑2.6.2、DPL逻辑2.6.3 多路开关MUX逻辑2.7 差分逻辑2.8本章小结2-23第三章动态组合逻辑电路3.1 概述3.2动态逻辑3.3多米诺动态组合逻辑电路3.3.1 同型Domino-CMOS动态逻辑3.3.2 np-CMOS 动态逻辑3.4 钟控逻辑3.5 钟控动态逻辑电路3.4.1 无竞争动态逻辑 NPORA3.4.2 单相位时钟动态逻辑3.4.3 差分动态逻辑3.6本章小结 3-13第四章时序逻辑电路4.1概述4.2锁存器 - Latch4.3触发器 – Flip-Flop4.3.1 边沿型触发器4.3.2主从R-S触发器4.4逻辑电路结构4.4.1 D_Latch电路4.4.2 D_FF电路4.5寄存器 Register4.5.1 双港口寄存器4.5.2 移位寄存器4.6分频器 Frequency Divide4.6.1 基本1/2分频单元4.6.2 规则分频器/计数器4.6.3 奇数分频器4.6.4 任意占空比和任意进制的分频器4.6.5 1:1占空比的奇数分频器(1/N, Odd N)4.7计数器 - Counter4.7.1 N进制异步计数器4.7.2 N进制同步计数器4.8 本章小结4-25第五章数据与控制通道5.1概述5.2 1-bit加法器5.2.1 1bit 半/全加器原理5.2.2 基于传输逻辑的1bit全加器5.3 N-bit加法器5.3.1 进位完成加法器CCA(Carry Completion Adder)5.3.2 条件加法器-Conditional Sum Adder(CSA)5.3.3 进位选择加法器-Carry Select Adder(CSA)5.3.4 超前进位加法器-Carry Lookahead Adder(CLA)5.4编码/解码电路5.4.1 组合逻辑译码电路5.4.2 阵列译码电路5.4.3 可编程译码电路5.5控制电路5.6本章小结5-26第六章存储器6.1概述6.2 SRAM存储器6.2.1 存储单元6.2.2 存储阵列的系统结构6.2.3地址译码器6.2.4灵敏放大器6.3 非挥发存储器6.3.1 ROM6.3.2 EPROM和E2PROM6.4本章小结6-17第七章时钟与时序7.1 概述7.2 正弦波振荡器7.2.1振荡原理7.2.2 RC振荡器7.2.3 石英谐振器7.2.4并联石英晶振电路7.2.5 串联晶振电路7.3 矩形波振荡器7.3.1基于迟滞比较器结构7.3.2基于迟滞触发器结构7.3.3基于CMOS倒相器结构7.3.4晶体多谐振荡器7.3.5环形振荡器7.4 三角波振荡器7.5 Ramp锯齿波振荡器7.6 集成振荡电路7.6.1七级恒流环振7.6.2频率可配置环形振荡电路7.6.3弛豫振荡器7.7 非交叠时钟7.8 时钟相对延迟7.9 流水线7.10 本章小结7-34第八章 比较器与接口电路8.1概述8.2比较器结构与功能类型8.2.1 结构类型8.2.2 功能类型8.2.3 迟滞比较器8.3电压差分比较器8.3.1 多级差分比较器结构8.3.2 多级差分迟滞比较器8.3.3 CMOS施密特触发器8.3.4 电源电压比较器8.3.5动态电压比较器8.3.6 锁存比较器8.4 数字接口电路8.4.1 逻辑电平接口8.4.2功能接口电路8.5 本章小结 8-30。
