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ST25EM6TR中文资料

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ST24E16 ST25E1616 Kbit Serial I 2C EEPROM with Extended AddressingFebruary 19991/16AI01102B3E0-E2SDAV CCST24E16ST25E16WCSCL V SSFigure 1. Logic DiagramCOMPATIBLE with I 2C EXTENDED ADDRESSINGTWO WIRE SERIAL INTERFACE,SUPPORTS 400kHz PROTOCOL1 MILLION ERASE/WRITE CYCLES, OVER the FULL SUPPLY VOLTAGE RANGE 40 YEARS DATA RETENTION SINGLE SUPPLY VOLTAGE–4.5V to 5.5V for ST24E16 version –2.5V to 5.5V for ST25E16 version WRITE CONTROL FEATUREBYTE and PAGE WRITE (up to 16 BYTES)BYTE, RANDOM and SEQUENTIAL READ MODESSELF TIMED PROGRAMING CYCLEAUTOMATIC ADDRESS INCREMENTING ENHANCED ESD/LATCH UP PERFORMANCESDESCRIPTIONThe ST24/25E16 are 16 Kbit electrically erasable programmable memories (EEPROM), organized as 8 blocks of 256 x8 bits. It is manufactured in STMicroelectronics’s Hi-Endurance Advanced CMOS technology which guarantees an endur-ance of one million erase/write cycles over the full supply voltage range, and a data retention of over 40 years. The ST25E16 operates with a power supply value as low as 2.5V.E0 - E2Chip Enable InputsSDA Serial Data Address Input/Output SCL Serial Clock WC Write Control V CC Supply Voltage V SSGroundTable 1. Signal Names81SO8 (M)150mil Width81PSDIP8 (B)0.25mm FrameSDAV SSSCL WC E1E0V CC E2AI01103BST24E16ST25E1612348765Figure 2A. DIP Pin Connections1AI01104C2348765SDAV SSSCL WC E1E0V CC E2ST24E16ST25E16Figure 2B. SO Pin ConnectionsBoth Plastic Dual-in-Line and Plastic Small Outline packages are available.Each memory is compatible with the I 2C extended addressing standard, two wire serial interface which uses a bi-directional data bus and serial clock. The ST24/25E16 carry a built-in 4 bit, unique device identification code (1010) corresponding toDESCRIPTION (cont’d)the I 2C bus definition. The ST24/25E16 behave as slave devices in the I 2C protocol with all memory operations synchronized by the serial clock. Read and write operations are initiated by a START condition generated by the bus master. The START condition is followed by a stream of 4 bits (identifi-cation code 1010), 3 bit Chip Enable input to form a 7 bit Device Select, plus one read/write bit and terminated by an acknowledge bit.Symbol ParameterValue Unit T A Ambient Operating Temperature –40 to 125 °C T STG Storage Temperature –65 to 150°C T LEAD Lead Temperature, Soldering (SO8)(PSDIP8)40 sec 10 sec215260°C V IO Input or Output Voltages –0.6 to 6.5 V V CC Supply Voltage–0.3 to 6.5V V ESDElectrostatic Discharge Voltage (Human Body model) (2)4000V Electrostatic Discharge Voltage (Machine model) (3)500VNotes:1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.2.100pF through 1500Ω; MIL-STD-883C, 3015.73.200pF through 0Ω; EIAJ IC-121 (condition C)Table 2. Absolute Maximum Ratings (1)2/16ST24E16, ST25E16ModeRW bit Bytes Initial SequenceCurrent Address Read ’1’1START, Device Select, RW = ’1’Random Address Read ’0’1START, Device Select, RW = ’0’, Address,’1’reSTART, Device Select, RW = ’1’Sequential Read ’1’ 1 to 2048As CURRENT or RANDOM Mode Byte Write ’0’1START, Device Select, RW = ’0’Page Write’0’16START, Device Select, RW = ’0’Table 4. Operating ModesDevice CodeChip EnableRW Bitb7b6b5b4b3b2b1b0Device Select11E2E1E0RWNote: The MSB b7 is sent first.Table 3. Device Select CodeWhen writing data to the memory it responds to the 8 bits received by asserting an acknowledge bit during the 9th bit time. When data is read by the bus master, it acknowledges the receipt of the data bytes in the same way.Data transfers are terminated with a STOP condi-tion. In this way, up to 8 ST24/25E16 may be connected to the same I 2C bus and selected indi-vidually, allowing a total addressing field of 128Kbit.Power On Reset: V CC lock out write protect. In order to prevent data corruption and inadvertent write operations during power up, a Power On Reset (POR) circuit is implemented. Untill the V CC voltage has reached the POR threshold value, the internal reset is active: all operations are disabled and the device will not respond to any command.In the same way, when V CC drops down from the operating voltage to below the POR threshold value, all operations are disabled and the device will not respond to any command. A stable V CC must be applied before applying any logic signal.SIGNALS DESCRIPTIONSerial Clock (SCL). The SCL input pin is used to synchronize all data in and out of the memory. A resistor can be connected from the SCL line to V CC to act as a pull up (see Figure 3)Serial Data (SDA). The SDA pin is bi-directional and is used to transfer data in or out of the memory.It is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. A resistor must be connected from the SDA bus line to V CC to act as pull up (see Figure 3).Chip Enable (E0 - E2). These chip enable inputs are used to set the 3 least significant bits of the 7bit device select code. They may be driven dynami-cally or tied to V CC or V SS to establish the device select code. Note that the V IL and V IH levels for the inputs are CMOS, not TTL compatible.Write Control (WC). The Write Control feature WC is useful to protect the contents of the memory from any erroneous erase/write cycle. The Write Control signal is used to enable (WC at V IH ) or disable (WC at V IL ) the internal write protection.The devices with this Write Control feature no longer supports the multibyte mode of operation.When unconnected, the WC input is internally read as V IL (see Table 5).When WC = ’1’, Device Select and Address bytes are acknowledged; Data bytes are not acnowl-edged.Refer to the AN404 Application Note for more de-tailed information about Write Control feature.3/16ST24E16, ST25E16AI01115V CCC BUSSDA R LMASTERR LSCLC BUS25507510048121620C BUS (pF)R L m a x (k Ω)V CC = 5VFigure 3. Maximum R L Value versus Bus Capacitance (C BUS ) for an I 2C Bus, f C = 400kHzDEVICE OPERATION I 2C Bus BackgroundThe ST24/25E16 support the extended addressing I 2C protocol. This protocol defines any device that sends data onto the bus as a transmitter and any device that reads the data as a receiver.The device that controls the data transfer is known as the master and the other as the slave. The master will always initiate a data transfer and will provide the serial clock for synchronisation. The ST24/25E16are always slave devices in all communications.Start Condition. START is identified by a high to low transition of the SDA line while the clock SCL is stable in the high state. A START condition must precede any command for data transfer. Except during a programming cycle, the ST24/25E16 con-tinuously monitor the SDA and SCL signals for a START condition and will not respond unless one is given.Stop Condition. STOP is identified by a low to high transition of the SDA line while the clock SCL is stable in the high state. A STOP condition termi-nates communication between the ST24/25E16and the bus master. A STOP condition at the end of a Read command forces the standby state. ASTOP condition at the end of a Write command triggers the internal EEPROM write cycle.Acknowledge Bit (ACK). An acknowledge signal is used to indicate a successful data transfer. The bus transmitter, either master or slave, will release the SDA bus after sending 8 bits of data. During the 9th clock pulse the receiver pulls the SDA bus low to acknowledge the receipt of the 8 bits of data.Data Input. During data input the ST24/25E16sample the SDA bus signal on the rising edge of the clock SCL. For correct device operation the SDA signal must be stable during the clock low to high transition and the data must change ONLY when the SCL line is low.Device Selection. To start communication be-tween the bus master and the slave ST24/25E16,the master must initiate a START condition. The 8bits sent after a START condition are made up of a device select of 4 bits that identifies the device type,3 Chip Enable bits and one bit for a READ (RW =1) or WRITE (RW = 0) operation. There are two modes both for read and write. These are summa-rised in Table 4 and described hereafter. A commu-nication between the master and the slave is ended with a STOP condition.4/16ST24E16, ST25E16Symbol ParameterTest ConditionMinMax Unit C IN Input Capacitance (SDA)8pF C IN Input Capacitance (other pins)6pF Z WCL WC Input Impedance V IN ≤ 0.3 V CC 520k ΩZ WCH WC Input ImpedanceV IN ≥ 0.7 V CC500k Ωt LPLow-pass filter input time constant (SDA and SCL)100nsNote: 1. Sampled only, not 100% tested.Table 5. Input Parameters (1) (T A = 25 °C, f = 400 kHz )Symbol ParameterTest Condition MinMax Unit I LI Input Leakage Current (SCL, SDA, E0-E2)0V ≤ V IN ≤ V CC ±2µA I LO Output Leakage Current 0V ≤ V OUT ≤ V CC SDA in Hi-Z ±2µA I CCSupply Current (ST24 series)f C = 400kHz(Rise/Fall time < 30ns)2mA Supply Current (ST25 series)1mA I CC1Supply Current (Standby)(ST24 series)V IN = V SS or V CC ,V CC = 5V 100µA V IN = V SS or V CC , V CC = 5V, f C = 400kHz 300µA I CC2Supply Current (Standby) (ST25 series)V IN = V SS or V CC , V CC = 2.5V 5µA V IN = V SS or V CC , V CC = 2.5V, f C = 400kHz50µA V IL Input Low Voltage (SCL, SDA)–0.30.3 V CC V V IH Input High Voltage (SCL, SDA)0.7 V CC V CC + 1V V IL Input Low Voltage (E0-E2, WC)–0.30.5V V IH Input High Voltage (E0-E2, WC)V CC – 0.5V CC + 1V V OLOutput Low Voltage (ST24 series)I OL = 3mA, V CC = 5V 0.4V Output Low Voltage (ST25 series)I OL = 2.1mA, V CC = 2.5V0.4VTable 6. DC Characteristics(T A = 0 to 70 ° or –40 to 85 °C; V CC = 4.5V to 5.5V or 2.5V to 5.5V)5/16ST24E16, ST25E16Symbol Alt ParameterMinMax Unit t CH1CH2t R Clock Rise Time 300ns t CL1CL2t F Clock Fall Time 300ns t DH1DH2 (1)t R SDA Rise Time 20300ns t DL1DL1 (1)t F SDA Fall Time20300ns t CHDX (2)t SU:STA Clock High to Input Transition 600ns t CHCL t HIGH Clock Pulse Width High600ns t DLCL t HD:STA Input Low to Clock Low (START)600ns t CLDX t HD:DAT Clock Low to Input Transition 0µs t CLCH t LOW Clock Pulse Width Low1.3µs t DXCX t SU:DAT Input Transition to Clock Transition 100ns t CHDH t SU:STO Clock High to Input High (STOP)600ns t DHDL t BUF Input High to Input Low (Bus Free) 1.3µs t CLQV (3)t AA Clock Low to Next Data Out Valid 2001000ns t CLQX t DH Data Out Hold Time 200ns f C f SCL Clock Frequency 400kHz t Wt WRWrite Time10msNotes:1.Sampled only, not 100% tested.2.For a reSTART condition, or following a write cycle.3.The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP conditions.Table 7. AC Characteristics(T A = 0 to 70 °C or –40 to 85 °C; V CC = 4.5V to 5.5V or 2.5V to 5.5V)DEVICE OPERATION (cont’d)Memory Addressing. A data byte in the memory is addressed through 2 bytes of address informa-tion. The Most Significant Byte is sent first and the Least significant Byte is sent after. The Least Sig-nificant Byte addresses a block of 256 bytes, bits b10,b9,b8 of the Most Significant Byte select one block among 8 blocks (one block is 256 bytes).Most Significant ByteX X X X X b10b9b8X = Don’t Care.Least Significant Byteb7b6b5b4b3b2b1b0Input Rise and Fall Times ≤ 50nsInput Pulse Voltages 0.2V CC to 0.8V CC Input and Output Timing Ref.Voltages0.3V CC to 0.7V CCTable 8. AC Measurement ConditionsAI008250.8V CC0.2V CC0.7V CC 0.3V CCFigure 4. AC Testing Input Output Waveforms6/16ST24E16, ST25E16SCL SDA INSCL SDA OUTSCL SDA INtCHCLtDLCLtCHDXSTARTCONDITIONtCLCHtDXCXtCLDXSDAINPUTSDACHANGEtCHDHtDHDLSTOP &BUS FREEDATA VALIDtCLQV tCLQXDATA OUTPUTtCHDHSTOPCONDITIONtCHDXSTARTCONDITIONWRITE CYCLEtWAI00795BFigure 5. AC Waveforms7/16ST24E16, ST25E16Write OperationsFollowing a START condition the master sends a device select code with the RW bit reset to ’0’. The ST24/25E16 acknowledge this and waits for 2bytes of address. These 2 address bytes (8 bits each) provide access to any of the 8 blocks of 256bytes each. Writing in the ST24/25E16 may be inhibited if input pin WC is taken high.For the ST24/25E16 versions, any write command with WC = ’1’ (during a period of time from the START condition untill the end of the 2 Bytes Address) will not modify data and will NOT be acknowledged on data bytes, as in Figure 9.SCLSDASCLSDASDASTART CONDITIONSDA INPUTSDA CHANGEAI00792STOP CONDITION123789MSB ACKSTART CONDITIONSCL123789MSB ACKSTOP CONDITIONFigure 6. I 2C Bus ProtocolByte Write. In the Byte Write mode the master sends one data byte, which is acknowledged by the ST24/25E16. The master then terminates the transfer by generating a STOP condition.Page Write. The Page Write mode allows up to 16bytes to be written in a single write cycle, provided that they are all located in the same row of 16 bytes in the memory, that is the same Address bits (b10-b4). The master sends one up to 16 bytes of data,which are each acknowledged by the ST24/25E16.After each byte is transfered, the internal byte address counter (4 Least Significant Bits only) is incremented. The transfer is terminated by the master generating a STOP condition. Care must be taken to avoid address counter ’roll-over’ which8/16ST24E16, ST25E16could result in data being overwritten. Note that for any write mode, the generation by the master of the STOP condition starts the internal memory pro-gram cycle. All inputs are disabled until the comple-tion of this cycle and the ST24/25E16 will not respond to any request.Minimizing System Delay by Polling On ACK.During the internal Write cycle, the ST24/25E16disable itself from the bus in order to copy the data from the internal latches to the memory cells. The maximum value of the Write time (t W ) is given in the AC Characteristics table, this timing value may be reduced by an ACK polling sequence issued by the master.The sequence is:–Initial condition: a Write is in progress (see Fig-ure 7).–Step 1: the Master issues a START condition followed by a Device Select byte. (1st byte of the new instruction)–Step 2: if the ST24/25E16 are internally writ-ing, no ACK will be returned. The Master goes back to Step1. If the ST24/25E16 have termi-nated the internal writing, it will issue an ACK.The ST24/25E16 are ready to receive the sec-ond part of the instruction (the first byte of this instruction was already sent during Step1).WRITE Cycle in ProgressAI01099BNext Operation is Addressing the MemorySTART Condition DEVICE SELECT with RW = 0ACK ReturnedYESNOYESNOReSTARTSTOPProceedWRITE OperationProceedRandom Address READ OperationSend Byte AddressFirst byte of instruction with RW = 0 already decoded by ST24xxxFigure 7. Write Cycle Polling using ACK9/16ST24E16, ST25E16S T O PS T A R TBYTE WRITEDEV SELBYTE ADDR BYTE ADDRDATA INWCS T A R TPAGE WRITEDEV SELBYTE ADDR BYTE ADDRDATA IN 1WCDATA IN 2AI01120BPAGE WRITE (cont'd)WC (cont'd)S T O PDATA IN NACKACKACKNO ACKR/WACKACKACKNO ACKR/WNO ACKNO ACKFigure 8. Write Modes Sequence with Write Control = 0Read OperationsOn delivery, the memory content is set at all "1’s"(or FFh).Current Address Read. The ST24/25E16 have an internal 11 bits address counter. Each time a byte is read, this counter is incremented. For the Current Address Read mode, following a START condition, the master sends a Device Select with the RW bit set to ’1’. The ST24/25E16 acknowledge this and outputs the byte addressed by the internal address counter. This counter is then incremented.The master does NOT acknowledge the byte out-put, but terminates the transfer with a STOP con-dition.Random Address Read. A dummy write is per-formed to load the address into the address counter, see Figure 10. This is followed by another START condition from the master and the byte address repeated with the RW bit set to ’1’. The ST24/25E16 acknowledge this and outputs the byte addressed. The master does NOT acknow-ledge the byte output, but terminates the transfer with a STOP condition.Sequential Read. This mode can be initiated with either a Current Address Read or a Random Ad-dress Read. However, in this case the master DOES acknowledge the data byte output and the ST24/25E16 continue to output the next byte in10/16ST24E16, ST25E16S T O PS T A R TBYTE WRITEDEV SELBYTE ADDR BYTE ADDRDATA INWCS T A R TPAGE WRITEDEV SELBYTE ADDR BYTE ADDRDATA IN 1WCDATA IN 2AI01106BPAGE WRITE (cont'd)WC (cont'd)S T O PDATA IN NACKR/WACKACKACKACKACKACKACKR/WACKACKFigure 9. Write Modes Sequence with Write Control = 1sequence. T o terminate the stream of bytes, the master must NOT acknowledge the last byte out-put, but MUST generate a STOP condition. The output data is from consecutive byte addresses,with the internal byte address counter automat-ically incremented after each byte output. After a count of the last memory address, the addresscounter will ’roll-over’ and the memory will continue to output data.Acknowledge in Read Mode. In all read modes the ST24/25E16 wait for an acknowledge during the 9th bit time. If the master does not pull the SDA line low during this time, the ST24/25E16 terminate the data transfer and switch to a standby state.11/16S T A R TDEV SEL *BYTE ADDR BYTE ADDRS T A R TDEV SELDATA OUT 1AI01105CDATA OUT NS T O PS T A R TCURRENT ADDRESS READDEV SELDATA OUTRANDOM ADDRESS READS T O PS T A R TDEV SEL *DATA OUTSEQUENTIAL CURRENT READS T O PDATA OUT NS T A R TDEV SEL *BYTE ADDR BYTE ADDR SEQUENTIAL RANDOM READS T A R TDEV SEL *DATA OUT 1S T O PACKR/WNO ACKACKR/WACKACKACK R/WACKACK ACK NO ACKR/WNO ACKACKACK ACKR/WACKACKR/WACK NO ACKFigure 10. Read Modes SequenceNote:*The 7 Most Significant bits of DEV SEL bytes of a Random Read (1st byte and 4th byte) must be identical.12/16Operating Voltage 24 4.5V to 5.5V 25 2.5V to 5.5VRange E ExtendedAddressingPackage B PSDIP80.25mm Frame M SO8150mil WidthTemperature Range 10 to 70 °C 6–40 to 85 °C3 (1)–40 to 125 °COption TR Tape & ReelPackingExample: ST24E16 M 1 TRORDERING INFORMATION SCHEMENote: 1.T emperature range on special request only.Devices are shipped from the factory with the memory content set at all "1’s" (FFh).For a list of available options (Operating Voltage, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.13/16PSDIP-aA2A1A Le1DE1EN1CeA eBB1BSymbmm inches TypMin Max TypMin Max A 3.90 5.900.1540.232A10.49–0.019–A2 3.30 5.300.1300.209B 0.360.560.0140.022B1 1.15 1.650.0450.065C 0.200.360.0080.014D 9.209.900.3620.390E 7.62––0.300––E1 6.00 6.700.2360.264e1 2.54––0.100––eA 7.80–0.307–eB –10.00–0.394L 3.00 3.800.1180.150N88Drawing is not to scale.PSDIP8 - 8 pin Plastic Skinny DIP , 0.25mm lead frame14/16SO-aENCPBe ADCLA1α1Hh x 45˚Symbmm inches TypMin Max TypMin Max A 1.35 1.750.0530.069A10.100.250.0040.010B 0.330.510.0130.020C 0.190.250.0070.010D 4.80 5.000.1890.197E 3.80 4.000.1500.157e 1.27––0.050––H 5.80 6.200.2280.244h 0.250.500.0100.020L 0.400.900.0160.035α0°8°0°8°N 88CP0.100.004Drawing is not to scale.SO8 - 8 lead Plastic Small Outline, 150 mils body width15/16Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics© 1999 STMicroelectronics - All Rights ReservedAll other names are the property of their respective ownersPurchase of I2C Components by STMicroelectronics, conveys a license under the PhilipsI2C Patent. Rights to use these components in an I2C system, is granted provided that the system conforms tothe I2C Standard Specifications as defined by Philips.STMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - T aiwan - Thailand - United Kingdom - U.S.A.16/16。

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2SK2586中文资料

2SK2586中文资料

2SK2586Silicon N-Channel MOS FETADE-208-358 C4th. EditionApplicationHigh speed power switchingFeatures• Low on-resistance• R DS(on) = 7 m typ.• High speed switching• 4 V gate drive device can be driven from 5 V sourceOutline2SK25862Absolute Maximum Ratings (Ta = 25°C)ItemSymbol Ratings Unit Drain to source voltage V DSS 60V Gate to source voltage V GSS ±20V Drain current I D *260A Drain peak currentI D(pulse)*1240A Body to drain diode reverse drain current I DR *260A Avalanche current I AP *345A Avalanche energy E AR *3174mJ Channel dissipation Pch*2125W Channel temperature Tch 150°C Storage temperatureTstg–55 to +150°CNotes: 1.PW ≤ 10 µs, duty cycle ≤ 1 %2.Value at Tc = 25°C3.Value at Tch = 25°C, Rg ≥ 50 Ω2SK25863Electrical Characteristics (Ta = 25°C)ItemSymbol Min Typ Max Unit Test Conditions Drain to source breakdown voltageV (BR)DSS 60——V I D = 10 mA, V GS = 0Gate to source breakdown voltageV (BR)GSS ±20——V I G = ±100 µA, V DS = 0Gate to source leak current I GSS ——±10µA V GS = ±16 V, V DS = 0Zero gate voltage drain current I DSS——100µA V DS = 60 V, V GS = 0Gate to source cutoff voltage V GS(off) 1.0— 2.0V I D = 1 mA, V DS = 10 V Static drain to source on state resistanceR DS(on)—710m ΩI D = 30 A V GS = 10 V*1—1016m ΩI D = 30 A V GS = 4 V*1Forward transfer admittance |y fs |3560—S I D = 30 A V DS = 10 V*1Input capacitance Ciss —3550—pF V DS = 10 V Output capacitanceCoss —1760—pF V GS = 0Reverse transfer capacitance Crss —500—pF f = 1 MHz Turn-on delay time t d(on)—35—ns I D = 30 A Rise timet r —260—ns V GS = 10 V Turn-off delay time t d(off)—480—ns R L = 1.0 ΩFall timet f —370—ns Body to drain diode forward voltageV DF —0.94—V I F = 60 A, V GS = 0Body to drain diode reverse recovery time t rr—140—nsI F = 60 A, V GS = 0diF / dt = 50 A / µs Note:1.Pulse TestSee characteristic curves of 2SK2529.2SK25864Hitachi CodeJEDECEIAJWeight (reference value)TO-3P—Conforms5.0 gUnit: mmCautions1.Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark, or other intellectual property rights for information contained in this document.Hitachi bears no responsibility for problems that may arise with third party’s rights, includingintellectual property rights, in connection with use of the information contained in this document.2.Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.3.Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,traffic, safety equipment or medical equipment for life support.4.Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installationconditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.5.This product is not designed to be radiation resistant.6.No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.7.Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.Hitachi, Ltd.Semiconductor & Integrated Circuits.Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.Hitachi Asia Pte. Ltd.16 Collyer Quay #20-00Hitachi TowerSingapore 049318Tel: 535-2100Fax: 535-1533URLNorthAmerica : http:/Europe : /hel/ecg Asia (Singapore): .sg/grp3/sicd/index.htm Asia (Taiwan): /E/Product/SICD_Frame.htm Asia (HongKong): /eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htmHitachi Asia Ltd.Taipei Branch Office3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105)Tel: <886> (2) 2718-3666Fax: <886> (2) 2718-8180Hitachi Asia (Hong Kong) Ltd.Group III (Electronic Components)7/F., North Tower, World Finance Centre,Harbour City, Canton Road, Tsim Sha Tsui,Kowloon, Hong Kong Tel: <852> (2) 735 9218Fax: <852> (2) 730 0281 Telex: 40815 HITEC HXHitachi Europe Ltd.Electronic Components Group.Whitebrook ParkLower Cookham Road MaidenheadBerkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000Fax: <44> (1628) 778322Hitachi Europe GmbHElectronic components Group Dornacher Stra§e 3D-85622 Feldkirchen, Munich GermanyTel: <49> (89) 9 9180-0Fax: <49> (89) 9 29 30 00Hitachi Semiconductor (America) Inc.179 East Tasman Drive,San Jose,CA 95134 Tel: <1> (408) 433-1990Fax: <1>(408) 433-0223For further information write to:。

LM2586T-5.0资料

LM2586T-5.0资料

LM2586SIMPLE SWITCHER ®3A Flyback Regulator with ShutdownGeneral DescriptionThe LM2586series of regulators are monolithic integrated circuits specifically designed for flyback,step-up (boost),and forward converter applications.The device is available in 4different output voltage versions:3.3V,5.0V,12V,and adjust-able.Requiring a minimum number of external components,these regulators are cost effective,and simple to use.Included in the datasheet are typical circuits of boost and flyback regula-tors.Also listed are selector guides for diodes and capacitors and a family of standard inductors and flyback transformers designed to work with these switching regulators.The power switch is a 3.0A NPN device that can stand-off 65V.Protecting the power switch are current and thermal limiting circuits,and an undervoltage lockout circuit.This IC contains an adjustable frequency oscillator that can be pro-grammed up to 200kHz.The oscillator can also be synchro-nized with other devices,so that multiple devices can oper-ate at the same switching frequency.Other features include soft start mode to reduce in-rush cur-rent during start up,and current mode control for improved rejection of input voltage and output load transients and cycle-by-cycle current limiting.The device also has a shut-down pin,so that it can be turned off externally.An output voltage tolerance of ±4%,within specified input voltages and output load conditions,is guaranteed for the power supply system.Featuresn Requires few external componentsn Family of standard inductors and transformers n NPN output switches 3.0A,can stand off 65V n Wide input voltage range:4V to 40Vn Adjustable switching frequency:100kHz to 200kHz n External shutdown capabilityn Draws less than 60µA when shut down n Frequency synchronizationnCurrent-mode operation for improved transient response,line regulation,and current limitn Internal soft-start function reduces in-rush current during start-upn Output transistor protected by current limit,under voltage lockout,and thermal shutdownn System output voltage tolerance of ±4%max over line and load conditionsTypical Applicationsn Flyback regulator n Forward convertern Multiple-output regulator nSimple boost regulatorFlyback RegulatorSIMPLE SWITCHER ®and Switchers Made Simple®are registered trademarks of National Semiconductor Corporation.DS012516-1May 1996LM2586SIMPLE SWITCHER 3A Flyback Regulator with Shutdown©1999National Semiconductor Corporation Ordering InformationPackage Type NSC Package Order NumberDrawing7-Lead TO-220Bent,Staggered Leads TA07B LM2586T-3.3,LM2586T-5.0,LM2586T-12,LM2586T-ADJ 7-Lead TO-263TS7B LM2586S-3.3,LM2586S-5.0,LM2586S-12,LM2586S-ADJ 7-Lead TO-263Tape and Reel TS7B LM2586SX-3.3,LM2586SX-5.0,LM2586SX-12,LM2586SX-ADJ2Absolute Maximum Ratings(Note1)If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Input Voltage−0.4V≤V IN≤45V Switch Voltage−0.4V≤V SW≤65V Switch Current(Note2)Internally Limited Compensation Pin Voltage−0.4V≤V COMP≤2.4V Feedback Pin Voltage−0.4V≤V FB≤2V OUT ON/OFF Pin Voltage−0.4V≤V SH≤6V Sync Pin Voltage−0.4V≤V SYNC≤2V Power Dissipation(Note3)Internally Limited Storage Temperature Range−65˚C to+150˚C Lead Temperature(Soldering,10sec.)260˚C Maximum Junction Temperature(Note3)150˚C Minimum ESD Rating(C=100pF,R=1.5kΩ)2kV Operating RatingsSupply Voltage4V≤V IN≤40V Output Switch Voltage0V≤V SW≤60V Output Switch Current I SW≤3.0A Junction Temp.Range−40˚C≤T J≤+125˚CElectrical CharacteristicsSpecifications with standard type face are for T J=25˚C,and those in bold type face apply over full Operating Temperature Range.Unless otherwise specified,V IN=5V.LM2586-3.3Symbol Parameters Conditions Typical Min Max Units SYSTEM PARAMETERS Test Circuit of Figure1(Note4)V OUT Output Voltage V IN=4V to12V 3.3 3.17/3.14 3.43/3.46VI LOAD=0.3to1.2A∆V OUT/Line Regulation V IN=4V to12V2050/100mV ∆V IN I LOAD=0.3A∆V OUT/Load Regulation V IN=12V2050/100mV ∆I LOAD I LOAD=0.3A to1.2AηEfficiency V IN=5V,I LOAD=0.3A76% UNIQUE DEVICE PARAMETERS(Note5)V REF Output Reference Measured at Feedback Pin 3.3 3.242/3.234 3.358/3.366V Voltage V COMP=1.0V∆V REF Reference Voltage V IN=4V to40V 2.0mV Line RegulationG M Error Amp I COMP=−30µA to+30µA 1.1930.678 2.259mmhoTransconductance V COMP=1.0VA VOL Error Amp V COMP=0.5V to1.6V260151/75V/VVoltage Gain R COMP=1.0MΩ(Note6)LM2586-5.0Symbol Parameters Conditions Typical Min Max Units SYSTEM PARAMETERS Test Circuit of Figure1(Note4)V OUT Output Voltage V IN=4V to12V 5.0 4.80/4.75 5.20/5.25VI LOAD=0.3A to1.1A∆V OUT/Line Regulation V IN=4V to12V2050/100mV ∆V IN I LOAD=0.3A∆V OUT/Load Regulation V IN=12V2050/100mV ∆I LOAD I LOAD=0.3A to1.1AηEfficiency V IN=12V,I LOAD=0.6A80% UNIQUE DEVICE PARAMETERS(Note5)V REF Output ReferenceVoltage Measured at Feedback PinV COMP=1.0V5.0 4.913/4.900 5.088/5.100V∆V REF Reference Voltage V IN=4V to40V 3.3mV3LM2586-5.0(Continued)Symbol Parameters Conditions Typical Min Max Units UNIQUE DEVICE PARAMETERS(Note5)Line RegulationG M Error Amp I COMP=−30µA to+30µA0.7500.447 1.491mmhoTransconductance V COMP=1.0VA VOL Error Amp V COMP=0.5V to1.6V16599/49V/VVoltage Gain R COMP=1.0MΩ(Note6)LM2586-12Symbol Parameters Conditions Typical Min Max Units SYSTEM PARAMETERS Test Circuit of Figure2(Note4)V OUT Output Voltage V IN=4V to10V12.011.52/11.4012.48/12.60VI LOAD=0.2A to0.8A∆V OUT/Line Regulation V IN=4V to10V20100/200mV ∆V IN I LOAD=0.2A∆V OUT/Load Regulation V IN=10V20100/200mV ∆I LOAD I LOAD=0.2A to0.8AηEfficiency V IN=10V,I LOAD=0.6A93% UNIQUE DEVICE PARAMETERS(Note5)V REF Output Reference Measured at Feedback Pin12.011.79/11.7612.21/12.24V Voltage V COMP=1.0V∆V REF Reference Voltage V IN=4V to40V7.8mV Line RegulationG M Error Amp I COMP=−30µA to+30µA0.3280.1860.621mmhoTransconductance V COMP=1.0VA VOL Error Amp V COMP=0.5V to1.6V7041/21V/VVoltage Gain R COMP=1.0MΩ(Note6)LM2586-ADJSymbol Parameters Conditions Typical Min Max Units SYSTEM PARAMETERS Test Circuit of Figure2(Note4)V OUT Output Voltage V IN=4V to10V12.011.52/11.4012.48/12.60VI LOAD=0.2A to0.8A∆V OUT/Line Regulation V IN=4V to10V20100/200mV ∆V IN I LOAD=0.2A∆V OUT/Load Regulation V IN=10V20100/200mV ∆I LOAD I LOAD=0.2A to0.8AηEfficiency V IN=10V,I LOAD=0.6A93% UNIQUE DEVICE PARAMETERS(Note5)V REF Output Reference Measured at Feedback Pin 1.230 1.208/1.205 1.252/1.255V Voltage V COMP=1.0V∆V REF Reference Voltage V IN=4V to40V 1.5mV Line RegulationG M Error Amp I COMP=−30µA to+30µA 3.200 1.800 6.000mmhoTransconductance V COMP=1.0VA VOL Error Amp Voltage Gain V COMP=0.5V to1.6V,670400/200V/VR COMP=1.0MΩ(Note6)I B Error Amp V COMP=1.0V125425/600nAInput Bias Current4LM2586-ADJ(Continued)Symbol ParametersConditionsTypical MinMax Units COMMON DEVICE PARAMETERS for all versions (Note 5)I S Input Supply Current Switch Off (Note 8)1115.5/16.5mA I SWITCH =1.8A 50100/115mA I S/D Shutdown Input V SH=3V16100/300µA Supply Current V UV Input SupplyR LOAD =100Ω3.303.05 3.75VUndervoltage Lockout f OOscillator FrequencyMeasured at Switch PinR LOAD =100Ω,V COMP =1.0V 10085/75115/125kHz Freq.Adj.Pin Open (Pin 1)R SET =22k Ω200kHz f SC Short-Circuit Measured at Switch Pin Frequency R LOAD =100Ω25kHzV FEEDBACK =1.15V V EAO Error Amplifier Upper Limit 2.8 2.6/2.4V Output Swing(Note 7)Lower Limit 0.250.40/0.55V(Note 8)I EAO Error Amp (Note 9)Output Current 165110/70260/320µA (Source or Sink)I SS Soft Start Current V FEEDBACK =0.92V 11.08.0/7.017.0/19.0µA V COMP =1.0V D MAX Maximum Duty Cycle R LOAD =100Ω9893/90%(Note 7)I L Switch Leakage Switch Off15300/600µA CurrentV SWITCH =60V V SUS Switch Sustaining Voltage dV/dT =1.5V/ns 65VV SAT Switch Saturation Voltage I SWITCH =3.0A 0.450.65/0.9V I CL NPN Switch Current Limit 4.0 3.07.0A V STH Synchronization F SYNC =200kHz0.750.625/0.400.875/1.00V Threshold Voltage V COMP =1V,V IN =5V I SYNC Synchronization V IN =5V100200µA Pin Current V COMP =1V,V SYNC =V STH V SHTH ON/OFF Pin (Pin 1)V COMP =1V 1.6 1.0/0.8 2.2/2.4V Threshold Voltage (Note 10)I SH ON/OFF Pin (Pin 1)V COMP =1V 4015/1065/75µACurrentV SH =V SHTHθJA Thermal ResistanceT Package,Junction to Ambient (Note 11)65˚C/WθJA T Package,Junction to Ambient (Note 12)45θJC T Package,Junction to Case 2θJA S Package,Junction to Ambient (Note 13)56θJA S Package,Junction to Ambient (Note 14)35θJA S Package,Junction to Ambient (Note 15)26θJCS Package,Junction to Case25LM2586-ADJ(Continued)Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.These ratings apply when the current is limited to less than 1.2mA for pins 1,2,3,and 6.Operating ratings indicate conditions for which the device is intended to be functional,but device parameter specifications may not be guar-anteed under these conditions.For guaranteed specifications and test conditions,see the Electrical Characteristics.Note 2:Note that switch current and output current are not identical in a step-up regulator.Output current cannot be internally limited when the LM2586is used as a step-up regulator.To prevent damage to the switch,the output current must be externally limited to 3A.However,output current is internally limited when the LM2586is used as a flyback regulator (see the Application Hints section for more information).Note 3:The junction temperature of the device (T J )is a function of the ambient temperature (T A ),the junction-to-ambient thermal resistance (θJA ),and the power dissipation of the device (P D ).A thermal shutdown will occur if the temperature exceeds the maximum junction temperature of the device:P D x θJA +T A(MAX)≥T J -(MAX).For a safe thermal design,check that the maximum power dissipated by the device is less than:P D ≤[T J(MAX)−T A(MAX)]/θJA .When calculating the maximum allowable power dissipation,derate the maximum junction temperature —this ensures a margin of safety in the thermal design.Note 4:External components such as the diode,inductor,input and output capacitors can affect switching regulator performance.When the LM2586is used as shown in Figures 1,2,system performance will be as specified by the system parameters.Note 5:All room temperature limits are 100%production tested,and all limits at temperature extremes are guaranteed via correlation using standard Statistical Qual-ity Control (SQC)methods.Note 6:A 1.0M Ωresistor is connected to the compensation pin (which is the error amplifier output)to ensure accuracy in measuring A VOL .Note 7:To measure this parameter,the feedback voltage is set to a low value,depending on the output version of the device,to force the error amplifier output high and the switch on.Note 8:To measure this parameter,the feedback voltage is set to a high value,depending on the output version of the device,to force the error amplifier output low and the switch off.Note 9:To measure the worst-case error amplifier output current,the LM2586is tested with the feedback voltage set to its low value (Note 7)and at its high value (Note 8).Note 10:When testing the minimum value,do not sink current from this pin —isolate it with a diode.If current is drawn from this pin,the frequency adjust circuit will begin operation (see Figure 41).Note 11:Junction to ambient thermal resistance (no external heat sink)for the 7lead TO-220package mounted vertically,with 1⁄2inch leads in a socket,or on a PC board with minimum copper area.Note 12:Junction to ambient thermal resistance (no external heat sink)for the 7lead TO-220package mounted vertically,with 1⁄2inch leads soldered to a PC board containing approximately 4square inches of (1oz.)copper area surrounding the leads.Note 13:Junction to ambient thermal resistance for the 7lead TO-263mounted horizontally against a PC board area of 0.136square inches (the same size as the TO-263package)of 1oz.(0.0014in.thick)copper.Note 14:Junction to ambient thermal resistance for the 7lead TO-263mounted horizontally against a PC board area of 0.4896square inches (3.6times the area of the TO-263package)of 1oz.(0.0014in.thick)copper.Note 15:Junction to ambient thermal resistance for the 7lead TO-263mounted horizontally against a PC board copper area of 1.0064square inches (7.4times the area of the TO-263package)of 1oz.(0.0014in.thick)copper.Additional copper area will reduce thermal resistance further.See the thermal model in Switchers Made Simple ®software.Typical Performance CharacteristicsSupply Current vs TemperatureDS012516-2Reference Voltage vs TemperatureDS012516-3∆Reference Voltage vs Supply VoltageDS012516-4 6Typical Performance Characteristics(Continued)Supply Currentvs Switch CurrentDS012516-5Current Limitvs TemperatureDS012516-6Feedback Pin BiasCurrent vs TemperatureDS012516-7Switch SaturationVoltage vs TemperatureDS012516-8Switch Transconductancevs TemperatureDS012516-9Oscillator Frequencyvs TemperatureDS012516-10Error Amp Transconductancevs TemperatureDS012516-11Error Amp VoltageGain vs TemperatureDS012516-12Short Circuit Frequencyvs TemperatureDS012516-13 7Typical Performance Characteristics(Continued)Connection DiagramsShutdown Supply Current vs TemperatureDS012516-14ON/OFF Pin Current vs VoltageDS012516-15Oscillator Frequency vs ResistanceDS012516-16Bent,Staggered Leads 7-Lead TO-220(T)Top ViewDS012516-17Bent,Staggered Leads 7-Lead TO-220(T)Side ViewDS012516-18Order Number LM2586T3.3,LM2586T-5.0,LM2586T-12or LM2586T-ADJ See NS Package Number TA07B7-Lead TO-263(S)Top ViewDS012516-197-Lead TO-263(S)Side ViewDS012516-20Order number LM2586S-3.3,LM2586S-5.0,LM2586S-12or LM2586S-ADJTape and Reel Order Number LM2586SX-3.3,LM2586SX-5.0,LM2586SX-12or LM2586SX-ADJSee NS Package Number TS7B 8Test CircuitsDS012516-21C IN1—100µF,25V Aluminum ElectrolyticC IN2—0.1µF CeramicT—22µH,1:1Schott#67141450D—1N5820C OUT—680µF,16V Aluminum ElectrolyticC C—0.47µF CeramicR C—2kFIGURE1.LM2586-3.3and LM2586-5.0DS012516-22C IN1—100µF,25V Aluminum ElectrolyticC IN2—0.1µF CeramicL—15µH,Renco#RL-5472-5D—1N5820C OUT—680µF,16V Aluminum ElectrolyticC C—0.47µF CeramicR C—2kFor12V Devices:R1=Short(0Ω)and2=OpenFor ADJ Devices:R1=48.75k,±0.1%and2=5.62k,±0.1%FIGURE2.LM2586-12and LM2586-ADJ9Block DiagramFlyback Regulator OperationThe LM2586is ideally suited for use in the flyback regulator topology.The flyback regulator can produce a single output voltage,such as the one shown in Figure4,or multiple out-put voltages.In Figure4,the flyback regulator generates an output voltage that is inside the range of the input voltage. This feature is unique to flyback regulators and cannot be duplicated with buck or boost regulators.The operation of a flyback regulator is as follows(refer to Figure4):when the switch is on,current flows through the primary winding of the transformer,T1,storing energy in the magnetic field of the transformer.Note that the primary and secondary windings are out of phase,so no current flows through the secondary when current flows through the pri-mary.When the switch turns off,the magnetic field col-lapses,reversing the voltage polarity of the primary and sec-ondary windings.Now rectifier D1is forward biased and current flows through it,releasing the energy stored in the transformer.This produces voltage at the output.The output voltage is controlled by modulating the peak switch current.This is done by feeding back a portion of the output voltage to the error amp,which amplifies the differ-ence between the feedback voltage and a1.230V reference. The error amp output voltage is compared to a ramp voltage proportional to the switch current(i.e.,inductor current dur-ing the switch on time).The comparator terminates the switch on time when the two voltages are equal,thereby controlling the peak switch current to maintain a constant output voltage.DS012516-23For Fixed Versions3.3V,R1=3.4k,R2=2k5.0V,R1=6.15k,R2=2k12V,R1=8.73k,R2=1kFor Adj.VersionR1=Short(0Ω),R2=OpenFIGURE3. 10Flyback Regulator Operation(Continued)Typical Performance CharacteristicsDS012516-24As shown in Figure 4,the LM2586can be used as a flyback regulator by using a minimum number of external components.The switching waveforms of this regulator are shown in Figure 5.Typical Performance Characteristics observed during the operation of this circuit are shown in Figure 6.FIGURE 4.12V Flyback Regulator Design ExampleDS012516-65A:Switch Voltage,20V/div B:Switch Current,2A/divC:Output Rectifier Current,2A/divD:Output Ripple Voltage,50mV/div AC-CoupledFIGURE 5.Switching Waveforms11Typical Performance Characteristics(Continued)Typical Flyback Regulator ApplicationsFigure 7through Figure 12show six typical flyback applica-tions,varying from single output to triple output.Each draw-ing contains the part number(s)and manufacturer(s)for ev-ery component except the transformer.For the transformer part numbers and manufacturers’names,see the table inFigure 13.For applications with different output voltages —requiring the LM2586-ADJ —or different output configurations that do not match the standard configurations,refer to the Switchers Made Simple software.DS012516-66FIGURE 6.V OUT Response to Load Current StepDS012516-27FIGURE 7.Single-Output Flyback Regulator 12Typical Flyback Regulator Applications(Continued)DS012516-28FIGURE8.Single-Output Flyback RegulatorDS012516-29FIGURE9.Single-Output Flyback Regulator13Typical Flyback Regulator Applications(Continued)DS012516-30FIGURE10.Dual-Output Flyback RegulatorDS012516-31FIGURE11.Dual-Output Flyback Regulator14Typical Flyback Regulator Applications(Continued)Transformer Selection (T)Figure 13lists the standard transformers available for flyback regulator applications.Included in the table are the turns ratio(s)for each transformer,as well as the output voltages,input voltage ranges,and the maximum load currents for each circuit.DS012516-32FIGURE 12.Triple-Output Flyback RegulatorApplications Figure 7Figure 8Figure 9Figure 10Figure 11Figure 12Transformers T7T7T7T6T6T5V IN 4V–6V 4V–6V 8V–16V 4V–6V 18V–36V 18V–36V V OUT1 3.3V 5V 12V 12V 12V 5V I OUT1(Max) 1.4A 1A 0.8A 0.15A 0.6A 1.8A N 11111.2 1.20.5V OUT2−12V −12V 12V I OUT2(Max)0.15A 0.6A 0.25A N 2 1.21.21.15V OUT3−12V I OUT3(Max)0.25A N 31.15FIGURE 13.Transformer Selection Table15Typical Flyback Regulator Applications(Continued)Transformer FootprintsFigure15through Figure29show the footprints of each transformer,listed in Figure14.TransformerTypeManufacturers’Part NumbersCoilcraft(Note16)Coilcraft(Note16)SurfaceMountPulse(Note17)Surface MountPulse(Note17)Renco(Note18)Schott(Note19)T5Q4338-B Q4437-B PE-68413—RL-553267140890T6Q4339-B Q4438-B PE-68414—RL-553367140900T7S6000-A S6057-A—PE-68482RL-575126606 Note16:Coilcraft Inc.,Phone:(800)322-26451102Silver Lake Road,Cary,IL60013Fax:(708)639-1469European Headquarters,21Napier Place Phone:+441236730595Wardpark North,Cumbernauld,Scotland G680LL Fax:+441236730627Note17:Pulse Engineering Inc.,Phone:(619)674-810012220World Trade Drive,San Diego,CA92128Fax:(619)674-8262European Headquarters,Dunmore Road Phone:+3539324107Tuam,Co.Galway,Ireland Fax:+3539324459Note18:Renco Electronics Inc.,Phone:(800)645-582860Jeffryn Blvd.East,Deer Park,NY11729Fax:(516)586-5562Note19:Schott Corp.,Phone:(612)475-11731000Parkers Lane Road,Wayzata,MN55391Fax:(612)475-1786FIGURE14.Transformer Manufacturer GuideT7DS012516-33Top ViewFIGURE15.Coilcraft S6000-AT6DS012516-34Top ViewFIGURE16.Coilcraft Q4339-BT5DS012516-35FIGURE17.Coilcraft Q4437-B(Surface Mount)T5DS012516-36Top ViewFIGURE18.Coilcraft Q4338-B16Typical Flyback RegulatorApplications(Continued)T7DS012516-37Top ViewFIGURE19.Coilcraft S6057-A(Surface Mount)T6DS012516-38Top ViewFIGURE20.Coilcraft Q4438-B(Surface Mount)T7DS012516-39Top ViewFIGURE21.Pulse PE-68482T6DS012516-40Top ViewFIGURE22.Pulse PE-68414(Surface Mount)T5DS012516-42Top ViewFIGURE23.Pulse PE-68413(Surface Mount)T7DS012516-43Top ViewFIGURE24.Renco RL-5751T6DS012516-45Top ViewFIGURE25.Renco RL-5533T5DS012516-46Top ViewFIGURE26.Renco RL-553217Typical Flyback Regulator Applications(Continued)Step-Up (Boost)Regulator OperationFigure 30shows the LM2586used as a step-up (boost)regulator.This is a switching regulator that produces an out-put voltage greater than the input supply voltage.A brief explanation of how the LM2586Boost Regulator works is as follows (refer to Figure 30).When the NPN switch turns on,the inductor current ramps up at the rate of V IN /L,storing energy in the inductor.When the switch turnsoff,the lower end of the inductor flies above V IN ,discharging its current through diode (D)into the output capacitor (C OUT )at a rate of (V OUT −V IN )/L.Thus,energy stored in the induc-tor during the switch on time is transferred to the output dur-ing the switch off time.The output voltage is controlled by adjusting the peak switch current,as described in the flyback regulator section.By adding a small number of external components (as shown in Figure 30),the LM2586can be used to produce a regulated out-put voltage that is greater than the applied input voltage.The switching waveforms observed during the operation of this circuit are shown in Figure 31.Typical performance of this regulator is shown in Figure 32.T7DS012516-47Top ViewFIGURE 27.Schott 26606T6DS012516-49Top ViewFIGURE 28.Schott 67140900T5DS012516-50Top ViewFIGURE 29.Schott 67140890DS012516-51FIGURE 30.12V Boost Regulator 18Typical Performance CharacteristicsTypical Boost Regulator ApplicationsFigures 33,35through Figure 37show four typical boost applications —one fixed and three using the adjustable ver-sion of the LM2586.Each drawing contains the part num-ber(s)and manufacturer(s)for every component.For thefixed 12V output application,the part numbers and manufac-turers’names for the inductor are listed in a table in Figure 34.For applications with different output voltages,refer to the Switchers Made Simple software.DS012516-67A:Switch Voltage,10V/div B:Switch Current,2A/div C:Inductor Current,2A/divD:Output Ripple Voltage,100mV/div,AC-CoupledFIGURE 31.Switching WaveformsDS012516-68FIGURE 32.V OUT Response to Load Current StepDS012516-54FIGURE 33.+5V to +12V Boost Regulator19Typical Boost Regulator Applications(Continued)Figure34contains a table of standard inductors,by part number and corresponding manufacturer,for the fixed output regulator of Figure33.Coilcraft (Note20)Pulse(Note21)Renco(Note22)Schott(Note23)Schott(Note23)(Surface Mount)DO3316-153PE-53898RL-5471-76714651067146540 Note20:Coilcraft Inc.,Phone:(800)322-26451102Silver Lake Road,Cary,IL60013Fax:(708)639-1469European Headquarters,21Napier Place Phone:+441236730595Wardpark North,Cumbernauld,Scotland G680LL Fax:+441236730627Note21:Pulse Engineering Inc.,Phone:(619)674-810012220World Trade Drive,San Diego,CA92128Fax:(619)674-8262European Headquarters,Dunmore Road Phone:+3539324107Tuam,Co.Galway,Ireland Fax:+3539324459Note22:Renco Electronics Inc.,Phone:(800)645-582860Jeffryn Blvd.East,Deer Park,NY11729Fax:(516)586-5562Note23:Schott Corp.,Phone:(612)475-11731000Parkers Lane Road,Wayzata,MN55391Fax:(612)475-1786FIGURE34.Inductor Selection TableDS012516-55FIGURE35.+12V to+24V Boost RegulatorDS012516-56FIGURE36.+24V to+36V Boost Regulator20Typical Boost Regulator Applications(Continued)Note 24:The LM2586will require a heat sink in these applications.The size of the heat sink will depend on the maximum ambient temperature.To calculate the thermal resistance of the IC and the size of the heat sink needed,see the “Heat Sink/Thermal Considerations”section in the Application Hints.Application HintsLM2586SPECIAL FEATURESSHUTDOWN CONTROLA feature of the LM2586is its ability to be shut down using the ON /OFF pin (pin 1).This feature conserves input power by turning off the device when it is not in use.For proper op-eration,an isolation diode is required (as shown in Figure 38).The device will shut down when 3V or greater is applied on the ON /OFF pin,sourcing current into pin 1.In shut down mode,the device will draw typically 56µA of supply current (16µA to V IN and 40µA to the ON /OFF pin).To turn the de-vice back on,leave pin 1floating,using an (isolation)diode,as shown in Figure 38(for normal operation,do not source or sink current to or from this pin —see the next section).FREQUENCY ADJUSTMENTThe switching frequency of the LM2586can be adjusted with the use of an external resistor.This feature allows the user to optimize the size of the magnetics and the output capaci-tor(s)by tailoring the operating frequency.A resistor con-nected from pin 1(the Freq.Adj.pin)to ground will set theswitching frequency from 100kHz to 200kHz (maximum).As shown in Figure 38,the pin can be used to adjust the fre-quency while still providing the shut down function.A curve in the Performance Characteristics Section graphs the resistor value to the corresponding switching frequency.The table in Figure 39shows resistor values corresponding to commonly used frequencies.However,changing the LM2586’s operating frequency from its nominal value of 100kHz will change the magnetics se-lection and compensation component values.DS012516-57FIGURE 37.+24V to +48V Boost RegulatorDS012516-58FIGURE 38.Shutdown OperationR SET (k Ω)Frequency (kHz)Open 100200125471503317522200FIGURE 39.Frequency Setting Resistor Guide21Application Hints(Continued)FREQUENCY SYNCHRONIZATIONAnother feature of the LM2586is the ability to synchronize the switching frequency to an external source,using the sync pin (pin 6).This feature allows the user to parallel mul-tiple devices to deliver more output power.A negative falling pulse applied to the sync pin will synchro-nize the LM2586to an external oscillator (see Figures 40,41).Use of this feature enables the LM2586to be synchronized to an external oscillator,such as a system clock.This opera-tion allows multiple power supplies to operate at the same frequency,thus eliminating frequency-related noise problems.The scope photo in Figure 41shows a LM258612V Boost Regulator synchronized to a 200kHz signal.There is a 700ns delay between the falling edge of the sync signal and the turning on of the switch.PROGRAMMING OUTPUT VOLTAGE (SELECTING R1AND R2)Referring to the adjustable regulator in Figure 42,the output voltage is programmed by the resistors R1and R2by the fol-lowing formula:V OUT =V REF (1+R1/R2)where V REF =1.23V Resistors R1and R2divide the output voltage down so that it can be compared with the 1.23V internal reference.With R2between 1k and 5k,R1is:R1=R2(V OUT /V REF −1)where V REF =1.23V For best temperature coefficient and stability with time,use 1%metal film resistors.SHORT CIRCUIT CONDITIONDue to the inherent nature of boost regulators,when the out-put is shorted (see Figure 42),current flows directly from the input,through the inductor and the diode,to the output,by-passing the switch.The current limit of the switch does not limit the output current for the entire circuit.To protect the load and prevent damage to the switch,the current must beexternally limited,either by the input supply or at the output with an external current limit circuit.The external limit should be set to the maximum switch current of the device,which is 3A.In a flyback regulator application (Figure 43),using the stan-dard transformers,the LM2586will survive a short circuit to the main output.When the output voltage drops to 80%of its nominal value,the frequency will drop to 25kHz.With a lower frequency,off times are larger.With the longer off times,the transformer can release all of its stored energy be-fore the switch turns back on.Hence,the switch turns on ini-tially with zero current at its collector.In this condition,the switch current limit will limit the peak current,saving the de-vice.FLYBACK REGULATOR INPUT CAPACITORSA flyback regulator draws discontinuous pulses of current from the input supply.Therefore,there are two input capaci-tors needed in a flyback regulator —one for energy storage and one for filtering (see Figure 43).Both are required due to the inherent operation of a flyback regulator.To keep aDS012516-59FIGURE 40.Frequency SynchronizationDS012516-69FIGURE 41.Waveforms of a Synchronized12V Boost RegulatorDS012516-61FIGURE 42.Boost Regulator22。

2526中文资料

2526中文资料

C T F AC TO RYData Sheet27447.2*2526 AND2536USB DUAL POWER CONTROL SWITCHESThe A2526EL/M and A2536EL/M are integrated high-side dualpower switches, optimized for self-powered and bus-powered Univer-sal Serial Bus (USB) applications. Few external components arenecessary to satisfy USB requirements. The A2526EL/EM ENABLEinputs are active high; the A2536EL/EM are active low.All devices are ideally suited for USB applications. Each switchchannel supplies up to 500 mA as required by USB peripheral devices.In addition, the switch’s low on-resistance permits achieving the USBvoltage-drop requirements. Fault current is limited to typically750 mA, satisfying the UL 25 VA safety requirements, and a flagoutput is available to indicate a fault condition to the local USBcontroller. Momentary voltage drops that may occur on the upstreamport when the switch is enabled in bus-powered applications is elimi-nated by a “soft start” feature.Additional features include thermal shutdown to prevent catastrophicswitch failure from high-current loads, undervoltage lockout to ensurethat the device remains OFF unless there is a valid input voltagepresent, and 3.3 V and 5 V logic-compatible enable inputs.These switches are provided in 8-pin mini-DIP (suffix ‘M’) and8-lead SOIC (suffix ‘L’) packages.FeaturesI 2.7 V to 5.8 V InputI Up to 500 mA Continuous Load Current per PortI140 mΩ Maximum ON-ResistanceI 1.25 A Maximum Short-Circuit Current LimitI Individual Open-Drain Fault Flag OutputsI125 µA Typical ON-State Supply CurrentI<1 µA Typical OFF-State Supply CurrentI Outputs Can be Forced Higher Than Input (off-state)I Thermal ShutdownI 2.2 V Typical Undervoltage LockoutI0.6 ms Turn On (soft-start) and Fast Turn OffI A2526 (active-high) Improved Replacement for MIC2526-1I A2536 (active-low) Improved Replacement for MIC2526-2ApplicationsI USB Hosts and Self-Powered HubsI USB Bus-Powered HubsI Hot Plug-In Power SuppliesI Battery-Charger Circuits115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-******** AND 2536USBDUAL POWER CONTROL SWITCHES2FUNCTIONAL BLOCK DIAGRAMCopyright © 2000, Allegro MicroSystems, Inc.OUT A IN GND OUT BDwg. PP-070-3A2536EMNote that the A2536EM (DIP) and theA2536EL (SOIC) are electrically identical andshare a common terminal number assignment.5075100125150A L L O W AB L E P AC K A G E P O W E RD I S S I P A T I O N I N W A T T SAMBIENT TEMPERATURE IN °C25Dwg. GP-009-2Dwg. FP-049-1OUT B FLG B EN BGNDAAEN A2526 AND 2536USBDUAL POWER CONTROLSWITCHES3Electrical Characteristics at T A = 25°C, V IN = 5 V, each output tested separately (unless otherwise noted).LimitsParameterTest Conditions Min Typ Max Units Operating Voltage Range V IN2.7– 5.8V Switch ResistanceV IN = 5 V, I OUT = 500 mA –100140m ΩV IN = 3.3 V, I OUT = 500 mA–100140m ΩOutput Leakage Current Each output (output disabled), V IN = 5 V, V OUT = 0–<1.010µA Maximum Load Current Each output500––mA Short-Circuit Current Limit Each output (enabled into load), V OUT = 4 V 0.50.75 1.25A Current-Limit Threshold Ramped load applied to enabled output, V OUT ≤ 4 V –0.9–A ENABLE Input ThresholdLow-to-high transition – 2.1 2.4V High-to-low transition0.8 1.9–V ENABLE Input Hysteresis –0.2–V ENABLE Input Current V EN = 0 V to 5.5 V–±0.01±1.0µA ENABLE Input Cap.– 1.0–pF Output Turn-On Delay R L = 10 Ω, C L = 1 µF, 50% V ENABLE to 10% V OUT –0.5–ms Output Turn-On Rise Time R L = 10 Ω, C L = 1 µF, 10% V OUT to 90% V OUT –0.6–ms Output Turn-Off Delay R L = 10 Ω, C L = 1 µF, 50% V ENABLE to 90% V OUT –10–µs Output Turn-Off Fall Time R L = 10 Ω, C L = 1 µF, 90% V OUT to 10% V OUT –25–µs Error Flag Output V IN = 5 V, I L = 10 mA –8.0–ΩResistanceV IN = 3.3 V, I L = 10 mA –10–ΩError Flag Off Current V FLG = 5 V–0.01–µA Supply CurrentBoth switches disabled (see note), OUT = open –0.2 5.0µA Both switches enabled (see note), OUT = open–125160µA UVLO ThresholdIncreasing V IN – 2.35–V Decreasing V IN– 2.2–V Over-Temperature Increasing T J –165–°C Shutdown ThresholdDecreasing T J –155–°CNote — Disabled is ≤ 0.8 V and enabled is ≥ 2.4 V (active high) for the A2526EL/EM. Disabled is ≥ 0.8V IN and enabled is ≤ 0.8 V (active low) for the A2536EL/EM.115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50002526 AND 2536USBDUAL POWER CONTROL SWITCHES4FUNCTIONAL DESCRIPTIONPower switchThe power switch is an N-channel MOSFET with a maximum on-state resistance of 140 m Ω (V IN = 5 V). Configured as a high-side switch, the power switch prevents current flow in either direction if disabled. The drain body diode is discon-nected from the source when the switch is OFF allowing the output voltage to exceed the input voltage without causing current conduction. The power switch supplies a minimum of 500 mA per switch.Charge pumpAn internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V. The charge pump is limited to 2.5 µA to establish a controlled turn on time of typically 1 ms.DriverThe driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromag-netic interference (EMI) produced, the driver incorporatescircuitry that controls the rise times and fall times of the output voltage. The rise time is typically 1 ms.ENABLE (EN or EN)The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 5 µA maximum when a logic high is present on EN (A2526) or a logic low is present (A2536). The proper logic level restores bias to the drive and control circuits and turns the power ON. The enable input is a compatible with both TTL and CMOS logic levels.Fault Flag (FLG)This open drain output is asserted (active low) when anovercurrent or over temperature condition is encountered. The output will remain asserted until the overcurrent or over temperature condition is removed.Current senseA sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit isencountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage anddrives the power FET into its saturation region, which switches the output into a constant-current mode and holds the current constant while varying the voltage on the load.Thermal senseAn internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 165°C.Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 10°C, the switch turns back ON. The switch continues to cycle off and on until the fault is removed.Undervoltage lockoutA voltage-sense circuit monitors the input voltage. When the input voltage is approximately 2 V, a control signal turns OFF the power switch.2526 AND 2536USBDUAL POWER CONTROLSWITCHES5V OUT 1 V/V ENABLE 200 µs/V OUT 1 V/V ENABLE50 µs/NO-LOAD SWITCHING PERFORMANCEV OUT 1 V/V ENABLE50 µs/115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50002526 AND 2536USBDUAL POWER CONTROL SWITCHES6CAPACITIVE-LOAD SWITCHING PERFORMANCEI OUT500 mA/V ENABLEV FAULTV OUT 2 V/1 ms/ C L = 1000 µF R L = 12 ΩCURRENT LIMITINGI OUT500 mA/V ENABLEV FAULT V OUT 2 V/1 ms/ C L = 50 µF R L = 100 ΩI OUT500 mA/V ENABLEV FAULTV OUT 2 V/1 ms/ C L = 100 µF R L = 100 Ω2526 AND 2536USBDUAL POWER CONTROLSWITCHES7I OUT400 mA/V FAULT500 ms/15 m ΩSHORT CIRCUITTHERMAL SHUTDOWNI OUT 1 A/V FAULT500 ms/ R L = 15 m ΩTHERMAL SHUTDOWNI OUT 4 A/V FAULTV OUT5 ms/ 15 m ΩSHORT CIRCUITI OUT 4 A/V FAULTV OUT2 µs/15 m ΩSHORT CIRCUITOUTPUT SHORT-CIRCUIT PERFORMANCE115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50002526 AND 2536USBDUAL POWER CONTROL SWITCHES8OvercurrentA sense FET is employed for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present long enough to activate thermal limiting.Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or between V IN has been applied. The device senses the short and immediately switches into a constant-current output.In the second condition, the short occurs while the device is enabled. At the instant the short occurs, very high currents may flow for a short time before the current-limit circuit can react .After the current-limit circuit has tripped (reached theovercurrent trip threshold) the device switches into constant-current mode.In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded. The device is capable of delivering current up to the current-limit threshold without damage. Once the threshold has been reached, the device switches into its constant-current mode.Fault Flag (FLG)The FLG open-drain output is asserted (active low) when an overcurrent or over-temperature condition is encountered. The output will remain asserted until the overcurrent or over-temperature condition is removed. Connecting a heavycapacitive load to an enabled device can cause momentary false over-current reporting from the inrush current flowing through the device, charging the downstream capacitor. An RC filter can be connected to the terminal to reduce false overcurrent reporting. Using low-ESR electrolytic capacitors on the output lowers the inrush current flow through the device during hot-plug events by providing a low impedance energy source,thereby reducing erroneous overcurrent reporting.Power dissipation and junction temperatureThe low on-resistance of the n-channel MOSFET allows small surface-mount packages, such as an SOIC, to pass large currents. The thermal resistance of these packages are highcompared to those of power packages; it is good design practice to check power dissipation and junction temperature. The first step is to find r DS(on) at the input voltage and operating tempera-ture. Next, calculate the power dissipation using:P D = r DS(on) x I 2Finally, calculate the junction temperature:T J = P D x R θJA + T A where:T A = ambient temperature °CR θJA = thermal resistance (SOIC = 108°C/W, DIP = 60°C/W ).Thermal protectionThermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The faults force these devices into constant-current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it OFF. Hysteresis is built into the thermal sense circuit, and after the device has cooled approximately 20°, the switch turns back ON. The switch continues to cycle in this manner until the load fault or input power is removed.Undervoltage lock-out (UVLO)An undervoltage lockout ensures that the power switch is in the OFF state at power up. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned OFF. This facilitates the design of hot-insertion systems where it is not possible to turn OFF the power switch before input power is removed. The UVLO will also keep the switch from being turned ON until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned ON, with a controlled rise time to reduce EMI and voltage overshoots.Power supply considerationsA 0.1 µF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electro-lytic capacitor on the output terminals is also desirable when the output load is heavy. The capacitor reduces power supplytransients that may cause ringing on the input. Also, bypassing the output with a 0.01 µF to 0.1 µF ceramic capacitor improves the immunity of the device to short-circuit transients.APPLICATIONS INFORMATION2526 AND 2536USBDUAL POWER CONTROLSWITCHES9TYPICAL APPLICATIONSVIN ON/OFF A OVER-CURRENT AGROUNDUSB CONTROLLERON/OFF BOVER-BDwg. EP-070-11A3.3 V REGUSB Host ApplicationUSB Bus-Powered HubVIN ON/OFF A OVER-CURRENT AGROUND5 VUSB CONTROLLERUSB ON/OFF BOVER-BDwg. EP-070-1A3.3 V115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50002526 AND 2536USBDUAL POWER CONTROL SWITCHES10A2526EL and A2536ELDimensions in Inches (for reference only)Dimensions in Millimeters (controlling dimensions)Dwg. MA-007-8 inBSCDwg. MA-007-8 mmNOTES:1.Lead spacing tolerance is non-cumulative.2.Exact body and lead configuration at vendor’s option within limits shown.2526 AND 2536USBDUAL POWER CONTROLSWITCHES11NOTES:1.Leads 1, 4, 5, and 8 may be half leads at vendor’s option.2.Lead thickness is measured at seating plane or below.3.Lead spacing tolerance is non-cumulative.4.Exact body and lead configuration at vendor’s option within limits shown.Dwg. MA-001-8A mmA2526EM and A2536EMDimensions in Inches (controlling dimensions)Dimensions in Millimeters (for reference only)115 Northeast Cutoff, Box 15036Worcester, Massachusetts 01615-0036 (508) 853-50002526 AND 2536USBDUAL POWER CONTROL SWITCHES12The products described here are manufactured under one or more U.S. patents or U.S. patents pending.Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may berequired to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsi-bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.。

FM25CL64中文资料

FM25CL64中文资料

FM25CL64 数据手册
RReevv 33..22
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6.1. 协议概述...........................................................................................................................6 6.2. 数据传输...........................................................................................................................7 6.3.命令结构............................................................................................................................. 7 6.4. WREN－设置写使能锁存器 ............................................................................................8 6.5. WRDI－写入禁止 .............................................................................................................8 6.6. RDSR－读状态寄存器 .....................................................................................................9 6.7. WRSR－写状态寄存器.....................................................................................................9 7. 状态寄存器&写保护..............................................................................................................10 8. 存储器操作 ............................................................................................................................. 11 8.1. 写操作............................................................................................................................. 11 8.2. 读操作............................................................................................................................. 11 8.3. 保持................................................................................................................................. 11 9. 电气特性 .................................................................................................................................13 9.1. 绝对最大额定值.............................................................................................................13 9.2. DC 工作条件 ...................................................................................................................13 9.3. AC 参数 ...........................................................................................................................14 9.4. 电容.................................................................................................................................14 9.5. AC 测试条件 ...................................................................................................................15 9.6. 串行数据总线时序.........................................................................................................15 9.7. /Hold 时序........................................................................................................................15 9.8. 数据保存.........................................................................................................................15 10. 机械图 .................................................................................................................................16 10.1. 8 脚 SOIC（JEDEC MS-012 variation AA） ...............................................................16 10.2. 8 脚 TDFN（外形尺寸为 4.0mm×4.5mm，引脚间距为 0.95mm）..........................17 11. 修订历史 .............................................................................................................................18