基于抛物线插值的分数时延估计算法

一种改进的分数时延估计方法及应用刘超;柏业超;张兴敢【摘要】Traditional fractional time delay estimation (TDE) algorithm is sensitive to ambient noise and reverberation noise ,and the algorithm performance is severely degraded in the complex environment .To improve the accuracy of time delay estimation ,a GCC‐maximum likelihood phase compensation (GCC‐MLP) phase compensation fractional time delay estimation approach is proposed based on generalized cross correlation(GCC) .The frequency domain weighting function is also improved for GCC algorithm . At the same time ,linear phase compensation is applied to the cross correlation spectrum in frequencydo‐main and a continuous time delay estimator is obtained .Simulation comparition between the proposed al‐gorithm and the other fractional TDE algorithms demonstrates that the proposed algorithm outperforms the curve fitting algorithm and the sinc interpolation algorithm .Meanwhile the robustness to the noisy and the reverberant conditions isreinforced ,the time delay estimation error also decreases .Therefore , GCC‐MLP phase compensation fractional time delay estimation algorithm can be widely used in sound source direction of arrival estimation and sound source localization .%传统的分数时延估计算法对环境噪声和混响噪声比较敏感，在复杂的实际环境中，算法性能会严重下降。

基于多项式插值的分数延时滤波器的FPGA实现肖美龄;龚晓峰【摘要】The precision of time delay estimation based on polynomial interpolation is analyzed in this paper.The different interpolation methods of time delay estimation accuracy are analyzed and compared.Simulations demonstrate that the inappropriate piecewise quadratic interpolation delay estimation is in the presence of local maxima problem.Such local maxima will produce larger time delay estimation error.The parameter of the piecewise quadratic interpolation polynomial are analyzed and the appropriate parameters are obtained.Eventually an arbitrarily adjustable FDF based on FPGA is presented.It can deal with the real-time data efficiently and guarantee the accuracy of time delay estimation,effectively reduce the implementation scheme of the number of multiplications.%针对基于多项式插值的延时估计精度进行了分析研究.针对不同插值方法的延时估计精度进行了分析比较;指出了不恰当的分段二次插值延时估计存在局部极值问题,该局部极值会产生较大的延时估计误差;对分段二次插值多项式设计参数进行分析仿真得出恰当参数,在此基础上基于FPGA实现了一种可任意调节的分数倍延时滤波器,能够高速实时处理信号,既能保证延时估计精度,又可有效降低乘法运算量.【期刊名称】《电子设计工程》【年(卷),期】2018(026)002【总页数】5页(P159-163)【关键词】FPGA;多项式插值;分数延时;分数倍速率变换【作者】肖美龄;龚晓峰【作者单位】四川大学电气信息学院,四川成都610065;四川大学电气信息学院,四川成都610065【正文语种】中文【中图分类】TN713数字化可调节的分数延时滤波器（fractional delay filter，FDF）在信号重构，回声消除，定时同步，任意分数倍采样率转换等许多领域都有着广泛的应用[1-3]，因此被人们广泛研究。