ICS9158-03中文资料
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Integrated CircuitSystems, Inc.General DescriptionFeaturesICS9158-03Block DiagramApplicationsFrequency Generator and Integrated BufferThe ICS9158-03 is a low-cost frequency generator designed specifically for desktop and notebook PC applications. Eight copies of the CPU clock are available.Each high drive (40mA) output is capable for driving a 30pF load and has a typical duty cycle of 50/50. The clock outputs are skew-controlled to within ±250ps.The ICS9158-03 makes a gradual transition between frequencies, so that it meets the Intel cycle-to-cycle timing specification for 486 and Pentium systems.8 skew-free, high drive CPU/BUS clocks Up to 100 MHz output±250ps skew between all outputsOutputs can drive up to 30pF load and 40mA 50±10% duty cycleCompatible with 486 and Pentium CPUs On-chip loop filter components 4.5V - 5.5V supply range24-pin SOIC packageIdeal for RISC or CISC systems such as 486, Pentium,PowerPC , etc. requiring multiple CPU and BUSclocks.ICS reserves the right to make changes in the device data identified in this publicationICS9158-03ICS9158-03 Pin Descriptions for ICS9158-03PIN NUM BER PIN NAM E TYPE DESCRIPTION1CLK1A OUT CLK1A clock output2X2OUT Crystal connection3X1IN Crystal connection4VDD PW R Digital POW ER SUPPLY (+5V)5GND PW R Digital GROUND640 M Hz OUT40 M Hz clock output724 M Hz OUT24 M Hz floppy disk/combination I/O clock output8CLK1B OUT CLK1B clock output9AGND PW R ANALOG GROUND10OE IN OUTPUT ENABLE. Tristates all outputs when low.11CLK12B OUT CLK12B clock output12GND PW R Digital GROUND13CLK1C OUT CLK1C clock output14CLK1D OUT CLK1D clock output15FS2IN CPU clock frequency select 216AVDD PW R ANALOG power supply (+5V)17CLK12A OUT CLK12A clock output18REF OUT14.31818 M Hz clock output19GND PW R Digital GROUND20VDD PW R Digital POW ER SUPPLY (+5V)21CLK12C OUT2X CPU clock output22CLK2A OUT CPU clock output23FS1IN CPU clock frequency select 124FS0IN CPU clock frequency select 0ICS9158-03Electrical Characteristics at 5VAbsolute Maximum RatingsAVDD, VDD referenced to GND . . . . . . . . . . . . . . . . 7VOperating temperature under bias. . . . . . . . . . . . . . . . 0°C to +70°C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +150°CV oltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 WattsStresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.DC CharacteristicsPARAMETERSYMBOL TEST CONDITIONS MIN TYP MAX UNITS Input Low V oltage V IL 0.8V Input High V oltage V IH 2.0V Input Low Current I IL V IN =0V (Pull-up)-20µAInput High Current I IH V IN =V DD -55µA Output Low V oltage V OL I OL =20.0mA 0.250.4V Output High V oltage 1V OH I OH =-30mA 2.4 3.5V Output Low Current 1I OL V OL =0.8V 4565mA Output High Current 1I OH V OH =2.0V -55-35mA Supply CurrentI DD No load, 66 MHz 67100mA Output Frequency Change over Supply and Temperature 1F D With respect to typical frequency 0.0020.01%Short circuit current 1I SC Each output clock 2556mA Pull-up resistor value 1R PU Input pin 680k ΩInput Capacitance 1C i Except X1, X28pf Load Capacitance 1C LPins X1, X220pfV DD = +5V±10%, T A =0°C to 70°C unless otherwise statedNote 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.ICS9158-03Electrical Characteristics (continued )Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.AC CharacteristicsPARAMETERSYMBOLTEST CONDITIONS MIN TYP MAX UNITS Output Rise time, 0.8 to 2.0V (Note 1)tr 30pf load -1 2.0ns Rise time, 20% to 80% VDD (Note 1)tr 30pf load - 2.53ns Output Fall time, 2.0 to 0.8V 1tf 30pf load -0.5 2.0ns Fall time, 80% to 20% VDD 1tf 30pf load - 1.5 3.0ns Duty cycle 1dt 30pf load 45/5548/5255/45%Jitter, one sigma 1tj1s As compared with clock period 0.52.0%Jitter, absolute tjab -525%Jitter, absolute tjab 25-66MHz clocks-250250ps Input Frequencyfi 14.318MHz Clock skew between CLK2A,CLK1(A-D) and CLK12(A-C) outputs Tsk -250100250ps Frequency Transition Time 1tftFrom 4 to 50 MHz1320msV DD = +5V±10%, T A =0°C to 70°C unless otherwise statedICS9158-03V DD = +3.3V±10%, T A =0°C to 70°C unless otherwise statedElectrical Characteristics at 3.3VNote 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.DC Characteristics PARAMETERSYMBOLTEST CONDITIONSMIN TYPMAX UNITS Input Low Voltage V IL 0.2 VDDV Input High Voltage V IH 0.7 VDD V Input Low Current I IL V IN =0V(Pull-up)-10µA Input High Current I IH V IN =V DD -5µA Output Low Voltage V OL I OL =10mA 0.1V DDV Output High Voltage 1V OH I OH =-5mA 0.85V DDV Output Low Current 1I OL V OL =0.2V DD 2030mA Output High Current 1I OH V OH =0.7V DD-15-10mA Supply CurrentI DDNo load, 66 MHz 4370mA Output Frequency Change over Supply and Temperature 1F D With respect to typical frequency 0.0020.01%Short Circuit Current 1I SC Each output clock 2556mA Pull-up Resistor Value 1R PU Input pin900kW Input Capacitance 1C i Except X1, X28pF Load Capacitance 1C LPins X1, X220pFAC C haracteristicsPA RA M ETERSY M BO LTEST CO N D ITIO N S M IN TY P M A X U N ITS O utput R ise tim e,0.8 to 2.0V 1t r 30pF load -1 2.5ns R ise tim e, 20% to 80% V D D 1t r 30pF load - 2.5 4.0ns O utput Fall tim e, 2.0 to 0.8V 1t f 30pF load -0.5 2.5ns Fall tim e, 80% to 20% V D D 1t f 30pF load - 1.5 4.0ns D uty cycle 1d t 30pF load40/5044/4650/40%Jitter, one sigm a 1t j1s A s com pared w ith clock period0.5 2.0%Jitter, absolute 1t jab 25%Jitter, absolute 1t jab 25-66 M H z clocks300ps Input Frequencyf i 14.318M H z C lock skew w indow betw een C LK 2A , C LK 1(A -D )C PU and CLK 12(A -C ) outputs 1T sk 100250ps Frequency Transition tim e 1t ftFrom 4 to 50 M H z 1320m sICS9158-03ICS reserves the right to make changes in the device data identified in this。
