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第44卷第1期2021年1月Vol.44Ao.1Jan.2021计算机学报CHINESE JOURNAL OF COMPUTERS神威E级原型机互连网络和消息机制高剑刚卢宏生何王全任秀江陈淑平斯添浩周舟胡舒凯于康魏迪（家并行计算机工程技术研究中心北京100190）摘要本文描述了神威E级原型机的互连网络和消息机制.神威E级原型机是继神威蓝光、神威•太湖之光之后神威家族的第三代计算机•该计算机作为一台E级计算机的原型机，峰值性能3.期PUops,其最大的特色之一就是采用28Gbps传输技术，设计开发了新一代的神威高阶路由器和神威高性能网络接口两款芯片，在传统胖树的基础上，设计了双轨泛树拓扑结构，定义实现了新颖的神威消息原语和消息库，实现了一种基于包级粒度动态切换的双轨乱序消息机制，通信性能比神威•太湖之光互连网络提升了4倍,为神威ER计算机互连网络的研制奠定了基础1关键词多轨网络；泛树；高阶路由器;路由算法；网络接口；消息引擎；消息库中图法分类号TP302DOI号期该期7/SP该神16.2020.00222The Interconnection Network and Message Machinasim ofSunway Exascate Prototype SystemGAL Jian-Gang LU Hong-Sheng HR Wang-Quan RSA Xiu-Jiang CHRA Shu-Ping PI Tian-HapZHOU Zhou HR Shu-Gai YU Kang WAI Di（NaUonal Research.CenLer of Parallel Computer Engineering and Technology,Beijing100190）Abstraci TUn high-performancn interconnectiog network is onn ol the maig components ol the high-performancn computing system.N is responsible toc the comection ol computing nodm, storage nodm,and I/O devicer in the high-performancc computing system,and is responsible foe the communicatiog of all nodes in the high-performance computing system.There are n large numbee of parallel applications in high-performancc computing systerns thai need to exchangr datn Ptween different nodes（Ntween computin-nodes,Ptween computin-nodet and IN nodet,between computin-nodes and storage nodes）.High requirements arc put forward foe thc communication delay a_nd bandwidth of high-performance interconnection networks.H larhs numbee of high-performancs computinh systerns havs a_dopted customizen interconnection netwoms to meeh application requirements.Ths customizen interconnection networf can well meet ths design requirementr of high performancs computinh system,and can optimizs ths design of network performance such vs communication delay and communication bandwidth to bettee meeh the variour communication requirementr op high-performance computinh systems and improve communication performance,thereby improving the actual operating performance of parallel applications in high-performance computing systems.Interconnection networf design ic an important mea_ns to improve networf communication performance.At the same time,the收稿日期=2020-05-15；在线发布日期:2020-08-25.本课题得到国家重点研发计划项目N16YFB220）资助.高剑刚，硕士，正高级工程师，主要研究方向为计算机体系结构、高性能互连网络.Arnail：137****2205@.卢宏生（通信作者），硕士，正高级工程师，主要研究方向为计算机体系结构、高性能互连网络.Arnail：lu_hongsheng@.何王全，博士，正高级工程师，主要研究方向为计算机体系结构、并行语言设计•任秀江，博士，工程师，主要研究方向为计算机体系结构、高性能互连网络.陈淑平，硕士，高级工程师，主要研究方向为计算机体系结构、互连网络软件•斯添浩，硕士，工程师，主主研究方向为计算机体系结构、高性能互连网络•周舟，博士，工程师，主要研究方向为计算机体系结构、高性能互连网络•胡舒凯，硕士，工程师，主要研究方向为计算机体系结构、高性能互连网络.于康，博士，工程师，主主研究方向为计算机体系结构•魏迪，硕士，工程师,主主研究方向为计算机体系结构.1期高剑刚等：神威E级原型机互连网络和消息机制223message mechanism has a huge influence on communication performance.Even under the same topology ane routet conditions,different messaer mechanisma will still cause huge differences in communicatiou performance.TUs customizeh features ol customizeh networks arc largely reflecteh in the ability W customizr varioue messayr mechanisms.Each customized network hat its own messayr and definea its own messayr protocot to meeO its own speciat communication dems.Ths high-performancs interconnection network ant messays mechanism are studied on the purpose of independent control.Theperformance musi ma_tch the fast developiny computiny capability on the roan to exascals systeim Ths worldwite top supercomputera mainly seleci Mellanox InfiniBand,Cray Aries,Intel Onmi-patO,and employ the 25Gbps transmissiod technique to implemedt their interconnectiod networe.The11600X5of thc top domestie supercomputer,such us“Strnway Taihu LighW and“Tia_nhe2",arc constructed based on11Gbps transmission.The interconnection w W o W and m^saye mechanism of the Sunwao exascals prototype systern arc introduceh in this papec.Strnway exascals prototyps system is the third-generation supercomputec ot Sunwap supercomputec family,aftec Sunwap Blus Light and Strnway Taihu Light.As a pre-research project for the exascals systern,ths pean performance ot this system is up to3.13PFlope.The interconnection networe ot this system is constructeh bsed on two innovativs Sunway chips:ths Sunway high-radix routee chip and Sunway high-performance networC interface chip,dependine on ths28Gbpe transmission technique.Moreover,y generalizeh fat-tree networC topology is developeS；an out-of-ordec messaes mechanism with dynamie pacOet-interleaveh transmission in two raile is implementeS；ths efficient Strnway messaes verbs a_nd library arc designey.Ths communication performance ot the prototype system improvee4timee compared with Strnway Taihn Light,a_nd it therefore makee the solid technology foundation for Strnway exascalc systern.Strnway exascalc prototype system makee the break-through on the key technologiee ot2G Gbpe transmission,high-radix router,high-performance networC interface,high-efficient nd reliable networC architecture.Furthermore,Strnway networC chipseW ot new generation is designed,nd ths networC ot Strnwas ^xascale prototype system is constructey.They all contribute W the design ot the domestie exascals supercomputec.The research achievee ths goal ot innovative design ot ths exascals system bp constructine the large-scale verification system,masterine the techniques ot new interconnection networC architecture,and tmWg Used on domestic componente and parts.Keywords multi-rail network；generalizeh fat-tree topology；high-ra_dix routee chip；routinearithmetic；networC interface；messaes engine；1引言虽然目前TOP500排名第一的“富岳”超级计算机性能已经达到513PFlops①,但鉴于超级计算机在科学研究、经济与社会方面的巨大作用，人类对计算能力的追求永无止境，世界各国都在加紧E级计算机的研制开发.根据报道，美国预计2021年到2023年将提供Aurora、FRONTIER、EI-CAPITAN三台E级计算机，但tel、Cray、经M、AND、NVIDIA和HPR六大messaes librarp超算巨头全部参与，其中Aurrora计算机2021年完成研制，峰值性能lEFlops,计划成为美国第一台E级计算机.三台计算机的共同之处是都将使用Cray公司最新的Shasta架构，其核心是Cray公司的Slingshot互连技术其ray公司研制了Rosetta高阶路由器芯片，该芯片具有64个端口，每个端口配置4个通道，采用56Gbpe PAN4传输技术,单端口传输速率达到524Gbps.Slingshot互连采用了Cray 独创的HPC(High Performance Computing)以太①Supercomputec RUGAKU.Tttps：//wv//system/179807/224计算体学报2026年网协议，在具备标准以太网优点的同时，也可以获得HPC网络的技术优势①.日本Fugai计算机系统，继承了“京K”计算与网络紧耦合的6D T i-ouc结构，采用富士通自主研发的处理器A64FX构建，该处理器包含卷个ARN架构的专用计算核心高个辅助核心等部件，以及6个TAT模块和1个02端口片上Switch模块.Fugaku计算机的ToFuD网络采用了28Gbps 传输技术，实现了对afd网络的全面升级②.作为HPC网络领域技术领导者之一的Mellanox 公司，其InfinCancl互连网络在2010年11月的TOP502中占比26.8%,目前TOP502中排名第一的Summit计算机就使用了Mellanox公司InfinCand EDR产品，还有另外2台使用了其最新的HDR互连，传输速率达到50Gbps.Mellanoc公司的ConnectX-6芯片，采用50Gbps PAM4技术，可配置成卷个端口，每个端口200Gbps,也可以配置成-0个端口，每个端口期OGpU③.法国a公司在高性能计算领域拥有强大的实力，其开发的BXT eXascale Interconnect采用了自行研发的卷端口Switch芯片，每个端口性能达到期OGbps,支持胖树、扁平蝴蝶工、蜻蜓等多种结构，支持最大64K节点2为了实现从C级到S级的跨越,探索应对访存墙、通信墙、可靠性墙、能耗墙、可扩展性墙等挑战④的有效技术和策略，中国研制了3台E级原型机，分别是曙光E级原型机、天河E级原型机和神威E级原型机•其中神威E级原型机由1024个申威台中0+众核处理器（简称SW26012+）组成，每个处理器包含4个运算控制核心和256个运算核心.2个处理器通过PCN0.0连接到同一片网络接口芯片，构成一个运算节点，每个运算节点峰值运算能力6.期TFlops. 512个运算节点通过神威互连网络相连，组成神威E级原型机.该原型机峰值性能达到0.期PFlopt 位居神威•太湖之光、天河2号、天河1号之后，在20期年中国超算TOP102中排名第4⑤，已安装在国家济南超算中心.神威互连网络是神威E级原型机的重要组成部分，由网络硬件和网络软件组成•如图1所示，网络硬件主要由新一代神威路由器芯片和网络接口芯片构建而成.网络软件包括网络驱动、消息库、网络虚拟化、可U并CP/模和网络管理软件等.本文将描述神威E级原型系统的互连网络，具体安排如下：第4节描述互连网络系统硬件，主要包括网络组成和拓扑结构、神威高阶路由器芯片及其关键技术、神威双端口网络接口芯片及其关键技术；第0节描述互连网络软件，重点描述消息库和网络虚拟化支持;第4节介绍神威互连网络的可靠性体系；第4节介绍原型机的基础性能；第6节对神威互连网络的特点进行总结.图0神威互连网络系统网络软件MPI TCP/IP网络管理消息库网络驱动+1/0虚拟化网络硬件神威高性能网络接口芯片神威高阶路由器芯片2互连网络硬件神威E级原型机互连网络由0台5节端口交换机组成，每个运算节点通过一片网络接口芯片的2个端口分别连接到2台交换机.交换机采用了leaf-spine 结构7其中第一层采用了30片神威路由器芯片（后文统一简称SWHRC：Sunway High-radix Noutec Chip）,第二层采用了期片SWHNC芯片，每片SWHNC芯片个个端口，其中第一层芯片的期个端口用于连接光纤，设个端口用于连接第二层的期片SWHNCt具体如图2所示.图2神威E级原型机互连网络结构①Inside Rc传tw：The Engine Behind Cray's Slingshot Exascal e-Erv Interconnects https：//fuse.wikichip4org/news/3290/inside-rosetta-the-engine-behind-crays-slingshot-exascal e-era-interconnecE②Yuichiro Ajinm.https：//www.Ajitsn^com/global/Images/the-tob-Interconnect-p-for-supee computer-fugaUn4pdf③ComectX.-0Single/Oual-Poet Adaptec supporEg200Gb/swith VPI.http：//www.mellanoc4com/products/infini-band-adapters/connectx-0④Steinmacher-Burow X,Garc A.Some chai1e ng cs on road frompetascalc to exascale4http：//www.physik.uniregensburo^hefforschun//wetti//w orkshops/APQ_April2010/talks/2010044%20IQCR%20RegensburgStemmacher-Burowv0/•pdf12.年90/nsr/nwu000•11X1⑤所期年中国高性能计算机性能TOP102排行榜.httpTfwww.hpclOO.本/top期0/071期高剑刚等：神威E级原型机互连网络和消息机制225相比较神威•太湖之光实现1024个处理器互连使用了4层树网，神威E级原型机互连1024个处理器只使用了2层树网，网络直径减少了4步.这主要得益于我们开发的新-代双端口网络接口芯片和双轨网络技术.2.1双轨泛树结构胖树网络由于对各种通信模式都具有很好的适应性，同时又比多维环网有更短的网络直径，因此被很多高性能计算系统所采用.但胖树网络存在一个众所周知的问题.尽管胖树网络中的任意两点，比如A和B,存在多条路径，但从A到B的上行路径一旦确定，则其下行路径就是唯一的，一旦该下行路径上出现故障但到B就无法正常通信.为了克服胖树的这一缺点，提高胖树网络路径故障后的可达性，我们对标准胖树网络进行了改进.定义R⑺表示交换机第一层的第2号路由器存［0存.根据前面的描述存口表经使用了36个端口，还剩余4个空余端口，将_R［2层和犚［2层+1］剩余的4个端口互连（其中+是i/2取整），将2+］和_R［2++1］互称为“兄弟”.相对于标准胖树结构，我们称这种改进后的胖树为泛树，这对于提高超大规模系统网络的可靠性具有重要的意义.如图3所示，在泛树结构中，当A到B的下行路径故障后，数据包下行时仍然可以通过先到达B 所连接的开关的兄弟开关，再到B所连接的开关而顺利到达B.极限的情况下即使B所连接路由器的18个上行端口全部故障，其他节点仍然可以通过B 所连接路由器的兄弟到达B.由于在网络中，两个互为兄弟的路由器芯片安装在同一块印制板上，因此实现兄弟路由器间的互连并未增加额外的开销.事实上，泛树结构可以定义为在标准树网上增加同层路由器间互连的一种结构，该结构比标准树结构有更好的故障容错特性.2.2SWHRC高阶路由器芯片SWHRC芯片是构建神威互连网络的核心器件，实现了网络中物理层、链路层和网络层的功能.如图4所示,SWHRC芯片集成了160个速率28GbpsSHCWHS SQON3S SHCWHS SQCM3S SHCWHS SHoaas SHOHHS SHCMHS SHCR1HSSalmasTILE-03TILE-04TILE-05TILE-06,TILE-0?RCU冷g lAIMMM uRCM nTILE-10 RCU冷I ai—I uTILE-RCU冷■lAlUBMI UTILE-12RCU團I a i w l uTILE-13RMTILE-20O RCUI a i iruTILE-21ORCUI a i iruTILE-22OTILE-23ORCUIAI IRUTILE-24TILE-25TILE-26TILE-27RCU gI a i iru uTILE-44TILE-45_TILE-46TILE-47图4SWHCC路由器芯片结构图|RCUbIRU226计算机学报2027年的SerDee,芯片总吞吐率为9A/s.芯片包含个个端口和个个交换子模块，每个交换子模块主要包含IRU(Input and Routee Unit)、RCU(Row Buffee and Crossbae Unit)、OBMU(Output Buffee Danagee Unit)等部件但0个交换子模块采用0X5阵列式排布.⑴缓冲管理每个端口包含四个虚通道.输入缓冲采用动态共享机制，支持可配置的私有信用和共享信用,提高输入缓冲的利用率.每个交换子模块内还包含0个行缓冲和5个列缓冲，分别用于接收同一行和同一列的数据.这种缓冲管理机制和缓冲数量的设置既降低了芯片设计开销和实现难度，同时也降低了头阻塞效应,提升了数据吞吐率.⑴流量控制SWHRC芯片采用VCT(Virtual Cut Through)流控机制，为了避免故障包对网络带宽的浪费，增加对链路带宽变化的适应性，数据链路层支持VCT 与SAFRave And Forward)两种机制的动态切换. swhrc芯片采用基于信用的流控，可以控制数据流按照信用多少提前发送消息包，提升数据的传输效率，降低延迟.信用以数据块为单位，每个数据块包含0个数据切片，每个数据切片大小为16G.拥塞预感知装置依据下游信用释放的速率回馈上游，从而使上游能更早感受到下游的拥塞情况，避免过度拥塞情况的出现.⑴路由策略为了保持消息的路径灵活度，并满足不同消息对路径选择的不同需求，SWHRC芯片的路由策略支持源路由和分布式查表路由.每个消息包携带路由策略选择标识，路由器根据消息包标识决定选择何种路由方式进行路径选择.分布式查表路由支持确定性路由策略与自适应路由策略.神威超级计算机包括神威蓝光、神威•太湖之光、神威E级原型机均特别重视应用的局部性特征和分区概念，在体系结构的设计中一直强调并坚持超节点的设计思想.每个系统都可以认为是由一组超节点通过高性能骨干网互连构成.基于上述两级网络结构，SWHRC芯片实现了一种两级结构的路由表.超节点内路由表和超节点外路由表.每个接入神威互连网络的端口和每片SWHRC芯片都有一个唯一的GUIDROal Units ID)编号.GUID包含超节点号和超节点内编号.当目标GUID的超节点号和本SWHRC的超节点号相同时，就使用超节点内路由表路由，否则就使用超节点外路由表路由.在实际的设计中两个表采用一个片上RAN实现，大小可配置.SWHRC芯片每个端口均配置了一个两级结构路由表，支持系统最大节点规模为256G,相比一级结构路由表存储器容量节省约99.5%.SWHRC每个路由表项包含若干个目标端口，自适应路由决策模块根据下-级缓冲信用选择-个相对最空闲的端口做为输出；而确定性路由则根据条目内容顺序选择第一个可用的端口，结合拓扑特性，在部分链路故障时在修改路由表之前仍可以保证消息正确传输.SWHRC路由器支持点到点路由的同时，每个端口都有独立的32条多播路由表，支持1到个个端口的多播路由.⑷维护管理在维护管理方面，SWHRC芯片同时实现了带外低速通路和带内高速通路的访问寄存器接口，带外管理通路基于标准JTAG协议；带内管理通路复用高速链路，实现自定义高速管理协议.管理部件能同时处理带外和带内寄存器访问.每个端口都有大量可配置寄存器和状态寄存器,包括高速链路配置和核心交换部件的配置、端口各虚通道接收/发送的包o数量、缓冲占用、链路繁忙程度等.针对阵列式交换架构该们提出了-种片上两级并行管理架构该((Router ControO and Mana架system)可同时作用五个RD(Row Manage unit),每个RD可同时管理一行上的八个管理代理MA(Hanager Agent),实现一条管理命令同时作用于多个端口，极大地加快路由芯片的初始化速度与性能管理.2.3高性能网络接口芯片神威高性能网络接口芯片⑴下简称SWHND Sunway High-performance NetworC Interface chip)是负责处理器间高速通信的核心器件，采用硬件方式实现了网络传输层功能，通过提供丰富的消息类型、灵活鲁棒的消息调度机制为处理器提供了高带宽、低延迟的数据传输能力.SWHDI芯片提供了两个PCT接口和两个网络端口.SCU接口支持PCD3.1标准，每个PCU接口包含年个通道，每个通道链路速率8Gbpe.每个网络端口包含4个通道,每个通道链路速率28Gbpe.SWHNI芯片最大数据吞吐率为4个Gbps.DESDP结构SWHNI芯片设计了一种双引擎共享双端口的1期高剑刚等：神威ER原型机互连网络和消息机制227结构⑴下简称DESDP：Double Engine Share Double Por数如图6所示，SWHNI主要包括两个消息引擎和两个网络端口.消息引擎是消息机制的核心部件，负责消息的发送、接收，由SU(Send Unit)AG (Receive Unit)、PIU(PCU InterAcs Unit)组成. NPU(NetwoW Port Unit)部件实现网络的物理层和链路层功能.两个消息引擎通过内部交叉开关可以共享两个网络端口.DESDC架构使SWHNA具备以下三个优势：(1)实现swhna高效支持两种节点连网模式.如图个a)所示，SWH N支持一个处理器通过2个PCU接口和一片SWHNI相连，通过构建双轨图4SWH1连接模式6⑴通过共享网络端口模式提高了数据吞吐率和通信可靠性.对于两个网络端口的管理，SWHNI 芯片实现了-种基于细粒度包级动态网络端口选择机制，每个数据包可以根据当时端口的链路好坏、忙闲情况动态地选择最终的上网端口，这种选择策略是基于神威互连网络实现的一种高效乱序的消息机制，在提升网络端口利用率的同时提高了通信可靠性.乱序消息引擎SWHNI消息引擎是消息处理的核心部件世要由发送部件SU、接收部件RURCU接口部件PIU 组成,具有如下技术特色：⑴支持多处理器多播程SWHNI消息引擎支持多处理器多进程资源共享，最多支持年8个虚拟接模每个虚拟接口以队列方式提供软件使用.各队列由软硬件协同管理，允许多多程独立或共享使用.发送队列作为消息发起的接口，支持多进程并行投递消息描述符，各队列采用均匀轮转方式仲裁，仲裁上的消息由消息引擎轮转调度执行，消息引擎根据消息长度和快速标记按优先级调度消息的执行.同一时刻一个引擎最多飞行的消息数为256个.多队列并行消息机制实现了多进程共享硬件资源，同时也有利于控制网络拥塞.⑴支持旁路操作系统零拷贝SWHNI芯片通过地址映射的方式，支持软件直接通过用户层访问使用.SWHNI芯片实现了远程RDMA功能，消息空间支持物理地址、页式虚地址和段式虚地址访问，其中页式虚地址支持最小4KB、228计算机学报2021年最大8MB等多种页粒度.SWHNI内置所中条目的TLB,支持页表的预取.SWHAQ芯片实现片上地址代换和DMA(Direct Memory Access)功能，消息数据的读写不需要处理器干预,允许用户直接访问消息空间数据，实现了旁路操作系统零拷贝数据传输.通)支持消息双轨网络乱序执行SWHAQ芯片集成两个网络端口，实现消息引擎的双轨网络连接，消息引擎通过交叉开关与网络端口连接，共享两个网络端分消息引擎采用乱序提交的消息执行策略，即处理相同和不同发送队列的消息时，可以不控制消息间的执行顺序，尽可能地发挥硬件性能，实现消息间的快速调度；采用数据流驱动机制，实现基于乱序的数据流水传输.消息包支持两种上网方式：指定上网端口和自适应上网端口，第一种方式允许用户在描述符中指定消息包的上网端口号，所有消息包从指定端口上网；第二种方式由硬件自动根据端口忙闲情况，动态分配空闲的端口上网，并且支持同一消息的不同消息包从不同端口上网，以达到双轨网络的流量均衡和通信带宽的最大化.通)支持软件定义的硬件集合通信SWH NIN息引擎实现了硬件集合通信机制，采用软件定义逻辑树与硬件链表融合的模式，实现了高效灵活的同步(Darrier)、多播(Beast)、归约(Deduce)等集合消息，其中归约操作的数据类型支持单/双精度浮点数,32bit/64Pit定点数，计算类型包括累加、求最大/小值、按位与/或/异或等.软件将集合通信拓扑结构定义写入到集合描述符中，硬件按照描述符中定义完成具体操作.归约计算中对顺序有要求的浮点累加操作可以通过定义特殊树结构来控制数据计算过程.所有集合消息执行流程统一为归集和广播两个过程，具体分为归集请求发送、逐层数据计算(归约操作)和广播结果处理.其中归集过程由SWHAQ芯片通过定制的可靠消息完成，保证归集通信可靠；计算过程在SWHNI上完全由硬件实现；广播则由根节点SWHAI芯片在完成全部叶子操作后自动发起，由SWHNC芯片按照预先配置的多播链完成数据复制和传输.多播链由软件根据作业管理策略配置，支持粗粒度模式匹配.即使目标节点接收到不属于自身的多播也会被目标方SWHNI根据进程信息丢弃.该集合通信机制突破网络拓扑结构限制，增强了在不同网络拓扑下的适应性，并在简化硬件设计和软件使用模式的同时，解决了受限的集合树硬件资源和巨大的软件需求间的矛盾，消除了动态修改链表开销，大幅提高了集合通信的处理能力、可扩展性和实用性.通)支持快速作业退出SWHAQ芯片的消息引擎实现了高效的用户作业退出机制，作业退出时，用户只需要注销作业相关的片上资源即可.资源注销后片上残留消息和网上残留包由消息引擎自动处理，不需要用户干预.残留消息的处理不影响其它用户作业和后续提交作业的正常运行，系统保证主存和片上空间数据不被污染.该机制可实现残留消息的快速清理和片上资源的快速注销回收.神威消息原语swhaq芯片通过消息原语的方式实现高效的数据通信.消息原语主要包括点到点消息、集合通信和快速短消息FSA(Fast Shoet Aessage)三大类型.通)点对点消息实现了RD A A(Remote Direct Aemory Access)、异步队列、管理等多种点对点通信类型，满足不同条件下、不同通信模式的需求.RDAA通信操作.与很多主流网络4类似，SWHNI芯片硬件实现了RDAA,包括RDAAW (Remote Direct Memory Accesc Write)和RDAAW (Remote Direct Memory Accesc Read).RDAAW 将本地存储空间的数据写入到远程节点的存储空间.rdaaa将远程存储空间的数据读到本地存储空间，采用把RDAAR在目标方转化成R2W(Read message to Writs message)的实现策略.神威网络支持两种类型的RDAAW，—种是通过消息事件通知数据传输完成，另一种是通过对远程回答字原子加1来通知数据传输完成，如图0所示，这种单边put:调用m_msg_put()显式参与)进劭单^et：调用m jtnsg_get()图7使用远程回答字的单边PS和单边get消息1期高剑刚等：神威E级原型机互连网络和消息机制229消息特别适合上层语言实现精简的单边消息机制，与前一种方式相比，消息被动方判断消息是否完成，只需要读一下回答字的内容是否更新，开销更小，使用也非常方便，这是神威消息协议的一个特色.异步队列消息，消息数据直接写入指定的接收队列环，不需要源方指定目标地址，异步队列消息支持可靠和不可靠两种类型，以适应不同的应用场景.管理消息支持源路由和目标路由两种方式，源路由管理消息用于拓扑探查、网络的初始化和更新路由表，目标路由管理消息可用于性能管理等.设计了两级管理命令映射配置机制，为软件提供可配置的管理命令机制，方便灵活定制网络管理命令.其)集合消息集合消息(Collective Communication):包含同步、多播、归约等消息类型该合消息的流程为，请求发送、逐层计算(归约操作)和结果处理该合消息由软件构建集合树结构并投递集合描述符，其余过程由消息引擎独立完成，软件干预程度低，相比点对点消息实现的集合操作延时更低.(3)FSW消息快速短消息FSW：消息的描述符和数据通过PI0直接写到片上储存体，消息引擎收到门铃后直接从片上读取消息描述符并解析执行，组包时直接从片上读取消息数据，从而减少了2次跨PC芯的访存开销，极大地降低了消息延迟.FSW消息支持对远程节点主存空间和片上10空间的读、写操作，具有较高的使用灵活性.3消息软件神威E级原型机网络软件由SWHNI驱动、神威消息库及网络管理软件组成，如图8所示.SWHNI 驱动位于内核层，负责初始化链配、管理网络接口芯片中的各类通信资源，并提供虚拟化、兼容TCP/IP 支持等.神威消息库位于驱动层之上，为MPI等上层用户提供高带宽、低延迟的消息通信编程接口.网络管理软件位于最高层，用于实现网络系统的初始化与配置、网络事件处理、网络故障诊断等功能.本节重点介绍消息软件的核心部分消息库和虚拟化支撑.用户访问接口模块|核心层消薛网络管理MPI TCP/IP应用用户层消息库Sockets用户层’内核层TCP/IP栈IPoSW驱动消息芯片驱动及虚拟化支持I互连网络软件O Linux栈O应用软件图8神威网络软件组成3.1神威消息库神威消息库基于神威消息原语开发具要负责向上层并行语言、文件系统等提供通信编程接口，包括为上层应用提供资源分配及管理接口、消息收发接口，为其提供高效可靠的数据传输能力，提供透明的容错机制,处理各类异常.我们自主定义了SWverPs 编程接口，包括设备操作API、内存句柄注册ACP 队列操作ACI、工作请求API、完成及事件通知ACI 等类别，共30余个API.SWverPs在支持一些常见功能的同时，充分体现了对神威网络提供的双轨机制、RDMA.FSW消息等新机制的支持具要功能和技术特色如下：其)支持异步队列消息、RDMA Write、RDM A Re的等传统的消息类型，提供对发送队列SQCend Queue)、接收队列RQ(Receive Queue)、完成队列Cp(Completr Queue)等通信资源的管理，支持为用户空间内存注册句柄，提供发送及接收请求的异步查询方式以支持计算与通信并行，支持完成事件通知等.其)支持硬件广播、归约等集合操作类型，相比软件方式实现的广播完约操作，有了明显的性能提升.其)针对高性能计算领域的典型通信模式，提出了多种新消息类型，包括带回答字的RDMAW消息、带通知的QMA消息、FSM快速短消息.传统的RDMAA消息是单边消息，发送方发起RDMAA操作后，不需要消息接收方的参与，消息完成后接收方不会收到任何通知.因此发送方在发起RDMAW 后，需要再发送一个异步队列消息到被动方，以通知RDMAW消息的完成，这会产生不小的性能开销,对延迟敏感型应用会产生较大影响.神威消息库对此进行了改进，提供了2种新的RDMA通信操作：。
被忽略的FIDIC银皮书序言很多人对设计采购施工（EPC）模式都有诸如此类的问题：它适用于什么类型的项目，雇主要求应该达到什么深度，应该采用什么样的招标投标程序，在项目实施过程中如何操作……理解这些问题的最好手段是阅读合同范本。
国际咨询工程师联合会（FIDIC）1999年第一次出版了针对设计采购施工（EPC）项目的合同范本《设计采购施工（EPC）/交钥匙工程合同条件》（银皮书），这是目前在EPC项目中应用最广泛的一个合同范本。
某种程度上说，“EPC”这个词大兴其道就是源于FIDIC的银皮书。
由于是第一版，银皮书的起草者们专门针对银皮书写了一个序言（INTRODUCTORY NOTE TO FIRSTEDITION）。
很多人在读银皮书的时候，可能并没有认真读过银皮书的这个序言，甚至都没有注意到，在同一年出版的几本合同范本中，只有银皮书才有这么一个序言。
序言虽然仅有短短两页，但对我们理解EPC模式却非常有用。
本文将结合银皮书的第一版序言（INTRODUCTORY NOTE TO FIRSTEDITION），对EPC项目中一些常见的问题进行简单的分析。
适用范围序言中关于银皮书的适用范围有这样一段话：「This form for EPC/Turnkey Projectsis thus intended to be suitable, not only forEPC Contracts within a BOT orsimilar type venture, but also for all many projects, both large and smaller,particularly E & M (Electrical and Mechanical) and other process plantprojects」这段话点出了FIDIC起草者倾向的两个重点适用范围：•BOT或者类似融资项目下的设计采购施工（EPC）合同•电气、机械以及其它加工设备项目虽然银皮书的起草者说明银皮书可以适用于无论大小的各类EPC类的项目，但是以上两个方面显然是他们重点强调的。
城市地理信息系统设计规范GB/T 18578-2001前曰本标准参照城《市地理信息系统标准化指南》和根据城市地理信息系统设计和建设的实际经验在国内首次制定，其目的是规范城市地理信息系统设计的内容和要求，保证城市地理信息系统开发和建设的质量，实现城市地理信息的共享。
本标准的附录A、附录B、附录C都是提示的附录。
本标准由国家测绘局提出并归口。
本标准起草单位：武汉测绘科技大学、国家测绘局测绘标准化研究所。
本标准主要起草人：杜道生、王伟、王占宏。
中华人民共和国国家标准城市地理信息系统设计规范GB/T 18578-2001Specification for designing urban geographicinformation system范围本标准规定了城市地理信息系统的设计原则、内容、方法和要求。
本标准适用于各类城市地理信息系统的总体设计和详细设计，其他地理信息系统的设计可参照本标准。
2 引用标准下列标准所包含的条文，通过在本标准中引用而构成为本标准的条文。
本标准出版时，所示版本均为有效。
所有标准都会被修订，使用本标准的各方应探讨使用下列标准最新版本的可能性。
GB 12409-1990 地理格网GB/T 13923-1992 国土基础信息数据分类与代码GB/T 14395-1993 城市地理要素城市道路、道路交叉口、街坊、市政工程管线编码结构规则GB 14804-1993 1 ：500,1：1 000,1 ：2 000 地形图要素分类与代码3 术语3.1城市地理信息系统urban geographic informationsystem,UGIS一种运用计算机软、硬件及网络技术和计算机通信技术，实现对城市各种空间和非空间数据进行输人、存储、查询、检索、处理、分析、显示和更新等操作，以实现城市管理、辅助决策、预测和城市建设工程辅助设计为主要目标的地理信息系统。
3.2系统设计system design为实现用户需求分析提出的系统功能所进行的各种技术设计的总称，包括总体设计、详细设计和设计审查等。
A-Foundation-for...are under pressure to get their products onto store shelvesahead of the competition. To address increased productcomplexities while also meeting shortened design cycletimes, a proven approach is to add simulation softwareto the R&D process. Introducing analysis tools enables a design engineer to generate a model as a virtual representation of a physical geometry and then use physics-based calculations to refine and optimize a product. This can be much faster than the historical method of trial-and-error prototyping. Consequently, leading organizations have adopted simulation processes for many engineering disciplines. Traditionally, engineers use flu-ids, thermal, structural or electronic analysis tools separately to design a specific aspect of a product. By considering the different physics in isolation, however, engineers are unable to account for all the effects designs may impose on other disciplines or other functionality of the overall system-level design.ANSYS capabilities allow engineers to gain in-depth under-standing of particular cross-physics phenomena and how they relate to one another. An engineer concerned with electrical power delivery can simulate how much loss he or she is see-ing within a circuit board by accounting for changes in mate-rial resistivity due to joule heating of the conductors. Through ANSYS Workbench, industry-leading structural, thermal, fluids and electromagnetic field solvers are brought together to enable true multiphysics simulations. Geometry can be shared automat-ically between these solvers, since design changes made for one solver may also have an impact on the predictions from another solver being used to model the same or an adjacent section of a design. Using the shared geometry, a Workbench project can be set up so that different physics domain experts can each con-figure the proper single-physics simulation for their particularANALYSIS TOOLSA FOUNDATION FOR COLLABORA TION Multiphysics simulation in ANSYS Workbench powers system-level analysis and helps shorten design cycles.By Guy Barnes, Lead Technical Services Engineer; Zoran Dragojlovic, Technical Services Engineer;and Jared Harvest , Senior Technical Services Engineer, ANSYSI n the fast-paced consumer electronics market, companiesdiscipline, thus providing a systems-level analysis of multiple physics within the same user interface. This approach to col-laborative design means all disciplines can be addressed in the initial stages of simulation — not during costly prototyp-ing or end-production stages.A real-life example of a design chal-lenge involving multiphysics is an elec-trical power delivery device, which must meet specific standards to be put on store shelves. U.S. Federal Communications Commission (FCC) regulations on elec-trical emissions as well as standards for acoustic noise in a public office envi-ronment and thermal considerations for product reliability must be satisfied. Electrical emission testing can be simu-lated in ANSYS HFSS, which is a 3-D finite element electromagnetic field solver, to determine if the design will pass FCC electromagnetic interference (EMI) spec-ifications. In this case, HFSS can help a designer see that changing the venting configuration from larger slots and open -ings to smaller round holes would block unwanted emissions.Though the smaller holes are help-ful in controlling electrical emissions, they may pose a problem for the ther-mal management engineer if the vents restrict the air flow necessary for cool -ing, which could result in overheating. Thermal analysis using ANSYS Icepak can eliminate the need to build and test several design variations. Icepak is an electronics thermal management simulation tool for modeling systems such as integrated circuit (IC) packages and printed circuit boards (PCBs). This software accounts for all of the heat transfer effects with robust computa -tional fluid dynamics (CFD) technol -ogy, enabling the engineer to predict the internal temperature on the device while it is powered on with the cooling fan running.Changing the vent configurationmay require increasing the fan speedGeometry of example electrical power supply device. These devices must meet severalspecific standards for electrical emissions, heat output and noise level before they can bemade available for sale to the public.HFSS simulation predictions show electromagnetic fields radiating from the initial thermalventing configuration. The proposed design fails to meet FCC specifications in a 3-meter emissions test because the peak values are too high.To address product complexities while meetingshortened design cycles, a proven approach is to add simulation software to the R&D process.Using HFSS in conjunction with Icepak,EMI and thermal engineers can work together to find a solution to their joint design goals.to prevent overheating. For example, the original vent con-figuration operating at a power consumption of 6 Watts keeps the internal temperatures under the target of 110 degrees C while running a fan at 3,500 RPM. With smaller vent openings, the fan speed must be increased to 4,600 RPM to stay below the same target temperature. Using HFSS in conjunction with Icepak, thermal and EMI engineers can work together to find a solution to their joint design goals. If increasing the fan speed is not an option, the EMI engi-neer could try different venting shapes or even incorporate an optimization approach to address both thermal and EMI criteria.Once the electromagnetic effects and heat transfer have been taken into account, the aero-acoustics must be consid-ered. Modifying the vent design and increasing fan speed addressed EMI and thermal needs, but these changes may affect the acoustic noise that the device emits during its operation. Consumers will not accept a noisy fan running in their home or workspace, so devices that use fans as part of thermal management have to operate at low noise levels. ANSYS Fluent can answer questions about noise levels via aero-acoustic CFD analysis. The sound-pressure level (SPL) amplitudes over the range of frequencies audible to humans are derived from pressure fluctuations at a receiving point located in the fan inlet region that is just outside of the cas-ing. The original design was predicted to generate less than 50 decibels (dB) of noise at audible frequencies, which is low enough to blend into background noise in an average home. With the modified vent configuration and resulting higher fan speed, the peak sound pressure level of 56 dB occurs at the frequency of 311 Hz. This is comparable to conversa-tional speech at a distance of 1 meter.During device operation, the turbulent fluctuations of pressure interact with the solid surfaces of the fan, casing and electronic components, turning them into sources of acoustic noise. A special Fluent utility can be used to gen-erate 3-D contour plots of noise sources inside the device for a given range of frequencies. This can aid the design process by identifying the regions with high values of SPL. For example, the core turbulent region generated by the fan interacts with the fan blades and the large electronic com-ponents placed near the fan. This interaction results in ele-vated noise levels in the region between the fan and the two components. Addressing this issue requires further design changes.Through this example of an electrical power supply, simulation with the multiphysics capabilities available in ANSYS Workbench allows engineers to evaluate numerousphysical aspects of virtual design variations without theThe second HFSS simulation shows the effects of ventilation changeson electromagnetic emissions. The red line is the electromagnetic emissions at 3 meters for the initial design, and the blue line shows predictions for the modified design.Two design changes made in response to initial HFSS predictions:(top) replacing large fan ventilation opening; (bottom) replacing sideventilations slots with greater number of small round holesInternal temperatures and air flow path predicted by Icepak insideoriginal design. The original vent configuration operating at a power consumption of 6 Watts keeps the internal temperatures under the target of 110 degrees C while running a fan at 3,500 RPM.ANALYSIS TOOLSlaborious process of having to build and test every one of them. By using a simu-lation-driven process, engineering teams are enabled to work together more cohe-sively and accelerate development of new technology. When time to market is so critical, companies cannot afford design failures that appear late in the process. With a suite of industry-leading solvers working together under the same hood, ANSYS Workbench offers the ability to analyze multiple physics from the overall system level, allowing critical issues to be identified early in the design stages and enhancing the product development process.Reported results of Icepak simulation onupdated design with smaller venting holes. To maintain the target of less than 110 degrees C, the fan speed must be increased to 4,600 RPM.With the modified vent configuration and resulting higher fan speed, the peak sound pressure level of 56 dB (blue line) occursat a frequency of 311 Hz. This is comparable to conversational human speech at a distance of 1 meter.Fluent results showing spatial distribution of acoustic noise sources driven by near-wall turbulent fluctuations of local air pressure, including vortexcore regions colored by eddy viscosity (left) and sound pressure level at 500 Hz (right)ANSYSWorkbenchenables analysis of multiple interactingphysics, allowing critical issues to be identified early in the design stages.HIGH-PERFORMANCEELECTRONIC DESIGN: PREDICTING ELECTROMAGNETIC INTERFERENCE/doc/abace0f6b4daa58da1114a6d.htmlHIGH-PERFORMANCE ELECTRONIC DESIGN: PREDICTING ELECTRO- MAGNETIC INTERFERENCE/doc/abace0f6b4daa58da1114a6d.html /82foundation OPTIMIZATION IN ELECTRONICS THERMAL MANAGEMENT USING ANSYS ICEPAK AND ANSYS DESIGNXPLORER/doc/abace0f6b4daa58da1114a6d.html /82foundation2。
Principle and application of the photoelectric encoder circuitAccording to the test principle, encoder can be divided into optical type, magnet, inductive and capacitive. According to its calibration method and signal output form, can be divided into incremental, absolute type and hybrid 3 kinds.Incremental encoder is directly for the use of photoelectric conversion principle output three square wave pulsed A, B and Z phase; A, B two groups of pulse phase difference 90 DHS, thus can easily tell direction of rotation, and Z for every turn in a pulse, used to benchmark positioning. Its advantages are simple structure, mechanical principle of average life expectancy in the tens of thousands of hours above can be, strong anti-jamming capability, high reliability, suitable for long distance transmission. Its defect is unable to output shaft rotation absolute location information.Absolute encoder is direct output digital quantity sensor, in its circular yards plate along radial direction several concentric yards way, each of which way the by pervious to light and opaque and sector of the sector, adjacent code word number is double relationship, yards dish the code word is its binary number of digits, digital side in the code salver illuminant, another side corresponding to every one yard way have a photosensitive component; When yards in different position, disk by various photosensitive components according to the corresponding light or not conversion, forming a binary number level signal. The characteristics of the encoder counter and axis is not in any position can be read out a fixed position and corresponding digital yards. Obviously, code word, the more the better the resolution, for an N binary resolution coder code salver must have N barcode way.For an N binary resolution coder code salver must have N barcode way. At present domestic have 16 bits of absolute encoders products.Absolute photoelectric encoder is use natural binary or circulation binary (Gregory yards) manner photoelectric conversion. Absolute photoelectric encoder and incremental encoder difference in disk pervious to light, opaque line graph, absolute encoder can have some code, according to read yards plate coding, detection absolute position. Code design can use binary code, recycling yards, binary fill yards, etc. Its features are:(1) can directly read Angle coordinate of the absolute value;(2) have no cumulative error;(3) power excision location information would be lost. But the resolution is decided by the binary digits, i.e. precision, currently depends on digits 10, 14 and so on many kinds.Hybrid absolute encoders, it outputs two group of information: a group of information used to test with absolute poles position, information function; Then another group the same output information incremental encoder.Photoelectric encoder is an Angle (angular velocity) detection device, it will input shaft Angle to using photoelectric conversion principle amount converted into electrical impulses or digital quantity, with small size, high accuracy, high reliability, etc. The interface digital It is widely used in nc machine tools, rotating table, servo drive, robots, radar and military goals determination, need to detect the device and equipment in perspective.EPC - 755A photoelectric encoder is good performance in Angle measurement, displacement measurement anti-interference ability strong and stable and reliable, and the output pulse signal, and the pulse signal can be obtained by counting is measured after digital signal. Therefore, we are developing automobile driving simulator, the steering wheel rotation Angle measurement choose EPC - 755A photoelectric encoder, the output circuit as the sensor type selection, open collector output resolution choose 360 pulse/circle, considering the steering wheel rotation is bidirectional, both clockwise and counterclockwise, also can output signal encoder to phase discrimination to count.When photoelectric encoder clockwise, channel A output waveforms output waveform advance channel B, D flip-flop 90 ° output Q (waveform W1) high level, Q (waveform W2) for low level, top and open, counting pulse sr W3) by (waveform, send to the 74LS193 two-way counter with pulse, input CU addition count; At this time, with closed, its below sr output high level (waveform W4). When photoelectric encoder when A counterclockwise, channel output waveform of output waveform than channel B, D flip-flop 90 °delay output Q (waveform W1) for low level, Q (waveform W2) high level, top and shut, its output sr for high level (waveform W3); At this time, with open, count below sr W4) by (pulse waveform, send to two-way counter reduced input pulses 74LS193, subtraction count CD.Steering wheel clockwise and counter-clockwise, the maximum rotation Angle are two laps half, choose resolution for the 360 pulse/laps of coder maximum output pulse count for 900; The actual use of three slices of 74LS193 with counts circuitcomposed, on the system electric initialization, first to the reset (CLR signal), then its initial set to 800H, namely 2048 (LD signal); So, when the steering wheel clockwise, the output of the counts circuit for 2048 ~ 2948, scope of steering wheel counter-clockwise, when the output of the counts circuit range of 2048 ~ 1148; Counts circuit D11 D0 ~ the data sent to output data processing circuits.In practice, frequently made the steering wheel clockwise and counterclockwise rotation, and because it has quantizing error, work a longer period of time, the steering wheel back after when output may not 2048 counts circuit, but several words deviation; In order to solve the problem, we added a steering wheel back in after work, system test circuits, data processing circuit in the operating state of the simulator, the system checks back when, if the steering wheel in detection circuit in the back, and counts circuit in the state, data output is not to count 2048 reset circuit of the initial value and reset.The rotary, photoelectric encoder its shaft and gravity measurement instrument connected to compensate knob axis. Gravity surveying instrument compensation, the angular knob is transformed into a signal quantity amount; Rotary two kinds of photoelectric encoder, absolute encoder and incremental encoder.Incremental encoder is pulse form output sensor, its code than absolute encoders code salver disk much easier and higher resolution. General need only three barcode way, here's code word has actually don't have absolute encoders code word meaning, but produce counting pulse. It WaiDao and the code salver middle way have same number of uniform distribution pervious to light and not pervious to light the sector (grating), but two way sector mutual stagger half an area. When code salver turns, its output signal is for 90 ° phase of the A and B phase pulse signal and only A third yards of the slit pervious produced tao pulse signal (it as the benchmark code salver position, to count the system to provide an initial zero signal). From A, B two output signal phase relationships (advanced or lag) can judge the direction of rotation.Photoelectric encoder is not installed in motor shell, but rather on the basis of motor stent to create a fixed installation of photoelectric encoder is independent, photoelectric encoder axes and motor shaft center must at the same level, two axis adopt soft rubber or nylon hose connections, in order to reduce motor of photoelectric encoder impact load of mechanical shock.Reasonable choice of photoelectric detection device output signal transmission medium, adopt double twisted screened cable replace common screened cable.Double twisted shielding cable has two important technical characteristics of cable, one is by electromagnetic interference with strong protection ability, because the space is electromagnetic field of interference current online can cancel each other out. Double twisted shielded cable is another technical characteristics after mutual twisted line spacing is small, two lines of interference lines of two basic equal distance of shielding network, two lines of capacitance basic and same, it is to suppress common-mode interference effect more apparent.Photoelectric detection devices transmit and receive devices are installed in production site, in use exposed many flaws, its internal factors have external factors, mainly displays in the following aspects:1. Launch device or accept device for mechanical vibration caused by the reasons such as migration or offset, lead to receiving devices can't reliable receives the light signal, but cannot produce electrical signals. For example; Photoelectric encoder used in steel rolling speed regulation systems, because of photoelectric encoder is direct bolted to the shell, the motor shaft of photoelectric encoder by harder spring slice and motor, because motor shaft connected with load is a load of impact that will have steel mill, when caused the vibration of rotor and shell motors. According to the mensuration; After steel time electricity encoder vibration velocity for2.6 mm/s, so that might damage the vibration velocity of photoelectric encoder internal functions. Cause mistakenly hair pulse, leading to control system is not stable or misoperation, cause accidents.2. For photoelectric detection device installed in production site, production site environmental factor influence by photoelectric detection device can't reliable led to the work. Such as the installation position high temperature, humidity is big, cause photoelectric detection device internal electronic components properties change or damaged. For example in the caster is sending a tracking system, because led ingots photoelectric detection device the installation position near the slab, ambient temperature high and cause photoelectric detection device signal or damaged by mistake, and cause production or personal accident.3. All kinds of electromagnetic interference source production site, photoelectricity detecting devices of the interference, causing photoelectric detection device output waveform distortion distortion, and makes the system occurred maloperation or trigger production accidents. For example; Photoelectric detection device installed in production equipment, its signal via cable ontology to controlsystem's distance transmission in commonly 1.02-3.20m ~ 100m, transmission cable though generally choose more, but due to the core shield cable conductor resistance and the line of cable capacitance between influence plus and other cable laying together, vulnerable to all sorts of electromagnetic interference effects, therefore cause waveform distortion, which makes feedback to speed regulation system of signal and the actual value deviation, but cause the system precision decline.Photoelectric detection device itself is by electronic components, it constitutes of installation environment has certain technical requirements, especially in a harsh environment use, to take corresponding measures to protect the photoelectric detection device to work in its product requirements under the condition of the technology, can play device technical performance. Otherwise the service life of the photoelectric detection device reliability of its work may be subjected to the influence of different level. Combined with photoelectric detection devices in the production process control application practice, the control system design; Unfavorable use of photoelectric detection device as a signal important control signal, photoelectric device to avoid sudden damage or work unstable (environmental temperature, humidity is big,External mechanical vibration, etc) cause other touch and equipment accidents. In the application of PLC program control system of real optimum process control or interference, to overcome monitoring in system adopts photoelectric device and various existing defects, is the effective way to improve the system reliability.光电编码器原理及应用电路根据测试原理，编码器可分为光学式、磁式、电感和电容式。
INFORMATION SYSTEM DESIGN AND PROTOTYPING USINGFORM TYPESJelena PavićevićFaculty of Mathematics and Computer Science, University of Montenegro, Cetinjski put bb, 81000 Podgorica,Serbia and Montenegrojelenap@cg.yuIvan LukovićFaculty of Technical Science, University of Novi Sad, Trg D. Obradovića 6, 21000 Novi Sad, Serbia and Montenegroivan@uns.ns.ac.yuPavle MoginVictoria University of Wellington P.O. Box 600, Wellington New Zealandpmogin@Miro GovedaricaFaculty of Technical Science, University of Novi Sad, Trg D. Obradovića 6, 21000 Novi Sad, Serbia and Montenegromiro@uns.ns.ac.yuKeywords: Form Type, Prototype, Information System Design, Relational Database Schema, CASE tool, XML, IIS*Case.Abstract: The paper presents the form type concept that generalizes screen forms that users utilize to communicate with an information system. The concept is semantically rich enough to enable specifying such an initial setof constraints, which makes it possible to generate application prototypes together with related implementa-tion database schema. IIS*Case is a CASE tool based on the form type concept that supports conceptualmodelling of an information system and its database schema. The paper outlines a way how this tool cangenerate XML specifications of application prototypes of an information system. The aim is to improveIIS*Case through implementation of a generator which can produce an executable prototype of an informa-tion system, automatically.1 INTRODUCTIONA development of CASE tools that support information system (IS) and database (db) design may be based on the form type concept, which enables formulating a methodological approach that allowes a designer to specify screen forms of transaction programs and, indi-rectly, define an initial set of attributes, constraints, business rules and procedures. During the automated process of the design, the set of form types will be transformed into an implementation db schema. As a result, formal design specifications of an IS may be generated. Basic concepts and formalisms, this ap-proach relies on, have been founding from late 80’s. Meanwhile, we have established and constantly im-proved a theoretical model, which is based on a method of developing ISs and db schemas by gradual integra-tion of designed subsystems (Luković, 2002; Luković, 2003; Mogin, 1995). The whole idea is implemented in IIS*Case. IIS*Case is a CASE tool designed to support modelling IS software, db schemas, and generating the appropriate formal specifications. Our aim is to im-prove IIS*Case through the implementation of a ge-nerator which can produce an executable prototype of an IS, automatically. At the time being, functionalities of IIS*Case are extending with a generator able to pro-duce such prototypes in the Java programming envi-ronment. The paper presents the form type concept and outlines a way how IIS*Case can generate software prototypes of an IS, by using form type specifications.2 THE FORM TYPEThe form type concept is introduced in (Mogin, 2004; Pavićević, 2005). It generalizes document types, i.e. screen forms that users utilize to commu-nicate with an IS. Using this concept, a designer specifies screen forms of transaction programs and, indirectly, creates an initial set of attributes and con-straints that will be embedded in generated db schema and design specification of the IS.A form type is a named tree structure, whose nodes are called component types. Each component type is identified by its name in the scope of the form type, and has nonempty sets of attributes with associ-ated domains, and constraints. The set of constraints is a union of sets of keys, unique constraints, and tu-ple constraints. Sets of unique constraints and tuple constraints may be empty.Example 1. Figure 2 shows the structure of a form type F, which generalizes the screen form in Figure 1. The form type consists of two component types: EMPLOYEE and PROJECT, which are graphically represented by rectangles. Sets of attri-butes of component types are shown in rectangles. Attributes underlined with solid lines indicate com-ponent type keys, whereas attributes of unique con-straints are underlined with dashed lines.At the abstraction level of instances, each form type has its instances. Each form type instance represents a particular document that user creates, modifies, or uses to communicate with the IS. In our approach, a form type instance is a tree structure over the instances of component types. Each instan-ce of the root component type is, at the same time, the instance of a form type itself. It is identified by a value of any of the root component type keys. If a component type N i is directly superordinated to the component type N j, then each (child) instance of N j is identifiably associated with exactly one (parent) instance of N i and each instance of N i may be related to more than one instance of N j. Each instance of N j is identified by a value of any key of N j, in the scope of its parent instance.A possible number of instances of the component type within its parent instance is specified by choosing one of the two options: 0-N, or 1-N. The option 0-N means that the set of instances of the component type may be empty, while 1-N specifies that there always exists at least one instance of the component type, within its parent instance. The maximal number of child instances is always unbounded.Example 2. Figure 3 shows an instance of the form type from the Figure 2. Each instance of the component type EMPLOYEE from Figure 2 repre-sents a particular screen form aimed at browsing and editing records about employee’s engagement in different projects. Each EMPLOYEE record is iden-tified by a value of key PID. Name+Surname is a unique constraint. It means that every non null value of two-tuple Name+Surname must be unique among all EMPLOYEE records. Each instance of the com-ponent type PROJECT represents one of projects in which the employee is engaged. Each employee may participate in several projects. Each record about employee’s engagement in the project is identified by values of keys ProjID and ProjectName, but only in the scope of the appropriate, exact value of the parent component type key PID. For each project, an employee may have a role associated with her/him in the project team, defined by a value of the attribute Role. Role is a unique constraint of the component type PROJECT, which means that each non null value of Role must be unique among all PROJECT records of an employee identified by a3 IIS*CASE AND THE FORMTYPEFigure 4 shows the main screen form of IIS*Case (Integrated Information Systems*Case, V.6.0), a CASE tool based on the form type concept. IIS*Case isdesigned to provide complete support for developing db schemas, which are complex with regard to the number of concepts used and to generate design specification of ISs. Having an advanced knowledge of IS and db design is not explicitly needed for using IIS*Case. IIS*Case gives an intelligent support during the design process. IIS*Case supports: • Conceptual modelling of a db schema,• Automated design of relational db subschemas in the 3rd normal form,• Automated integration of relational db subsche-mas, and• Generating XML specifications of the informationsystem.Figure 4: IIS*Case – Main Screen FormAll the concepts and methods that IIS*Case uses, and full specifications of implemented algorithms, are described in (Lukovi ć, 2003; Mogin, 1995; Mogin 2004, Pavi ćevi ć 2005). Design of a complex IS in IIS*Case is organized by its decomposition onto application systems. Application system is a specification of a subsystem of the future IS that contains a set of form types and may include one or more child application systems (Govedarica, 2004, Pavi ćevi ć2005).Figure 5: IIS*Case – Screen Form for specifying form typesIIS*Case imposes strict structuring rules for form types. Using the screen forms, one of which is shown in Figure 5, designers are able to specify form types of various structures. They may define component types, their sets of attributes and the con-straints: key, unique, and check constraints. A form type is organized as a tree structure of component types.4 APPLICATION PROTOTYPINGIn (Govedarica, 2004), a method for design applica-tion prototypes based on XML is presented. The method proposes generating platform independent XML specifications of an IS. Further XSL transfor-mations, applied on those XML specifications, pro-duce an executable prototype of the IS in the Java programming environment.The model represented in (Govedarica, 2004) is based on User Interface Markup Language (UIML). Application prototypes are specified by means of XML, and after that, they are automatically trans-formed into UIML specifications. XML specifica-tions of the prototypes are platform independent, while the resulting UIML specifications are platform dependent. The prototypes may be interpreted by a Java Render. Java Render by Harmonia Incorpora-tion® is chosen programming and run-time envi-ronment. Implementation of this method in IIS*Case will provide the automated generation of fully func-tional application prototypes.5 XML SPECIFICATION OF THEFORM TYPEIIS*Case generates valid XML documents containing design specifications of the form types, and generated db schemas. Such documents, to-gether with XML specifications of application sys-tems, are integrated into an initial XML specifica-tion of the information system. XML specifications are independent of any run-time environment and the repository structure of any CASE tool.The process of generating prototypes is based on using XSL transformations and Java programming environment. The next research step is to create an XSL transformation that will be able to transform the initial XML specifications into final UIML documents. IIS*Case will be able not only to gene-rate, but also to interpret final XML (UIML) specifi-cations of IS as fully functional prototypes.6 CONCLUSIONThe form type concept is semantically rich enough to enable specifying such an initial set of constraints, which makes it possible to generate application prototypes and underlying implementation db schema, automatically.From the designer’s point of view, IIS*Case of-fers a simple and natural way for defining the initial set of attributes and constraints of various kinds. By the knowledge of the authors, it is an original ap-proach, which cannot be found in the same form in similar tools. It simplifies defining the rules, con-straints, and procedures, particularly if the designed software and db schema of an IS are complex with regard to the number of concepts spanned. By the experience of the authors, these design activities usually require a large intellectual effort and an ad-vanced knowledge in the IS and db area, but real designers do not always posses those skills. We be-lieve that IIS*Case may significantly help them in overcoming IS and db schema complexity.Implementation of the application prototyping generator in IIS*Case will enable generating fully functional and highly standardized application pro-totypes, by supporting a design method and the de-sign activities that are almost completely automated.A possibility to use such application prototypes to communicate to end users is very important in order to identify all the requirements, business rules and constraints, early and precisely.7 FURTHER RESEARCHAt the time being, IIS*Case V.6.0 can generate XML specifications of designed db schemas and form types. It also has an SQL generator that sup-ports full implementation of db schemas under dif-ferent DBMSs. Further research and development efforts are oriented towards extending functionality of IIS*Case to support complete development the software of an IS. Accordingly, we are working on: •Implementing the application prototype generator,•Implementing a design template tool for formal specifying common models of user interface (UI), and•Implementing a form type visual editor.A method for formalizing and generating specifi-cations of IS software applications based on XML technology is discussed in (Govedarica, 2004). This method is to be improved and implemented in IIS*Case to enable automatic transforming XML specifications into executable application prototypes.The design template tool will be implemented in order to support standardization of application pro-totype UI. Designers would be able to apply one of the predefined UI templates, or create and apply their own ones to preserve a consistent look and fill of all the generated prototypes. One of the necessary tasks to reach that goal is to provide visual design and specification of form types by means of the form type visual editor.REFERENCESChoobinch, J., Mannio, V. M., Nunamaker, F. J., Konsyn-ski, R. B., 1988. An Expert Database Design SystemBased on Analysis of Forms, IEEE Transactions on Software Engineering, Vol.14, No2, pp. 242-253. Date, C. J., Darwen, H., 1998. Foundation for Ob-ject/Relational Databases: The Third Manifesto, Ad-dison-Wesley Professional.Diet, C. J., Lochovsky F., 1989. Interactive Specification and Integration of User Views Using Forms, Pro-ceedings of the Eight International Conference on En-tity-Relationship Approach Toronto, Canada, pp.171-185.Diedrich, I., Milton, J., 1988. New Methods and Fast Al-gorithms for Database Normalization, ACM Transac-tions on Database Systems, Vol. 13, No. 3, pp. 339-365.Gálvez, S., Guevara, A., Caro, J. L., Gómez, I., Aguayo,A., 2004. Collaboration Techniques to Design a Da-tabase, Universidad de Málaga, Spain.Govedarica, M., Luković., I, Mogin, P., 2004. Generating XML Based Specifications of Information Systems,Computer Science and Information Systems (ComSIS), Belgrade, Serbia and Montenegro, Vol. 1,No. 1, pp. 117-140.Kambayashi, Y., Tanaka, K., Yajima, S., 1982 Problems of Relational Database Design In Data Base DesignTechniques I, Edited by Yao S, B, et all, Lecture Notesin Computer Science, Springer Verlag, Berlin, pp.172-218.Luković, I., Govedarica, M., Mogin, P., Ristić, S., 2002.The Structure of A Subschema and Its XML Specifica-tion, Journal of Information and Organizational Sci-ences (JIOS), Varaždin, Croatia, Vol. 26, No. 1-2, pp.69-85.Luković, I., Ristić, S., Mogin, P., 2003. A Methodology ofA Database Schema Design Using The Subschemas,International Conference on Computational Cyber-netics IEEE ICCC.Mogin, P., Luković, I., 1995. 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