Processing Acc-34x Inputs and Outputs
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FeaturesBack to back gate-source Zener diodes Guaranteed R DS(ON) at 4.0V gate drive Low threshold Low on-resistanceIndependent N- and P-channelsElectrically isolated N- and P-channels Low input capacitance Fast switching speedsFree from secondary breakdowns Low input and output leakageApplicationsHigh voltage pulsers Amplifiers BuffersPiezoelectric transducer drivers General purpose line drivers Logic level interfaces►►►►►►►►►►►►►►►►General DescriptionThe Supertex TC6215 consists of high voltage, low threshold N-channel and P-channel MOSFETs in an 8-Lead SOIC (TG) package. Both MOSFETs have integrated back to back gate-source Zener diode clamps and guaranteed R DS(ON) ratings down to 4.0V gate drive allowing them to be driven directly with standard 5.0V CMOS logic.These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown.Supertex’s vertical DMOS FETs are ideally suitedto a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.N- and P-ChannelEnhancement-Mode Dual MOSFET-G indicates package is RoHS compliant (‘Green’)GP SP GN SNDP DP DN DNYY = Year Sealed WW = Week Sealed L = Lot Number= “Green” Packaging 8-Lead SOIC (TG)(top view)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.* Distance of 1.6mm from case for 10 seconds.8-Lead SOIC (TG)Package may or may not include the following marks: Si orPin ConfigurationN-Channel Switching Waveforms and Test CircuitVOUTPUT 10V0V0VVDDInputOutputNotes:All DC parameters 100% tested at 25°C unless otherwise stated. (Pulsed test: 300µs pulse at 2% duty cycle.)All AC parameters sample tested.1.2.DD0V -10V0V V DDInputOutputNotes:All DC parameters 100% tested at 25°C unless otherwise stated. (Pulsed test: 300µs pulse at 2% duty cycle.)All AC parameters sample tested.1.2.Block DiagramSN GN SPGPDPDPDN DN 8-Lead SOIC(top view)P-Channel Output Characteristics-4.0-3.5-3.0-2.5-2.0-1.5-1.0-0.50.0-50-45-40-35-30-25-20-15-10-5V DS (volts)I D (a m p e r e s )V =-10VV =-8V V =-7VV =-6VV =-5VV =-4VV =-3VV =-2VP-Channel Saturation Characteristics-2.2-2.0-1.8-1.6-1.4-1.2-1.0-0.8-0.6-0.4-0.20.0-10-9-8-7-6-5-4-3-2-1V DS (volts)I D (a m p e r e s )V GS =-10V V GS =-8V V GS =-6V V GS =-5VV GS =-4VV GS =-3VV GS =-2VN-Channel Output Characteristics0.00.51.01.52.02.53.03.54.04.505101520253035404550V DS (volts)I D (a m p e r e s )V GS =10V V GS =8V V GS =7VV GS =6VV GS =5VV GS =4VV GS =3VV GS =2VN-Channel Saturation Characteristics0.00.51.01.52.02.53.03.54.012345678910V DS (volts)I D (a m p e r e s )V GS =10V V GS =8V V GS =6VV GS =5VV GS =4VV GS =3VV GS =2VTypical Performance CurvesSupertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//.©2008 All rights reserved. Unauthorized use or reproduction is prohibited.1235 Bordeaux Drive, Sunnyvale, CA 94089(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packaging.html .)8-Lead SOIC (Narrow Body) Package Outline (TG)4.90x3.90mm body, 1.75mm height (max), 1.27mm pitchSide ViewView A-AJEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.Drawings are not to scale.Supertex Doc. #: DSPD-8SOLGTG, Version H101708.Note:This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier;an embedded metal marker; or a printed indicator.1.。
1FeaturesInputs/Outputs •Accepts differential or single-ended input •LVPECL, LVDS, CML, HCSL, LVCMOS •Six precision LVDS outputs •Operating frequency up to 750 MHzPower •Option for 2.5 V or 3.3 V power supply •Current consumption of 93 mA•On-chip Low Drop Out (LDO) Regulator for superior power supply noise rejectionPerformance •Ultra low additive jitter of 104 fs RMSApplications•General purpose clock distribution •Low jitter clock trees •Logic translation•Clock and data signal restoration•Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC•PCI Express generation 1/2/3 clock distribution •Wireless communications•High performance microprocessor clock distributionApril 2014Figure 1 - Functional Block DiagramZL40216Precision 1:6 LVDS Fanout BufferData SheetOrdering InformationZL40216LDG1 32 Pin QFN TraysZL40216LDF132 Pin QFN Tape and ReelMatte TinPackage Size: 5 x 5 mm-40o C to +85o CTable of ContentsFeatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Inputs/Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Change Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.0 Package Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52.0 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63.0 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73.1 Clock Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73.2 Clock Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123.3 Device Additive Jitter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .153.4 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163.4.1 Sensitivity to power supply noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163.4.2 Power supply filtering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163.4.3 PCB layout considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164.0 AC and DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175.0 Performance Characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .196.0 Typical Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .207.0 Package Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218.0 Mechanical Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22List of FiguresFigure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2 - Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3 - LVPECL Input DC Coupled Thevenin Equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4 - LVPECL Input DC Coupled Parallel Termination. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5 - LVPECL Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 6 - LVDS Input DC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 7 - LVDS Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 8 - CML Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 9 - HCSL Input AC Coupled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 10 - CMOS Input DC Coupled Referenced to VDD/2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 11 - CMOS Input DC Coupled Referenced to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 12 - Simplified LVDS Output Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 13 - LVDS DC Coupled Termination (Internal Receiver Termination). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 14 - LVDS DC Coupled Termination (External Receiver Termination) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 15 - LVDS AC Coupled Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 16 - LVDS AC Output Termination for CML Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 17 - Additive Jitter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 18 - Decoupling Connections for Power Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 19 - Differential Voltage Parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 20 - Input To Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Change SummaryBelow are the changes from the February 2013 issue to the April 2014 issue:Page Item Change1Applications Added PCI Express clock distribution.6Pin Description Added exposed pad to Pin Description.7, 8Figure 3 and Figure 4Removed 22 Ohm series resistors from Figure 3 and 4. Theseresistors are not required; however there is no impact toperformance if the resistors are included.18Figure 19Clarification of V ID and V OD.Below are the changes from the November 2012 issue to the February 2013 issue:Page Item Change8Figure 4Changed text to indicate the circuit is not recommended forVDD_driver=2.5V.8Figure 5Changed pull-up and pull-down resistors from 2kOhm to100 Ohm.12Figure 12Changed gate values to +/+ on the left and -/- on the right.1.0 Package DescriptionThe device is packaged in a 32 pin QFNFigure 2 - Pin Connections2.0 Pin DescriptionPin # Name Description3, 6clk_p, clk_n,Differential Input (Analog Input). Differential input signals.28, 27, 26, 25, 24, 23, 18, 17, 16, 15, 14, 13, out0_p, out0_nout1_p, out1_nout2_p, out2_nout3_p, out3_nout4_p, out4_nout5_p, out5_nDifferential Output (Analog Output). Differential outputs.9, 19,22, 32vdd Positive Supply Voltage. 2.5 V DC or 3.3 V DC nominal. 1, 8vdd_core Positive Supply Voltage. 2.5 V DC or 3.3 V DC nominal. 2, 7,20, 21gnd Ground. 0 V.4, 510, 11,12,29,30,31NC No Connection. Leave unconnected.Exposed Pad Device GND.3.0 Functional DescriptionThe ZL40216 is an LVDS clock fanout buffer with six identical output clock drivers capable of operating at frequencies up to 750MHz.Inputs to the ZL40216 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40216 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.The ZL40216 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.The device block diagram is shown in Figure 1; its operation is described in the following sections.3.1 Clock InputsThe ZL40216 is adaptable to support different types of differential and singled-ened input signals depending on the passive components used in the input termination. The application diagrams in the following figures allow the ZL40216 to accept LVPECL, LVDS, CML, HCSL and single-ended inputs.Figure 3 - LVPECL Input DC Coupled Thevenin EquivalentFigure 4 - LVPECL Input DC Coupled Parallel TerminationFigure 5 - LVPECL Input AC CoupledFigure 6 - LVDS Input DC CoupledFigure 7 - LVDS Input AC CoupledFigure 8 - CML Input AC CoupledFigure 9 - HCSL Input AC CoupledFigure 10 - CMOS Input DC Coupled Referenced to VDD/2Figure 11 - CMOS Input DC Coupled Referenced to GroundVDD_driver R1 (kΩ)R2 (kΩ)R3 (kΩ)RA (kΩ) C (pF) 1.5 1.25 3.075open10101.81 3.8open10102.50.33 4.2open10103.30.75open4.21010Table 1 - Component Values for Single Ended Input Reference to Ground* For frequencies below 100 MHz, increase C to avoid signal integrity issues.3.2 Clock OutputsLVDS has lower signal swing than LVPECL which results in a low power consumption. A simplified diagram for the LVDS output stage is shown in Figure 12.Figure 12 - Simplified LVDS Output DriverThe methods to terminate the ZL40216 drivers are shown in the following figures.Figure 13 - LVDS DC Coupled Termination (Internal Receiver Termination)Figure 14 - LVDS DC Coupled Termination (External Receiver Termination)Figure 15 - LVDS AC Coupled TerminationFigure 16 - LVDS AC Output Termination for CML Inputs3.3 Device Additive JitterThe ZL40216 clock fanout buffer is not intended to filter clock jitter. The jitter performance of this type of device is characterized by its additive jitter. Additive jitter is the jitter the device would add to a hypothetical jitter-free clock as it passes through the device. The additive jitter of the ZL40216 is random and as such it is not correlated to the jitter of the input clock signal.The square of the resultant random RMS jitter at the output of the ZL40216 is equal to the sum of the squares of the various random RMS jitter sources including: input clock jitter; additive jitter of the buffer; and additive jitter due to power supply noise. There may be additional deterministic jitter sources, but they are not shown in Figure 17.Figure 17 - Additive Jitter3.4 Power SupplyThis device operates employing either a 2.5V supply or 3.3V supply.3.4.1 Sensitivity to power supply noisePower supply noise from sources such as switching power supplies and high-power digital components such as FPGAs can induce additive jitter on clock buffer outputs. The ZL40216 is equipped with an on-chip linear power regulator and on-chip bulk capacitors to minimize additive jitter due to power supply noise. The on-chip regulation, recommended power supply filtering, and good PCB layout all work together to minimize the additive jitter from power supply noise.3.4.2 Power supply filteringJitter levels may increase when noise is present on the power pins. For optimal jitter performance, the device should be isolated from the power planes connected to its power supply pins as shown in Figure 18. •10 µF capacitors should be size 0603 or size 0805 X5R or X7R ceramic, 6.3 V minimum rating •0.1 µF capacitors should be size 0402 X5R ceramic, 6.3 V minimum rating •Capacitors should be placed next to the connected device power pins • A 0.15 ohm resistor is recommendedZL402161891922320.1 µF 0.1 µFvdd_core10 µF 0.1 µF0.15 Ωvdd0.1 µF 10 µFFigure 18 - Decoupling Connections for Power Pins3.4.3 PCB layout considerationsThe power nets in Figure 18 can be implemented either as a plane island or routed power topology without changing the overall jitter performance of the device.4.0 AC and DC Electrical CharacteristicsAbsolute Maximum Ratings*Parameter Sym.Min.Max.Units 1Supply voltage V DD_R-0.5 4.6V 2Voltage on any digital pin V PIN-0.5V DD V 3Soldering temperature T260 °C 4Storage temperature T ST-55125 °C 5Junction temperature T j125 °C 6Voltage on input pin V input V DD V 7Input capacitance each pin C p500fF * Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.* Voltages are with respect to ground (GND) unless otherwise statedRecommended Operating Conditions*Characteristics Sym.Min.Typ.Max.Units1Supply voltage 2.5 V mode V DD25 2.375 2.5 2.625V2Supply voltage 3.3 V mode V DD33 3.135 3.3 3.465V3Operating temperature T A-402585°C* Voltages are with respect to ground (GND) unless otherwise statedDC Electrical Characteristics - Current ConsumptionCharacteristics Sym.Min.Typ.Max.Units Notes 1Supply current LVDS drivers - loadedI dd_load93mA(all outputs are active)DC Electrical Characteristics - Inputs and Outputs - for 2.5/3.3 V SupplyCharacteristics Sym.Min.Typ.Max.Units Notes1Differential input common modeV ICM 1.1 1.6V for 2.5 V voltageV ICM 1.1 2.0V for 3.3 V2Differential input common modevoltage3Differential input voltage V ID0.251V4LVDS output differential voltage*V OD0.250.300.40V5LVDS Common Mode voltage V CM 1.1 1.25 1.375V* The VOD parameter was measured between 125 and 750 MHzAC Electrical Characteristics* - Inputs and Outputs (see Figure 20) - for 2.5/3.3 V supply.Characteristics Sym.Min.Typ.Max.Units Notes 1Maximum Operating Frequency1/t p750MHz2Input to output clock propagation delay t pd012ns3Output to output skew t out2out80150ps4Part to part output skew t part2part120300ps5Output clock Duty Cycle degradation t PWH/ t PWL-505Percent6LVDS Output slew rate r SL0.55V/nsFigure 19 - Differential Voltage Parameter* Supply voltage and operating temperature are as per Recommended Operating ConditionsInputt Pt PWL t pdt PWHOutputFigure 20 - Input To Output TimingAdditive Jitter at 2.5 V*Output Frequency (MHz)Jitter MeasurementFilterTypical RMS (fs)Notes112512 kHz - 20 MHz 1482212.512 kHz - 20 MHz 1523311.0412 kHz - 20 MHz 121442512 kHz - 20 MHz 115550012 kHz - 20 MHz 1076622.0812 kHz - 20 MHz 107775012 kHz - 20 MHz105Additive Jitter at 3.3 V*Output Frequency (MHz)Jitter MeasurementFilterTypical RMS (fs)Notes112512 kHz - 20 MHz 1502212.512 kHz - 20 MHz 1383311.0412 kHz - 20 MHz 120442512 kHz - 20 MHz 115550012 kHz - 20 MHz 1076622.0812 kHz - 20 MHz 106775012 kHz - 20 MHz1045.0 Performance Characterization*The values in this table were taken with an approximate slew rate of 0.8 V/ns*The values in this table were taken with an approximate slew rate of 0.8 V/ns.Additive Jitter from a Power Supply Tone*Carrier frequencyParameterTypicalUnitsNotes125MHz 25 mV at 100 kHz 24fs RMS 750MHz25 mV at 100 kHz23fs RMS* The values in this table are the additive periodic jitter caused by an interfering tone typically caused by a switching power supply. For this test, measurements were taken over the full temperature and voltage range for V DD = 3.3 V. The magnitude of the interfering tone is measured at the DUT.6.0 Typical BehaviorTypical Waveform at 155.52 MHzV OD vs FrequencyPower Supply Tone Frequency versus PSRRPower Supply Tone Magnitude versus PSRRPropagation Delay versus TemperatureNote:This is for a single device. For more details, see thecharacterization section.7.0 Package CharacteristicsThermal DataParameter Symbol Test Condition Value UnitJunction to Ambient Thermal Resistance ΘJA Still Air1 m/s2 m/s 37.433.131.5o C/WJunction to Case Thermal Resistance ΘJC24.4o C/W Junction to Board Thermal Resistance ΘJB19.5o C/W Maximum Junction Temperature*T jmax125o C Maximum Ambient Temperature T A85o C© 2014 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. 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1Network visualisation software• GridVis ®-Basic (in the scope of supply)3 digital inputs/outputs•Usable as either inputs or outputs•Switch output•Threshold value output •Logic output•Remote via Modbus / ProfibusT emperature measurement •PT100, PT1000, KTY83, KTY84Interfaces •RS485•Ethernet•SNTP •TFTP•BACnet (optional)Networks• T N, T T , IT networks•3 and 4-phase networks•Up to 4 single-phase networksMeasured data memory •256 MB Flash• H armonics up to 40th harmonic •Rotary field components•Distortion factor T HD-U / T HD-I2 analogue inputs • A nalogue, temperature or residual current input (RCM)Residual current measurement BACnet (optional)HomepageAlarm managementMemory 256 MB Ethernet-Modbus gateway2• M easurement, monitoring and checking of electrical characteristics in energy distribution systems • R ecording of load profiles in energy management systems (e.g. ISO 50001)• Acquisition of the energy consumption for cost centre analysis • M easured value transducer for building management systems or PLC (Modbus)• M onitoring of power quality characteristics, e.g. harmonics up to 40th harmonic • R esidual current monitoring (RCM)Areas of applicationMain featuresUniversal meter• O perating current monitoring for general electrical parameters • H igh transparency through a multi-stage and scalable measurement system in the field of energy measurement • A cquisition of events through continuous measurement with 200 ms high resolutionRCM device• C ontinuous monitoring of residual currents (Residual Current Monitor, RCM)• A larming in case a preset threshold fault current reached • N ear-realtime reactions for triggering countermeasures • P ermanent RCM measurement for systems in permanent operation without the opportunity to switch offEnergy measurement device•Continuous acquisition of the energy data and load profiles • E ssential both in relation to energy efficiency and for the safe design of power distribution systemsHarmonics analyser / event recorder• Analysis of individual harmonics for current and voltage •Prevention of production downtimes•Significantly longer service life for equipment • R apid identification and analysis of power quality fluctuations by means of user-friendly tools (GridVis ®)Fig.: UMG 96RM-E with residual current monitoring via measuring inputs I5 / I6Fig.: Event logger: Voltage dip in the low voltage distribution system3Extensive selection of tariffs• 7 tariffs each for effective energy (consumption, delivery and without backstop)• 7 tariffs each for reactive energy (inductive, capacitive and without backstop)•7 tariffs for apparent energy •L1, L2 and L3, for each phaseHighest possible degree of reliability•Continuous leakage current measurement • H istorical data: Long-term monitoring of the residual current allows changes to be identified in good time, e.g. insulation faults•Time characteristics: Recognition of time relationships •Prevention of neutral conductor carryover • R CM threshold values can be optimized for each individual case: Fixed, dynamic and stepped RCM threshold value • M onitoring of the CGP (central ground point) and the sub-distribution panelsAnalysis of fault current events• E vent list with time stamp and values•Presentation of fault currents with characteristic and duration • R eproduction of phase currents during the fault current surge • P resentation of the phase voltages during the fault current surgeAnalysis of the harmonic fault current components•Frequencies of the fault currents (fault type)•Current peaks of the individual frequency components in A and %•Harmonics analysis up to 40th harmonic •Maximum values with real-time bar displayDigital IOs• E xtensive configuration of IOs for intelligent integration, alarmand control tasksFig.: Continuous leakage current measurementFig.: Analysis of fault current eventsFig.: Analysis of the harmonic fault current components4Dimension diagramsAll dimensions in mmSide viewRear viewEthernet (TCP/IP)- / Homepage- / Ethernet-Modbus gateway functionality•Simple integration into the network •More rapid and reliable data transfer •Modern homepage • W orld-wide access to measured values by means of standard web browsers via the device's inbuilt homepage • Access to measurement data via various channels • R eliable saving of measurement data possible over a very long periods of time in the 256 MByte measurement data memory • C onnection of Modbus slave devices via Ethernet-ModbusgatewayFig.: Ethernet-Modbus gateway functionalityMeasuring device homepage• W ebserver on the measuring device, i.e. device's own homepage •Remote operation of the device display via the homepage •Comprehensive measurement data incl. PQ • O nline data directly available via the homepage, historic data optional via the APP measured value monitor, 51.00.246Fig.: Illustration of the online data via the device's inbuilt homepageCut out: 92+0,8 x 92+0,8 mm5Typical connectionDevice overview and technical dataFig.: Connection example residual currentmeasurement and PE monitoringFig.: Connection example with temperature and residual current measurementS2S1S2S2S1S1Digital-Eingänge/Ausgänge UMG 96RM-E (RCM)L1L2L3Spannungsmessung 3456StrommessungVersorgungs-spannung12RS4851617BAB AV e r b r a u c h e r230V/400V 50HzI 41918N282930313233343536Analog-Eingänge13141524V DC K1K2=E t h e r n e t10/100B a s e -TPCK3K4K5==37R J 450-30 mAS2S1I DIFFI 5I 6PT100S1S2S3Gruppe 1Gruppe 2V 1V 2V 3V N N/-L/+2)1)2)2)3)3)3)3)Digital inputs/outputs Power supply voltage Current measurement Measuring voltage Analog inputs L o d s Group 1Group 2Comment:For detailed technical information please refer to the operation manual and the Modbus address list.•= included - = not included *1 Inclusive UL certification.6Fig.: GridVis ®software, configuration menuComment:For detailed technical information please refer to the operation manual and the Modbus address list.• = included - = not included*2 O ptional additional functions with the packages GridVis ®-Professional, GridVis ®-Service and GridVis ®-Ultimate.7Fig.: RCM configuration, e.g. dynamicthreshold value formation, for load-dependent threshold value adaptationFig.: Summation current transformer for the acquisition of residual currents. Wide range with different configurations and sizes allow use in almost all applicationsMeasurement surge voltage Power consumption Overload for 1 sec.Sampling frequency per channel (50 / 60 Hz)Residual current inputAnalogue inputsMeasurement range, residual current input*Digital outputsSwitching voltage Switching current Response timePulse output (energy pulse)Comment:For detailed technical information please refer to the operation manual and the Modbus address list.•= included - = not included*3 E xample of residual current input 30 mA with 600/1 residual current transformer: 600 x 30 mA = 18,000 mA *4A ccurate device dimensions can be found in the operation manual.8Comment:For detailed technical information please refer to the operation manual and the Modbus address list.• = included - = not included。
SPECIFICATIONSNI USB-7845R OEMR Series for USB Multifunction RIO with Kintex-7 70T FPGA Français Deutsch日本語한국어简体中文/manualsThis document contains the specifications for the National InstrumentsUSB-7845R OEM device. Specifications are typical at 25 °C unless otherwise noted.Caution Using the NI USB-7845R OEM device in a manner not described in thisdocument may impair the protection the NI USB-7845R OEM device provides. Analog InputNumber of channels8 ............................................................................Input modes DIFF, NRSE, RSE (software-selectable; ............................................................................selection applies to all channels)Type of ADC Successive approximation register (SAR) ............................................................................Resolution16 bits ............................................................................Conversion time 2 µs ............................................................................Maximum sampling rate500 kS/s (per channel) ............................................................................Input impedancePowered on 1.25 GΩ ║ 2 pF....................................................................Powered off/overload 4.0 kΩ min....................................................................Input signal range±1 V, ±2 V, ±5 V, ±10 V (software-selectable) ............................................................................Input bias current±5 nA ............................................................................ ............................................................................Input offset current±5 nAInput coupling DC ............................................................................Overvoltage protection....................................................................Powered on±42 V maxPowered off±35 V max....................................................................Table 1. AI Operating Voltage Ranges Over TemperatureAI Absolute AccuracyAbsolute accuracy at full scale numbers is valid immediately following internal calibration and assumes the device is operating within 10 °C of the last external calibration. Accuracies listed are valid for up to one year from the device external calibration.Absolute accuracy at full scale on the analog input channels is determined using the following assumptions:•TempChangeFromLastExternalCal = 10 °C •TempChangeFromLastInternalCal = 1 °C•number_of_readings = 10,000•CoverageFactor = 3 σ1The minimum measurement voltage range is the largest voltage the NI USB-7845R OEM device is guaranteed to accurately measure.2| | NI USB-7845R OEM SpecificationsTable 2. AI Absolute Accuracy (Calibrated) (Continued)Table 3. AI Absolute Accuracy (Uncalibrated)Calculating Absolute AccuracyAbsoluteAccuracy=Reading⋅(GainError)+Range*(OffsetError)+NoiseUncertaintyGainError=ResidualGainError+GainTempco*(TempChangeFromLastInternalCal)+ReferenceTempco*(TempChangeFromLastExternalCal)OffsetError=ResidualOffsetError+OffsetTempco*(TempChangeFromLastInternalCal)+INL_ErrorNoiseUncertainty=Refer to the following equation for an example of calculating absolute accuracy.NI USB-7845R OEM Specifications| © National Instruments| 3Absolute accuracy at full scale on the analog input channels is determined using the following assumptions:•TempChangeFromLastExternalCal = 10 °C •TempChangeFromLastInternalCal = 1 °C•number_of_readings = 10,000•CoverageFactor = 3 σGainError=104.4ppm+20ppm*1+4ppm*10GainError=164.4ppmOffsetError=16.4ppm+4.18ppm*1+42.52ppmOffsetError=63.1ppmNoiseUncetainty=NoiseUncertainty=7.89µVAbsoluteAccuracy=10V*(GainError)+10V*(OffsetError)+NoiseUncertaintyAbsoluteAccuracy=2,283µVDC Transfer Characteristics ............................................................................INL Refer to the AI Accuracy TableDNL±0.4 LSB typ, ±0.9 LSB max ............................................................................No missing codes16 bits guaranteed ............................................................................CMRR, DC to 60 Hz-100 dB ............................................................................Dynamic CharacteristicsBandwidthSmall signal 1 MHz........................................................................................................................................Large signal500 kHz4| | NI USB-7845R OEM Specifications............................................................................Crosstalk-80 dB, DC to 100 kHzAnalog Output ............................................................................Output type Single-ended, voltage output ............................................................................Number of channels8 ............................................................................Resolution16 bits ............................................................................Update time 1.0 µs ............................................................................Maximum update rate 1 MS/sType of DAC Enhanced R-2R ............................................................................ ............................................................................Range±10 V ............................................................................Output coupling DCOutput impedance0.5 Ω............................................................................NI USB-7845R OEM Specifications| © National Instruments| 5............................................................................Minimum current drive±2.5 mAProtection Short circuit to ground ............................................................................Overvoltage protectionPowered on±15 V max....................................................................Powered off±10 V max....................................................................Power-on state User-configurable ............................................................................Power-on glitch-1 V for 1 µs ............................................................................Table 4. AO Operating Voltage Ranges for Over TemperatureAO Absolute AccuracyAbsolute accuracy at full scale numbers is valid immediately following internal calibration and assumes the device is operating within 10 °C of the last external calibration. Accuracies listed are valid for up to one year from the device external calibration.Absolute accuracy at full scale on the analog output channels is determined using the following assumptions:•TempChangeFromLastExternalCal = 10 °C •TempChangeFromLastInternalCal = 1 °C2The minimum measurement voltage range is the largest voltage the NI USB-7845R OEM device is guaranteed to accurately measure.6| | NI USB-7845R OEM SpecificationsTable 5. AO Absolute Accuracy (Calibrated) (Continued)Calculating Absolute AccuracyAbsoluteAccuracy=OutputValue*(GainError)+Range*(OffsetError)GainError=ResidualGainError+GainTempco*(TempChangeFromLastInternalCal)+ReferenceTempco*(TempChangeFromLastExternalCal)OffsetError=ResidualOffsetError+AOOffsetTempco*(TempChangeFromLastInternalCal)+INL_Error Refer to the following equation for an example of calculating absolute accuracy.Absolute accuracy at full scale on the analog output channels is determined using thefollowing assumptions:•TempChangeFromLastExternalCal = 10 °C•TempChangeFromLastInternalCal = 1 °CGainError=87.3ppm+12.6ppm*1+4ppm*10GainError=139.9ppmNI USB-7845R OEM Specifications| © National Instruments| 7OffsetError=41.1ppm+7.8ppm*1+61ppmOffsetError=109.9ppmAbsoluteAccuracy=10V*(GainError)+10V*(OffsetError)AbsoluteAccuracy=2,498µVDC Transfer CharacteristicsINL Refer to the AO Accuracy Table ............................................................................DNL±0.5 LSB typ, ±1 LSB max ............................................................................Monotonicity16 bits, guaranteed ............................................................................Dynamic CharacteristicsSlew rate-10 V/µs ............................................................................Noise250 µV rms, DC to 1 MHz ............................................................................Glitch energy at midscale transition±10 mV for 3 µs ............................................................................5V OutputOutput voltage 4.75 V to 5.1 V ............................................................................Output current0.5 A max ............................................................................Overvoltage protection±30 V ............................................................................ ............................................................................Overcurrent protection650 mA8| | NI USB-7845R OEM SpecificationsDigital I/OCompatibility LVTTL ............................................................................Logic family User-selectable ............................................................................Default software setting 3.3 V ............................................................................Maximum input 3.6 V ............................................................................NI USB-7845R OEM Specifications| © National Instruments| 9Table 10. Digital Output Logic Levels (Continued)Output currentSource 4.0 mA....................................................................Sink 4.0 mA....................................................................Input leakage current±15 µA max ............................................................................Input impedance50 kΩ typ, pull-down ............................................................................Power-on state Programmable, by line ............................................................................Protection±20 V, single line ............................................................................Digital I/O voltage switching time 2 ms max ............................................................................Note Refer to NI RIO Software Help for more information about switching times.Reconfigurable FPGAFPGA type Kintex-7 70T ............................................................................Number of flip-flops82,000 ............................................................................Number of LUTs41,000 ............................................................................Embedded block RAM4,860 kbits ............................................................................Number of DSP48 slices240 ............................................................................Timebase40, 80, 120, 160, or 200 MHz ............................................................................Timebase accuracy, onboard clock±100 ppm ............................................................................Calibration ............................................................................Recommended warm-up time15 minutesCalibration interval 1 year ............................................................................10| | NI USB-7845R OEM SpecificationsOnboard calibration referenceDC level3 5.000 V (±2 mV)....................................................................Temperature coefficient±4 ppm/°C max....................................................................Long-term stability±25 ppm/1,000 h....................................................................Note Refer to Calibration Certifications at /calibration to generate acalibration certificate for the NI USB-7845R OEM deviceBus Interface ............................................................................USB compatibility USB 2.0 Hi-Speed or Full-Speed4Data transfers DMA, interrupts, programmed I/O ............................................................................Number of DMA channels3 ............................................................................Power RequirementInput voltage9 V to 30 V ............................................................................Max power20 W ............................................................................ ............................................................................Overvoltage protection40 VNote You must use a UL Listed ITE power supply marked LPS with theNI USB-7845R OEM device.PhysicalNote If you need to clean the device, wipe it with a dry, clean towel.Dimensions (PCB)17.5 cm × 16.3 cm (6.9 in. × 6.4 in.) ............................................................................Weight183 g (6.45 oz) ............................................................................I/O connectors Analog- 1 × 50 pin box header, ............................................................................Digital- 3 × 34 pin box header3Actual value stored in Flash memory4Operating on a full-speed bus will result in lower performance and you might not be able to achieve maximum sampling/update rates.NI USB-7845R OEM Specifications| © National Instruments| 11Maximum Working VoltageMaximum working voltage refers to the signal voltage plus the common-mode voltage. Channel-to-earth±12 V, Measurement Category I ............................................................................Channel-to-channel±24 V, Measurement Category I ............................................................................Measurement Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage. MAINS is a hazardous live electrical supply system that powers equipment. This category is for measurements of voltages from specially protected secondary circuits. Such voltage measurements include signal levels, special equipment, limited-energy parts of equipment, circuits powered by regulated low-voltage sources, and electronics.Caution Do not use the NI USB-7845R OEM device for connection to signals inMeasurement Categories II, III, or IV.Note Measurement Categories CAT I and CAT O (Other) are equivalent. Thesetest and measurement circuits are not intended for direct connection to the MAINSbuilding installations of Measurement Categories CAT II, CAT III, or CAT IV. Environmental-40 °C to 70 °COperating temperature ............................................................................(IEC 60068-2-1, IEC 60068-2-2)Storage temperature-40 °C to 85 °C ............................................................................(IEC 60068-2-1, IEC 60068-2-2)10% to 90% RH, noncondensingOperating humidity ............................................................................(IEC 60068-2-56)Storage humidity (IEC 60068-2-56)5% to 95% RH, noncondensing ............................................................................ ............................................................................Pollution Degree2Maximum altitude2,000 m ............................................................................Indoor use only.Online Product CertificationTo obtain product certifications and the DoC for this product, visit /certification, search by model number or product line, and click the appropriate link in the Certification column.12| | NI USB-7845R OEM SpecificationsEnvironmental ManagementNI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.For additional environmental information, refer to the Minimize Our Environmental Impact web page at /environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.Waste Electrical and Electronic Equipment (WEEE)EU Customers At the end of the product life cycle, all products must be sent to aWEEE recycling center. For more information about WEEE recycling centers,National Instruments WEEE initiatives, and compliance withWEEE Directive 2002/96/EC on Waste Electrical and Electronic Equipment, visit/environment/weee.电子信息产品污染控制管理办法(中国RoHS)中国客户National Instruments符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。
1W,Fixed input voltage,isolated &unregulated dual outputPatent Protection RoHSFEATURES●Continuous short-circuit protection ●No-load input current as low as 5mA●Operating temperature range:-40℃to +105℃●High efficiency up to 83%●Compact SMD package ●Isolation voltage:1.5K VDC ●International standard pin-out●Meets UL62368,EN62368standards (Pending )A05_XT-1WR3series are specially designed for applications where an isolated voltage is required in a distributed power supply system.They are suitable for:pure digital circuits,low frequency analog circuits,relay-driven circuits and data switching circuits.Selection GuideCertificationPart No.Input Voltage (VDC)OutputEfficiency (%,Min./Typ.)@Full Load Max.CapacitiveLoad(µF)*Nominal (Range)Output Voltage(VDC)Output Current (mA)(Max./Min.)UL/CE (Pending)A0505XT-1WR35(4.5-5.5)±5±100/±1078/821200A0509XT-1WR3±9±56/±679/83470A0512XT-1WR3±12±42/±579/83220A0515XT-1WR3±15±34/±479/83220Note:*The capacitive loads of positive and negative outputs are identical.Input SpecificationsItemOperating ConditionsMin.Typ.Max.Unit Input Current(full load /no-load)5VDC input5VDC output--244/5257/10mA 9VDC/12VDC output --241/12254/2015VDC output--241/18254/30Reflected Ripple Current*--15--mA Surge Voltage (1sec.max.)5VDC input-0.7--9VDCInput Filter Filter capacitor Hot PlugUnavailableNote:*Reflected ripple current testing method please see DC-DC Converter Application Notes for specific operation.Output SpecificationsItemOperating ConditionsMin.Typ.Max.Unit Output Voltage Accuracy See tolerance envelope curve(Fig.1)Line RegulationInput voltage change:±1%---- 1.2%/%Load Regulation10%-100%load5VDC output--1015%9VDC output --81012VDC output --71015VDC output--610Ripple &Noise *20MHz bandwidth --3075mVp-p Temperature Coefficient Full load--±0.02--%/℃Short Circuit ProtectionContinuous,self-recoveryNote:*Ripple and noise are measured by “parallel cable”method,please see DC-DC Converter Application Notes for specific operation;General SpecificationsItemOperating ConditionsMin.Typ.Max.Unit Isolation Voltage Input-output,with the test time of 1minute and the leak current lower than 1mA1500----VDC Isolation Resistance Input-output,isolation voltage 500VDC 1000----M ΩIsolation Capacitance Input-output,100KHz/0.1V--20--pFOperating Temperature Derating when operating temperature up to 100℃,(see Fig.2)-40--105℃Storage Temperature -55--125Casing Temperature Rise Ta=25℃--15--Pin Welding Resistance Temperature Welding spot is 1.5mm away from the casing,10seconds ----300Storage HumidityNon-condensing ----95%RH Reflow Soldering Temperature*Peak temp.≤245℃,maximum duration time ≤60s at 217℃.Switching Frequency Full load,nominal input voltage --270--KHz MTBFMIL-HDBK-217F@25℃3500----K hoursMoisture Sensitivity Level (MSL)IPC/JEDEC J-STD-020D.1Level 2Note:*For actual application,please refer to IPC/JEDEC J-STD-020D.1.Physical SpecificationsCasing Material Black flame-retardant and heat-resistant plastic(UL94V-0)Dimensions 15.24*11.40*7.25mm Weight1.4g (Typ.)Cooling MethodFree air convectionEMC SpecificationsEMI CE CISPR32/EN55032CLASS B (see Fig.5for recommended circuit)RE CISPR32/EN55032CLASS B (see Fig.5for recommended circuit)EMSESDIEC/EN61000-4-2Air ±8kV ,Contact ±4kVperf.Criteria BProduct Characteristic Curve-10%-5%0+5%+10%+15%T y p .M i n .M a x .Output Current Percent (Nominal Input Voltage)O u t p u t V o l t a g e A c c u r a c yTolerance Envelope CurveFig.112080O u t p u t P o w e r P e r c e n t (%)Ambient Temp.()℃Safe Ope rating AreaFig.2Design ReferenceIf it is required to further reduce input and output ripple,a filter capacitor may be connected to the input and output terminals,see Fig.3.Moreover,choosing a suitable filter capacitor is very important,start-up problems may be caused if the capacitance is too large.Under the condition of safe and reliable operation,the recommended capacitive load values are shown in Table 1.The simplest device for output voltage regulation,over-voltage and over-current protection is a linear voltage regulator with overheat protection that is connected to the input or output end in series (see Fig.4).Vin +Vo 0V DCCinDC CoutCout -VoVin 0V +Vo DC DC-VoREGREGREGFig.4Recommended capacitive load value table (Table 1)Vin(VDC)Cin(µF)Vo (VDC)Cout(µF)54.7±54.7±9 2.2±121±1512.EMC solution-recommended circuitFig.5EMC recommended circuit value table (Table 2)Input voltage 5VDCOutput voltage(VDC)5/912/15EMIC1/C24.7µF /25V4.7µF /25VCY --1nF/2KVDCHEC C1206X102K202T JOHANSON 202R18W102KV4E C3Refer to the Cout in table 1LDM6.8µH 6.8µHNote:In the case of actual use,the requirements for EMI are high,it is subject to CY.3.For more information please find DC-DC converter application notes on Dimensions and Recommended LayoutNotes:1.Packing information please refer to Product Packing Information which can be downloaded from .TubePacking bag number:58210023,Roll Packing bag number:58210034;2.If the product is not operated within the required load range,the product performance cannot be guaranteed to comply with allparameters in the datasheet;3.The maximum capacitive load offered were tested at input voltage range and full load;4.Unless otherwise specified,parameters in this datasheet were measured under the conditions of Ta=25℃,humidity<75%RH with nominalinput voltage and rated output load;5.All index testing methods in this datasheet are based on our Company’s corporate standards;6.We can provide product customization service,please contact our technicians directly for specific information;7.Products are related to laws and regulations:see"Features"and"EMC";8.Our products shall be classified according to ISO14001and related environmental laws and regulations,and shall be handled byqualified units.MORNSUN Guangzhou Science&Technology Co.,Ltd.Address:No.5,Kehui St.1,Kehui Development Center,Science Ave.,Guangzhou Science City,Luogang District,Guangzhou,P.R.China Tel:86-20-38601850-8801Fax:86-20-38601272E-mail:***************。
U 8 Differential or 16 Single-Ended Analog Inputs U 24 Bit Resolution with Up to 1000 Samples/Sec U U ser Programmable for Type J, K, T, E, R, S, B, N Thermocouple or Voltage Input U B uilt-In 4 Cold Junction Compensation Temperature Sensors and OpenThermocouple Detection U P owered Directly by USB Port or External DC Power Supply U500 V Isolation Between Input and PC For Safe and Noise-Free Measurements UF API/Driver for Visual Basic, C#, and Visual C++ for Windows XP, Vista and Windows 7 Available for Download from OMEGA U P rovides +12 Vdc Output for Sensor Excitation U I ncludes Hardware for Benchtop, DIN Rail or Wall MountingOM-DAQ-USB-24018/16-Channel Thermocouple/Voltage Input USB Data Acquisition ModuleOMEGACARE SM extended warranty program is available for models shown on this page. Ask your sales respresentative for full details when placing an order. OMEGACARE SM covers parts, labor and equivalent loaners.The OM-DAQ-USB-2401 is a USB 2.0 full speed thermocouple/voltage input data acquisition module (fully compatible with both USB 1.1 and USB 2.0 ports). This stand-alone module draws power from the USB port to operate. An external power supply (optional) can be used. All configurable options (including individual channel input type and range) are software programmable. The OM-DAQ-USB-2401 hasuser programmable voltage inputs that range from ±30 mV to ±10V , full scale. The compact, modularpackaging ensures ease of useTMQSS-125U-12.KMQSS-125U-12.The compact OM-DAQ-USB-2401 is ideal for portable dataacquisition applications, withaccessory probes (shown L to R), KMQSS-125U-12, TMQSS-125U-12, JMQSS-125U-12.F R E E S o f t w a r e f o r C o n fi g u r a t i o n , L o g g i n g ,C h a r t i n g a n d R e a l -T i m e D i s p l a y o f D a t aA v a i l a b l e f o r D o w n l o a d f r o mOM E G Ain a variety of applications. Units can be DIN rail or wall mounted with the included hardware or easily operated on a bench. All analog input channels can be measured sequentially at about 1 ms per channel. A total of 1000 samples per second can be taken, divided across all active channels.**Note: At highest scan rate, 1000 samples/sec ±1% with one channel on, ±5% with all channels on.Terminal Block (4 included).Laptop not included.OM-DAQ-USB-2401, shown smaller than actual size.SpecificationsGENERALIsolation: 500V from PC External Excitation Output Voltage: 12 Vdc regulated, max total current output 67 mAPower Requirements: Powered direct from USB port, max 500 mA, or from external 7.5 to 12 Vdc Environmental: 0 to 50°C(0 to 122°F) 95% RH (non-condensing)Operating Temperature: 0 to 50°C (32 to 122°F), 0 to 95% RH non-condensing Storage Temperature: -40 to 85°C (-40 to 185°F)Weight: 0.23 kg (0.5 lb)Dimensions :107 W x 128 L x 39 mm H (4.2 x 5.1 x 1.5")Input Voltage Range: Software programmable on a per-channel basis differential/single-ended -10 to 10V -500 to 500 mV -5 to 5V -250 to 250 mV -2.5 to 2.5V -125 to 125 mV -2 to 2V -75 to 75 mV -1 to 1V -30 to 30 mV TC Input RangeT ype J: -18 to 1200°C (0 to 2192°F)T ype K: -129 to 1372°C (-200 to 2502°F)T ype T: -101 to 400°C (-150 to 752°F)T ype E: -184 to 1000°C (-300 to 1832°F)T ype R: 204 to 1768°C (400 to 3214°F)T ype S: 204 to 1768°C (400 to 3214°F)T ype B: 538 to 1820°C (1000 to 3308°F)T ype N: -129 to 1300°C(-200 to 2372°F)OMEGA ® DAQ Central Software Configuration ScreenOMEGA ® DAQ Central Software Data DisplaysThe OM-DAQ-USB-2401 comes complete with hardware for both DIN rail and wall mounting,both shown here.TC InputThermocouple Accuracy: Typical, in very slow mode, 24 bit resolution J = ±1.1°C K = ±1.2°C T = ±1.1°C E = ±1.0°C R = ±2.5°C S = ±2.6°C B = ±3.3°C N = ±1.5°CCold Junction Compensation Accuracy: ±1.0°CAnalog Input Accuracy:Differential Input: Typical, in very slow mode, 0.015% of reading+0.004%of range +10uV (exclusive of noise)Single-End Input: Typical, in very slow mode, 0.05% of reading +0.01% of range +50uV (exclusive of noise)USB Device Type: USB 2.0 (full-speed)Device Compatibility: USB 1.1, USB 2.0Power Supply: From USB or 9 Vdc universal adaptor (included) DIN Rail Mounted for Rack Application: OptionalOpen Thermocouple Detect: Automatically enable when a channel is configured for a thermocouple sensorPower SupplyActivity LED4Analog Inputs 4 terminal blocks, 9 Vdc universal power adaptor, OMEGA screwdriver, and 2 Type K thermocouples with stripped leads (TC-TT-K-24-36). Free DAQ central software available for download from OMEGA.Ordering Example: OM-DAQ-USB-2401, data acquisition module and OM-DAQ-USB-TB spare terminal blocks.This model includes 2 free 1 m (40") Type K Thermocouples。
(Partial) Solutions to Assignment 2pp.73-761.16In each of the following systems, let or be the input and or be the output. Determine whether each systems is (1) linear, (2) time invariant, (3) causal, (4) BIBO stable(g).(i).ans: omitted----------------------------------------------------1.17 A linear time invariant system has impulse response Determine the output sequence for each of the followign input signals:(b)(f)(b) ans:h n is given byThe z-transform of []where ROC1:x n is given byz-transform of []where ROC2:h n is given byTherefore, the z-transform of the output []y nPerform inverse z to get [](f) ans: using the same method as in (b) (details omitted )----------------------------------------------------1.18. A linear time invariant system is defined by the difference equationb. Determine the output of the system when the intpu isc. Determine the output of the system when the input isans: omitted----------------------------------------------------1.19 The following expressions define linear time invariant systems. For each one determine the impulse respnose(a)(e)(a) ans: the impulse response is(e) ans: the impulse response is----------------------------------------------------1.20 Each of the following expressions defines a linear time invariant system. For each one determine whether it is BIBO stable or not(g)(k)BIBO: Bounded input and bounded output(g) ans: omitted(k) ans: omitted----------------------------------------------------1.21. Using the geometric series, for each of the following sequence determine the z-transform and its ROC(d)(g)(i)(d) ans:where ROC:(g) ans:The first part is equal towhere ROC1 isThe second part is equal towhere ROC2 isTherefore combining both parts:where ROC={ROC1 and ROC2}:(i) ans:where ROC: whole complex domain----------------------------------------------------1.22. You know what the and are. Using theproperties only (do not reuse the definition of the z-transform.) determine the z-transform of the following signals(c)(g)where ROC1:where ROC2:(c) ans: using z-transform property:We have:where ROC:(g) ans:details omitted. The final answer isTherefore combining both parts:where ROC={ROC1 and ROC2}:----------------------------------------------------1.23 Using partial fraction expansion, determine the inverse z-transform of the following functions:(c) ,(e) ,(c) ans:(e) ans:procedures are the same as above. details omitted.----------------------------------------------------1.24. For each of the followign linear difference equations, determine the impulse response, and indicate whether the system is BIBO stable or not(a)(c)(a) ans:Take z-transform on both sideswhere ROC:Because is finiteTherefore, the system is BIBO stable(c) ans: omitted (the same as (a))----------------------------------------------------1.25. Although most of the time we assume causality, a linear difference equation can be interpreted in a number of ways. Consider the linear difference equation(a) Determine the transfer function and the impulse response. Is the system causal ? BIBO stable ?(a) omitted.----------------------------------------------------1.26. 1.26 Consider the linear difference equation(a) Determine the transfer function . Do you have enough information to determine theregion of convergenceans:Don't have enough information to determine ROC.----------------------------------------------------1.27. Given the system described by the linear difference equationDetermine the output for each of the following input signals(a)(e)(a) ans:Take z-transform on both sides:----------------------------------------------------1.28. Repeat Problem 1.27 when the system is given in terms of the impulse responseBefore you do anything, is the system stable ? Does the frequency responseexist ?ans: omitted.----------------------------------------------------1.29. Repeat Problem 1.27 when the system isgiven by the linear difference equationBefore you do anything, is the system stable ? Does the frequency response exist ?Ans: omitted.----------------------------------------------------。
Application Note Last revision: 7/24/93 Processing Acc-34x Inputs and OutputsBecause the PMAC interface to the Acc-34 family of I/O boards (Acc-34x) is transmitted serially by full 32-bit words, even when access to only a single bit is desired, consider carefully how the interface is done and how frequently. Care must also be taken to work efficiently with the data so that PMAC is not bogged down with slow serial reads and writes and time-consuming logic to assemble and disassembleI/O words.The recommended strategy is to keep images of each input or output word in PMAC’s internal memory or in the dual-ported RAM. The input words are copied into their image words and the output words are copied from their image words. Most program operations deal with these image words, much less frequently is the slow transfer to or from an Acc-34x board performed. During the act of copying, bit inversion can also be performed with the exclusive-or function.When to Access the Acc-34xThe actual reads and writes for an Acc-34x board should be done only in a background PLC program (PLC 1-31). Motion programs and PLC 0 should not directly access this I/O — they should work with the image words only. Reading an input word from an Acc-34x is simply a question of using the TWS-form M-Variable for that word on the right side of an equation. Usually, this operation simply copies the input word into its internal image variable. Similarly, writing an output word to an Acc-34x just involves using the M-Variable for that word on the left side of an equation, in other words just copying it from its internal image word.Most will treat Acc-34x I/O the same way that a traditional PLC treats its I/O; all of the inputs are read at the beginning of a PLC software scan and all of the outputs are written to at the end of the scan. In between, all the processing of the variables is done working with the internal image words. It is possible to make the write operation to the output word conditional on a change in the image word for the output from the previous scan, but the time involved in making the decision and storing each scan’s value is about the same as the actual writing to the output.Image Word VariablesIt is best to use fixed-point M-Variables as the internal image variables for the I/O words. When this is done, a single M-Variable representing the entire I/O word can be used for the copying operation. Then separate M-Variables can be used to access individual bits or segments of the image word. Use of these smaller M-Variables allows PMAC’s efficient firmware to do the masking and logic necessary to pick out portions of the I/O word, rather than slower user program code.Location of the Image WordsIf the system has dual-ported RAM, it is probably best to use a 32-bit register in DPRAM. This way, the host computer always has immediate access to the I/O. In fact, it is possible to use PMAC just as a pass-through between the host computer and the Acc-34x boards, letting the host computer do all the processing. A 32-bit fixed-point register in DPRAM is defined by the DP format of M-Variable (e.g.M60-> DP:$DF00). This type of variable occupies the low 16 bits (bits 0 to 15) of the PMAC Y-memory, and the low 16 bits of the PMAC X-memory at the same address, with the less significant bits in Y-memory. It appears to the host computer as two 16-bit registers at consecutive even addresses, with the less significant bits at the lower address.If there is no DPRAM, the image word will be in an otherwise unused long register in PMAC’s memory. There are several places to find unused registers. There are sixteen open registers that are set to zero automatically on power-up at PMAC addresses $0770 to $077F. There are sixteen more open registers whose values are held when power is off at PMAC addresses $07F0 to $07FF.Last revision: 7/24/93 Application NoteIn addition, it is possible to use the registers of otherwise unused P and Q-Variables for this purpose.These registers should be accessed with fixed-point M-Variables, not floating-point P or Q-Variables. Along fixed-point register in PMAC’s internal memory is defined by the D format of M-Variable (e.g.M61->D:$07F0). This is a 48-bit register — only the low 32-bits will be used. The low 24-bits of the I/Owill be in Y-memory and the high eight bits of the I/O will be in the low eight bits of X-memory.When working with the Acc-34x I/O with this method of using fixed-point image variables, the only software overhead is the actual copying between image and I/O. Including program interpretation time,this amounts to about 100 microseconds per 32-bit word. Aside from this, working with the I/O throughthe image words is at least as fast as direct (parallel) PMAC I/O. Of course, there is a potential latency ofa full PLC scan on the actual I/O which must be respected.Example:The following example illustrates the concept of this method of working with Acc-34x I/O. It is a bit unrealistic, because it shows the image variables both in DPRAM and several places in internal memory.In a real application, a single location range would probably be chosen.Setup and DefinitionsActual Acc-34 I/O WordsM1000->TWS:0 ;First side of first Acc-34x board ; an input hereM1002->TWS:4 ;Second side of first Acc-34x board; an output hereM1004->TWS:8 ; First side of second Acc-34x board; an input hereM1006->TWS:12 ; Second side of second Acc-34x board; an output here Image WordsM1001->DP:$D800 ;32-bit fixed-point DPRAM registerM1003->D:$0770 ;48-bit fixed-point register, set to zero on power-upM1005->D:$07F0 ;48-bit fixed-point register, value held thru power-down M1007->D:$13FF ; Register for P1023, treated as 48-bit fixed-point value Individual Pieces of Image WordsM100->Y:$D800,0 ; Least significant bit(bit 0) of first image wordM101->Y:$D800,1 ; Second bit (bit 1) of first image wordM115->Y:$D800,15 ; Bit 15 of first image wordM116->X:$D800,0 ; Bit 16 of first image wordM117->X:$D800,1...M131->X:$D800,15 ; Most significant bit (bit 31) of first image wordM300->Y:$0770,0 ; Least significant bit (bit 0) of second image wordM301->Y:$0770,1 ; Second bit (bit 1) of second image wordM323->Y:$0770,23 ; Bit 23 of second image wordM324->X:$0770,0 ; Bit 24 of second image wordM325->X:$0770,1 ; Bit 25 of second image word...M331->X:$0770,7 ; Most significant bit (bit 31) of second image wordM500->Y:$07F0,0 ; Least significant bit (bit 0) of third image wordM523->Y:$07F0,23 ; Bit 23 of third image wordM524->X:$07F0,0 ; Bit 24 of third image wordM531->X:$07F0,7 ; Most significant bit (bit 31) of third image wordM700->Y:$13FF,0 ; Least significant bit (bit 0) of fourth image wordM724->X:$13FF,0,8 ; Top eight bits (bits 24-31) of fourth image wordApplication Note Last revision: 7/24/93 ProgramsReset the PLC program that only runs once on power-up or reset OPEN PLC 1 CLEAR:M1003=0 ; Clear output image word to make sure all outputs offDittoM1007=0 ;...DISABLE PLC 1 ; To make sure this only runs once on power-up/reset CLOSEPLC program to copy the inputs into image words at beginning of each scan OPEN PLC 2 CLEAR:M1001=M1000 ; Copy first input word into its image registerM1005=M1004^$FFFFFFFF ; Copy second input word into its image register, inverting CLOSEPLC program that works with individual bits of image words OPEN PLC 3 CLEAR:IF (M100=1 AND M101=0 AND P43>50) M301=1ELSEM301=0 ENDIF ...CLOSEPLC program that copies image words to outputs at end of scan OPEN PLC 31 CLEAR:M1002=M1003 ; Copy first output image word to Acc-34xM1004=M1005^$FFFFFFFF ; Copy second output image word to Acc-34x, inverting。