下载文档原格式
SOM-TL6678核
说明：
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O=Outp
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PWR=Su
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voltag
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Ground
Document Versions 1.2
设计注意提示
1.Boot0--Boot12有初始化配置。
强烈建议参考提供的底板原理图进行底板
2.CPU有关CLK信号线（比如MMCSD0，SPI1_CLK等)已经串联22R电阻。
3.核心板的I2C总线已用2.2K电阻上拉至1.8V。
4.利用核心板进行设计底板时，请认真核对自己底板的核心板B2B连接器的信号引脚线序是否正确，连接参考我司提供的底板PCB图进行核对。
核心板同样的B2B物料,可以联系我司采购。
5.有关信号详细功能，请查看芯片datasheet。
6.强烈
建议使
用我司
默认使
用的
UART0串
口作为
软件调
7.本期间的通用接口为1.8V电平；请注意电平标准设计。
8.DSP_SPI_CS0信号在核心板用作NOR FLASH片选；请勿用作他用。
6678核心板B2B信号列表
2017.06.12
行底板设计。
板B2B连接器的信号引脚线序是否正确，连接器的摆放位置是否正确，请务必可以联系我司采购。
SOM-TL6678核心板B2B信号列表
EMIF
号列表。
Solaris8(SP ARC平台版本)7/01发行说明Sun Microsystems,Inc.901San Antonio RoadPalo Alto,CA94303-4900U.S.A.部件号码816-1236-102001年7月Copyright2001Sun Microsystems,Inc.901San Antonio Road,Palo Alto,California94303-4900U.S.A.版权所有。
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未经Sun及其授权者事先的书面许可，不得以任何形式、任何手段复制本产品及其文档的任何部分。
未经Sun及其授权者事先的书面许可，不得以任何形式、任何手段复制本产品及其文档的任何部分。
包括字体技术在内的第三方软件受Sun供应商的版权保护和许可证限制。
包括字体技术在内的第三方软件受Sun供应商的版权保护和许可证限制。
本产品的某些部分可能是从Berkeley BSD系统衍生出来的，并获得了加利福尼亚大学的许可。
本产品的某些部分可能是从Berkeley BSD系统衍生出来的，并获得了加利福尼亚大学的许可。
UNIX是通过X/Open Company,Ltd.在美国和其他国家独家获准注册的商标。
UNIX是通过X/Open Company,Ltd.在美国和其他国家独家获准注册的商标。
Sun、Sun Microsystems、Sun标志、、AnswerBook、AnswerBook2、Java,JDK,DiskSuite,JumpStart,HotJava,Solstice AdminSuite,Solstice AutoClient,SunOS,OpenWindows,XView,Solaris Management Console,JavaSpaces和Solaris是Sun Microsystems, Inc.在美国和其他国家的商标、注册商标或服务标记。
SPARC M8-8 and SPARC M7-8 Servers Getting Started GuideThis guide identifies where you can access the online documentation and summarizes the tasks required to install Oracle's SPARC M8-8 and SPARC M7-8 servers.Accessing DocumentationRefer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for detailed site planning and installation instructions, and refer to the SP ARC M8 and SP ARC M7 Servers Product Notes for any late-breaking issues that impact installation. The installation guide, product notes, and the rest of the server documentation are located at:■/goto/m8/docs■/goto/m7/docsThis web site also includes links to documentation for the software and firmware used with the server.The server includes the following printed documentation:■Server Rackmount Guide■Getting Started Guide (this document)■Important Safety Information for Oracle's Hardware Systems■License and entitlement documents for the preinstalled software and firmware Rackmounted and Stand-Alone ServersYou can order a server either factory-installed in an Oracle rack (rackmounted) or stand-alone.■If you ordered a rackmounted server, see “Rackmounted Server Installation Task Overview” on page 2 for the installation tasks.■If you ordered a stand-alone server, see “Stand-Alone Server Installation Task Overview” on page 3 for the installation tasks.While this guide summarizes the major tasks required to install both rackmounted and stand-alone servers, refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for the complete installation instructions. Rackmounted Server Installation Task OverviewExcept where noted, refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for instructions on performing the following site planning and installation tasks.1.Refer to the Important Safety Information for Oracle's Hardware Systems and the SP ARC M8-8 and SP ARCM7-8 Servers Safety and Compliance Guide to review the important safety and compliance information.2.Refer to the SP ARC M8 and SP ARC M7 Servers Security Guide to understand the security issues relevant toinstalling and operating the server.3.Refer to the SP ARC M8 and SP ARC M7 Servers Product Notes to review any known issues, workarounds, andlate-breaking news about the server and its software.4.Confirm that the installation site meets all power source, cooling, and physical space requirements.5.Prepare the required network addresses.6.Assemble the required tools and take electrostatic discharge (ESD) and safety precautions.7.Prepare the receiving area and access route to the installation site.8.Unpack the server from its shipping container by following the instructions that came with the server.9.Move and secure the server at the installation site.10.Install any optional components, such as PCIe cards, into the server.Refer to the SP ARC M8 and SP ARC M7 Servers Service Manual for specific instructions.11.Confirm that the facility power grids that will supply power to the server have circuit breakers and that thosecircuit breakers are set to off.12.Confirm that the power distribution unit (PDU) circuit breakers are set to off.13.Connect and manage all PDU power cords and data cables to the server.14.Connect serial cables between terminal devices and the SER MGT 0 ports on the two service processors (SPs).15.Connect network cables between your network and the NET MGT 0 ports on the two SPs.16.Switch on the facility power grid circuit breakers and the PDU circuit breakers to supply standby power to theserver.e Oracle Integrated Lights Out Manager (ILOM) commands to log in to the active SP through a serialconnection.18.Configure the SP network addresses and other SP settings using Oracle ILOM commands.19.Power on the server using Oracle ILOM commands.20.Either set up the preinstalled Oracle Solaris OS and software, or install the Oracle Solaris OS and software on anexternal storage device.Refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for more information.Stand-Alone Server Installation Task OverviewExcept where noted, refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for instructions on performing the following site planning and installation tasks.1.Refer to the Important Safety Information for Oracle's Hardware Systems and the SP ARC M8-8 and SP ARCM7-8 Server Safety and Compliance Guide to review the important safety and compliance information.2.Refer to the SP ARC M8 and SP ARC M7 Servers Security Guide to understand the security issues relevant toinstalling and operating the server.3.Refer to the SP ARC M8 and SP ARC M7 Servers Product Notes to review any known issues, workarounds, andlate-breaking news about the server and its software.4.Confirm that the installation site meets all power source, cooling, and physical space requirements.5.Confirm that your rack is compatible with the server.6.Prepare the required network addresses.7.Assemble the required tools and take electrostatic discharge (ESD) and safety precautions.8.Unpack the server from its shipping container.9.Install the stand-alone server in your rack.Refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide and the Server Rackmount Guide forinstructions.10.Install any optional components, such as PCIe cards, into the server.Refer to the SP ARC M8 and SP ARC M7 Servers Service Manual for specific instructions.11.Route, but do not connect, the server AC power cords within the rack.12.Connect serial cables between terminal devices and the SER MGT 0 ports on the two service processors (SPs).13.Connect network cables between your network and the NET MGT 0 ports on the two SPs.14.Connect the AC power cords to the server and to your facility's AC power source.e Oracle Integrated Lights Out Manager (ILOM) commands to log in to the active SP through a serialconnection.16.Configure the SP network addresses and other SP settings using Oracle ILOM commands.17.Power on the server using Oracle ILOM commands.18.Either set up the preinstalled Oracle Solaris OS and software, or install the Oracle Solaris OS and software on anexternal storage device.Refer to the SP ARC M8 and SP ARC M7 Servers Installation Guide for more information.Post-Installation TasksAfter installing and powering on the server for the first time, refer to the following documents for additional administration and configuration tasks. These documents and links are available online at:■/goto/m8/docs■/goto/m7/docsNo.Task Document or Link1.Check for the latest software updates and firmware versions.Note - Some server features are enabled only when certainversions of patches or firmware are installed. Install the latestavailable versions for the best performance, security, and stability.SP ARC M8 and SP ARC M7 Servers Product Notes https:///2.Perform additional setup and configuration tasks required for youroperating environment and applications.SP ARC M8 and SP ARC M7 Servers Administration Guide 3.Consider using Oracle virtualization software.Oracle VM Server for SPARC is a virtualization feature thatprovides the ability to create logical discrete groupings calledlogical domains. Each logical domain has its own OS, resources,and identity within a single computer system. You can run avariety of applications in different logical domains and keep themindependent for performance and security purposes.https:///en/virtualization/4.Consider using data center management software.Oracle Enterprise Manager Ops Center is a data centermanagement tool that provides many features, including acomprehensive configuration solution for software provisioning,hardware fault analysis, and performance management./en/enterprise-manager/ 5.If necessary, troubleshoot and isolate server hardware problems.SP ARC M8 and SP ARC M7 Servers Service ManualProduct Documentation LibraryDocumentation and resources for this product and related products are available at /goto/ m8/docs and /goto/m7/docs.Documentation AccessibilityFor information about Oracle's commitment to accessibility, visit the Oracle Accessibility Program web site at http: ///pls/topic/lookup?ctx=acc&id=docacc.Access to Oracle SupportOracle customers that have purchased support have access to electronic support through My Oracle Support. For information, visit /pls/topic/lookup?ctx=acc&id=info or visit http://www.oracle. com/pls/topic/lookup?ctx=acc&id=trs if you are hearing impaired.FeedbackProvide feedback on this document at /goto/docfeedback.Copyright © 2015, 2017, Oracle and/or its affiliates. All rights reserved.Copyright © 2015, 2017, Oracle et/ou ses affiliés. Tous droits réservés.Part No: E55221-03Mfg. No: 7350681September 2017。
1dc2708afDESCRIPTIONLTC7001Fast High VoltageHigh Side NMOS Static Switch DriverDemonstration circuit 2708A is a 135V, high side switch featuring the LTC ®7001. The demo board is designed to switch a 5A output load from 0V up to 135V. This board offers a low 50ns (typical) propagation delay, fast switching times (<10ns) and 100% duty cycle operation.The LTC7001 is a fast high voltage high side N-channel MOSFET driver . An internal charge pump fully enhances an external N-channel MOSF ET switch, allowing it to remain on indefinitely. A powerful gate driver can drive large gate capacitance MOSFETs with very short transition times, ideal for both high frequency switching and static switch applications. The LTC7001 operates over a 0V to 135V input supply range.The demo board includes input capacitors and an output diode to accommodate input and output supply induc-tance when switching loads. The switch can be controlled by providing an external signal on INPUT turret. The V CCL , L T , L TC, L TM, Linear Technology and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners.PERFORMANCE SUMMARYinput must be powered with an external power supply to provide power to the controller . Positions for RC delay network to control inrush current are also included.The LTC7001 data sheet gives a complete description of the part, operation and application information. The data sheet must be read in conjunction with this demo manual for demo circuit 2708A. Proper board layout is essential for maximum thermal and electrical performance. See the data sheet sections for details. The LTC7001 is available in 10-lead MSOP package and three operating junction temperature grades, extended and industrial from –40°C to 125°C, a high temp automotive version from –40°C to 150°C and a military grade version from –55°C to 150°C.Design files for this circuit board are available at http://www.linear .com/demo/DC2708ASpecifications are at T A = 25°CSYMBOL PARAMETER CONDITIONSMIN TYPMAX UNITSV IN Input Voltage 0135V I OUT Output Current 5A Insertion Drop V IN – V OUT , 5A Load, Input to Output Terminals115mV V CC Main Supply712V V CCUVV CC Undervoltage Lockout V CC Rising V CC Falling Hysteresis 6.5 5.87.0 6.4 0.67.5 6.9V V V Input to Output Propagation Delay V IN = 135V, 50Ω Load, INP = 2.2V to V OUT = 13.5V 50ns Output Rise TimeV IN = 135V, 50Ω Load, 10% to 90%6.5ns2dc2708afdirectly across the output capacitor as shown in Figure 2.1. With input power supply set to zero volt and power off, 2. 3. Set V CC V CC supply to V CC and GND.6. Connect a signal source across INPUT and GND. Apply a signal with 2.2V or higher will turn-on the high side switch.7. Check for the proper output voltage using a voltmeter. Output voltage should be close to input voltage.8. Once the proper output voltage is established, adjust the load.Figure 1. Proper Measurement Equipment SetupI SIGNALSOURCE3dc2708afQUICK START PROCEDURETYPICAL PERFORMANCE CHARATERISTICSFigure 2. Measuring Output Voltage During Switching across C5. Note that C5 May Not Be InstalledFigure 3. Rise Time into 50Ω Load (V IN = 135V, CH2 V INP 5V/DIV , CH3 V OUT 50V/DIV , 10ns/DIV)Figure 4. Board PhotoCHANNEL 2: INP CHANNEL 3: V OUT50Ω RESISTIVE LOADPARTS LISTITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components13C2, C3, C4CAP., 1μF, X7T, 250V, 1812TDK, C4532X7T2E105K250KA21C7CAP., 0.1μF, X7R, 25V, 10%, 0805AVX, 08053C104KAT2A31C8CAP., 1μF, X7R, 25V,10%, 0805AVX, 08053C105KAT2A41D1DIODE, ES1PD, 200V, 1A, DO-220AA VISHAY, ES1PD-M3/84A51Q1MOSFET, N-CH, 150V, POWERPAK-SO-8FAIRCHILD, FDMS8625061R3RES., 10Ω, 1/10W, 1%, 0603VISHAY, CRCW060310R0FKEA71R4RES., 0Ω, 1/10W, 0805VISHAY CRCW08050000Z0EA81U1IC, LTC7001EMSE, MSE-10LINEAR TECH., LTC7001EMSE#PBF Additional Demo Board Circuit Components11C1CAP., 22μF, ALUM, 160V, 20%,10mm × 12.5mm SUN ELECT., 160ME22HPC20C5CAP., OPTIONAL, 1812OPTIONAL30C6CAP., OPTIONAL, 0603OPTIONAL40C9CAP., OPTIONAL, 1206OPTIONAL50D2DIODE OPTIONAL, POWERDI5OPTIONAL61D3DIODE, OPTIONAL, SOT23OPTIONAL70D4DIODE, OPTIONAL, SOT23OPTIONAL80Q2MOSFET, OPTIONAL, D2-PAK OPTIONAL90Q3MOSFET, OPTIONAL, POWERPAK-SO-8OPTIONAL101R1RES., SENSE, 0Ω, 1/2W, 1%, 1225TEPRO, RN5326110R2, R9RES., OPTIONAL, 0805OPTIONAL123R5, R6, R7RES., 0Ω, 1/10W, 0603VISHAY CRCW06030000Z0EA130R8, R10, R11, R12RES., OPTIONAL, 0603OPTIONALHardware: For Demo Board Only17E1–E7TESTPOINT, TURRET 0.094"MILL MAX 2501-2-00-80-00-00-07-0 24MTGS. @ 4 CORNERS STAND-OFF, NYLON 0.559" TALL WURTH ELEKTRONIK, 702935500 31PCB, DC2708A DEMO CIRCUIT 2708A4dc2708af5dc2708afInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.SCHEMATIC DIAGRAMDEMONSTRATION BOARD IMPORTANT NOTICELinear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.).No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged.This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer.Mailing Address:Linear Technology1630 McCarthy Blvd.Milpitas, CA 95035Copyright © 2004, Linear Technology Corporation。
2014Revision History目录1 开发板简介 (4)2 产品特点 (7)3 典型运用领域 (8)4 软硬件参数 (8)5 拓展IO引脚定义 (11)6 技术支持和开发资料 (13)7 核心板电气特性 (19)8 机械尺寸图 (20)9 核心板订购型号 (21)10 开发板套件清单 (21)11 相关产品列表 (22)12 增值服务 (23)1 开发板简介TL6748F-EasyEVM是一款基于广州创龙TI C6000浮点DSP C6748+Xilinx Spartn-6 FPGA核心板SOM-TL6748F设计的开发板，它为用户提供了SOM-TL6748F核心板的测试平台，用于快速评估SOM-TL6748F核心板的整体性能。
TL6748F-EasyEVM底板采用沉金无铅工艺的四层板设计，不仅为客户提供参考底板原理图、系统驱动源码、DSP C6748和Xilinx Spartan-6 FPGA入门教程、丰富的Demo 程序、完整的软件开发包，以及详细的DSP+FPGA系统开发文档，还协助客户进行底板的开发，提供长期、全面的技术支持，帮助客户以最快的速度进行产品的二次开发，实现产品的快速上市。
图 1 TL6748F-EasyEVM正面1图 2 TL6748F-EasyEVM正面2图 3 TL6748F-EasyEVM斜视图图4 TL6748F-EasyEVM侧视1图5 TL6748F-EasyEVM侧视2图6 TL6748F-EasyEVM侧视3图7 TL6748F-EasyEVM侧视4由广州创龙自主研发的SOM-TL6748F是全国最小的C6000系列浮点DSPC6748+Xilinx Spartan-6 FPGA工业级核心板，66mm*38.6mm，功耗小、成本低、性价比高。
采用沉金无铅工艺的八层板设计，专业的PCB Layout保证信号完整性的同时，经过严格的质量控制，标配工业级，满足工业环境应用。
投标商售后服务的要求1、投标商应在马鞍山市区有分公司或设服务站点，并在投标文件中列明。
2、全天提供技术服务热线，负责解答用户在设备使用中遇到的问题，并及时提出解决问题的建议和操作方法。
如在电话中不能解决，应安排工程师在2个工作日内提供上门服务。
3、对所有采购硬件提供三年免费上门保修服务，并承诺服务器故障48小时内修复。
如不能在72小时内排除，应提供免费备用服务器。
供货后三个月设备内发生故障，调换同型号同规格的产品。
一年内发生2次硬件故障经维修后仍然不能正常使用，免费更换同型号同规格的产品。
各投标商要对所有设备制定详细的售后服务承诺并写入投标书。
4、中标单位要负责对花山区法院现有的弱电设备进行日常维护。
附件：工程量清单序号设备名称技术参数数量单位品牌备注1上网行为审计系统多维绿网NgN日志审计组件-神州数码上网行为日志系统 V1.0 (200)。
1U机架式，4个千兆电口。
可实现网站访问、BBS/留言、网络游戏、下载、各种股票流量、即时消息、邮件等的分析记录与控制管理1套神州数码提供原厂商授权文件、原厂商3年质保承诺、提供所报品牌型号及技术参数经原厂商加盖公章确认的证明文件2防火墙采用多核处理器的纯硬件架构（非X86）/千兆电口≥8/吞吐量≥2G/新建连接数≥34,000/支持IPV6，并提供IPV6第二阶段金牌认证/内置防ARP攻击客户端，可自动分发全网/支持802.3ad 链路聚合功能，可利用多条pppoe链路组建低成本高带宽链路。
2台神州数码提供原厂商授权文件、原厂商3年质保承诺、提供所报品牌型号及技术参数经原厂商加盖公章确认的证明文件、提供软件著作权登记证、公安部销售许可证、国家保密局涉秘信息系统检测证书。
3中小企业杀毒服务器端NetWare,Windows NT/2000/2003 Server*支持x86_32*64位CPU*Red Hat Enterprise Linux 4.0 (AS, ES, WS, Desktop) (i686 and x86_64)*Red Hat Enterprise Linux 5 (Server or Desktop) (i686 and x86_64)*SUSE(TM) Linux Enterprise 10 (Server or Desktop) (i686 and x86_64) (i686 and x86_64)都可应用1套趋势4中小企业杀毒客户端网络安全版，暂定100客户端，可扩展1套美国趋势5服务器HP ProLiant DL380R05 CTO机架式机箱，HP E5420 DL380G5四核处理器，4G内存（HP 2GB FBD PC2-5300 2x1GB Kit 内存*2），250GB 5.4K SATA 2.5"热插拔硬盘，Smart Array E200 / 128MB 高速缓存(支持RAID 0,1,5,0+1；两个内部接口)，超薄DVD-ROM Drive (8X/24X) 驱动器，共8个内存插槽,支持4:1和2:1交错,支持内存镜象和在线备用,集成双NC373i多功能千兆网卡,带TCP/IP Offload引擎, 通过可选的许可证可实现加速iSCSI，集成iLO 2远程管理,五个PCI-Express 扩展槽:3个x4 PCI Express, 2个x8 PCI Express, 8个小尺寸热插拔SAS/SATA硬盘槽位，1个1000W热插拔电源，可选冗余,热插拔冗余风扇,支持CD-ROM、DVD-ROM、DVD/CD-RW Combo、DVD+RW或软驱,2U机架式1台HP6服务器操作系统Win2003server中文标准版5用户，X86，支持硬件cpu32位，支持4G内存，支持1~4个cpu1套美国微软7服务器机柜2米高加宽数据机柜870*1270*2085弧形高密度六角网孔前门（专利）、波浪形高密度六角网孔后门。
5747839-4PCB D-Sub Connectors, Receptacle, Board-to-Board, 37 Position, 2.74mm [.108in]Centerline, 2 Row, Row-to-Row Spacing 2.84 mm [.112 in]08/27/2020 01:27AM | Page 1 For support call+1 800 522 6752Connectors>D-Shaped Connectors>D-Sub Connectors>PCB D-Sub ConnectorsNumber of Rows:2Centerline (Pitch): 2.74 mm [ .108 in ]Number of Positions:37Connector System:Board-to-BoardConnector & Housing Type:ReceptacleFeaturesProduct Type FeaturesGrounding Indents WithoutGrounded NoGrounding Straps WithFootprint14.99 mm[.59 in]Shell Type Front Metal ShellConnector & Housing Type ReceptacleConnector System Board-to-BoardD-Sub Shell Size4Sealable NoConnector & Contact Terminates To Printed Circuit BoardShielded NoProduct Type ConnectorConfiguration FeaturesNumber of Positions37Number of Rows2PCB Mount Orientation Right AnglePreloaded YesBody FeaturesEyelet Material Brass5747839-4 ACTIVEAMPLIMITETE Internal #:5747839-4PCB D-Sub Connectors, Receptacle, Board-to-Board, 37 Position,2.74mm [.108in] Centerline, 2 Row, Row-to-Row Spacing 2.84 mm [.112 in]View on >Eyelet Material BrassEyelet Plating Material TinPlastic NoInsert Material ZincConnector Profile StandardShell Plating Material TinShell Material Carbon SteelPost Size.66 mm[.026 in]Contact FeaturesContact Mating Area Plating Material GoldContact Underplating Material NickelPCB Contact Termination Area Plating Material TinContact Base Material Phosphor BronzeContact Shape & Form RoundContact Current Rating (Max) 6 A30 µinTermination FeaturesGrounding Clips WithoutTermination Method to Printed Circuit Board Through Hole - SolderTermination Post Length 3.18 mm[.125 in]Mechanical AttachmentThreaded Insert Material ZincThreaded Insert Plating Material Clear ChromatePanel Mount Feature WithoutPCB Mount Retention WithPCB Mount Retention Type BoardlockMating Retention WithMating Retention Type Threaded Inserts, 4-40 UNCConnector Mounting Type Board MountBoardlock Plating Material TinBoardlock Material Copper AlloyMounting Hole Diameter 3.18 mm[.125 in]Housing Features08/27/2020 01:27AM | Page 2 For support call+1 800 522 6752Housing FeaturesCenterline (Pitch) 2.74 mm[.108 in]Housing Material Nylon GF, Polyester GFHousing Color BlackDimensionsRow-to-Row Spacing 2.84 mm[.112 in]PCB Thickness (Recommended) 1.57 mm[.062 in]Usage ConditionsOperating Temperature Range-55 – 105 °C[-67 – 221 °F]Operation/ApplicationCircuit Application SignalIndustry StandardsUL Flammability Rating UL 94V-0Packaging FeaturesPackaging Method TubePackaging Quantity7OtherComment All receptacles are preloaded with size 20DF posted socket contactsProduct ComplianceFor compliance documentation, visit the product page on >EU RoHS Directive 2011/65/EU CompliantEU ELV Directive 2000/53/EC CompliantChina RoHS 2 Directive MIIT Order No 32, 2016No Restricted Materials Above ThresholdEU REACH Regulation (EC) No. 1907/2006Current ECHA Candidate List: JUN 2020(209)Candidate List Declared Against: JUL 2019(201)Does not contain REACH SVHCHalogen Content Not Low Halogen - contains Br or Cl > 900ppm.Solder Process Capability Wave solder capable to 265°CProduct Compliance DisclaimerThis information is provided based on reasonable inquiry of our suppliers and represents our current actual knowledge08/27/2020 01:27AM | Page 3 For support call+1 800 522 675208/27/2020 01:27AM | Page 4For support call+1 800 522 6752This information is provided based on reasonable inquiry of our suppliers and represents our current actual knowledge based on the information they provided. This information is subject to change. The part numbers that TE has identified as EU RoHS compliant have a maximum concentration of 0.1% by weight in homogenous materials for lead, hexavalent chromium, mercury, PBB, PBDE, DBP, BBP, DEHP, DIBP, and 0.01% for cadmium, or qualify for an exemption to these limits as defined in the Annexes of Directive 2011/65/EU (RoHS2). Finished electrical and electronic equipment products will be CE marked as required by Directive 2011/65/EU. Components may not be CE marked. Additionally, the part numbers that TE has identified as EU ELV compliant have a maximum concentration of 0.1% by weight in homogenous materials for lead, hexavalent chromium, and mercury, and 0.01% for cadmium, or qualify for an exemption to these limits as defined in the Annexes of Directive 2000/53/EC (ELV). Regarding the REACH Regulation, the information TE provides on SVHC in articles for this part number is based on the latest European Chemicals Agency (ECHA) ‘Guidance on requirements for substances in articles’ posted at this URL: https://echa.europa.eu/guidance-documents/guidance-on-reachTE Model / Part #1624254-2SL1 R022 1% TAPEDTE Model / Part #536407-5048 EURO TYPE C PIN BL ASSYTE Model / Part #5205738-125 RCPT SP/MS STDTE Model / Part #1-117169-3CARD GUIDE ECON ITE Model / Part #1-747950-4KIT,PLUG,37P,HDE,SHLD ENCLSRETE Model / Part #206509-1SIZE 20 KEYING PLUGTE Model / Part #1-747950-5KIT,PLUG,37P,HDE,SHLD ENCLSRETE Model / Part #1-745498-537 HDE MS PLUG,22-26,LEAD FREETE Model / Part #1658613-137 POS HDF PLUG, MS, LEAD FREETE Model / Part #1658608-137 POS HDF PLUG, MS, LEAD FREETE Model / Part #1-745498-6PLUG ASSY,37P,HDE,MSCompatible PartsCustomers Also Bought08/27/2020 01:27AM | Page 5For support call+1 800 522 6752TE Model / Part #5-1617542-9JMGAC-12L=M39016/17-034LTE Model / Part #745072-215 PLUG SP/AP SCRLKTE Model / Part #1059765-1OSP PLUG TORQUE TOOL HD.ASBYTE Model / Part #1-103638-920 MTE HDR SRST LATCH .100CLTE Model / Part #861257-1RECEPTACLETE Model / Part #1-102972-010 MODII HDR SRST B/A .100CLDocumentsProduct Drawings37 MSFL RCPT RA 590 (IN,FM,BL)English CAD Files3D PDF3DCustomer View ModelENG_CVM_CVM_5747839-4_A.2d_dxf.zipEnglishCustomer View ModelENG_CVM_CVM_5747839-4_A.3d_igs.zipEnglishCustomer View ModelENG_CVM_CVM_5747839-4_A.3d_stp.zipEnglishBy downloading the CAD file I accept and agree to the of use.Terms and Conditions Datasheets & Catalog PagesAMPLIMITE Subminiature D Connectors - Right-Angle Posted ConnectorsEnglishProduct SpecificationsApplication SpecificationEnglishInstruction SheetsInstruction Sheet (U.S.)EnglishEnglishAgency ApprovalsUL ReportEnglish08/27/2020 01:27AM | Page 6 For support call+1 800 522 6752。
KSZ8863MLL/FLL/RLLEvaluation Board User’s GuideKSZ8863MLL/FLL/RLL Integrated 3-Port 10/100 Managed Switch with PHYsRevision 1.1 January 2011© Micrel, Inc. 2011All rights reservedMicrel is a registered trademark of Micrel and its subsidiaries in theUnited States and certain other countries. All other trademarks are theproperty of their respective owners.The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury.Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user.A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's ownrisk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.Revision HistoryRevision Date Summary of Changes1.0 07/15/09 Initial Release1.1 01/11/11 Update description.Micrel, Inc. January 11, 2011Table of Contents1.0Introduction (4)2.0Board Features (4)3.0Evaluation Kit Contents (4)4.0Hardware Description (4)4.1Strap In Mode (5)4.1.1Feature Setting Jumpers (6)4.2I2C Master (EEPROM) Mode (7)4.3SPI Slave Mode (8)4.410/100 Ethernet PHY Ports (KSZ8863MLL/RLL) (9)4.5100FX Fiber Port (KSZ8863FLL) (9)4.6LED Indicators (9)4.7MII Port Configuration (KSZ8863MLL/FLL) (9)4.8RMII Port Configuration (KSZ8863RLL) (9)5.0Reference Documents (10)List of TablesTable 1: Feature Setting Jumpers (6)Table 2: Reserved Jumpers (6)Table 3: EEPROM Mode Settings (8)Table 4: SPI Slave Mode Settings (8)Table 5: LED Modes (9)Table 6: RMII Clock Setting (10)List of FiguresFigure 1: KSZ8863MLL/FLL/RLL Evaluation Board Block Diagram (5)Micrel, Inc. January 11, 20111.0 IntroductionThe KSZ8863MLL/FLL/RLL is Micrel’s third generation fully integrated 3-port switch. The two PHY units of KSZ8863MLL/RLL support 10BASE-T and 100BASE-TX. The KSZ8863FLL supports 100BASE-FX. The devices have been designed for cost sensitive systems, however, still offer a multitude of features, such as switch management, port and tag based VLAN, QoS priority, one MII interfaces and CPU control and data interfaces.The KSZ8863MLL/FLL/RLL is an excellent choice for VoIP Phone, Set-top/Game Box, SOHO Residential Gateway, industrial Ethernet systems and as a standalone 3-port switch.The KSZ8863MLL/FLL/RLL Evaluation Board provides a convenient means to evaluate the KSZ8863MLL/FLL/RLL’s rich feature set. Easy access is provided to all of the KSZ8863MLL/FLL/RLL pins, with jumpers and interface connectors allowing quick configuration and re-configuration of the board. MIIM, EEPROM programming, SPI emulation software are also provided to access the more extensive features of the KSZ8863MLL/FLL/RLL, via a PC USB port.2.0 Board Features•Micrel’s KSZ8863MLL/FLL/RLL Integrated 3-Port 10/100 Managed Ethernet Switch•Two RJ-45 Jacks for Ethernet LAN Interfaces with corresponding Isolation Magnetics (KSZ98863MLL/RLL)•Auto MDI/MDI-X on the PHY port• 1 PHY Mode and 1 MAC Mode MII Connector for the Switch RMII/MII Interface• 2 100Base-FX fiber interface(KSZ8863FLL)• 1 USB port to emulate an MIIM, EEPROM, SPI Interface•On board EEPROM• 2 LEDs per port to Indicate the Status and Activity of the RJ45 port• 1 power jack for 5VDC Universal Power Supply3.0 Evaluation Kit ContentsThe KSZ8863MLL/FLL/RLL Evaluation kit includes the following:•KSZ8863MLL/FLL/RLL Evaluation Board Revision 1.0•KSZ8863MLL/FLL/RLL Evaluation Board User’s Guide•Micrel Switch Configuration Software Version 1.0.5•Micrel Switch Configuration Software User Guide•KSZ8863MLL/FLL/RLL Evaluation Board Schematic Revision 1.0(Contact your Micrel FAE for the latest schematic)Note: USB cable and 5V DC Wall Power Supply is not included in the design kit (the dimension of the output plug of 5V DC wall power supply is 2.5x5.5x9.5mm or 0.1x0.218x0.375inch)4.0 Hardware DescriptionThe KSZ8863MLL/FLL/RLL Evaluation Board is in a compact form factor and can sit on a bench near a computer. There are three options for configuration: strap in mode, EEPROM mode, and SPI mode. Strap in mode configuration is easily done with on board jumper options. EEPROM mode and SPI mode are accomplished through a built in USB port interface. With the Micrel software and your PC, you can use the USB port to reprogram the EEPROM on board, or use the SPI interface to access the KSZ8863MLL/FLL/RLL’s full feature set. The board also features oneMicrel, Inc. January 11, 2011MII connector for the Switch MII interface. It is to facilitate connection from the switch to either the external CPU or the external PHY.Figure 1: KSZ8863MLL/FLL/RLL Evaluation Board Block DiagramThe KSZ8863MLL/FLL/RLL evaluation board is easy to use. There are programmable LED indicators for link and activity on the PHY ports and a power LED. A manual reset button allows the user to reset the board without removing the power plug. The 5V power on the board can be supplied by a standard 5VDC power supply (close pin 1-2 of JP400 jumper) or by the USB cable (close pin 2-3 of JP400 jumper) which is used to access the registers in SPI mode. A standard 5VDC power supply is included so that the user can supply power from any 110 Volt AC wall or bench socket. Before to start to use the evaluation board, make sure the power connectors JP403, JP404, JP405, JP406 and JP31 are connected, and close pin 1-2 of J14.4.1 Strap in ModeStrap in configuration mode is the quickest and easiest way to get started. In this mode, the KSZ8863MLL/FLL/RLL acts as a standalone 3-port switch. Simply set the board’s configuration jumpers to the desired settings and apply power to the board. The configuration can be changed while power is applied to the board by changing the jumper settings and pressing the convenient manual reset button for the new settings to take effect. Note that even if no external strap in values are set, internal pull up and pull down resistors will set the KSZ8863MLL/FLL/RLL default configuration. Section 4.1.1 covers each jumper on the board and describes its function. To start in strap in configuration mode, make sure that the USB cable is unplugged, JP34, JP35, JP3and JP9 are connected, JP21, JP25 have jumpers fitted between pins 2 to 3.Micrel, Inc. January 11, 20114.1.1 Feature Setting JumpersThe evaluation board provides jumpers to allow easy setting of strap in configurations for the KSZ8863MLL/FLL/RLL. Table 1 describes the jumpers and their functionalities.Table 1: Feature Setting JumpersOPEN CLOSED JUMPER KSZ8863MLL/FLL/RLLSIGNALJP3 SPIQ SPI EEPROMJP25 P2LED0 EEPROM/SPI Setting. See Section 4.2 and 4.3JP21 P2LED1 EEPROM/SPI Setting. See Section 4.2 and 4.3JP78 FXSD1 Pins 1-2 closed : Disable FEF feature of FX.Pins 5-6 closed : Force port 1 TX modeFor KSZ8863MLL/RLL, close 5-6 since this devicedoesn’t support FX mode.For KSZ8863FLL, open JP77JP77 FXSD2 Pins 1-2 closed : Disable FEF feature of FX.Pins 5-6 closed : Force port 1 TX modeFor KSZ8863MLL/RLL, close 5-6 since this devicedoesn’t support FX mode.For KSZ8863FLL, open JP77JP2 PWRDN Normal Operation KSZ8863MLL/FLL/RLLChip Power DownJP101 SPIQ (P1FFC) Pull Down = DisablePull Up(default) = EnableJP102 SMRXDV3(P1DPX) Pull Down = Half DuplexPull Up(default) = Full DuplexJP103 P1LED1(P1SPD) Pull Down = 10BTPull Up(default) = 100BTJP104 P1LED0(P1ANEN) Pull Down(default) = DisablePull Up = EnableJP201 SMRXD30(P2FFC) Pull Down = DisablePull Up(default) = EnableJP202 SMRXD31(P2DPX) Pull Down = Half DuplexPull Up(default) = Full DuplexJP203 SMRXD32(P2SPD) Pull Down = 10BTPull Up(default) = 100BTJP204 SMRXD33(P2ANEN) Pull Down = DisablePull Up(default) = EnableNote: JP101, JP102, JP103, JP201, JP202, JP203 are only valid if Auto-Negotiation is disabled. The following table shows the recommended settings for the evaluation board reserved jumpers.JUMPER Description Recommended Setting JP30 3.3V Biased of transformerCenter (For test only)OpenJP11 Power for Fiber Module.(Port 2) KSZ8863MLL/RLL: Open For KSZ8863FLL:Close pin 1-2 for 3.3V Fiber Module.Close pin 3-2 for 5.0V Fiber Module.JP10 Power for Fiber Module.(Port 1) KSZ8863MLL/RLL: Open For KSZ8863FLL:Close pin 1-2 for 3.3V Fiber Module.Close pin 3-2 for 5.0V Fiber Module.JP28 REFCLKO3 enable. KSZ8863MLL/FLL: OpenKSZ8863RLL:Close pin 1-2: Enable REFCLKOClose pin 2-3: Disable REFCLKO4.2 I2C Master (EEPROM) ModeThe evaluation board has an EEPROM to allow the user to explore more extensive capabilities of the KSZ8863MLL/FLL/RLL. The user can conveniently program the EEPROM on board using the USB port from any computer with a WIN 2000/XP environment and the Micrel provided software. This makes it easy for the user to evaluate features like “broadcast storm protection” and “rate control”.To prepare the KSZ8863MLL/FLL/RLL evaluation board for EEPROM configuration follow these steps:1. Install the Micrel Switch Configuration Software to your computer.2. Set JP3, JP9, JP21, JP25, JP34 and JP35 as specified in Table 3 for EEPROM modeconfiguration. Make sure that the EEPROM is installed on the board.3.Connect the computer’s USB port to the KSZ8863MLL/FLL/RLL board with aUSB port cable.4. There are two way to power up the evaluation board:a). Connect the 5 VDC power supply to the KSZ8863MLL/FLL/RLL when JP400pin1-2 is closed.b). 5 VDC power source from the USB port when JP400 pin 2-3 is closed.5. The KSZ8863MLL/FLL/RLL will power up in its default configuration if there is noinformation in the EEPROM.6. Click the software icon to invoke the software to program the desired settings into theEEPROM. See the Micrel Switch Configuration Software User Guide for details.7. Press the manual reset button. The KSZ8863MLL/FLL/RLL will reset and read the newconfiguration in the EEPROM. After reset, the KSZ8863MLL/FLL/RLL is ready for normal operation.Micrel, Inc. January 11, 2011Table 3: EEPROM Mode SettingsJumper Description SettingJP9 SPIQ ClosedJP3 SCL_MDC_SW ClosedJP34 SCL_MDC ClosedJP35 SDA_MDIO ClosedJP25 Serial Bus Config. (P2LED0) Pins 2-3 closedJP21 Serial Bus Config. (P2LED1) Pins 2-3 closed4.3 SPI Slave ModeFrom SPI interface to the KSZ8863MLL/FLL/RLL, use a USB to SPI converter that allows accessing all of the KSZ8863MLL/FLL/RLL features and registers. The user can easily access the SPI interface using a computer connected to the evaluation board’s USB port interface. Micrel provides a Windows 2000/XP based program for the user to evaluate the KSZ8863MLL/FLL/RLL’s full feature set. In addition to all the registers available via EEPROM programming, a host CPU connected to theKSZ8863MLL/FLL/RLL’s SPI interface will be able to access all static MAC entries, the VLAN table, dynamic MAC address table and the MIB counters.To prepare the KSZ8863MLL/FLL/RLL evaluation board for SPI modeconfiguration follow these steps:1. Install the Micrel Switch Configuration Software on your computer.2. Set JP3, JP9, JP21, JP25, JP34 and JP35 as specified in Table 4 for SPI modeconfiguration.Table 4: SPI Slave Mode SettingsJumper Description SettingJP9 SPIQ OpenJP3 SCL_MDC_SW OpenJP34 SCL_MDC ClosedJP35 SDA_MDIO ClosedJP25 Serial Bus Config. (P2LED0) Pins 2-3 closedJP21 Serial Bus Config. (P2LED1) Pins 1-2 closed3.Connect the computer’s USB port to the KSZ8863MLL/FLL/RLL board with aUSB port cable.4.There are two way to power up the evaluation board:a). Connect the 5 VDC power supply to the KSZ8863MLL/FLL/RLL when JP400pin1-2 is closed.b). 5 VDC power source from the USB port when JP400 pin 2-3 is closed.5.The KSZ8863MLL/FLL/RLL will power up in its default configuration6.Click the software icon to invoke the software to program the desired settings. Micrel, Inc. January 11, 2011See the Micrel Switch Configuration Software User Guide for details.4.4 10/100 Ethernet PHY Ports (KSZ8863MLL/RLL)There are two 10/100 Ethernet PHY ports on the KSZ8863MLL/RLL evaluation board. The ports can be connected to an Ethernet traffic generator or analyzer via standard RJ-45 connectors using CAT-5 cables. Each port can be used as either an uplink or downlink. Both ports support auto MDI/MDI-X, eliminating the need for cross over cables.4.5 100FX Fiber Port (KSZ8863FLL)There are two 100FX PHY ports on the KSZ8863FLL evaluation board. The ports can be connected to an Ethernet traffic generator or analyzer via fiber transceiver and fiber cable. The fiber signal threshold can be set by register 192 bit 6(Port1) and bit 7(Port2). If the bits are 1, the threshold will be set to 2.0V, Otherwise it is 1.25V.The resister R76 also need to be adjusted if the FXSD signal value from the fiber module doesn’t meet the fiber signal threshold spec.4.6 LED IndicatorsThere is one column of LED indicator for one column for port 2. The LED indicators are programmable to three different modes. LED mode is selected through register 195 bit [5:4] setting. The LED mode definitions are specified in Table 5. See Figure 1 for the LEDs’ orientation on the KSZ8863MLL/FLL/RLL evaluation board.Table 5: LED ModesRegister 195 Bit[5:4]00 01 10 11PxLED1 = Speed PxLED1 = Active PxLED1 = Duplex PxLED1 = Duplex PxLED0 = Link/Active PxLED0 = Link PxLED0 = Link/Active PxLED0 = LinkThe KSZ8863MLL/FLL/RLL evaluation board provides two LEDs (PxLED1, PxLED0) for each PHY port.The KSZ8863MLL/FLL/RLL evaluation board also has a power LED (D3) for the 3.3V power supply. When D3 is lit, the board’s 3.3V power supply is “on”.4.7 MII Port Configuration (KSZ8863MLL/FLL)The evaluation board provides access to the KSZ8863MLL/FLL/RLL’s third MAC via the MII port interfaces. The MAC can be configured to MII PHY mode and MII MAC mode via register 53 bit 7. The default of the bit is 0 for MII PHY mode.In MII PHY mode, the MII transmit and receive signals will be on J3, the male MII port connectors. This mode is usually used to connect the KSZ8863MLL/FLL/RLL to an external MAC processor. In MII MAC mode, the MII transmit and receive signals will be on J4, the female MII port connector. This interface is normally used to connect the KSZ8863MLL/FLL/RLL to an external PHY, for example the Micrel KSZ8041NL.4.8 RMII Port Configuration (KSZ8863RLL)In RMII interface, the 50MHz reference clock can be provide by the KSZ8863RLL or by the link partner. When pin 1-2 of JP28 is closed, the reference clock will be output from REFCLKO on Micrel, Inc. January 11, 2011Micrel, Inc. January 11, 2011KSZ8863RLL. Register 198 bit[3] is used to select internal or external reference clock for the KSZ8863RLL RMII interface. If pin 2-3 of JP28 is closed, the REFCLKO disable.Table 6: RMII Clock Setting5.0 Reference DocumentsKSZ8863MLL/FLL/RLL Datasheet Rev. 1.1 (Contact Micrel for latest Datasheet)KSZ8863MLL/FLL/RLL Evaluation Board Schematic Rev. 1.0 (Contact Micrel for latest Schematic)KSZ8863MLL/FLL/RLL Evaluation Board Gerber files Micrel Switch Configuration Software User GuideReg198[3] EN_REFCLKO_3 Clock Source NoteExternal 50MHz OSC input to REFCLKI_3EN_REFCLKO_3 = 0 to DisableREFCLKO_3 for better EMI0 1REFCLKO_3 Output Is Feedback to REFCLKI_3 EN_REFCLKO_3 = 1 to Enable REFCLKO_3 1 1Internal Clock SourceREFCLKI_3 is unconnected EN_REFCLKO_3 = 1 to Enable REFCLKO_3 1 0Not suggestMouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:M icrochip:KSZ8863FLL-EVAL KSZ8863MLL-EVAL。
TOTAL:2DRAWING （1）SPOT Ag THICKNESS ［局部D.Ag 厚度］:3.0～8.0μm AMF'7.323.A.2C36MM PLATING UNITMATERIAL[材料]：A194-F.H.NINGBO KANGQIANG ELECTRONICS CO.,LTDTHE NO: 1SOP8L-A8(60×60)LEADFRAME ［引线框架］SIGNER DATE REV NO.QTY DRAWN BY PROCESS CHK'D BY APPROVED BY STANDARD A M F '7.323.A .2C NOTE[技术要求]:1.DIMENSION QUADRANT IS SYMMETRICAL FOR ALL QUADRANTS EXCEPT OTHERWISE SHOWN. [除另有说明，所有象限的尺寸都是对称的。
]2.GENERAL TOLERANCE UNLESS OTHER SPECIFIED:±0.050. [未注尺寸公差为±0.050]3.RADIUS UNLESS OTHER SPECIFIED[未注圆角半径]: R0.127 MAX 4.VERTICAL BURR[垂直毛刺]: 0.025 MAX HORIZONTAL BURR[水平毛刺]: 0.051 MAX 5.MINIMUM LEAD SPACE[最小引线脚间隙]：0.10 MIN 6.LEAD TIP PLANARITY FROM DAM BAR [从中筋到引线内脚的平面度]：±0.1027.PAD FLATNESS[基岛平面度]：0.010/2.540 MAX 8.LEAD TIP FLAT WIDTH[引线内脚平面的宽度]：0.225 MIN 9.CAMBER[侧弯]：0.041 MAX ; COIL SET[卷弯]: 0.508 MAX CROSS BOW[横弯]: 0.254 MAX 10.PAD TILT[基岛倾斜]：0.051/2.540 MAX 11.PAD PLANARITY[基岛平面公差]：±0.10212.COINING DEPTH[精压深度]：0.038 MAX 13.LEAD TWIST[引线脚扭曲]：2.5°MAX 14.FRAME TWIST[引线框扭曲]：0.508 MAX 15.LEAD TILT[引线脚倾斜]：2.5°MAX 16.THE FOURTH DECIMAL PLACE IS USED FOR TOOLING REFERENCE ONLY.[第四位小数仅被用于开引线框架模具时参考的]17.PART TO BE FREE OF RUST,KINKS,BENDS,WRINKLES,SLUG OR TOOL MARKS,OR SCRATCHES DEEPER THAN 0.007. EXT LEAD SPANKING MARK IS IMPOSED 0.254 AWAY FROM DAM BAR. [产品铁锈、 纽绞、弯曲、皱纹、断裂或模具压痕或刮伤程度不超过0.007mm]18.SPOT SILVER,SEMI-BRIGHT.[局部点状镀银，半光亮]19.DIMENSIONS SHOWN FOR INTERNAL LEAD POSITIONS REPRESENT THAT AFTER STAMPING BUT BEFORE COINING [已标出的引线内脚位置的尺寸是冲压之后精压之前的尺寸]20.D/S TOOL MARK ON TIE BAR ONLY,WITH DEPTH [打弯压印,深度]≤0.05121.PLATING AREA[镀银区域]： MIN[最小]2.80×2.70 MAX[最大]3.30×3.1022.DIE PAD SIZE[装片区尺寸]： 1.524×1.524 （60×60）67.000065.600064.000063.000058.150055.000050.150049.625047.525047.000042.150039.000034.150031.000026.150025.625023.525023.000018.150015.000010.15007.0000 2.15001.40001.15000.0000 5.05000.00005.47505.98308.30009.350010.400014.900020.375020.883024.25001.5240±0.0250.40000.4000±0.0251.2700±0.02530°68.500065.400061.500057.600057.200055.885053.500049.400047.325045.500037.500029.500023.325021.500013.5000 5.5000 1.60000.61708.0000±0.0253.18001.90007.600011.720016.800022.5000R0.25001.5240Ø1.5240±0.025Ø1.000025.825049.825057.40005.35004.07001.27505.0750KQ 11ED100601马叶军2010-6-2TOTAL:2DRAWING （1）SPOT Ag THICKNESS ［局部D.Ag 厚度］:3.0～8.0μm AMF'7.323.A.2C36MM UNITMATERIAL[材料]：A194-F.H.NINGBO KANGQIANG ELECTRONICS CO.,LTDTHE NO: 2SOP8L-A8(60×60)LEADFRAME ［引线框架］SIGNER DATE REV NO.QTY DRAWN BY PROCESS CHK'D BY APPROVED BY STANDARD A M F '7.323.A .2C 70.0000±0.051256 PAD / STRIP 29.8000±0.02514.9000±0.0255.3500±0.0769.1500±0.07615*14.9±0.025=223.5000±0.051238.0000±0.102 3.17502.82751.6500 MAX PLATING 1.4000 MIN PLATING & COIN 0.00000.76202.52752.79503.22502.35002.4500 PKG.0.90000.15001.00001.5050 2.1350 1.45001.25000.96500.17700.12700.2500 1.5335 2.13501.9500 PKG.1.5500 MAX PLATING 1.3500 MIN PLATING & COIN 0.74000.42000.20000.00000.7620 1.60004.0000±0.102R0.150045°BURR SIDE [毛刺面]PLATING SIDE [电镀面]45°A A A-A 0.2030±0.0080.1650±0.0250.3450 MIN COIN 0.3100 MIN COINB B B-B 50:10.010~0.03860° 2.4500BURR SIDE [毛刺面] 1.00000.2500 1.9350KQ 11ED100601马叶军2010-6-2TOTAL:2DRAWING （1）SPOT Ag THICKNESS ［局部D.Ag 厚度］:3.0～8.0μm AMF'7.323.A.2C45MM PLATING UNITMATERIAL[材料]：A194-F.H.NINGBO KANGQIANG ELECTRONICS CO.,LTDTHE NO: 1SOP8L-B8(130×95)LEADFRAME ［引线框架］SIGNER DATE REV NO.QTY DRAWN BY PROCESS CHK'D BY APPROVED BY STANDARD A M F '7.323.A .2C NOTE[技术要求]:1.DIMENSION QUADRANT IS SYMMETRICAL FOR ALL QUADRANTS EXCEPT OTHERWISE SHOWN. [除另有说明，所有象限的尺寸都是对称的。
UNCBASCF Base BoardUser's Manual® Copyright 2003:Release of document:November 06, 2003Filename:UNCBASCF_0_UM.doc Author:Héctor Palacios Board Revision:UNCBASCF_0All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Sistemas Embebidos,S.A.PO Box 292528, 43229Columbus OH (USA) +1 888 546 9741Fax +1 888 546 9741*************** Kueferstrasse 8Breisach (Germany) +49 7667 908-0Fax +49 7667 908-200**************** www.fsforth.deCalvo Sotelo 1, 1º - Dcha Logroño (Spain)+34 941 270 060 Fax +34 941 237 770*********************UNCBASCF Base Board - User's Manual Table of Contents1.History (4)2.General (5)3.Features (5)4.Block Diagram of Base Board (6)5.Detailed Description (7)5.1.UNC20 Module (7)5.2.RS232 Serial Interface (8)5.2.1.Serial Port 1 (8)5.2.2.Serial Port 2 (9)5.3.Ethernet (9)pactFlash (10)pactFlash connector (11)5.4.4.Hard Disk (14)5.5.JTAG / Debugging (15)5.5.5.Parallel Port JTAG Adapter (16)5.5.6.JTAG Booster (16)5.5.7.ARM-standard JTAG Connector (17)5.6.Peripherals (17)5.6.8.Switches and LEDs (18)5.6.9.Access to UNC20 Pins (19)5.7.Power Supply and Reset (20)5.7.10.Voltage Requirements (20)6.UNC20 Connector (21)3UNCBASCF Base Board - User's Manual 41. History 2003-11-060.3Nigel James Release 2003-10-200.2Pedro Pérez de Heredia Revision 2003-10-170.1HéctorPalacios Initial versionUNCBASCF Base Board - User's Manual 2. GeneralThe UNCBASCF is a modified version of the standard UNC20 base board with support for CompactFlash cards.This document refers to the UNCBASCF_0 revision of the board. The board's name is printed on the PCB and can also be found on the label, above the serial number.3. FeaturesBase board which accommodates one UNC20 moduleEthernet interface with RJ45 connector with integrated link LED1 serial communication RS232 interfaceJTAG interfaceLEDs for Power, Hard Disk and Ethernet Link2 switches and 2 LEDs for use by applicationReset switchCPLD programmed for CompactFlash interfaceCompactFlash connector (type 2)5UNCBASCF Base Board - User's Manual 64.Block Diagram of Base BoardUNCBASCF Base Board - User's Manual 5. Detailed Description5.1. UNC20 ModuleThe UNC20 module is a cost-effective, highly integrated module in a 48-pin dual-inline package.The salient features of the UNC20 module, as delivered with the Developer’s Kit, are listed below:NetSilicon’s NS7520 microcontroller based on a 32-bit ARM7TDMI core16 Mbytes SDRAM8 Mbytes FlashEthernet interface2 serial communication interfacesI2C interfaceJTAG interfacePlease refer to the UNC20 User’s Manual for more details on this module.The pin-out for the UNC20 module can be found at the end of this manual.7UNCBASCF Base Board - User's Manual5.2. RS232 Serial InterfaceThe NS7520 provides two serial ports. Since these ports are multiplexed with the General Purpose I/O pins (ports A and C), it was decided only to assemble one serial port and leave the other for the user to configure.5.2.1. Serial Port 1Serial Port 1 can be used as a console port to communicate with a host PC.An RS232 driver, the MAX3320 from Maxim, is assembled on the base board. This driver guarantees baudrates up to 250kbps.This port will operate in asynchronous RS232 full-duplex mode. The RS232 port supports minimal hardware control signals, namely RTS and CTS only, and is derived from the UNC20 module’s Port C pins.A 9-pin D-type connector (male) is assembled on the base board.The pin allocation of the 9-pin D-type connector is as defined in the table below:Pin Function1N/C2RXD3TXD4N/C5GND6N/C7RTS8CTS9N/C8UNCBASCF Base Board - User's Manual If a serial console is not required, and the 4 PortC pins are required for GPIO, then the serial driver can be forced into an “off” state, meaning that the on-chip power supply is shut down, by connecting a jumper between pins 3 and 4 of J1.To disable the serial driver, the jumper has to be inserted.5.2.2. Serial Port 2Serial Port 2 is available on the UNC20 module’s Port A [0-7] pins, which are led out to the X6 connector (not assembled on the board), so that users can configure this port to suit their application.5.3. EthernetThe 10/100 Ethernet MAC controller and PHY are included on the UNC20 module.An RJ45 jack is used with a status LED for Link/Activity which is visible through a light pipe in the jack. A separate Pulse transformer is assembled.The pin allocation of the RJ45 connector is as defined in the table below:Pin Function1TD+2TD-3RD+9UNCBASCF Base Board - User's Manual104N/C 5N/C 6RD-7N/C 8N/C5.4. CompactFlashThe UNCBASCF is equipped with a type 2 CompactFlash card holder.The CompactFlash cards can be accessed using different hardware interface methods. Each one of these hardware interface methods has its own set of performance, cost and flexibility requirements. The choices are as follows:• True IDE Mode•Common Memory Mode•I/O Mapped ModeThe True IDE mode can only be used with CompactFlash storage cards, while the other modes allow the use of any kind of CompactFlash card (wireless, network, storage,…).A CPLD on the bottom side of the UNCBASCF base board has been programmed to implement PC card Common Memory and PC card I/O modes. The source code of the CPLD program is delivered with the UNC20 Developer's Kit with CompactFlash.Although the hardware is prepared for all available modes (True IDE, Common Memory and I/O) the CPLD has been factory programmed to handle only the Common Memory mode and IO modes. The CPLD of the UNCBASCF can be programmed for True IDE mode on demand.IMPORTANT NOTE: Jumper J4 is only used for True IDE mode. For normal use in Common Memory / IO modes, this jumper must be removed to avoid CPLD damage!IMPORTANT NOTE: Jumper J1/1-2 is only required when programming the Flash on the UNC20. In normal operation it should not be present, otherwise it is not possible to access the CompactFlash cards. IMPORTANT NOTE: Plug and play of CompactFlash cards is not supported! Never insert or remove your CompactFlash card while the target is powered on.5.4.3. CompactFlash connectorThe following table shows the functions of each pin of the CompactFlash connector, depending on the working mode:Pin TRUE IDE MEMORY I/O1GND GND GND2D19D19D193D20D20D204D21D21D215D22D22D226D23D23D237CS0#CE1#CE1#8GND A10A109ATA_SEL#OE#OE#10GND A9A911GND A8A81112GND A7A7 13VCC VCC VCC 14GND A6A6 15GND A5A5 16GND A4A4 17GND A3A3 18A2A2A2 19A1A1A1 20A0A0A0 21D16D16D16 22D17D17D17 23D18D18D18 24IOCS16#WP IOIS16# 25CD2#CD2#CD2# 26CD1#CD1#CD1# 27D27D27D27 28D28D28D28 29D29D29D29 30D30D30D30 31D31D31D31 32CS1#CE2#CE2# 33VS1#VS1#VS1# 34IORD#IORD#IORD# 35IOWR#IOWR#IOWR#1236VCC WE#WE#37READY INTRO IREQ38VCC VCC VCC39CSEL#GND GND40VS2#VS2#VS2#41RESET#RESET RESET42IORDY WAIT#WAIT#43NC INPACK#INPACK#44VCC REG#REG#45DASP#BVD2SPKR#46PDIAG#BVD1STSCHG#47D24D24D2448D25D25D2549D26D26D2650GND GND GND135.4.4. Hard DiskThe following table shows the functions of each pin of the Hard Disk connector, which can only operate in True IDE mode:Pin TRUE IDE function Pin TRUE IDE function1RSTIO#2GND3D234D245D226D257D218D269D2010D2711D1912D2813D1814D2915D1716D3017D1618D3119GND20NC21NC22GND23IOWR#24GND25IORD26GND27IOCHRDY28CSEL29NC30GND31IRQ32IOCS1633A134NC35A036A237CS038CS1#39HD_ACTIVITY40GND41VCC42VCC43GND44NC145.5. JTAG / DebuggingA JTAG interface is required both for debug purposes and for boundary scan testing of the UNC20 module during the manufacturing process.The address lines ADDR[5..9] from the processor are multiplexed with the 5 JTAG lines. The selection is done via the LEDLNK/SEL signal. JTAG is active when the LED, connected to LEDLNK/SEL, is shorted to ground. This is achieved by inserting a jumper (J1) on the base board.To activate the JTAG interface, the jumper has to be inserted.NOTE: the CPLD requires address lines 5 to 9, therefore when J1/1-2 is inserted it will not be possible to access CompactFlash cards.There are 3 connectors available on the base board for accessing JTAG on the UNC20 module: firstly, the ARM-defined 20-pin header (X4); secondly, the 8-pin header for FS Forth-Systeme’s JTAG Booster connected to UNC (X3); thirdly, the Parallel Port JTAG adapter (PPJ) is implemented on the board using a buffer together with a standard 25-pin parallel port connector (DB25P).There is a fourth JTAG connector (X7) for accessing the CPLD. This is also an 8-pin header for FS Forth-Systeme’s JTAG Booster.155.5.5. Parallel Port JTAG AdapterThe parallel port JTAG adapter allows for a direct connection between the host PCs parallel port and the JTAG pins of the UNC20. This allows a number of low-cost Development Tools to be used without additional hardware.A 25-pin male D-type connector (X5) is provided for this purpose.Pin Parallel Function JTAG Function2D0TDI3D1TMS4D2TCK5D3TRST#7D5Reset#8D6Port Sense10ACK#Port Sense12PE TDO15ERROR#VCC senseA parallel cable for connecting the host PC’s parallel port to X5 is provided with the UNC20 Developer’s Kit.5.5.6. JTAG BoosterFS Forth-Systeme offers a JTAG Booster which allows accelerated programming of the UNC20 on-board Flash. An 8-pin header (X3) is provided for connecting the JTAG Booster.It also allows the CPLD to be re-programmed, if connected to X7.Note that the JTAG Booster is not part of the standard UNC20 Developer’s Kit.165.5.7. ARM-standard JTAG ConnectorThe JTAG connector is a 20-pin header as defined by ARM Ltd. and can be used for connecting a range of development tools such as ARM’s Multi-ICE, Abatron’s BDI2000 and EPI’s JEENI.Pin Function Pin Function1 3.3V2 3.3V3TRST#4GND5TDI6GND7TMS8GND9TCK10GND11RTCK12GND13TDO14GND15SRST#16GND17N/C18GND19N/C20GND5.6. PeripheralsAn 8-bit data bus and 10-bit address bus are provided for connecting external peripherals to the UNC20. Two individually programmable chip selects (CS3# and CS4#) and an OE# (Output Enable) and WE# (Write Enable) signal allow a vast range of 8-bit peripherals to be connected directly to the UNC20 without any glue logic. In addition, the UNC20 module has two 8-bit General Purpose I/O ports (GPIO). Some of these 16 GPIO pins are already used on the base board. The following table gives an overview, showing those signals which are free to be used by additional hardware.1718Port A UsePort C UseA0Free C0Push-button (free ifdon't use button)A1Free C1Serial_1_CTS A2Free C2I2C (SDA)A3FreeC3Serial_1_RxD A4LED (free if jumper removed)C4Push-button (free if don't use button)A5FreeC5Serial_1_RTS (free if don't use Serial_1)A6LED (free if jumper removed)C6I2C (SCL)A7FreeC7Serial_1_TxD (free if don't use Serial_1)5.6.8. Switches and LEDsThe base board contains 2 push-buttons which can be used by the application to input information. Also 2 user LEDs are assembled to signal output activity for the applications. The 2 LEDs and 2 switches are connected to 4 GPIO pins.Since the LEDs use Port A4 and Port A6, which might be required by other peripherals, they can be disabled by removing J1/5-6.There is one LED that represents the Hard Disk activity.A fourth LED denotes power on.5.6.9. Access to UNC20 PinsUsers can freely access the UNC20 pins by means of the 42-pin header X6, which is not assembled. Pin-out of X6 is described below.Pin Function Pin Function1ADDR42 3.3V3ADDR54CS4#5ADDR66CS3#7ADDR78OE#9ADDR810WE#11ADDR912ADDR313PortA014ADDR215PortA116ADDR117PortA218ADDR019PortA320D021PortA422D123PortA524D225PortA626D327PortA728D429PortC030D531CTS1 (PortC1)32D633SDA_I2C34D735RxD1 (PortC3)36RESET#37PortC438TxD1 (PortC7)39RTS1 (PortC5)40GND41SCL_I2C42GND195.7. Power Supply and ResetThe external main power supply is provided by a standard plugable power supply (e.g. Friwo MPP15-FW7555M/06) which is connected to the power socket (X8) on the base board.The base board provides the power supply for the UNC20 module and all onboard devices such as the serial line driver. The external power supply for the board is 5V DC. There is no power switch available. The board is switched on, by plugging in the power supply. A red LED on the base board denotes power on. A reset button is also provided.5.7.10. Voltage RequirementsFor the UNC20 module only a single 3.3V DC power supply is needed. This is generated on the base board.20UNCBASCF Base Board - User's Manual 216. UNC20 Connector PinSignal Type Description1ADDR4O 2ADDR5/TCK O/I 3ADDR6/TMS O/I 4ADDR7/TDI O/I 5ADDR8/TDO O/O 6ADDR9/TRST#O/I ADDR[5..9] are multiplexed with JTAG functionality – controlled by LEDLNK/SEL signal 7PORTA0I/O 8PORTA1I/O 9PORTA2I/O 10PORTA3I/O 11PORTA4I/O 12PORTA5I/O 13PORTA6I/O 14PORTA7I/O 15PORTC0I/O 16PORTC1I RS232 CTS 17PORTC2O Hardwired as I2C data signal (SDA)18PORTC3I RS232 RxD 19PORTC4I/O 20PORTC5O RS232 RTS 21PORTC6I/O Hardwired as I2C clock signal (SCL)22PORTC7O RS232 TxD 23+3.3V P Power Supply 24GND P Ground Connection 25RSTIN#I Reset InputUNCBASCF Base Board - User's Manual2226TPIP I Ethernet Input+27TPIN I Ethernet Input-28TPOP O Ethernet Output+29TPON O Ethernet Output-30LEDLNK/SEL O Ethernet Activity LED; ADDR/JTAG Selection: JTAGactive when grounded31USB-I/O USB differential data negative32USB+I/O USB differential data positive33DATA31I/O Data line D734DATA30I/O D635DATA29I/O D536DATA28I/O D437DATA27I/O D338DATA26I/O D239DATA25I/O D140DATA24I/O D041ADDR0O Address Line42ADDR1O Address Line43ADDR2O Address Line44ADDR3O Address Line45WE#O Write Enable46OE#O Output Enable47CS3#O Chip Select 348CS4#O Chip Select 4The UNC20 connector is based on a standard DIP48 socket.。
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授權授予為 PlateSpin Migrate 9.3 及更新版本所購買的授權不得用於 PlateSpin Migrate 9.2 及之前版本。
2目錄關於本指南51安裝 PlateSpin Migrate7準備安裝 PlateSpin Migrate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 PlateSpin 伺服器的系統要求. . . . . . . . . . . . . . . . . . . . . . . . . . . 7PlateSpin Migrate 用戶端的系統要求 . . . . . . . . . . . . . . . . . . . . . . .10PlateSpin Migrate Web 介面的系統要求 . . . . . . . . . . . . . . . . . . . . . .11伺服器安裝的一般指導. . . . . . . . . . . . . . . . . . . . . . . . . . . . .11國家語言支援. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12安裝先決軟體 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13為透過批次檔案安裝 PlateSpin Migrate 而安裝 Visual C++ 2013 . . . . . . . . . . . . . . . . . . . . . . . . . .14在主機伺服器上安裝 SQL Server Native Client. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14在 Windows Server 2016 系統上安裝必要軟體 . . . . . . . . . . . . . . . . . . .14在 Windows Server 2012 R2 系統上安裝先決軟體 . . . . . . . . . . . . . . . . . .17啟用對符合 FIPS 的資料加密演算法的支援 (選擇性) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19安裝 PlateSpin Migrate 軟體元件. . . . . . . . . . . . . . . . . . . . . . . . . . . .20啟動 PlateSpin Migrate 安裝啟動器 . . . . . . . . . . . . . . . . . . . . . . . .20安裝資料庫伺服器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21安裝 PlateSpin 伺服器 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26安裝 PlateSpin Migrate 用戶端 . . . . . . . . . . . . . . . . . . . . . . . . . .29使用批次檔案安裝 PlateSpin Migrate 軟體元件. . . . . . . . . . . . . . . . . . . . . .30安裝後任務 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31檢查軟體更新 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32修改 SQL Server Express 系統管理員使用者的密碼 . . . . . . . . . . . . . . . . . . . .32為 Migrate 主機設定 TLS 通訊協定. . . . . . . . . . . . . . . . . . . . . . . . . . .33 PlateSpin 主機的安全性最佳實務 . . . . . . . . . . . . . . . . . . . . . . . . . . .342在雲端部署 PlateSpin Migrate 伺服器35有關在雲端部署 Migrate 伺服器的要求. . . . . . . . . . . . . . . . . . . . . . . . .35雲端帳戶. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35非 VPN 部署. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37靜態公用 IP 位址 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37網路安全性群組. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37TLS 通訊協定 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38在雲端部署 PlateSpin Migrate 伺服器. . . . . . . . . . . . . . . . . . . . . . . . . .38必要的 PlateSpin Migrate 伺服器網路安全性群組設定. . . . . . . . . . . . . . . . . . .38關於雲端市集中的 PlateSpin Migrate 伺服器範本. . . . . . . . . . . . . . . . . . . . .39在 AWS 中部署 Migrate 伺服器影像 . . . . . . . . . . . . . . . . . . . . . . . . . .40在 Azure 中部署 Migrate 伺服器影像. . . . . . . . . . . . . . . . . . . . . . . . . .40用於在雲端手動部署 Migrate 伺服器的核對清單. . . . . . . . . . . . . . . . . . . . .41設定雲端式 Migrate 伺服器的進階設定. . . . . . . . . . . . . . . . . . . . . . . . .43設定用於 AWS 的 PlateSpin 進階設定. . . . . . . . . . . . . . . . . . . . . . . . . .43設定用於 AWS 複製環境虛擬機器的 AWS 例項類型 . . . . . . . . . . . . . . . . .44設定要用於探查受支援 AWS 例項類型的 AWS 區域價格清單端點 . . . . . . . . . . .44設定使用金鑰組或來源身分證明登入目標例項的功能. . . . . . . . . . . . . . . .44目錄3將 PlateSpin Migrate 伺服器設定為使用公用 IP 位址進行 AWS 移轉 . . . . . . . . . .44設定移轉至 AWS 的 Windows 目標上的作業系統授權啟用 . . . . . . . . . . . . . .45設定複製連接埠的聯絡方向 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45設定 PlateSpin 伺服器的備用 IP 位址. . . . . . . . . . . . . . . . . . . . . . . . . .45允許雲端式 Migrate 伺服器處理到其他目標平台的移轉. . . . . . . . . . . . . . . . . .463升級 PlateSpin Migrate47升級的先決條件 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47準備升級 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49確定目標雲端容器的身分證明有效. . . . . . . . . . . . . . . . . . . . . . . .49升級前備份資料庫檔案. . . . . . . . . . . . . . . . . . . . . . . . . . . . .50在升級前備份自訂 Linux blkwatch 驅動程式 . . . . . . . . . . . . . . . . . . . .50升級之前輸出移轉資料. . . . . . . . . . . . . . . . . . . . . . . . . . . . .51升級 Migrate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51將 Migrate 升級至新的主機平台. . . . . . . . . . . . . . . . . . . . . . . . . . . .52準備升級至新主機平台. . . . . . . . . . . . . . . . . . . . . . . . . . . . .52在目前的 PlateSpin 伺服器主機上升級平台 . . . . . . . . . . . . . . . . . . . .52升級至取代用 PlateSpin 伺服器主機 . . . . . . . . . . . . . . . . . . . . . . .54升級後任務 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55輸出或輸入 PlateSpin 移轉資料 . . . . . . . . . . . . . . . . . . . . . . . . . . . .55輸出工作負載移轉資料. . . . . . . . . . . . . . . . . . . . . . . . . . . . .56輸入工作負載移轉資料. . . . . . . . . . . . . . . . . . . . . . . . . . . . .574對安裝和升級問題進行疑難排解59安裝問題 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59一般安裝問題和解決方案. . . . . . . . . . . . . . . . . . . . . . . . . . . .59關於安裝疑難排解的知識庫文章. . . . . . . . . . . . . . . . . . . . . . . . .60移除 PlateSpin 軟體 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60升級問題 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61升級後，出現額外的灰色工作負載標記. . . . . . . . . . . . . . . . . . . . . .614目錄關於本指南本指南提供幫助您安裝 PlateSpin Migrate 產品的資訊。
产品手册2022年1月V1.1EmtronixProduct Guide成都英创信息技术有限公司●关于英创成都英创信息技术有限公司成立于2001年，位于成都市高新区，是一家专注于嵌入式系统软硬件平台的研发、技术服务和销售的高科技公司。
成都英创的主要产品是采用ARM体系架构，预装Linux / WinCE的面向工业应用的嵌入式主板，和以这些主板为核心构建的工控整机平台。
●联系方式地址：成都市高新区高朋大道5号B404邮编：610041电话：86-28-86180660 86-28-85140028网址：邮箱：********************产品目录●关于英创 (2)●联系方式 (2)●工控主板 (4)ESM8000系列工控主板 (5)ESM7000系列工控主板 (6)ESM6802系列工控主板 (7)ESM335x系列工控主板 (8)ESM6800系列工控主板 (9)ESM928x系列工控主板 (10)ES6801系列工控主板 (11)ES9281系列工控主板 (12)●应用底板与工控机 (13)EMX2000系列工控机 (14)SBC870工控底板及整机 (15)SBC880工控底板及整机 (16)ETA830应用底板 (17)●配套软硬件模块 (18)LCD显示 (19)WiFi / 4G / GPRS无线通信 (23)通讯接口扩展 (25)数据采集与电源管理 (28)●底板定制服务 (29)底板定制服务 (30)●工控主板英创主板产品采用我们称之为的英创智能主板架构（Emtronix Smart Module Architecture，ESMARC）体系。
ESMARC 系列主板的基本特点是采用工业品质的ARM 核心系统加以面向工业应用的各类通讯接口，预装Linux / WinCE 两种操作系统及相应的文件系统工控主板ESM8000系列工控主板● NXP Cortex-A53 64位4核CPU i.MX8M ，1.6GHz / 1.4GHz 主频● 板载1GB / 2GB DDR4 + 4GB / 16GB eMMC ，预装Linux 操作系统，支持多种软件开发 ● 18-bit / 24-bit LVDS 显示接口，最高分辨率1366 x 768，双通道LVDS 可选● 1路千兆网， 1路百兆网，2路CAN ，12路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路 / 3路 USB2.0主控接口，1路USB OTG ，SD 卡接口，2D/3D 图形加速器 ● 供电电压+5V ± 5%，工作温度-40℃至80℃（工业级） / 0℃至60℃（商业级）● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换标准串口 x6USB_HOST x2LVDS触摸屏接口2GB DDR4内存标准串口 x6GPIO x32CAN x2(CAN2.0 / CAN FD)I2C SPIUSB_HOST x2USB_OTG / PCIe 电源1000M x1 + 100M x1工控主板ESM7000系列工控主板● NXP Cortex-A7双核CPU iMX7D ，1GHz 主频● 板载1GB DDR3 + 4GB eMMC ，预装Linux / 正版WEC7操作系统，支持多种软件开发 ● 18-bit RGB / LVDS 显示接口，最高分辨率1376 × 768● 1路千兆网， 1路百兆网，2路CAN ，6路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路 / 3路 USB2.0主控接口，1路USB OTG ，SD 卡接口，PCIe×1，精简ISA 总线 ● 供电电压+5V ± 5%，空载电流175mA ，工作温度-40℃至80℃● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换Cortex-A7双核CPU 1GHz（NXP i.MX7D）4GB eMMC1000M x1 + 100M x1电源USB_OTG / PCIe USB_HOST x2I2C SPICAN x2GPIO x321GB DDR3内存触摸屏接口RGB / LVDSUSB_HOST x2标准串口 x6精简ISA总线工控主板ESM6802系列工控主板● NXP Cortex-A9 双核CPU iMX6DL ，1GHz 主频● 板载1GB DDR3 + 4GB eMMC ，预装Linux / 正版WEC7操作系统，支持多种软件开发 ● 18-bit / 24-bit LVDS 显示接口，支持LVDS / HDMI 双屏显示，高性能VPU 视频处理单元 ● 1路千兆网， 1路百兆网，2路CAN ，6路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路USB HOST ，1路USB OTG ，SD 卡接口，2D/3D 图形加速器，精简ISA 总线 ● 供电电压+5V ± 10%，工作温度-40℃至80℃（工业级） / -10℃至60℃（商业级）● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换标准串口 x6USB_HOST x2RGB / LVDS / HDMI触摸屏接口1GB 64bit DDR3 内存精简ISA总线 / PCIe x1总线GPIO x32CAN x2I2C SPI USB_HOST x2USB_OTG电源1000M x1 + 100M x1工控主板ESM335x 系列工控主板● TI Cortex-A8 CPU AM3352 / AM3354，600MHz / 1GHz 主频● 板载256MB / 512MB DDR3 + 256MB / 512MB FLASH ，预装Linux / 正版WEC7操作系统 ● 18-bit RGB / LVDS 显示接口，最高分辨率1024 x 768，硬件2D / 3D 图形加速 ● 2路百兆网，2路CAN ，5路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路 USB HOST ，1路USB OTG ，板载SD 卡接口，精简ISA 总线● 供电电压+5V ± 10%，工作温度-40℃至80℃（工业级） / -10℃至60℃（商业级）● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换256MB NandFlash以太网USBSPII2C GPIO 精简ISA总线触摸屏接口TFT彩色LCD接口USB串口电源Cortex-A8 CPU，600MHz（TI AM3352） / 1GHz（TI AM3354）工控主板ESM6800系列工控主板● NXP Cortex-A7 CPU iMX6ULL ，528MHz / 792MHz 主频● 板载512MB DDR3 + 256MB FLASH / 4GB eMMC ，预装Linux 操作系统 ● 18-bit RGB 显示接口，最高分辨率1024 x 768● 2路百兆网，2路CAN ，12路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路 USB HOST ，1路USB OTG ，SD 卡接口● 供电电压+5V ± 10%，工作温度-40℃至80℃（工业级） / 0℃至60℃（商业级）● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换USB_HOST串口TFT接口Cortex-A7 CPU, 528MHz / 792MHzGPIOUSB_HOST USB_OTG电源以太网256MB / 512MB DDR3内存电源管理模块256MB NandFlash / 4GB eMMC工控主板ESM928x 系列工控主板● NXP ARM926ES-J CPU iMX283 / iMX287，454MHz 主频● 板载128MB DDR2 + 256MB FLASH ，预装Linux / 正版WinCE 6.0操作系统 ● 18-bit RGB 显示接口，最高分辨率1024 x 768● 2路百兆网，2路CAN ，5路UART 串口，1路I2C ，1路SPI ，32位GPIO ● 4路 USB HOST ，1路USB OTG ，SD 卡接口● 供电电压+5V ± 10%，工作温度-40℃至80℃（工业级） / -10℃至60℃（商业级）● ESMARC 架构，主板外形尺寸：74mm × 54mm ，2个66芯坚固IDC 三排排母（2mm 间距） ● ESMARC 系列主板（即所有ESM 开头的主板）管脚均相互兼容，可以直接互换USB HUB256MB NandFlash以太网电源USB SPII2C GPIOARM926ES-J CPU，454MHz（NXP i.MX283 / i.MX287）触摸屏接口USB串口TFT彩色LCD接口128MB DDR2内存工控主板ES6801系列工控主板● NXP Cortex-A7 CPU iMX6ULL ，528MHz 主频● 板载512MB DDR3 + 256MB FLASH ，预装Linux 操作系统 ● 18-bit RGB 显示接口，最高分辨率1024 x 768● 1路百兆网，7路UART 串口，1路I2C ，1路SPI ，12位GPIO ● 1路 USB HOST ，1路USB OTG ，SD 卡接口● 供电电压+5V ± 5%，工作温度-40℃至80℃（工业级） / -10℃至60℃（商业级） ● 模块尺寸40mm × 50mm ，板到板高度5.5mm ，PCIe 模块尺寸，52芯金手指插件 ● 模块管脚与ES9281兼容，可用作ES9281的升级版（仅支持Linux 系统）LCD接口256MB FlashSD卡528MHz Cortex-A7 CPU i.MX6ULLGPIOUSB 串口以太网128MB DDR3内存工控主板ES9281系列工控主板● NXP ARM926ES-J CPU iMX283，454MHz 主频● 板载128MB DDR2 + 256MB FLASH ，预装Linux / 正版WinCE 6.0操作系统 ● 18-bit RGB 显示接口，最高分辨率1024 x 768● 1路百兆网，6路UART 串口，1路I2C ，1路SPI ，12位GPIO ● 1路 USB HOST ，1路USB OTG ，SD 卡接口● 供电电压+5V ± 5%，工作温度-40℃至80℃（工业级） / -10℃至60℃（商业级） ● 模块尺寸40mm × 50mm ，板到板高度5.5mm ，PCIe 模块尺寸，52芯金手指插件 ● 模块管脚与ES6801兼容454MHz ARM9 CPU iMX283LCD接口256MB FlashSD卡128MB DDR2内存GPIO USB 串口以太网●应用底板与工控机英创主板产品采用我们称之为的英创智能主板架构（Emtronix Smart Module Architecture，ESMARC）体系。
