M74HCT245中文资料

74LV245是低压硅栅CMOS器件，与74HC245和74HCT245针脚和功能兼容。

74LV245是八位元收发器，在发送和接收方向上都具有非反相3态总线兼容输出。

发送/接收(DIR)输入控制方向，而输出使能(OE)输入则可实现轻松级联。

针脚OE控制输出，因此总线可以得到有效隔离。

特性和优势
•宽工作电压范围：1.0 V至5.5 V
•最适合低压应用：1.0 V至3.6 V
•接受介于VCC = 2.7 V和VCC = 3.6 V之间的TTL输入电平
•VCC = 3.3 V且T amb = 25 °C时的典型输出地弹：< 0.8 V
•VCC = 3.3 V且T amb = 25 °C时的典型高电平输出电压(VOH)欠冲：> 2 V •ESD保护：
o HBM JESD22-A114E超过2000 V
o MM JESD22-A115-A超过200 V
•多种封装选择
•额定温度范围为-40 °C至+85 °C和-40 °C至+125 °C
外形图
显示功能框图
真值表
INPUTS INPUTS/OUTPUT OE DIR An Bn
H=高电压L=低电压X=无输入、Z=高阻态。

74HC245详细中文资料74HC245是一款高速CMOS器件，74HC2 45引脚兼容低功耗肖特基TTL（LSTTL）系列。

74HC245译码器可接受3位二进制加权地址输入（A0, A1和A2），并当使能时，提供8个互斥的低有效输出（Y0至Y7）。

74HC245特有3个使能输入端：两个低有效（E1和E2）和一个高有效（E3）。

除非E1和E2置低且E3置高，否则74HC138将保持所有输出为高。

利用这种复合使能特性，仅需4片74HC 245芯片和1个反相器，即可轻松实现并行扩展，组合成为一个1-32（5线到3 2线）译码器。

任选一个低有效使能输入端作为数据输入，而把其余的使能输入端作为选通端，则74HC245亦可充当一个8输出多路分配器，未使用的使能输入端必须保持绑定在各自合适的高有效或低有效状态。

74HC245与74HC 238逻辑功能一致，只不过74HC138为反相输出。

功能CD74HC245 ，CD74HC238和CD74HCT245，CD74HCT238是高速硅栅CMOS解码器，适合内存地址解码或数据路由应用。

74HC245作用原理于高性能的存贮译码或要求传输延迟时间短的数据传输系统,在高性能存贮器系统中,用这种译码器可以提高译码系统的效率。

将快速赋能电路用于高速存贮器时,译码器的延迟时间和存贮器的赋能时间通常小于存贮器的典型存取时间,这就是说由肖特基钳位的系统译码器所引起的有效系统延迟可以忽略不计。

HC138 按照三位二进制输入码和赋能输入条件,从8 个输出端中译出一个低电平输出。

两个低电平有效的赋能输入端和一个高电平有效的赋能输入端减少了扩展所需要的外接门或倒相器,扩展成24 线译码器不需外接门;扩展成32 线译码器,只需要接一个外接倒相器。

在解调器应用中,赋能输入端可用作数据输入端。

特性复合使能输入，轻松实现扩展兼容JEDEC标准no.7A 存储器芯片译码选择的理想选择低有效互斥输出ESD保护HBM EIA/JESD22-A114-C超过20 00 V MM EIA/JESD22-A115-A超过200 V 温度范围-40～+85 ℃-40～+12 5 ℃多路分配功能 74HC245是一款高速CMOS器件，74HC245引脚兼容低功耗肖特基TTL（LSTTL）系列。

74HC245八路巴士TRANCEIVER;三态 14.修订历史表13：修订记录文档ID发布日期数据表状态更改注意文档.数取代版本 74HC_HCT245_3 20050131产品数据表 - 9397 750 14502 74HC_HCT245_CNV_2莫迪科幻阳离子： ? 本数据表的格式经过重新设计以符 合新的演示文稿和飞利浦半导体的信息标准 ?第4节“订购信息”，第6节“固定信息”和第13节“包装大纲“修改为包含DHVQFN20 包. 74HC_HCT245_CNV_2 19930930产品SPECI FI CATION 9397 750 14502 ? 74HC245 NV 2005.保留所有权利. 74HC245产品数据表 2005年1月3日至31日 13的22飞利浦半导体 74HC245; 74HCT245八 路巴士TRANCEIVER;三态 12.波形测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图5.输入（AN，BN） 输出（BN，AN）传播延迟和输出转换时间测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图6. 3态输出 启用和禁用时间表11：测量点类型输入产量 74HC245保留所有权利.产品数据表 2005年1月3日至3月31日 13的22飞利浦半导体 74HC245; 74HCT245八路公交车三态波形测量点在表 11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图5.输入（An，Bn）输出（Bn，An）传播延迟和输出转换时间测量点 在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图6. 3状态输出使能和禁止时间表11：测量点类型输入产量 V M V M 74HC245 0.5V CC 0.5V CC 74HCT245 1.3 V 1.3 V 001aac433 t PLH t PHL VM V M 90％ 10％ V M V M Bn，输出 An，Bn输入 V 我 GND V OH V OL t TLH t THL 001aac479 t PLZ t PHZ输出残输出启用 90％ 10％输出启用 OE输入 V 我 V CC V OL V OH GND GND V M t PZL t PZH V M V M产量 LOW-到关关到LOW产量 74HC245输出频率; C L = pF中的输出负载电容; V CC =电源电压V; N =输入切换次数; Σ（C L ×V CC 2 ×f o ）=输出和.表10：动态特 性类型74HCT245 GND = 0 V;测试电路见图7.符号参数条件敏典型马克斯单元 T amb = 25°C t PHL ，t PLH传播延迟A到Bn或Bn到安见 图5 V CC = 4.5 V - 12 22 NS V CC = 5.0 V; C L = 15pF - 10 - NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 1630ns PHZ ，t PLZ 3状态输出禁用时间OE A或OE到Bn V CC = 4.5V; 见图6 - 1630ns t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 - 五 12 NS C PD功耗电容每个收发器 V I = GND至V CC - 1.5 V [1] -30 - pF的 T amb = -40°C至+85°C t PHL ，t PLH传播延迟A到Bn或Bn到 安 V CC = 4.5V; 见图5 --28 NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS PHZ ，t PLZ 3状态输出禁 用时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 --15 NS T amb = -40°C至+125°C t PHL ，t PLH传播延迟A到Bn或Bn到安 V CC = 4.5V; 见图5 --33 NS t PZH ，t PZL 3状态输出使能时间

8-Bit TransceiverCY54/74FCT245TSCCS018 - May 1994 - Revised February 2000Data sheet acquired from Cypress Semiconductor Corporation.Data sheet modified to remove devices not offered.Copyright © 2000, T exas Instruments IncorporatedFeatures•Function, pinout, and drive compatible with FCT, and F logic•FCT-D speed at 3.8 ns max. (Com’l),FCT-C speed at 4.1 ns max. (Com’l),FCT-A speed at 4.6 ns max. (Com’l)•Reduced V OH (typically = 3.3V) versions of equivalent FCT functions•Edge-rate control circuitry for significantly improved noise characteristics •Power-off disable feature •ESD > 2000V•Matched rise and fall times•Fully compatible with TTL input and output logic levels •Extended commercial range of −40˚C to +85˚C •Sink current 64 mA (Com’l), 48 mA (Mil)Source current 32 mA (Com’l), 12 mA (Mil)Functional DescriptionThe FCT245T contains eight non-inverting bidirectional buff-ers with three-state outputs and is intended for bus oriented applications.For the FCT245T,current sinking capability is 64mA at the A and B ports.The Transmit/Receiver (T/R)input determines the direction of data flow through bidirectional transceiver.Transmit (Active HIGH)enables data from A ports to B ports.The output enable (OE),when HIGH,disables both the A and B ports by putting them in a High Z condition.The outputs are designed with a power-off disable feature to allow for live insertion of boards.Function Table [1]OE T/R Operation L L B Data to Bus A L H A Data to Bus B HXHigh Z StateNote:1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.Logic Block DiagramPin ConfigurationsA 0A 1A 2A 3A 4A 5A 6A 7OEB 0B 1B 2B 3B 4B 5B 6B 7T/R4891011127651516171832120131419A 6A 5A 3B 1B 4B 0B 7V CC GND B 3Top ViewA 2LCCT/R A 0A 1A 7B 5B 612345678910111216171819201314V CC 15Top ViewB 2A 4OEA 0A 1A 2A 3A 4A 5A 6A 7OEB 0B 1B 2B 3B 4B 5B 6B 7T/R GNDDIP/SOIC/QSOPMaximum Ratings[2,3](Above which the useful life may be impaired.For user guidelines, not tested.)Storage T emperature.....................................−65°C to +150°C Ambient T emperature withPower Applied..................................................−65°C to +135°C Supply Voltage to Ground Potential..................−0.5V to +7.0V DC Input Voltage.................................................−0.5V to +7.0V DC Output Voltage..............................................−0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin).......120 mA Power Dissipation..........................................................0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015)Operating RangeRange RangeAmbientTemperature V CC Commercial DT0°C to +70°C5V± 5% Commercial T, AT, CT−40°C to +85°C5V± 5% Military[4]All−55°C to +125°C5V± 10%Electrical Characteristics Over the Operating RangeParameter Description Test Conditions Min.Typ.[5]Max.Unit V OH Output HIGH Voltage V CC=Min., I OH=−32 mA Com’l 2.0VV CC=Min., I OH=−15 mA Com’l 2.4 3.3VV CC=Min., I OH=−12 mA Mil 2.4 3.3V V OL Output LOW Voltage V CC=Min., I OL=64 mA Com’l0.30.55VV CC=Min., I OL=48mA Mil0.30.55V V IH Input HIGH Voltage 2.0V V IL Input LOW Voltage0.8V V H Hysteresis[6]All inputs0.2V V IK Input Clamp Diode Voltage V CC=Min., I IN=−18 mA−0.7−1.2V I I Input HIGH Current V CC=Max., V IN=V CC5µA I IH Input HIGH Current V CC=Max., V IN=2.7V±1µA I IL Input LOW Current V CC=Max., V IN=0.5V±1µA I OS Output Short Circuit Current[7]V CC=Max., V OUT=0.0V−60−120−225mA I OFF Power-Off Disable V CC=0V, V OUT=4.5V±1µACapacitance[6]Parameter Description Typ.[5]Max.UnitC IN Input Capacitance510pFC OUT Output Capacitance912pF Notes:2.Unless otherwise noted, these limits are over the operating free-air temperature range.3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either V CC or ground.4.T A is the “instant on” case temperature.5.Typical values are at V CC=5.0V, T A=+25˚C ambient.6.This parameter is specified but not tested.7.Not more than one output should be shorted at a time.Duration of short should not exceed one second.The use of high-speed test apparatus and/or sampleand hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values.Otherwise prolonged shorting ofa high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests.In any sequence of parametertests, I OS tests should be performed last.Power Supply CharacteristicsParameter DescriptionTest ConditionsTyp.[5]Max.Unit I CC Quiescent Power Supply Current V CC =Max., V IN ≤0.2V , V IN ≥V CC −0.2V 0.10.2mA ∆I CC Quiescent Power Supply Current (TTL inputs HIGH)V CC =Max., V IN =3.4V ,[8]f 1=0, Outputs Open0.5 2.0mA I CCDDynamic Power Supply Current [9]V CC =Max., One Input Toggling,50% Duty Cycle, Outputs Open,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V0.060.12mA/MHzI CTotal Power Supply Current [10]V CC =Max.,50%Duty Cycle,Outputs Open,One Bit Toggling at f 1=10 MHz,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V0.7 1.4mAV CC =Max.,50%Duty Cycle,Outputs Open,One Bit Toggling at f 1=10 MHz,T/R or OE=GND and V IN =3.4V or V IN =GND 1.2 3.4mAV CC =Max.,50%Duty Cycle,Outputs Open,Eight Bits Toggling at f 1=2.5 MHz,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V1.32.6[11]mAV CC =Max.,50%Duty Cycle,Outputs Open,Eight Bits Toggling at f 1=2.5 MHz,T/R or OE=GND and V IN =3.4V or V IN =GND3.310.6[11]mANotes:8.Per TTL driven input (V IN =3.4V); all other inputs at V CC or GND.9.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.10.I C=I QUIESCENT + I INPUTS + I DYNAMIC I C =I CC +∆I CC D H N T +I CCD (f 0/2 + f 1N 1)I CC =Quiescent Current with CMOS input levels∆I CC =Power Supply Current for a TTL HIGH input (V IN =3.4V)D H =Duty Cycle for TTL inputs HIGH N T =Number of TTL inputs at D HI CCD =Dynamic Current caused by an input transition pair (HLH or LHL)f 0=Clock frequency for registered devices, otherwise zero f 1=Input signal frequency N 1=Number of inputs changing at f 1All currents are in milliamps and all frequencies are in megahertz.11.Values for these conditions are examples of the I CC formula. These limits are specified but not tested.Document #: 38−00318−BSwitching Characteristics Over the Operating RangeParameter Description FCT245TFCT245ATUnit Fig.No.[13]MilitaryCommercial MilitaryCommercial Min.[12]Max.Min.[12]Max.Min.[12]Max.Min.[12]Max.t PLH t PHL Propagation Delay A to B or B to A 1.57.5 1.57.0 1.5 4.9 1.5 4.6ns 1, 3t PZH t PZL Output Enable Time OE or T/R to A or B 1.510.0 1.59.5 1.5 6.5 1.5 6.2ns 1, 7, 8t PHZ t PLZOutput Disable Time OE or T/R to A or B1.510.01.57.51.56.01.55.0ns1, 7, 8Switching Characteristics Over the Operating Range (continued)Parameter DescriptionFCT245CTFCT245DT Unit Fig.No.[13]MilitaryCommercial Commercial Min.[12]Max.Min.[12]Max.Min.[12]Max.t PLH t PHL Propagation Delay A to B or B to A 1.5 4.5 1.5 4.1 1.5 3.8ns 1, 3t PZH t PZL Output Enable Time OE or T/R to A or B 1.5 6.2 1.5 5.8 1.5 5.0ns 1, 7, 8t PHZ t PLZOutput Disable Time OE or T/R to A or B1.55.21.54.81.54.3ns1, 7, 8Ordering InformationSpeed (ns)Ordering CodePackage Name Package TypeOperating Range 3.8CY74FCT245DTQCT Q520-Lead (150-Mil) QSOP CommercialCY74FCT245DTSOC/SOCT S520-Lead (300-Mil) Molded SOIC 4.1CY74FCT245CTQCT Q520-Lead (150-Mil) QSOP Commercial CY74FCT245CTSOC/SOCT S520-Lead (300-Mil) Molded SOIC 4.5CY54FCT245CTDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245CTLMB L6120-Square Leadless Chip Carrier 4.6CY74FCT245ATPC P520-Lead (300-Mil) Molded DIP Commercial CY74FCT245ATQCT Q520-Lead (150-Mil) QSOP CY74FCT245ATSOC/SOCTS520-Lead (300-Mil) Molded SOIC 4.9CY54FCT245ATDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245ATLMB L6120-Square Leadless Chip Carrier 7.0CY74FCT245TQCT Q520-Lead (150-Mil) QSOP Commercial CY74FCT245TSOC/SOCT S520-Lead (300-Mil) Molded SOIC 7.5CY54FCT245TDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245TLMBL6120-Square Leadless Chip CarrierNotes:12.Minimum limits are specified but not tested on Propagation Delays.13.See “Parameter Measurement Information” in the General Information section.Package Diagrams20-Lead (300-Mil)CerDIP D6MIL −STD −1835D −8 Config.A20-Pin Square Leadless Chip Carrier L61MIL −STD −1835 C −2A20-Lead (300-Mil)Molded DIP P5Package Diagrams (continued)20-Lead Quarter Size Outline Q520-Lead(300-Mil)Molded SOIC S5IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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