ADSP-BF592手册
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DCA 附件N1027A 套件和通用部件使用合适的附件更有助于数字通信分析仪(DCA) 实现高精度测试。
本文列出了建议86100D/N1000A DCA-X 主机及其模块、N109XX DCA-M 和 N107XX 时钟恢复模块使用的附件,包括:•衰减器、直流阻断器•校准套件、负载、短路件、端子•适配器和连接器保护器•相位匹配电缆套件、均衡器•功率分配器/功分器、传感器•机架安装套件、收纳与防护附件•力矩扳手和其他工具除非另有说明,所有附件均与主产品分开销售。
目录N1027A 套件和通用部件 (1)用于电气通道的附件套件 (4)用于 N1045A 和 N1046B 远程探头前端模块的 N1027A-45A 演示套件 (4)用于 N1046A 远程探头前端模块的 N1027A-46A 演示套件 (5)N1027A-AxF 附件套件,随 N1046A 模块一同发货 (5)N1060-60005 附件套件,随 N1060A 模块一同发货 (6)用于 TDR/TDT 模块的附件套件 (7)N1027A-34F/34M/54F/54M TDR/TDT 附件套件 (7)电子校准件 (8)机械校准套件 (9)时钟恢复仪器的附件套件 (10)N1076A-CR1(再次订货编号:N1027A-76A) (10)N1076B-CR1(再次订货编号:N1027A-76B) (11)N1077A-CR1(再次订货编号:N1027A-77A) (11)N1078A-CR1(再次订货编号:N1027A-78A) (12)射频/微波部件 (13)适配器 (13)衰减器 (14)线缆 (15)输入保护帽 (15)直流阻断器 (15)均衡器 (15)相位微调器 (16)传感器 (16)功率分配器/功分器 (16)端子 (16)机械附件 (17)挡板 (17)机架安装套件 (17)远程探头前端附件夹 (17)储存 (17)工具 (18)其他附件 (18)演示和培训器件 (18)防静电(ESD) (19)USB 器件 (19)附录 (20)DCA 输入连接器 (20)光接口 (21)射频/微波连接器 (22)NMD 连接器 (22)3.5 mm 连接器 (22)2.92 mm 连接器 (22)2.4 mm 连接器 (22)1.85 mm 连接器 (22)1.0 mm 连接器 (23)连接器汇总 (23)参考文献 (24)网络资源 (24)用于电气通道的附件套件用于 N1045A 和 N1046B 远程探头前端模块的 N1027A-45A 演示套件N1027A-45A用于 N1046A 远程探头前端模块的 N1027A-46A 演示套件N1027A-AxF 附件套件,随 N1046A 模块一同发货N1027A-A4FN1060-60005 附件套件,随 N1060A 模块一同发货N1060A 模块配有 1.0 mm 阳头加固型连接器。
冻干机系列用户手册,版本1.0不阅读,不理解,没有遵循手册中的说明,机器会受损,操作人员会受伤并且机器的运转效果受影响目录1. 型号的尺寸1.1. FD5505——FD55251.2. FD5505s—— FD5525s1.3. MCFD5505——MCFD55251.4. SF0020——SF00101.5. TD5070A——TD5070RPS1.6. TFD55051.7. 尺寸2. 安装2.1. 安装的地点2.2. 安装的程序3. 电源和接地线3.1. 电源3.2. 接地线4. 部件和功能的参数4.1 FD5505-FD5525 的部件的参数4.2 控制面板和及其功能的参数5. 操作流程5.1. 手动模式5.2. 自动模式5.3. 预冷装置的操作5.3.1. 控制面板和及其功能的参数5.3.2. 预冷装置的操作流程6. 附件6.1. 真空泵6.1.1. 部件的参数(型号:VP8951,VP8920)6.1.2. 换油频率和如何换油6.1.3. 如何换排气过滤器的元件和换的周期6.2. 干燥腔室6.2.1. 干燥腔室部件的参数6.2.2. 如何连接各附件6.3. 密封焊枪6.3.1. 部件的参数6.3.2. 操作7. 冻干机的一般操作8. 维修服务8.1. 故障检修服务8.2. 维修服务登记8.3. 制冷简图8.4. 真空循环图8.5. 电子示意图8.6. 控制面板的电子示意图9. 保修1. 型号的尺寸1.7. 尺寸2. 安装2.1. 安装的地点1. 置于背光处2. 空气流通好3. 避免过多的灰尘4. 避免机械震动或摇动5. 工作温度:+5℃ to +33℃6. 工作高度:2.000m 以下7. 工作湿度:80%以下(倘若当工作温度达到最大值+33℃,湿度可以是低于57%)8. 电压可变的范围:低于+/- 10%*如果您在上述提到的场合下安装机器,机器不能正常运转。
2.2 安装程序1. 机器的后部和墙应保持30cm或更远的距离2. 在平稳的地方安装3. 滑地板要用螺丝钉固定4. 通风要流畅3. 电源和接地线3.1. 电源1. 确定连接是否安全,插头是否插入电源插座。
Engineer-to-Engineer NoteEE-352Technical notes on using Analog Devices DSPs, processors and development toolsVisit our Web resources /ee-notes and /processors or e-mail processor.support@ or processor.tools.support@ for technical support.Soldering Considerations for Exposed-Pad PackagesContributed by Chirag Patel and Ramdas CharyRev 1 – May 17, 2012Copyright 2012, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of IntroductionThis Engineer-to-Engineer Note is comprised of two main sections. The first section discusses general soldering guidelines for Analog Devices Inc. (ADI) DSP and processor boards, while the second section discusses specifically some commonly asked questions regarding Exposed pad (or EPAD) packages, requiring special considerations for soldering onto Printed Circuit Boards (PCBs). Special attention needs to be paid in order to ensure that electrical and thermal requirements are satisfied. This will ensureoptimum performance of the device.Determining the Temperature Profile for BoardsThe process of determining thetemperature profile for soldering components onto a custom board is determined by several factors, such as thickness and form factor of the board, the number and type of components, as well as the type of solder paste that is used (aero/mil or commercial/industrial). Solder paste vendors typically provide a reference document containing useful information, such as the recommended temperature profile for their paste. Based on this recommended profile for the type of solder paste used, it is advisable to populate a bare custom board with sufficient number of thermocouples, then pass it through the oven, and ensure that the appropriate temperature zones and times are reached.Figure 1 Recommended Heating Profile from Solder Paste vendorFigure 2 Heating Profile for typical ADI EZ-KitsAs a reference, Figure 1 and Figure 2 show the recommended temperature profile from the solder paste vendor, and the temperature profile followed in the oven for our EZ-KIT® boards. The attachment accompanying this EE-Note contains the datasheet from the solder paste vendor, as well as the temperature profile information used for most Analog Devices, Inc. EZ-KIT boards.arelight in density. customers boards toraw populated consideration. EZ-KIT boards anPackages Q1.Q2.keep them underPCBall and AND * noreliability. Q7.previousEPAD.Q8.problem?Lastly, technique.References[1] JESD No. 22-B102E Standard on Solderability , JEDEC Solid State Technology Association, 2007.[2] ADSP- 21483/21487/21488/21489 SHARC Embedded Processor Data Sheet. Rev A, April 2012. Analog Devices, Inc. [3] ADSP- BF592 Blackfin Embedded Processor Data Sheet. Rev A, August 2011. Analog Devices, Inc.Document History。
ADS-B Discovery Dual Band Receiver Installation and User ManualRevision AApril 2021GRT Avionics, Inc.3133 Madison Avenue SEWyoming, MI 49548616-245-7700***********************1FOREWORDThank you for choosing the ADS-B Discovery Dual Band Receiver!This manual describes the installation and operation of this receiver, using the software version shown in the Record of Revisions. Some differences may be observed when comparing the information in this manual to other software versions. GRT Avionics is not responsible for unintentional errors or omissions in the manual or their consequences. The builder of the aircraft and the pilot have the final authority on the airworthiness of the aircraft.Information in this document is subject to change without notice. GRT Avionics, Inc. reserves the right to change or improve their products and to make changes in the content of this material without obligation to notify any person or organization of such changes or improvements.Copyright ©2021 GRT Avionics, Inc. or its subsidiaries. All rights reserved.1.1Important Safety Information*CAUTION*:When used with a tablet or phone application, the attitude, air data, and GPS position data transmitted via wi-fi is provided to the receiver by the EFIS. Thus, it is not an independent source of data. It should not be used to cross-check the data from the EFIS that supplies this data to the receiver, since it is the same data.1.2Warranty and Return PolicyAll GRT products include a 2-year warranty, starting on the day the instrument is put into service (or three years after purchase, whichever comes first), against manufacturer defect.Contact Tech Support before returning a component to GRT for repair or warranty work. Many issues are installation-related and can be resolved over the phone, saving time and expense.All returns for repair or upgrade must be accompanied by a Service Request Form, downloadable from the GRT website.1.3Technical SupportOur tech support staff has real-world experience installing, flying, and troubleshooting GRT equipment in many different types of aircraft. We are here to help you.Please visit our website for up-to-date contact information for tech support via email. Check the home page of the GRT website often for new manual updates, video tutorials, and other instructional materials as we release them.1.4Record of RevisionsContents1FOREWORD (I)1.1Important Safety Information (I)1.2Warranty and Return Policy (I)1.3Technical Support (II)1.4Record of Revisions (II)2INTRODUCTION (1)2.1Warnings, Cautions, and Notes (1)2.2Electronic Manuals and Internet Links (1)2.3Feedback and Corrections (1)2.4The Discovery ADS-B Receiver (1)2.5General Specifications (2)2.6Compatible Antennae (2)3INSTALLATION (3)3.1Choosing an Antenna Location (3)3.2Mounting the Antenna (4)3.3Choosing a Receiver Location (4)3.4Mounting the Receiver (4)3.5Antenna Wiring (5)3.6Receiver Wiring to a GRT Avionics EFIS (5)3.6.1RS-232 Wiring (6)3.6.2USB Wiring (7)3.7Required GRT EFIS Settings for connecting via RS-232 (8)3.8Required GRT EFIS Settings for connecting via USB (8)3.9Other Applicable EFIS Settings (8)3.10Dimensional Drawing (9)2INTRODUCTIONThis manual was written to help both builders and pilots learn how to install, use, and maintain this receiver. The receiver may be used in certified aircraft when operated as a portable electronic device per FAA guidance. This guidance allows the receiver to be wired to the aircraft wiring for electrical power.2.1Warnings, Cautions, and NotesThroughout this manual, you will see notes punctuated with the following bold type:!WARNING!:A special notice that could lead to injury or death if not followed.*CAUTION*: A notice that could lead to damage of equipment if not followed. NOTE:An item of special interest that is not immediately apparent through normal usage.2.2Electronic Manuals and Internet LinksMany customers now choose to store electronic copies of the manuals on a tablet computer or phone for easy access to the newest material. It is easy to carry a lot of written materials aboard the aircraft without the added weight and bulk of paper. Because of this, we have added links to videos and other aids to the manual text. Simply touch or click on the link to access interactive materials and tutorials.2.3Feedback and CorrectionsIf you notice any errors or would like a better explanation of something that relates to this product, please contact GRT tech support. We are always striving to make our customers’ lives easier.2.4The Discovery ADS-B ReceiverThis receiver accepts the following:∙ADS-B weather and traffic data from 978 MHz ADS-B ground stations∙Airplane-to-airplane traffic data from other ADS-B OUT equipped airplanes∙Traffic data from airplanes with 1090 MHz mode S transponders with extended squitterThis data is provided to the EFIS via an RS-232 or USB serial data connection and via Wi-Fi to phone/tablet apps.2.5General SpecificationsDual-frequency ADS-B UAT (978 MHz), Extended Squitter (1090 MHz) Receiver∙Physical Dimensions: 8.0” x 2.5” x 1.3” (203 x 63 x 33 mm)∙Weight (W/O Wiring): 0.7 lbs (0.32 kg)∙Power Input: 7-35V DC, 8W∙Temperature Range: -10° F to 158° F (-25° C to 70° C)∙Operating Altitude: No limit∙Cooling Input: Not required∙Interfaces: -RS-232-USB-Wi-Fi2.6Compatible AntennasFor maximum sensitivity, an external antenna is recommended. Although an antenna is included with the receiver, any external antenna designed for ADS-B may be used.3INSTALLATIONInstallation consists of the following steps:∙Mount the Receiver∙Connect Power and Data Wiring∙Install and Wire the Antenna∙Configure the EFIS and Apps to Use the DataThe location of the antenna often dictates the location of the receiver.3.1Choosing an Antenna LocationThe main considerations for the location of the antenna are:∙3’ away from the transponder, ADS-B OUT (if equipped), and VHF communication antennae.∙6’ away from other transmitting antennae, such as DME.∙Preferably within 6’ of the receiver location (this can be extended to 12’ or more by supplying your own RG-58 coax cable).∙Mounting the antenna on the bottom side of the airplane reduces the probability of water intrusion.∙ A ground plane is required. For an aluminum airplane, the skin of the airplane functions as a ground plane. For a composite (or tube and fabric) airplane, aground plane should be incorporated. The ground plane can be a sheet ofaluminum, at least 5” in width and length. The thickness of the aluminum is not important. Increasing the size of the ground plane, up to 25” on each side,improves the sensitivity of the receiver. Minimal improvement can be expectedbeyond this size. The antenna should mount through the ground plane, so that its mounting hardware makes electrical connection with the ground plane.∙The antenna must be mounted vertically.∙The antenna must be mounted away from major protrusions, such as engine nacelles, landing gear legs, etc.Typically, the transponder and its antenna are located near the front of the airplane (to minimize the cable length between the two). In order to achieve the 3’ spacing required, it is common to locate the ADS-B receiver antenna aft of the transponder antenna, onthe opposite side of the airplane’s center line. However, if this placement isn’t feasible, any location more than 3’ from another transmitting antenna is acceptable.3.2Mounting the AntennaUsing the included hardware, the antenna can be mounted as follows:∙Drill a ½” mounting hole using a stepped drill.∙Install the rubber gasket on the antenna.∙Place the antenna in the mounting hole.∙Secure the antenna with the lock washer and nut.Further guidance is provided by AC43.12-2A, Chapter 3.3.3Choosing a Receiver LocationThe main considerations for the location of the ADS-B receiver are as follows:∙The aluminum base plate of the receiver is used to passively cool the receiver.This base plate should not be mounted in a way that thermally insulates it. When mounting to thermally insulating materials, such as on a composite airplane, use ½” standoffs to allow for airflow around the base plate.∙The receiver must be accessible for installation and maintenance purposes.Physical access to the receiver is not required for software updates when it’swired to a GRT EFIS.∙The receiver must be within 12’ of the antenna. Receiver sensitivity diminishes due to signal losses in longer coaxial cables.∙The location should not expose the receiver to heat or water.∙Position the receiver so that the D-Sub remains accessible for wiring purposes.Similarly, if a backup GPS is going to be connected to the receiver, maintainspace for this connection.3.4Mounting the ReceiverThe receiver is mounted with four #6 screws put through the holes in its aluminum base plate. For ease of installation and removal, select a location (or fabricate a tray) that allows for the use of #6 nut plates.3.5Antenna WiringRG-58 or RG-400 coaxial cable (50 Ω characteristic impedance) are acceptable wiring choices. RG-400 is recommended for cable lengths greater than 6’ (2m).3.6Receiver Wiring to a GRT Avionics EFISThe receiver may be connected to a GRT EFIS via RS-232 or USB connections. An RS-232 connection is preferred, as the d-sub connector is a proven technology in airplane applications and includes hardware to keep the connector in place. In installations that lack a spare serial input, the USB output can be used.3.6.1RS-232 WiringThe following diagram illustrates the wiring to a GRT EFIS using RS-232. While the “Serial Out” connection from the EFIS display unit to the receiver is optional, it provides the receiver with AHRS and GPS data that it can then output to tablet/phone apps via Wi-Fi. This connection also allows for updates to the receiver’s software.The receiver provides3.6.2USB WiringThe following diagram illustrates the wiring to a GRT EFIS using the USB port. The USB port provides the receiver with AHRS and GPS data that it can then output totablet/phone apps via Wi-Fi. This connection also allows for updates to the receiver’s software.3.7Required GRT EFIS Settings for connecting via RS-232On the Set Menu > General Setup page, configure the serial input and output ports (if wired) to “GRT Discovery ADS-B In,” at 115,200 baud.3.8Required GRT EFIS Settings for connecting via USBOn the Set Menu > General Setup page, configure the USB ADS-B to ON.3.9Other Applicable EFIS SettingsIf a USB GPS is connected to the USB Type A port (on the side next to the mounting holes) and is going to be used as a GPS source for the EFIS, configure it as GPS1 or GPS2 on the Set Menu > General Setup > GPS from ADS-B Receiver page.3.10 Dimensional Drawing。
<<ADS>>课程设计——分支线耦合器目录1概述 (1)1.1 微波技术产生的背景及发展趋势 (1)1.2 微波电路仿真软件ADS简介 (2)1.3定向耦合概念及分类 (3)1.3.1概念 (3)1.3.2分类 (4)1.3.3 主要技术指标 (6)2工作原理 (7)2.1 传输线理论 (7)2.2 输入阻抗 (8)2.3 特性及测量 (9)2.3.1网络特性 (9)2.3.2测量方法(定向耦合器的特性参量) (10)2.4 定向耦合器的用途 (11)3.微带分支电路的分析与设计 (12)3.1 分支线耦合器 (12)3.2 分支线耦合器的奇偶模分析 (13)4设计过程 (17)4.1 建立工程 (17)4.2 原理图的设计 (18)4.3微带线参数的设置 (19)4.4 VAR控件的设置 (20)4.5 S参数仿真设计 (20)4.6 参数的优化 (22)4.7分支线耦合器版图的生成 (23)5.总结与展望 (25)1概述1.1 微波技术产生的背景及发展趋势微波技术是无线电电子学的一个重要分支,已成为现代通信、雷达、导航和遥感等领域最为敏感的课题之一,发展至今已经有比较久的历史了,无论在理论上还是在实践上,微波科学技术逐渐成熟,并拥有很多的从业人员。
微波波段的电磁波能穿透电离层,因而卫星通信与卫星电视广播、宇宙通信及射电天文学的研究等均需利用微波来实现,在通信、雷达、导航、遥感、天气、气象、工业、农业、医疗以及科学研究等方面得到越来越广泛的应用,成为了无线电电子学的一个重要的分支趋向。
随着通信技术的迅速发展,为了便于携带和移动,无线电设备的小型化是未来的发展趋势,而移动通信所使用频段处于微波范围,因此实现微波电路的更高频率化, 小型化,固体化,不仅在实用方面,而且在学术方面均有重要的研究价值。
定向耦合器通常有两种实现方式: Lange耦合器和带线耦合器。
Lange耦合器具有结构紧凑,便于集成的优点,但一般使用陶瓷基板, 电路制作要求较高,加工工艺和成本限制了它的应用。
ADSP-BF533/2/1简介概要高达600 MHz 高性能Blackfin 处理器;2 个16 位MAC,2 个40 位ALU,4 个8 位视频ALU,以及1 个40 位移位器;RISC 式寄存器和指令模型,编程简单,编译环境友好;先进的调试、跟踪和性能监视;内核电压VDD 0.8V-1.2V;片内调压器支持从3.3V-2.5V 的输入电压;160 引脚Mini-BGA 封装;169 引脚PBGA 封装;176 引脚;LQFP 封装1、存储器高达148KBytes 片内存储器:16KBytes 指令SRAM/Cache64KBytes 指令SRAM32KBytes 数据SRAM/Cache32KBytes 数据SRAM4KBytes 存放中间结果的SRAM两个双通道存储器DMA 控制器存储器管理单元提供存储器保护存储器控制器可与SDRAM、SRAM、Flash 和ROM 无缝连接灵活的存储器引导模式,可以选择从SPI 口或外部存储器导入2、外设并行外设接口(PPI) /GPIO 支持ITU-R 656 视频数据格式2 个双通道全双工同步串行接口,支持8 个立体声I2S 通道12 通道DMA 控制器SPI 兼容端口3 个定时/计数器,支持PWM支持IrDA 的UART事件处理实时时钟“看门狗”定时器调试 /JTAG 接口1x-63x 倍频的片内PLL内核定时器图1. 功能框图3、概述处理器比较ADSP-BF531/2/3 处理器是Blackfin 系列产品的成员,融合了Analog Devices/Intel 的微信号结构(Micro Signal Architecture) (MSA)。
Blackfin 处理器这种体系结构将艺术级的dual-MAC 信号处理引擎,简洁的RISC 式微处理器指令集的优点,以及单指令多数据(SIMD)多媒体能力结合起来,形成了一套独特的指令集结构。
ADSP-BF531/2/3 处理器的代码和管脚完全兼容,它们之间的差别仅仅在于具有不同的性能和片内存储器容量。
AD590温度传感器的使用AD590温度传感器是一种已经IC化的温度感测器,它会将温度转换为电流,在8051的各种课本中经常看到。
其规格如下:1、度每增加1℃,它会增加1μA输出电流2、可测量范围-55℃至150℃3、供电电压范围+4V至+30VAD590的管脚图及元件符号如下图所示:AD590的输出电流值说明如下:其输出电流是以绝对温度零度(-273℃)为基准,每增加1℃,它会增加1μA输出电流,因此在室温25℃时,其输出电流Iout=(273+25)=298μA。
AD590基本应用电路:注意事项:1、Vo的值为Io乘上10K,以室温25℃而言,输出值为10K×298μA=2.98V2、测量Vo时,不可分出任何电流,否则测量值会不准。
AD590实际应用电路:电路分析:1、AD590的输出电流I=(273+T)μA(T为摄氏温度),因此测量的电压V为(273+T)μA×10K=(2.73+T/100)V。
为了将电压测量出来又务须使输出电流I不分流出来,我们使用电压跟随器其输出电压V2等于输入电压V。
2、由于一般电源供应教多器件之后,电源是带杂波的,因此我们使用齐纳二极管作为稳压元件,再利用可变电阻分压,其输出电压V1需调整至2.73V3、接下来我们使用差动放大器其输出Vo为(100K/10K)×(V2-V1)=T/10,如果现在为摄氏28℃,输出电压为2.8V,输出电压接AD转换器,那么AD转换输出的数字量就和摄氏温度成线形比例关系。
AD590集成电路温度传感器的特性测量与应用刘燕,兰志强,林欣悦,赫冀成摘要:本文详细介绍了研究AD590特性的方法,及AD590温度传感器的测温原理及应用的实验过程。
关键词:集成电路;温度传感器;最小二乘法;温度特性1引言集成温度传感器将温敏晶体管与相应的辅助电路集成在同一块芯片上,能直接给出正比于绝对温度的理想线性输出,一般用于-55℃~±150℃之间的温度测量。
Industrial RFID systems MANAGING ALL YOUR DATABalluff offers you a wide selection of data carriers and read/write heads for LF, HF and UHF applications. With the BIS V multi-frequency processor unit, all systems can be combined with each other. This adds flexibility and saves costs through lower inventory levels.Industrial RFID systems – managing all your dataAutomatic identification and tracking in productionTHE PERFORMANCE RANGEYour Balluff solutionsn HF RFID system (13.56 MHz) BIS M n LF RFID system (70/455 kHz) BIS C n LF RFID system (125 kHz) BIS L n UHF RFID system (860/960 MHz) BIS UGo online to individually configure your own system www.balluff.de/go/rfid-configuratorIO-LINK ALL-IN-ONE BIS V PROCESSOR UNIT1 Network block2 Read/write heads with IO-Link3 Data carriers4 Read/write heads with integrated processor unit5 Universal processor unit6 Read/write heads2266433315UHF by country-specific frequencies1 South Korea LF: 125 kHz HF: 13.56 MHzUHF: 917...920.8 MHz 2 JapanLF: 125 kHz HF: 13.56 MHzUHF: 916.7...920.8 MHz 3 ChinaLF: 125 kHz HF: 13.56 MHzUHF: 840.5...844.5 MHz 4 AustraliaLF: 125 kHz HF: 13.56 MHz UHF: 920...926 MHz5 South Africa LF: 125 kHz HF: 13.56 MHzUHF: 865.6...867.6 MHz 6 EuropeLF: 125 kHz HF: 13.56 MHzUHF: 865.6...867.6 MHz 7 USA/Canada/Mexico LF: 125 kHz HF: 13.56 MHz UHF: 902...928 MHz 8 BrazilLF: 125 kHz HF: 13.56 MHzUHF: 902...907.5 MHzWHAT ARE THECONSEQUENCES OF THE DIFFERENT FREQUENCIES?Briefly stated, different frequencies mean different working ranges, since the frequency determines the range. The frequency also affects the coupling behavior (see: How the system components communicate).LF is best suited for close range and for difficult conditions such as metallic surroundings. LF is therefore often used in tool identification.HF is ideal for parts tracking at close range up to 400 mm. With HF you can process and store larger quantities of data at high transmission speeds.UHF typically communicates at a range of 6 m distance. UHF allows simultaneous reading of multiple data carriers (multi-tagging).System frequenciesWorking range of the Balluff BIS RFID systemsSYSTEM STRUCTURERFID requires three main components. These form an RFID system:–■Data carrier (data storage)–■Read/write head (data transmission)–■Processor unit (data processing and communication)The system components in detail–■Data carrier (Tag/Data Carrier)Stores all kinds of data which is read or written by computers or automation equipment. The data carrier antenna sends and receives the signals. Read/write versions are available in various memory capacities and with various storage mechanisms.– Passive data carriers: without power supply – Active data carriers: with power supply–■Read/write headProvides power to the data carrier, reads its data and writes new data to it. It sends this data to the processor unit where the data is further processed. –■AntennaTransmits the power.– HF-/LF systems: Antenna is integrated in the read/write head– UHF systems: Usually passive antennas without read/write head electronics (integrated into the processor unit).–■Processor unitUsed for signal processing and preparation. It typically includes an integrated interface for connecting to the controller/PC system.UHF system: The read/write function can be integrated into the processor unit, so that only a passive antenna and the data carrier are required.How the system components communicateThe data carrier and read/write head connect via the frequency-dependent coupling.With UHF the coupling is via electromagnetic waves, and for LF and HF the coupling is inductive.Components of a HF/LF systemData carrier Read/write head Processor unitUsed at close range, the data carrier must be placed exactly within the read range of the read/write head.Components of a UHF systemData carrier Antenna withProcessor unitread/write head electronicsData carrier Passive antennaProcessor unit withread/write head electronicsIn UHF systems close placement of the data carrier in front of the antenna is not necessary because of the large working range. Still, there are a few rules (see: What to know about UHF systems).Various industry standards are in place both for theLF/HF range and for UHF for communication between the system components. These specify how the information is transmitted. There are also proprietary manufacturer-specific solutions available (see: What you need to know about LF/HF systems/UHF systems).SYSTEM CHARACTERISTICSWhy data storage is importantSelection of the data storage determines where data can be processed and with which components. You can use either of two storage concepts: the central database and decentralized data retention.Central data storage–■All data records are stored in a central database –■Data carrier is simply an identifier –■Mainly for reading informationCan be LF, HF or UHF systems, but mainly used with UHF systemsDecentralized data retention–■All data records are stored on data carriers –■The data carrier stores the identifier and all data records (no central database)–■For both reading and writing informationMainly used with HF/LF systemsWHAT YOU NEED TO KNOW ABOUT LF/HF SYSTEMSIn brief, the read/write distance in LF/HF systems is affected by the antenna shape and the traverse speed.When installing the data carriers the installation conditions and close proximity of metal play a role.Antenna shapeData carriers and read/write heads are constructedwith a rod or round antenna. To achieve the best results the antenna shape must be identical to that of the read/write head. This means: Use rod antenna with rod antenna or round antenna with round antenna.The antenna shape determines different field distributions and read distances. It also determines the active communication field.Ideal working rangeRound antenna–■The lobe of the antenna field is distributed evenly and symmetrically–■No polarization or directionality, even offset.This means the data carrier and read/write head Rod antenna–■The lobe of the antenna field is distributed unevenly and has additional sidelobes–■The is polarization and directionality, which allows greater read distances than with a round antenna–■Identical orientation of the data carrier and read/write head is important in order to achieve greater read distancesInstalling data carriersAccount for distance to metalTo reach the specified read/write distance, a data carrier in a metallic environment must be mounted at a certain distance from metal and within a certain metal-free clear zone. The exact specifications can be found in the data sheets. The following distinctions are made:–■Flush in metalThe sensing surface can be mounted flush on the surface of steel so that it is even with adjacent areas. The range here is less than for differently constructed/installed data carriers of the same size.–■On metalThe sensing surface must not be in contact or surrounded by steel.–■Metal-free (clear zone)The entire area of the data carrier must be kept clear of any type of metal.12365874Data carriers with various memory types are available Traditional memory chips are EEPROM and FRAM.Both types use inductive coupling for power supply and data transmission. They differ in the maximum number of write cycles.–■EEPROM (Electrical erasable programmableread only memory): 100,000 to 1,000,000 write cycles –■FRAM (Ferro-electrical random access memory): 1010 write cyclesHow traverse speed, read/write distance and data transmission time relate to each otherFor reliable data transfer between read/write head andDynamic read/write modeThe data carrier passes by the read/write head without stopping. This should be as close as possible to achieve a long read/write path.How to calculate the traverse speed for dynamic applications Traverse speed (v)Offset (s)=At least 315 mm of offset is required to read the data within a dwell time of 45 ms. Assuming the maximum offset is 340 mm, the read distance must be configured to be very short. The greater the offset of the read/write head, the greater the distance between data carrier and read/write head can be.Important industry standards–■ISO 15693International series of standards for non-contacting chip cards, identification systems and access controls. Operates at a frequency of 13.56 MHz and is the prevailing standard in automation.ISO 15693 defines the protocols for communication between data carrier and read/write head. The datacarriers and read/write heads from different suppliers are generally compatible if they adhere to the same standard. –■ISO 14443International series of standards for non-contact chipcards. These are used in identification systems and access controlling, but also for payment applications such as credit cards, public transportation tickets, etc. Operates at a frequency of 13.56 MHz.In contrast to the ISO 15693 standard, ISO 14443specifies that the data carrier and read/write head carry a manufacturer-specific identifier. Only if the identifiers agree can they communicate with each other.Balluff uses the most commonly accepted contactless chip technology NXP Mifare. This complies with ISO-Standards ISO 7816 and ISO 14443A.High performance solutions from BalluffIn addition to the industry standards there are proprietary systems that are not described by any standard. For example, high-performance solutions from Balluff that are faster and process more data than these industry standards allow. Here the following components are used:–■High-memory data carriers: Data carriers with a memory capacity > 8 kilobytes.–■High-speed data carriers: Combined with the associated read/write heads you can achieve up to eight times greater read speeds than applications that fall under DIN ISO 15693.WHAT YOU NEED TO KNOW ABOUT UHF SYSTEMSPower transmission between data carrier and read/write head is essential for optimal function of a UHF RFID system. Whether and how the antennas need to be aligned with each other depends on the type of polarization of the antennas.Relationship between antenna polarization and data carrier orientationThe polarization of a UHF antenna is determined by the direction of the electrical field of the wave.–■Linear polarized antennasThe electrical field runs either vertical or horizontal to be identically aligned in order to transmit power.–■Data carrier antennaIn UHF systems the coupling is electromagnetic. To transmit data the data carrier‘s antenna converts electromagnetic waves and high-frequency alternating current into each other. Here the polarization direction of the sending antenna and the orientation of the data carrier must be selected correctly. (See illustration for how to achieve optimal power transmission).Construction of a UHF data carrierUHF data carriers with a dipole antenna are often selected (see illustration above). Many other antenna shapes are available as well. These offer particular properties and determine the form factor of the data carrier.Other form factors for UHF data carriersTypical UHF industry standards–■ISO/IEC 18000-6:2013International series of standards that provide the general description of the air interface and signal transmission. The latest standard ISO 18000-63 was published in 2015.–■EPC Class1 Gen2Was published by the standardization organization EPC global, which develops voluntary standards. EPC Class 1 Gen2 Version 2.0.1 is fully compatible with ISO 18000-63.This compatibility mans you can use the same hardware infrastructure and the same data carriers both in an ISO standard environment and an EPC environment.Both standards are suitable for worldwide use. You must however take note of the various national RF regulations.UHF antenna field requires specific test scenariosIn brief: Since the surroundings affect the antenna field, you must perform the closest possible simulation of the ambient conditions.The UHF antenna beams its signal in a wide opening angle. Undesired reflections and absorption in a UHF RFID system Typical ideal antenna fieldin overlapping of wavetrains. Overall it can result in local fields with higher and lower field strengths, or even field collapses (read holes).If a data carrier finds itself in such a read hole, it can no longer communicate with the read/write head.Headquarters Balluff GmbHSchurwaldstrasse 973765 Neuhausen a. d. F.GermanyPhone +49 7158 173-0Fax +49 7158 5010******************D o c . n o . 949747E N · I 20 · S u b j e c t t o c h a n g e s .CONTACT OUR WORLDWIDE SUBSIDIARIES。
ADSP-BF592:Blackfin处理器开发评估方案ADI公司的ADSP-BF592是低成本BlackfinBlackfin处理器,具有适用于工业和通用应用的较佳的外设指令,具有高性能的高达400MHz Blackfin处理器,两个16位MAC,两个40位ALU,四个8位视频ALU和40位移位器。
主要应用在消费类音频设备、低成本图像设备、智能电表、消费类手持设备、医疗设备和汽车驾驶辅助系统。
ADSP-BF592处理器是Blackfin 系列产品的一个成员,它采用了ADI/英特尔微信号架构(MSA)。
Blackfin处理器采用了最先进的双MAC信号处理引擎,具有干净,正交,类RISC微处理器指令集,以及单指令,多数据(SIMD)多媒体功能,并将这些优势集成在一个单一的指令集架构里。
ADSP-BF592处理器完全与其他Blackfin处理器的代码兼容。
ADSP-BF592处理器的最高性能达400MHz,并减少了静态功耗。
ADSP-BF592处理器是下一代数字通信和消费类多媒体应用的高度集成的片上系统解决方案。
通过将高性能信号处理核与行业标准接口相结合,其可以迅速开发出低成本应用而不需要昂贵的外部元件。
系统外设包括一个看门狗定时器、三个支持PWM 的32位定时器/计数器、两个双通道,全双工同步串行端口、与两个串行外围接口(SPI)兼容的端口、一个支持IrDA的UART、一个并行外设接口(PPI)和2线接口(TWI)控制器。
图1 ADSP-BF592处理器框图图2 ADSP-BF592 Blackfin处理器内核框图Blackfin处理器提供世界级的电源管理与性能。
他们采用低功耗和低电压的设计方法进行生产,具有片上动态电源管理功能,因此具有改变电压和运行频率的能力,从而显著地降低了整体功耗。
与仅仅改变工作频率相比,这一能力可以大幅减少功耗。
因此,便携式电器的电池寿命更长。
ADSP-BF592主要特性•高达400MHz的高性能Blackfin处理器•两个16位MAC,两个40位ALU,4个8位视频ALU,40位的移位寄存器•为了编程方便并且支持编译器RISC式寄存器和指令模型•先进的调试、跟踪和性能监控•内部和I/O操作可接受的大范围的电源电压•片外稳压器接口• 64引脚(9mm×9mm)LFCSP封装•存储器:- 68k字节的内核存取存储器- 64k字节的L1指令ROM•内部L1 ROM与SPI存储器,或包括SPI、PPI以及UART主机设备内灵活的引导选项•存储器管理单元提供存储器保护•外设:- 4个32位定时器/计数器,三个支持PWM- 2个双通道,全双工同步串行端口(SPORT),支持八通道立体声I2S 通道- 2个串行外设接口(SPI)相兼容的端口- 1个支持IrDA的UART- 支持ITU-R656视频数据格式的并行外设接口(PPI)- 2线接口(TWI)控制器- 9个外围DMA- 2个内存到内存的DMA通道- 具有28个中断输入的事件处理程序32个可编程迟滞的通用I / O端口(GPIO)- 调试/ JTAG接口- 能够倍频的片上PLLADSP-BF592应用领域•消费类音频•低成本的成像设备•智能仪表•消费手持设备•医疗设备•汽车驾驶辅助系统ADSP-BF592 Blackfin处理器评估板Blackfin处理器包括了一个新型的嵌入式处理器,专为满足当今的嵌入式音频、视频和通信应用的计算要求和功耗要求而设计。
a Preliminary Technical DataBlackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.Blackfin®Embedded ProcessorADSP-BF522C/ADSP-BF525C/ADSP-BF527C Rev. PrBInformation furnished by Analog Devices is believed to be accurate and reliable.However, no responsibility is assumed by Analog Devices for its use, nor for anyinfringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: Fax: 781.461.3113© 2007 Analog Devices, Inc. All rights reserved.FEATURESUp to 600MHz high-performance Blackfin processorTwo 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,40-bit shifterRISC-like register and instruction model for ease ofprogramming and compiler-friendly support Advanced debug, trace, and performance monitoringtbd V to tbd V core V DD with on-chip voltage regulation1.8V,2.5V, or3.3V I/O operationEmbedded low power audio CODEC289-ball MBGA packageMEMORY132K bytes of on-chip memory:48K bytes of instruction SRAM16K bytes of instruction SRAM/cache32K bytes of data SRAM32K bytes of data SRAM/cache4K bytes of scratchpad SRAMExternal memory controller with glueless support for SDRAM and asynchronous 8-bit and 16-bit memoriesNand flash controllerFlexible booting options from external flash, SPI and TWI memory or from SPI, TWI, and UART host devicesOne-time programmable memory for securityTwo dual-channel memory DMA controllersMemory management unit providing memory protection PERIPHERALSRefer to the published ADSP-BF522/ADSP-BF525/ADSP-BF527 Revision PrB datasheet for additional peripherals CODEC FEATURESStereo 24-bit A/D and D/A convertersDAC100 dB (A-weighted) signal-to-noise ratio at 3.3 V95 dB (A-weighted) signal-to-noise ratio at 1.8 VADC90 dB (A-weighted) signal-to-noise ratio at 3.3 V85dB (A-weighted) signal-to-noise ratio at 1.8 VAudio sample rates8kHz, 44.1kHz or 88.2kHz–XTI/MCLK frequency 11.2896 MHz (256 × F S) or 16.9344 MHz (384 × F S)8kHz, 32kHz, 48kHz or 96kHz–XTI/MCLK frequency 12.288 MHz (256 × F S) or 18.432 MHz (384 × F S)Highly efficient headphone amplifierComplete stereo/mono or microphone/line interface Normal and USB modes programmed under software control Low power8mW stereo playback (1.8V all power supplies)20mW record and playback (1.8V all power supplies)) Low supply voltages1.8V to 3.6V analog supply range1.8V to 3.6V digital supply rangeFigure 1.Functional Block DiagramADSP-BF522C/ADSP-BF525C/ADSP-BF527C Preliminary Technical DataREVISION HISTORY6/07—Revision PrB: Changes from PrA to PrBCorrects SS/PG and VRSEL 289-Ball Mini-BGA Ball Assign-ment (Alphabetically by Signal) (7)Corrects SS/PG and VRSEL 289-Ball Mini-BGA Ball Assign-ment (Numerically by Ball Number) (8)3/07—Revision PrA: Initial VersionRev. PrB|Page 2 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical Data Rev. PrB |Page 3 of 12|June 2007GENERAL DESCRIPTIONThis document describes the differences between the ADSP-BF522C/ADSP-BF525C/ADSP-BF527C and the ADSP-BF522/ADSP-BF525/ADSP-BF527 standard product. Please refer to the published ADSP-BF522/ADSP-BF525/ADSP-BF527 Revision PrC datasheet for general description and specifica-tions. This document only describes the exceptions to that datasheet.The ADSP-BF522C/ADSP-BF525C/ADSP-BF527C adds a ste-reo CODEC to the standard product and changes the package labeling.STEREO CODECThe CODEC in the ADSP-BF522C/ADSP-BF525C/ADSP-BF527C is a low power, high quality stereo audio CODEC for portable digital audio application. It features two 24-bit A/D converter channels and two 24-bit D/A converter channels.In normal mode, the XMI/MCLK oscillator is set up according to the desired sample rates of the ADC and DAC. For ADC or DAC sampling rates of 8 kHz, 32 kHz, 48 kHz or 96 kHz, MCLK frequencies of either 12.288 MHz (256 × FS) or 18.432 MHz (384 × FS) can be used. For ADC or DAC sampling rates of 8kHz, 44.1 kHz or 88.2 kHz, MCLK frequencies of either 11.2896 MHz (256 × FS) or 16.9344 MHz (384 × FS) can be used.In USB mode, the XTI/MCLK frequency is only 12MHz allow-ing for ADC and DAC sampling rates of 8kHz, 44.1 kHz or 88.2 kHz.The CODEC can operate with power supplies as low as 1.8V for the analog part and 1.8V for digital port. The maximum voltage is 3.6V for all power supplies.The device is controlled by a 2- or 3-wire serial interface which provides access to all features including volume controls, mutes and extensive power management facilities.Figure 2.Audio CODEC Block DiagramADSP-BF522C/ADSP-BF525C/ADSP-BF527C Preliminary Technical DataPIN DESCRIPTIONSThe ADSP-BF522C/ADSP-BF525C/ADSP-BF527C processoradds CODEC signals as listed in Table1.Table 1.Pin DescriptionsPin Name Type Function Pull-Up/DownCCLKOUT O CODEC Clock Output NoneBCLK I/O CODEC Digital Audio Bit Clock Internal Pull-down1 DACDAT I CODEC DAC Sample Rate Left/Right Clock NoneDACLRC I/O CODEC I/O DAC Sample Rate Left/Right Clock Internal Pull-down1 ADCDAT O CODEC ADC Digital Audio Data Output NoneADCLRC I/O CODEC ADC Sample Rate Left/Right Clock Internal Pull-down1CMODE I CODEC Control Interface Selection Internal Pull-up1CSB I CODEC MPU Chip Select/MPU Interface Address Selection Internal Pull-up1CSDA I/O CODEC MPU Data Input NoneCSCL I CODEC MPU Clock NoneXTI/MCLK I CODEC Crystal Input/MPU Clock Input NoneXTO O CODEC Crystal Output NoneLHPOUT O CODEC Left Channel Headphone Output (Analog Output)NoneRHPOUT O CODEC Right Channel Headphone Output (Analog Output)NoneLOUT O CODEC Left Channel Line Output (Analog Output)NoneROUT O CODEC Right Channel Line Output (Analog Output)NoneVMID O CODEC Mid-rail Reference Decoupling Point (Analog Output)NoneMICBIAS O CODEC Electret Microphone Bias (Analog Output)NoneMICIN I CODEC Microphone Input; (Analog Input, AC Coupled)NoneRLINEIN I CODEC Right Channel Line Input (Analog Input, AC Coupled)NoneLLINEIN I CODEC Left Channel Line Input (Analog Input, AC Coupled)NoneGND P CODEC Digital Core Ground N/AAVDD P CODEC Analog V DD N/AAGND P CODEC Analog Ground N/AHPVDD P CODEC Headphone V DD (Analog)N/AHPGND P CODEC Headphone Ground N/A1Pull-up/pull-down is only present when the control register interface ACTIVE = 0 to conserve power.Rev. PrB|Page 4 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical Data Rev. PrB |Page 5 of 12|June 2007SPECIFICATIONSComponent specifications are subject to change without notice.OPERATING CONDITIONSELECTRICAL CHARACTERISTICSParameter Conditions Min TypicalMax Unit CV DD Digital Core V DD 1.8 3.6V AV DD Analog V DD 1.8 3.6V HPV DD Headphone V DD (Analog) 1.8 3.6V V ILC CODEC Low Level Input Voltage 11Parameter value applies to digital signal pins (ADCDAT, ADCLRC, BCLK, CSB, CCLKOUT, CMODE, DACDAT, DACLRC, CSCL, CSDA, XTI/MCLK, XTO).0.3 × CV DD V V IHC CODEC High Level Input Voltage 10.7 × CV DDV V OLC CODEC Low Level Output Voltage 10.1 × CV DDV V OHC CODEC Low Level Output Voltage 10.9 × CV DD V T J Junction Temperature 289-Ball Chip Scale Ball Grid Array (Mini-BGA)@ T AMBIENT = 0°C to +70°C+105°CParameter Conditions Min Typical MaxUnit Line Input to ADC SNR Signal to Noise Ratio A-weighted, 0 dB Gain @ F S = 48kHz tbd 85dB SNR Signal to Noise Ratio A-weighted, 0 dB Gain @ F S = 96kHz 85dB DR Dynamic Range A-weighted, –60 dB Full Scale Input tbd88dB THD Total Harmonic Distortion –1 dB Input, 0 dB Gain –76tbddB Microphone Input to ADC 0 dB Gain, F S = 48kHz, 40k Ω Source Impedance SNR Signal to Noise Ratio A-weighted, 0 dB Gain 80dB DR Dynamic Range A-weighted, –60 dB Full Scale Input 70dB THD Total Harmonic Distortion 0 dB Input, 0 dB Gain –55dB Line Output for DAC Playback Only Load = 10k Ω, 50 pF SNR Signal to Noise Ratio A-weighted, 0 dB Gain @ F S = 48kHz tbd 95dB SNR Signal to Noise Ratio A-weighted, 0 dB Gain @ F S = 96kHz 93dB DR Dynamic Range A-weighted, –60 dB Full Scale Input tbd90dB THD Total Harmonic Distortion 1kHz, 0 dB –80tbddB THD Total Harmonic Distortion 1kHz, –3 dB–90dB Analog Line Input to Line Output Load = 10k Ω, 50 pF, No Gain on Input, Bypass Mode SNR Signal to Noise Ratio tbd90dB THD Total Harmonic Distortion 1kHz, 0 dB –83tbddB THD Total Harmonic Distortion 1kHz, –3 dB –92dB Stereo Headphone Output PO Maximum Output Power R L = 32 Ω9mW PO Maximum Output Power R L = 16 Ω18mW SNR Signal to Noise Ratio A-weighted tbd95dB THD Total Harmonic Distortion 1kHz, –5 dB, R L = 32 Ω, Full Scale Input –62tbd dB THD Total Harmonic Distortion 1kHz,–2 dB, R L = 32 Ω, Full Scale Input tbddB Microphone Input to Headphone Output Side Tone Mode SNR Signal to Noise Ratiotbd 90dBRev. PrB |Page 6 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical DataDIGITAL FILTER CHARACTERISTICSPACKAGE INFORMATIONThe information presented in Figure 3 and Table 2 provides details about the package branding for the ADSP-BF522C/ADSP-BF525C/ADSP-BF527C processor. For a com-plete listing of product availability, see Ordering Guide on Page 12.Parameter Conditions Min Typical Max UnitADC Filter Passband ±0.05 dB tbd × F Stbd × F SPassband–6 dB0.5 × F SPassband Ripple tbddB Stopbandtbd × F S Stopband AttenuationF > 0.5465 × F S tbddB High Pass Filter Corner Frequency –3 dB 3.7Hz High Pass Filter Corner Frequency –0.5 dB 10.4Hz High Pass Filter Corner Frequency –0.1 dB 21.6HzDAC Filter Passband ±0.03 dB tbd × F Stbd × F SPassband–6 dB0.5 × F SPassband Ripple tbddB Stopbandtbd × F S Stopband AttenuationF > 0.5465 × F Stbd dBFigure 3.Product Information on PackageTable 2.Package Brand InformationBrand KeyField Descriptiont Temperature Range pp Package Type Z Lead Free Option ccc See Ordering Guide vvvvvv.x Assembly Lot Code n.n Silicon Revision yywwDate CodeADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical Data Rev. PrB |Page 7 of 12|June 2007289-BALL MINI-BGA PINOUTTable 3 lists the mini-BGA pinout by signal mnemonic. Table 4 on Page 8 lists the mini-BGA pinout by ball number.Table 3.289-Ball Mini-BGA Ball Assignment (Alphabetically by Signal)SignalBall No.SignalBallNo.Signal Ball No.Signal Ball No.Signal Ball No.Signal Ball No.Signal Ball No.ABE0/SDQM0AB9CSB D23GNDL14PF5B10RESET V22VDDEXT R17VDDMEM U8ABE1/SDQM1AC9CSCL B23GND L15PF6B12RHPOUT B21VDDEXT T17VDDMEM U9ADCDAT A16CSDA C23GND M9PF7B13RLINEIN F23VDDEXT U17VDDMEM U10ADCLRC A15DACDAT A18GND M10PF8B16ROUT G22VDDINT B5VDDMEM U11ADDR1AB8DACLRC A17GND M11PF9A20RTXI U23VDDINT H8VDDMEM U12ADDR2AC8DATA0Y1GND M12PF10B15RTXO V23VDDINT H9VDDMEM U13ADDR3AB7DATA1V2GND M13PF11B17SA10AC10VDDINT H10VDDMEM U14ADDR4AC7DATA2W1GND M14PF12B18SCAS AC11VDDINT H11VDDMEM U15ADDR5AC6DATA3U2GND M15PF13B19SCKE AB13VDDINT H12VDDMEM U16ADDR6AB6DATA4V1GND N9PF14A9SCL B22VDDINT H13VDDOTP AC12ADDR7AB4DATA5U1GND N10PF15A10SDA C22VDDINT H14VDDRTC W23ADDR8AB5DATA6T2GND N11PG0H2SMS AC13VDDINT H15VDDUSB W22ADDR9AC5DATA7T1GND N12PG1G1SRAS AB12VDDINT H16VDDUSB Y23ADDR10AC4DATA8R1GND N13PG2H1SS/PG AC20VDDINT J8VMID G23ADDR11AB3DATA9P1GND N14PG3F1SWE AB10VDDINT J16VROUT AC18ADDR12AC3DATA10P2GND N15PG4D1TCK L1VDDINT K8VRSEL AB22ADDR13AB2DATA11R2GND P9PG5D2TDI J1VDDINT K16XTAL P23ADDR14AC2DATA12N1GND P10PG6C2TDO K1VDDINT L8XTI/MCLK A22ADDR15AA2DATA13N2GND P11PG7B1TMS L2VDDINT L16XTOA21ADDR16W2DATA14M2GND P12PG8C1TRST K2VDDINT M8ADDR17Y2DATA15M1GND P13PG9B2USB_DM AB21VDDINT M16ADDR18AA1EMU J2GND P14PG10B4USB_DP AA22VDDINT N8ADDR19AB1EXT_WAKE AC19GND P15PG11B3USB_ID Y22VDDINT N16AGND G17GND A1GND R9PG12A2USB_RSET AC21VDDINT P8AGND H22GND A23GND R10PG13A3USB_VBUS AB20VDDINT P16AMS0AC17GND B6GND R11PG14A4USB_VREF AC22VDDINT R8AMS1AB16GND J9GND R12PG15A5USB_XTALIN AB23VDDINT R16AMS2AC16GND J10GND R13PH0A11USB_XTALOUT AA23VDDINT T8AMS3AB15GND J11GND R14PH1A12VDDEXT G7VDDINT T9AOE AC15GND J12GND R15PH2A13VDDEXT G8VDDINT T10ARDY AC14GND J13GND T22PH3B14VDDEXT G9VDDINT T11ARE AB17GND J14GND AC1PH4A14VDDEXT G10VDDINT T12AVDD G16GND J15GND AC23PH5K23VDDEXT G11VDDINT T13AVDD J22GND K9LHPOUT B20PH6K22VDDEXT G12VDDINT T14AWE AB14GND K10LLINEIN E23PH7L23VDDEXT G13VDDINT T15BCLK A19GND K11LOUT F22PH8L22VDDEXT G14VDDINT T16BMODE0G2GND K12MICBIAS H23PH9T23VDDEXT G15VDDMEM J7BMODE1F2GND K13MICIN J23PH10M22VDDEXT H7VDDMEM K7BMODE2E1GND K14NMI U22PH11R22VDDEXT H17VDDMEM L7BMODE3E2GND K15OTPVPP AB11PH12M23VDDEXT J17VDDMEM M7CCLKOUT D22GND L9PF0A7PH13N22VDDEXT K17VDDMEM N7CLKBUF AB19GND L10PF1B8PH14N23VDDEXT L17VDDMEM P7CLKIN R23GND L11PF2A8PH15P22VDDEXT M17VDDMEM R7CLKOUT AB18GND L12PF3B9PPICLK/TMRCLK A6VDDEXT N17VDDMEM T7CMODE E22GND L13PF4B11PPIFS1/TMR0B7VDDEXTP17VDDMEMU7ADSP-BF522C/ADSP-BF525C/ADSP-BF527C Preliminary Technical Data Table 4.289-Ball Mini-BGA Ball Assignment (Numerically by Ball Number)Ball No.Signal BallNo.Signal BallNo.Signal BallNo.Signal BallNo.Signal BallNo.Signal BallNo.SignalA1GND B23CSCL H22AGND L22PH8P22PH15U22NMI AC5ADDR9A2PG12C1PG8H23MICBIAS L23PH7P23XTAL U23RTXI AC6ADDR5A3PG13C2PG6J1TDI M1DATA15R1DATA8V1DATA4AC7ADDR4A4PG14C22SDA J2EMU M2DATA14R2DATA11V2DATA1AC8ADDR2A5PG15C23CSDA J7VDDMEM M7VDDMEM R7VDDMEM V22RESET AC9ABE1/SDQM1 A6PPICLK/TMRCLK D1PG4J8VDDINT M8VDDINT R8VDDINT V23RTXO AC10SA10A7PF0D2PG5J9GND M9GND R9GND W1DATA2AC11SCASA8PF2D22CCLKOUT J10GND M10GND R10GND W2ADDR16AC12VDDOTPA9PF14D23CSB J11GND M11GND R11GND W22VDDUSB AC13SMSA10PF15E1BMODE2J12GND M12GND R12GND W23VDDRTC AC14ARDYA11PH0E2BMODE3J13GND M13GND R13GND Y1DATA0AC15AOEA12PH1E22CMODE J14GND M14GND R14GND Y2ADDR17AC16AMS2A13PH2E23LLINEIN J15GND M15GND R15GND Y22USB_ID AC17AMS0A14PH4F1PG3J16VDDINT M16VDDINT R16VDDINT Y23VDDUSB AC18VROUTA15ADCLRC F2BMODE1J17VDDEXT M17VDDEXT R17VDDEXT AA1ADDR18AC19EXT_WAKEA16ADCDAT F22LOUT J22AVDD M22PH10R22PH11AA2ADDR15AC20SS/PGA17DACLRC F23RLINEIN J23MICIN M23PH12R23CLKIN AA22USB_DP AC21USB_RSETA18DACDAT G1PG1K1TDO N1DATA12T1DATA7AA23USB_XTALOUT AC22USB_VREFA19BCLK G2BMODE0K2TRST N2DATA13T2DATA6AB1ADDR19AC23GNDA20PF9G7VDDEXT K7VDDMEM N7VDDMEM T7VDDMEM AB2ADDR13A21XTO G8VDDEXT K8VDDINT N8VDDINT T8VDDINT AB3ADDR11A22XTI/MCLK G9VDDEXT K9GND N9GND T9VDDINT AB4ADDR7A23GND G10VDDEXT K10GND N10GND T10VDDINT AB5ADDR8B1PG7G11VDDEXT K11GND N11GND T11VDDINT AB6ADDR6B2PG9G12VDDEXT K12GND N12GND T12VDDINT AB7ADDR3B3PG11G13VDDEXT K13GND N13GND T13VDDINT AB8ADDR1B4PG10G14VDDEXT K14GND N14GND T14VDDINT AB9ABE0/SDQM0B5VDDINT G15VDDEXT K15GND N15GND T15VDDINT AB10SWEB6GND G16AVDD K16VDDINT N16VDDINT T16VDDINT AB11OTPVPPB7PPIFS1/TMR0G17AGND K17VDDEXT N17VDDEXT T17VDDEXT AB12SRASB8PF1G22ROUT K22PH6N22PH13T22GND AB13SCKEB9PF3G23VMID K23PH5N23PH14T23PH9AB14AWEB10PF5H1PG2L1TCK P1DATA9U1DATA5AB15AMS3B11PF4H2PG0L2TMS P2DATA10U2DATA3AB16AMS1B12PF6H7VDDEXT L7VDDMEM P7VDDMEM U7VDDMEM AB17AREB13PF7H8VDDINT L8VDDINT P8VDDINT U8VDDMEM AB18CLKOUTB14PH3H9VDDINT L9GND P9GND U9VDDMEM AB19CLKBUFB15PF10H10VDDINT L10GND P10GND U10VDDMEM AB20USB_VBUSB16PF8H11VDDINT L11GND P11GND U11VDDMEM AB21USB_DMB17PF11H12VDDINT L12GND P12GND U12VDDMEM AB22VRSELB18PF12H13VDDINT L13GND P13GND U13VDDMEM AB23USB_XTALINB19PF13H14VDDINT L14GND P14GND U14VDDMEM AC1GNDB20LHPOUT H15VDDINT L15GND P15GND U15VDDMEM AC2ADDR14B21RHPOUT H16VDDINT L16VDDINT P16VDDINT U16VDDMEM AC3ADDR12B22SCL H17VDDEXT L17VDDEXT P17VDDEXT U17VDDEXT AC4ADDR10Rev. PrB|Page 8 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical DataRev. PrB |Page 9 of 12|June 2007Figure 5 shows the top view of the mini-BGA ball configuration. Figure 4 shows the bottom view of the mini-BGA ball configuration.Table 5.Thermal Characteristics (BC-289)Parameter ConditionTypical Unit θJA 0 linear m/s air flow tbd ؇C/W θJMA 1 linear m/s air flow tbd ؇C/W θJMA 2 linear m/s air flowtbd ؇C/W θJB tbd ؇C/W θJCtbd؇C/WFigure 4.289-Ball Mini-BGA Ball Configuration (Top View)Rev. PrB |Page 10 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical DataFigure 5.289-Ball Mini-BGA Ball Configuration (Bottom View)ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical Data Rev. PrB |Page 11 of 12|June 2007OUTLINE DIMENSIONSDimensions in the outline dimension figures are shown in millimeters.SURFACE MOUNT DESIGNTable 6 is provided as an aid to PCB design. For industry-standard design recommendations, refer to IPC-7351,Generic Requirements for Surface Mount Design and Land Pat-tern Standard .Figure 6.289-Ball Chip Scale Package Ball Grid Array (Mini-BGA)Table 6.BGA Data for Use with Surface Mount DesignPackageBall Attach Type Solder Mask Opening Ball Pad Size289-Ball Chip Scale Package Ball Grid Array (Mini-BGA)Solder Mask Defined0.26 mm diameter0.35 mm diameterRev. PrB |Page 12 of 12|June 2007ADSP-BF522C/ADSP-BF525C/ADSP-BF527CPreliminary Technical Data©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.PR06876-0-6/07(PrB)ORDERING GUIDEModel Temperature Range 11Referenced temperature is ambient temperature.Package Description Package Option Instruction Rate (Max)Operating Voltage(Nom)ADSPBF527KBCZENGC1 0ºC to +70ºC 289-Ball Chip Scale Package Ball Grid Array (Mini-BGA)BC-289600 MHz tbd V internal, 1.8 V or 3.3 V I/O。
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如需确认任何词语的准确性,请参考ADI 提供的最新高精度阻抗和电化学前端数据手册AD5940/AD5941特性模拟输入16位ADC ,提供800 kSPS 和1.6 MSPS 选项 电压、电流和阻抗测量能力 内部和外部电流和电压通道超低泄漏开关矩阵和输入多路复用器 输入缓冲器和可编程增益放大器 电压DACs输出范围为0.2 V 至2.4 V 的双通道输出电压DAC 12位V BIAS0输出到偏置恒电势器 6位V ZERO0输出到偏置TIA 超低功耗:1 µA1个高速、12位DAC传感器输出范围至:±607 mV输出上具有2和0.05增益设置的可编程增益放大器 放大器、加速器和基准电压源1个低功耗、低噪声恒电势器放大器,适合电化学检测中的恒电势器偏置1个低噪声、低功耗TIA ,适合测量传感器电流输出 50 pA 至3 mA 范围用于传感器输出的可编程负载和增益电阻 模拟硬件加速器 数字波形发生器 接收滤波器复数阻抗测量(DFT)引擎1个高速TIA ,可以处理0.015 Hz 至200 kHz 的宽带宽输入信号 数字波形发生器,用于生成正弦波和梯形波形 2.5 V 和1.82 V 内部基准电压源 降低系统级功耗能够快速上电和断电的模拟电路可编程AFE 序列器,最大程度地降低了主机控制器的工作负载6 kB SRAM ,可对AFE 序列进行预编程超低功耗恒电势器通道:上电且所有其他模块处于休眠模式时为6.5 µA 的电流消耗 智能传感器同步和数据采集 传感器测量的精确周期控制 受控于序列器的的GPIOs 片内外设SPI 串行输入/输出 唤醒定时器 中断控制器 电源电源电压:2.8 V 至3.6 V 1.82 V 输入/输出兼容 上电复位集成已上电的低功耗DAC 和恒电势器放大器的休眠模式,以保持传感器偏置 封装和温度范围3.6 mm ×4.2 mm 、56引脚WLCSP 7 mm × 7 mm 、48引脚LFCSP 封装 额定工作温度范围为-40°C 至+85°C应用电化学测量电化学气体传感器恒电势器/电流测量/伏安法/循环伏安法 生物阻抗应用 皮肤阻抗 人体阻抗 连续血糖监测 电池阻抗简化功能框图图1.AD5940/AD5941数据手册目录特性 (1)应用 (1)简化功能框图 (1)修订历史 (3)功能框图 (5)概述 (6)技术规格 (7)ADC RMS噪声规格 (16)SPI时序规格 (17)绝对最大额定值 (18)热阻 (18)ESD警告 (18)引脚配置和功能描述 (19)典型性能参数 (22)参考测试电路 (24)工作原理 (25)配置寄存器 (25)芯片标识 (28)标识寄存器 (28)系统初始化 (29)低功耗DAC (30)低功耗DAC开关选项 (30)12位和6位输出之间的关系 (31)低功耗DAC应用场景 (31)低功耗DAC电路寄存器 (32)低功耗恒电势器 (35)低功耗TIA (36)低功耗TIA保护二极管 (36)使用外部R TIA (36)各种工作模式的推荐开关设置 (36)低功耗TIA电路寄存器 (39)高速DAC电路 (42)高速DAC输出信号生成 (42)高速DAC核心的功耗模式 (42)高速DAC滤波器选项 (42)高速DAC输出衰减选项 (43)高速DAC激励放大器 (43)将来自高速DAC的交流信号耦合到低功耗DAC设置的直流电平 (43)在阻抗测量期间避免激励和测量频率之间的不一致性误差 (43)高速DAC校准选项 (44)高速DAC电路寄存器 (45)高速TIA电路 (48)高速TIA配置 (48)高速TIA电路寄存器 (50)高性能ADC电路 (52)ADC电路概述 (52)ADC电路图 (52)ADC电路特性 (53)ADC电路工作原理 (53)ADC转换函数 (53)ADC低功耗电流输入通道 (54)选择ADC多路复用器的输入 (54)ADC后处理 (55)内部温度传感器通道 (55)Sinc2滤波器(50 Hz/60 Hz交流电源滤波器) (55)ADC校准 (55)ADC电路寄存器 (56)ADC校准寄存器 (62)ADC数字后处理寄存器(可选) (68)ADC统计寄存器 (69)可编程开关矩阵 (70)开关描述 (70)休眠模式下的推荐配置 (70)控制所有开关的选项 (70)可编程开关寄存器 (73)精密基准电压源 (83)高功率和低功耗缓冲器控制寄存器—BUFSENCON (84)序列器 (85)序列器特性 (85)序列器概述 (85)序列器命令 (85)序列器操作 (87)序列器和FIFO寄存器 (89)波形发生器 (94)波形发生器特性 (94)波形发生器操作 (94)数据手册AD5940/AD5941波形发生器与低功耗DAC配合使用 (94)波形发生器寄存器 (95)SPI接口 (98)概述 (98)SPI引脚 (98)SPI工作原理 (98)命令字节 (98)写入和读取寄存器 (98)从数据FIFO读取数据 (99)睡眠和唤醒定时器 (100)睡眠和唤醒定时器特性 (100)睡眠和唤醒定时器概述 (100)配置一个确定的序列顺序 (100)睡眠和唤醒定时器建议操作 (100)睡眠和唤醒定时器寄存器 (101)中断 (105)中断控制器中断 (105)配置中断 (105)自定义中断 (105)外部中断配置 (105)中断寄存器 (106)外部中断配置寄存器 (111)数字输入/输出 (115)数字输入/输出特性 (115)数字输入/输出操作 (115)GPIO寄存器 (116)系统复位 (119)模拟芯片复位寄存器 (119)功耗模式 (120)有效高功率模式(>80 kHz) (120)有效低功耗模式(<80 kHz) (120)休眠模式 (120)关断模式 (120)低功耗模式 (120)功耗模式寄存器 (120)时钟架构 (123)时钟特性 (123)时钟架构寄存器 (123)应用信息 (127)使用低带宽环路进行EDA生物阻抗测量 (127)使用高带宽环路进行体阻抗分析(BIA)测量 (128)高精度恒电势器配置 (129)使用AD5940/AD5941、AD8232或AD8233进行生物阻抗和心电图(ECG)测量 (130)智能水质/液体质量AFE (131)外形尺寸 (132)订购指南 (133)修订历史2020年3月—修订版A至修订版B更改“产品特性”部分 (1)更改图2和图3 (5)更改表6 (18)更改表7 (20)删除图19;重新排序 (29)增加“系统初始化”部分和表14;重新排序 (29)更改“低功耗DAC开关选项”部分 (30)更改图21 (32)更改表17 (33)更改图22 (36)更改图23 (38)更改图29 (48)更改表36 (49)更改“ADC转换函数”部分 (53)更改图33 (54)更改“Sinc3滤波器”部分和“内部温度传感器通道”部分 ....... 55 更改“精密基准电压源”部分和图38 . (83)更改表93 (84)更改表101 (91)更改“配置一个确定的序列顺序”部分和图51 (100)2019年8月—修订版0至修订版A增加AD5941 ................................................................................ 通篇增加LFCSP封装 ........................................................................ 通篇更改图2,增加图3,按顺序重新编号 (4)更改表1的噪声(RMS)参数 (7)更改表3 (16)增加图6 (19)更改表7 (20)增加图16和图17 (23)更改“数字输入/输出”部分 (119)更改图20 (32)AD5940/AD5941数据手册更改表16 (33)更改表20中关于“短路开关使能的电流测量模式”的描述 (37)更改图28 (49)更改“选择ADC多路复用器的输入”部分 (55)更改“温度传感器0”部分和表40 (57)更改图35 .......................................................................................... 73 更改图47 .. (101)更改“配置一个确定的序列顺序”部分 (102)更改图53 (129)更新外形尺寸,增加图59 (139)更改“订购指南” (140)2019年3月—修订版0:初始版数据手册AD5940/AD5941功能框图图2. AD5940功能框图图3. AD5941功能框图AD5940/AD5941数据手册概述AD5940和AD5941均为高精度、低功耗模拟前端(AFE),专为需要基于电化学测量技术的高精度便携式应用而设计,如电流、伏安或阻抗测量。