nRF51822 模块 规格说明书
- 格式:pdf
- 大小:973.61 KB
- 文档页数:14
OHTCOMTechnology Ltd.nRF51822 Application KitnRF51822User Guide v0.9Copyright © 2013 Ohtcom Technology. All rights reserved.1 介绍nRF51822 Bluetooth® low energy/2.4 GHz Application Kit (AK) 提供了一整套的测试和应用nRF51822的解决方案。
nRF51822是nRF51 系列中的一员,它是一个超低功耗(ultra-low power),单片系统 (SoC) 的2.4 GHz 无线通信解决方案.1.1 最小系统要求• nRFgo Studio v1.14 或更高版本• Windows XP or Windows 71.2 外部资源• Keil MDK-ARM Lite v4.54或更高版本https:///demo/eval/arm.htm• J-Link Software v4.52b或更高版本/jlink-software.html1.3 Writing conventions这篇用户指南遵从了一些排版规则,这样能够使文章更加连贯,更加易于阅读。
以下是使用到的协作约定::• 命令使用Lucida Console.• 芯片管脚使用Consolas.• 文件名和用户接口使用bold.• 内部关联采用斜体并使用semi-bold.1.4 Application kit 发布说明Date Kit version Description2013年8月10日0.1Init.2013年8月19日0.2 加入蓝牙测试部分2013年8月25日0.3整合USB Dongle介绍.2013年8月26日0.31 确认使用USB Dongle下载可以解决Jlink不兼容的问题。
2013年8月28日0.4 完成度50%,增加200%的内容。
0、功能简介IC功能包括:256kB片上闪存和16kB RAM;数字和混合信号周边,包括SPI、2-wire、ADC以及正交解码器;16 PPI通道;撘配片上LDO时电源范围为1.8-3.6V,LDO旁路模式为1.75-1.95V ;片上下拉DC/DC转换器用于3V电池(例如,纽扣电池);片上+/- 250 ppm 32kHZ RC振荡器,在蓝牙低功耗应用,不需外部32kHz晶体,可节省成本和电路板空间;6x6mm 48脚QFN封装,提供最多可达32个GPIO;完整的蓝牙协议堆栈(到配置文件的链接层)。
nRF51822的S110是可下载、免版税、预编译二进制蓝牙低功耗堆栈,可独立编程和更新。
功能包括:异步和事件驱动SVC的API;运行时保护;GATT、GAP和L2CAP级别API;周边和广播器角色;GATT客户端和服务器;和2.4GHz RF专用协议的非并行多协议操作;少于128kB的代码和6kB的RAM,为应用程序留有超过128kB的闪存和10kB的RAM;与使用上一代nRF8001的双芯片应用相比,运行S110堆栈的nRF51822削减了高达50%的功耗。
S110堆栈和nRF51822加上nRF518 SDK相互配合,nRF518包含全面的蓝牙低功耗配置文件、服务以及示例应用集合。
1、架构围绕两条内部总线展开:AHB,APB AHB (Advanced High Performance BUS):CPU: ( Cortex-m0,NVIC,BBB,DAP)Memory : ( RAM, Flash)GPIO : P0(P0.0~P0.31)AHB to APB BridgeAPB (Advanced Peripheral BUS):左半边:Power:电源控制WDT:看门狗SPI0,SPI1TIMER0(32位),TIMER1(16位),TIMER2(16位)QDEC:正交译码器,CLOCK:提供两个时钟:HFCLK(16MHZ),LFCLK(32.768KHZ)TWI0,TWI1:两线接口,兼容I2C右半边:NVMC :非易失性存储控制器RADIO: 2.4GHZ 无线广播的数据率:250KBPS,1MBPS,2MBPS ECB: 加密功能(AES),产生HASH序列,数字签名,生成密钥流等RNG:产生随机数用于加密(基于内部热噪声),无需种子值。
nRF51 Development KitDeveloping with the MDK-ARM Microcontroller Development Kit User Guide v1.0Copyright © 2014 Nordic Semiconductor ASA. All rights reserved.Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.1 IntroductionThe nRF51 Development Kit combined with the nRF51 SDK forms a complete solution for product development based on nRF51 series chips.The nRF51 Development Kit is fitted with the nRF51422 chip, which is a powerful, highly flexible multi-protocol System on Chip (SoC) ideally suited for ANT™/ANT+, Bluetooth® low energy (BLE), and 2.4 GHz proprietary ultra-low power wireless applications.And, if you are not using the ANT protocol, you can use the nRF51822 chip in your end product - without any changes needed to your code.1.1Key featuresThe nRF51 DK board has the following key features:•nRF51422 flash based ANT/ANT+, Bluetooth low energy SoC solution•2.4 GHz compatible with nRF24L devices•Buttons and LEDs for user interaction•I/O interface for Arduino form factor plug-in modules•SEGGER J-Link OB Debugger with debug out functionality•Virtual COM Port interface via UART•Drag and drop Mass Storage Device (MSD) programming•mbed enabled1.2Required toolsBelow is a list of hardware and software tools that is required if you plan to explore all the features on this development kit. All the tools may not be required for all use cases.Nordic Tools DescriptionnRFgo Studio nRFgo Studio is our tool to program and configure devices. It supports the programming ofnRF51 SoftDevices, applications, and bootloaders. The different programming modes areavailable on individual tabs in the nRF51 programming module. Studio is used for thefollowing:•Bluetooth Direct Test Mode (DTM) testing•Erasing flash memory•Programming a SoftDevice•Programming an application•Programming the bootloadernRFgo Studio supports programming of SEGGER J-Link based nRF51 devices.For more information, see the help in nRFgo Studio.nRF51 Tools nRF51 Tools is a package that contains JLinkARM, JLink CDC, nRFjprog, and mergehex.The nRFjprog is a command line tool for programming nRF51 series chips. It is also useful in aproduction setup.nRF51 Tools will be installed together with nRFgo Studio.nRF51 SDK The nRF51 Software Development Kit (SDK) provides source code of examples and librariesforming the base of your application development. The nRF51 SDK includes:•Example code•ANT profile examples•Bluetooth profile examples•Drivers•LibrariesFor more information, see the documentation packaged with the nRF51 SDK.Master Control Panel The Master Control Panel is the software tool that is used with the nRF51 Dongle (PCA10031) to act as a Bluetooth low energy peer device. You can test your application’s wireless connectionwith this tool.The Master Control Panel supports programming of SEGGER J-Link based nRF51 devices.For more information, see the help files in the Master Control Panel.nRF Master Control Panel for Android 4.3nRF Master Control Panel for Android 4.3 is a powerful generic tool that allows you to scan and explore your Bluetooth Smart devices and communicate with them on an Android phone. MCP supports a number of Bluetooth SIG adopted profiles including the Device Firmware Update (DFU) profile from Nordic Semiconductor.S110 SoftDevice Bluetooth low energy Peripheral/Broadcaster protocol stack. For more information, see the S110 nRF51822 SoftDevice Specification and the nRF51 SDK documentation.S120 SoftDevice Bluetooth low energy Central protocol stack solution supporting up to eight simultaneous Central role connections. For more information, see the S120 nRF51822 SoftDevice Specificationand the nRF51 SDK documentation.S130 SoftDevice Bluetooth Smart concurrent multi-link protocol stack solution supporting simultaneous Central/ Peripheral/Broadcaster/Observer role connections. For more information, see the S130nRF51822 SoftDevice Specification and the nRF51 SDK documentation.S210 SoftDevice ANT protocol stack. For more information, see the S210 nRF51422 SoftDevice Specification and the nRF51 SDK documentation.S310 SoftDevice ANT and Bluetooth low energy Peripheral controller and host multiprotocol stack. For more information, see the S310 nRF51422 SoftDevice Specification and the nRF51 SDK documentation.1.3DocumentationBelow is a list of the core documentation for the nRF51 Series and the nRF51x22 chip.Note: See our website for additional documentation such as Application Notes and White Papers.Third party toolsDescriptionKeil MDK-ARM Development Kit Keil MDK-ARM Development Kit is a development environment specifically designed formicrocontroller applications that lets you develop using the nRF51 SDK application and example files.SEGGER J-Link Software The J-Link software is required to debug using the J-Link hardware that is packaged with this development kit.ANTware IIANTWare is an application used for the control of ANT wireless devices. It is an excellent tool for first time ANT developers to explore the capabilities of ANT as a low power wireless solution, and for experienced users to easily setup and monitor advanced ANT networks. ANTWare II improves upon past versions with a slick new interface, streamlined functions, and a variety of new features.DocumentDescriptionnRF51 Series Reference ManualThe nRF51 Series Reference Manual is a functional description of all the modules and peripherals supported by the nRF51 series.nRF51x22 Product SpecificationThe nRF51x22 Product Specification contains all specifications specific to the chip.S110 nRF51822 SoftDevice SpecificationThe S110 nRF51822 SoftDevice Specification contains information about the SoftDevice features and performance.S120 nRF51822 SoftDevice SpecificationThe S120 nRF51822 SoftDevice Specification contains information about the SoftDevice features and performance.S130 nRF51822 SoftDevice SpecificationThe S130 nRF51822 SoftDevice Specification contains information about the SoftDevice features and performance.S210 nRF51422 SoftDevice SpecificationThe S210 nRF51422 SoftDevice Specification contains information about the SoftDevice features and performance.S310 nRF51422 SoftDevice SpecificationThe S310 nRF51422 SoftDevice Specification contains information about the SoftDevice features and performance.nRF51 SDK DocumentationThe nRF51 SDK documentation includes user guides, descriptions, and reference material to help you understand the protocols, examples, and other components of the SDK.nRF51x22 Product Anomaly NotificationThe nRF51x22 Product Anomaly Notification - list of anomalies relevant for the chip.ANT Message Protocol and UsageThe ANT Message Protocol and Usage document describes the ANT protocol in detail and contains the fundamental knowledge you need in order to develop successfully with ANT.nRF51 Development Kit Hardware FilesThe nRF51 Development Kit includes firmware source code, documentation, hardware schematics, and layout files. Included are the following files:•Altium Designer files •Schematics •PCB layout files •Production files•Assembly drawings •Drill files •Gerber files•Pick and Place files •Bill of Materials1.4Development Kit release notesDate Kit version Description October 2014 1.0•First release.2 Kit contentIn addition to hardware, the nRF51 Development Kit consists of firmware source code, documentation, hardware schematics, and layout files which are available from .Figure 1 nRF51 Development Kit content1 x3V CR2032Lithium battery5 x nRF51422 samples1 x nRF51 Development Kit board (PCA10028)3 GettingstartedThis section shows you how to get access to the tools, libraries, and documentation.Connect your nRF51 Development Kit to a computer.1.Connect your nRF51 DK board to a computer with a USB cable.2.The status light (LD5) will come on, indicating it has power.3.After a few seconds, the computer will recognize the nRF51 DK board as a standard USB drive.Figure 2 Windows exampleGet started with the toolchain and examples.1.Download and install nRFgo Studio (which includes the nRF Tools package; JLinkARM, JLink CDC,nRFjprog, and mergehex) from .2.Download and install the latest Keil MDK-ARM from /arm.3.Download and install the latest nRF51 SDK found on .4.Read the information in the Readme.txt file that is installed together with the SDK.After the installation, the SDK documentation is found here:Online: /nRF51_SDK/doc/index.html.Offline: <keil_location>/ARM/Pack/NordicSemiconductor/nRF_Examples/<version>/documentationThe nRF51 DK board is equipped with a boot/reset button (SW5). This button is connected to the interface MCU on the board and have two functions:•Reset button for the nRF device.•Enter boot loader mode of the interface MCU.During normal operation the button will function as a reset button for the nRF device. To enter boot loader mode of the Interface MCU, the button must be pressed while the board is powered until the LED LD5 starts to blink. This is done by pressing the reset button and power cycle the board, either by disconnecting and reconnecting the USB cable or toggle the power switch (SW6).4.2Virtual COM portThe on-board Interface MCU features a Virtual COM port via UART.•Flexible baudrate setting up to 1 Mbps•Dynamic Hardware Flow Control (HWFC) handling•Tri-stated UART lines while no terminal is connectedTable 1 shows an overview of the UART connections on nRF51422 and the interface MCU.nRF51422Interface MCUDefault GPIO UART UARTP0.08RTS CTSP0.09TXD RXDP0.10CTS RTSP0.11RXD TXDTable 1 Relationship of UART connections on nRF51422 and Interface MCUThe UART signals are routed directly to the Interface MCU. The UART pins connected to the Interface MCU is tri-stated when no terminal is connected to the Virtual COM port on the computer.Note: The terminal used must send a DTR signal in order to configure the UART Interface MCU pins. The P0.08 (RTS) and P0.10 (CTS) can be used freely when HWFC is disabled on the nRF51422.4.3Interface MCU FirmwareThe on board Interface MCU is factory programmed with an mbed compliant bootloader, this feature enables the ability to swap interface FW between the factory preloaded SEGGER J-Link OB and the nRF51 mbed interface FW, see section 4.1 “IF Boot/Reset button” on page8 on how to enter the bootloader.To swap Interface MCU FW, simply drag the Interface image (.bin) into the mounted bootloader drive on the connected computer and power cycle the board.Both the nRF51 mbed interface FW and the J-Link OB image can be downloaded from.Note: If you have swapped to the mbed image and want to revert back to the J-Link image, download the latest SEGGER J-Link software from and open a debug sessionto update to the latest J-Link OB firmware version.Note: The J-Link serial number is linked to the Interface MCU and will not change even when swapping the Interface MCU FW, so it can be useful to write the serial number on a sticker onthe board.5 HardwaredescriptionThis chapter describes the nRF51 Development Kit board (PCA10028).Figure 5 nRF51 DK board bottom5.2Block diagramFigure 6nRF51 DK board block diagramFigure 7 Power supply optionsThe 5 V from the USB is regulated down to 3.3 V through an on-board voltage regulator. The battery and external power supply are not regulated. The power sources are routed through a set of diodes (D1A, D1B, and D1C) for reverse voltage protection, where the circuit is supplied from the source with the highest voltage.Note: When not USB powered, the Interface MCU is in dormant state and will draw an additional current of ~ 20 μA in order to maintain the reset button functionality. This will affect boardcurrent consumption, but will not affect the nRF51 current measurements as described inSection 5.7 “Measuring current” on page18.5.4Connector interfaceAccess to the nRF51422 GPIOs is available at connectors P2, P3, P4, P5, and P6 on the nRF51 DK board.In addition there is access to ground and power on the P1 connector.Figure 10 nRF51 DK board connectorsThe signals are also available on bottom side connectors P7, P8, P9, P10, P11, and P12. By mounting pin lists on the connector footprints, the nRF51 DK board can be used as a shield for Arduino motherboards or other boards that follows the Arduino standard.For easy access to GPIO, power, and ground, the signals can also be found on the through-hole connectors P13-P17.Note: Some pins have default settings.•P0.08, P0.09, P0.10, and P0.11 are by default used by the UART connected to theInterface MCU. See Section 4.2 “Virtual COM port” on page9 for more information.•P0.17 - P0.24 are by default connected to the buttons and LED.See Section 5.5 “Buttons and LEDs” on page16 for more information.•P0.26 and P0.27 are by default used for the 32 kHz crystal and are not available on theconnectors. See Section 5.6 “32.768 kHz crystal” on page17 for more information.When the nRF51 DK board is used as a shield together with an Arduino standard motherboard, the Arduino signals is routed like shown in Figure 11.Figure 11 Arduino signals routing on the nRF51 DK board5.5Buttons and LEDsThe four buttons and four LEDs on nRF51 DK board are connected to dedicated I/Os on the nRF51422 chip. The connections are shown in Table 3.Part GPIO ShortButton 1P0.17-Button 2P0.18-Button 3P0.19-Button 4P0.20-LED 1P0.21SB5LED 2P0.22SB6LED 3P0.23SB7LED 4P0.24SB85.632.768 kHz crystalnRF51422 can use an optional 32.768 kHz crystal (X2) for higher accuracy and lower average power consumption. On the DK board, P0.26 and P0.27 are by default used for the 32.768 kHz crystal and are not available as a GPIO on the connectors.Note: When using ANT/ANT+, the 32.768 kHz crystal (X2) is required for correct operation.5.7Measuring currentThe current drawn by the nRF51422 device can be monitored on the nRF51 DK board. To measure the current, you must first prepare the board by cutting the shorting of solder bridge SB9.There are two ways of measuring the current consumption:1.Connect an ampere-meter between the pins of connector P22. This will monitor the currentdirectly.Figure 16 Current measurement with ampere-meter2.Mount a resistor on the footprint for R6. The resistor should not be larger than 10 Ω. Connect anoscilloscope in differential mode or similar with two probes on the pins of the P1 connector andmeasure the voltage drop. The voltage drop will be proportional with the current consumption.Note: The current measurements will become unreliable when a Serial terminal is connected to the Virtual COM port.5.8RF measurementsThe nRF51 DK board is equipped with a small size coaxial connector for conducted measurements of the RF signal (J1). The connector is of SWF type from Murata (part no. MM8130-2600) with an internal switch. By default, when there is no cable attached, the RF signal is routed to the on-board PCB trace antenna. A test probe is available from Murata, part no. MXHS83QE3000, which has a standard SMA connection on the other end for connecting instruments. When connecting the test probe, the internal switch in the SWF connector will disconnect the PCB antenna and connect the RF signal from the nRF51 device to the test probe.Figure 18 Connecting a spectrum analyzerThe connector and test probe will add loss to the RF signal which should be taken into account when doing measurements, see Table 4.Table 4 Typically loss in connector and test probeFrequency (MHz)Loss (dB)2440 1.04880 1.773202.6The P20 also features a debug out connection in order to program shield mounted targets, as for the Debug out P19 header the Interface MCU will detect the supply voltage on the mounted shield and program/ debug the shield target.If the Interface MCU detects target power on both P19 and P20 it will default to program/debug the target connected to P19Page 21nRF51 Development Kit User Guide v1.0Liability disclaimerNordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein.Life support applicationsNordic Semiconductor’s products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale.Contact detailsFor your nearest distributor, please visit .Information regarding product updates, downloads, and technical support can be accessed through your My Page account on our homepage.Revision historyARM statementKeil, μVision, and Cortex are trademarks of ARM Limited. All other brands or product names are the property of their respective holders.DateVersion DescriptionOctober 2014 1.0•First release.Main office:Phone: +47 72 89 89 00Fax: +47 72 89 89 89 Otto Nielsens veg 127052 Trondheim NorwayMailing address:Nordic Semiconductor P .O. Box 23367004 TrondheimNorway。
16 ----2.4 GHz radio (无线发射机)The RADIO包括了一个2.4G的接收机和一个发射机,它兼容了Nordic的所有2Mbps,1Mbps和250kpbs模式增加了1Mbps的蓝牙低功耗模式。
The RADIO使用EasyDMA,EasyDMA包含一个自动压包和解包工具,以及CRC发生器和CRC校验使对它进行非常简单的配置,更多信息查看上图。
The RADIO包含了一个设备地址匹配单元和一个内部框架分隔单元。
它可以被用作简化地址白名单和帧间距分隔。
在低功耗蓝牙和仿真中使用。
The RADIO也包含一个信号轻度指示器(RSSI)和一个位计数器,当一个预先设定的位通过RADIO被发送或者接受完成时,位计数器会引发一个事件。
16.1 功能描述16.1.1 EasyDMAEasyDMA在CPU RAM以内读写数据包,不能通过RAM以外的地址后者代码段读取数据包。
根据上面的框图,the RADIO's EasyDMA利用PACKETPTR指针接受和发送数据包。
CPU必须配置每一次的发送机的发送和接受模式直接的转换,MAXLEN 寄存器配置发射机在同一个数据包中的接收或发送的最大字节数。
此功能可以被用来确定无线发送接机所分配的数据包是否被覆盖或者越界。
16.1.2 包配置(Packet configuration)一个无线数据报文,包含以下部分:报头(PREAMBLE),地址(ADDRESS),长度(LENGTH),S0,S1,PAYLOAD(有效载荷:可理解为有效数据。
)和CRC。
无线发射机发送上述部分时的顺序展示在下图,从左到右,第一个发送的是PREAMBLE 位。
报头(PREAMBLE)总是根据第一个 ADDRESS位的值在0xAA或者0x55两个数字之间取值。
如果ADDRESS是0则PREAMBLE位为0xAA,否则为0x55.下图展示了无线数据包在内存中储存实例无线电字节顺序:ADDRESS和PAYLOAD低位总是优先的存储方式,CRC总是高位优先的存储方式,,S0,LENGHT,S1和PAYLOAD可以通过PCNF1的ENDIAN位。
nrf51822数据⼿册_引脚图_参数Copyright ? 2014 Nordic Semiconductor ASA. All rights reserved.Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.nRF51822Multiprotocol Bluetooth ? low energy/2.4 GHz RF System on Chip Product Specification v3.3Key Features2.4 GHz transceiver-93 dBm sensitivity in Bluetooth low energy mode250 kbps, 1 Mbps, 2 Mbps supported data ratesTX Power -20 to +4 dBm in 4 dB stepsTX Power -30 dBm Whisper mode13 mA peak RX, 10.5 mA peak TX (0 dBm)9.7 mA peak RX, 8 mA peak TX (0 dBm) with DC/DCRSSI (1 dB resolution)ARM Cortex-M0 32 bit processor275 µA/MHz running from flash memory150 µA/MHz running from RAMSerial Wire Debug (SWD)S100 series SoftDevice readyMemory256 kB or 128 kB embedded flash program memory16 kB or 32 kB RAMOn-air compatibility with nRF24L seriesFlexible Power ManagementSupply voltage range 1.8 V to 3.6 V4.2 µs wake-up using 16 MHz RCOSC0.6 µA at 3 V OFF mode1.2 µA at 3 V in OFF mode + 1 region RAM retention2.6 µA at 3 V ON mode, all blocks IDLE8/9/10 bit ADC - 8 configurable channels31 General Purpose I/O PinsOne 32 bit and two 16 bit timers with counter modeSPI Master/SlaveLow power comparatorTemperature sensorTwo-wire Master (I2C compatible)UART (CTS/RTS)CPU independent Programmable Peripheral Interconnect (PPI)Quadrature Decoder (QDEC)AES HW encryptionReal Timer Counter (RTC)Package variantsQFN48 package, 6 x 6 mmWLCSP package, 3.50 x 3.83 x 0.50 mmWLCSP package, 3.50 x 3.83 x 0.35 mmWLCSP package, 3.83 x 3.83 x 0.50 mmWLCSP package, 3.83 x 3.83 x 0.35 mmWLCSP package, 3.50 x 3.33 x 0.50 mm Applications Computer peripherals and I/O devices Mouse Keyboard Multi-touch trackpad ?Interactive entertainment devices ?Remote control ?Gaming controller ?Beacons ?Personal Area Networks Health/fitness sensor and monitor devices Medical devices Key-fobs + wrist watches Remote control toysLiability disclaimerNordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein.Life support applicationsNordic Semiconductor’s products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale.Contact detailsFor your nearest distributor, please visit .Information regarding product updates, downloads, and technical support can be accessed through your My Page account on our home page.RoHS and REACH statementNordic Semiconductor's products meet the requirements of Directive 2002/95/EC of the EuropeanParliament and of the Council on the Restriction of Hazardous Substances (RoHS) and the requirements of the REACH regulation (EC 1907/2006) on Registration, Evaluation, Authorization and Restriction of Chemicals. The SVHC (Substances of Very High Concern) candidate list is continually being updated.Complete hazardous substance reports, material composition reports and latest version of Nordic's REACH statement can be found on our website .Main office:Phone: +47 72 89 89 00Fax: +47 72 89 89 89 Otto Nielsens veg 127052 Trondheim NorwayMailing address:Nordic Semiconductor P .O. Box 23367004 TrondheimNorwayDatasheet StatusRevision History StatusDescription Objective Product Specification (OPS)This product specification contains target specifications for product development.Preliminary Product Specification (PPS)This product specification contains preliminary data; supplementary datamay be published from Nordic Semiconductor ASA later.Product Specification (PS)This product specification contains final product specifications. NordicSemiconductor ASA reserves the right to make changes at any timewithout notice in order to improve design and supply the best possibleproduct.DateVersion Description July 2016 3.3Added documentation for the nRF51822 CTAA version of the chip.Added content:Section 9.5 “CTAA WLCSP package” on page 71Section 11.9 “CTAA WLCSP package” on page 118Updated content:Feature list on the front page.Section 2.2.3 “CEAA, CFAC, CTAA, and CTAC WLCSP ball assignment and functions”on page 17Section 3.2.1 “Code organization” on page 22Section 3.2.2 “RAM organization” on page 22Section 3.3 “Memory Protection Unit (MPU)” on page 23Section 7.1.2 “CTAA and CTAC light sensitivity” on page 39Section 7.2 “CTAA and CTAC mechanical strength” on page 39Section 10.6 “Code ranges and values” on page 76Section 10.7 “Product options” on page 78Chapter 11 “Reference circuitry” on page 79. Added resistor R1 on the schematicsfor all variants.January 2016 3.2Added documentation for the nRF51822 CTAC version of the chip.Added content:Section 4.10.1 “Enable 4 Mbps SPIS bit rate” on page35Section 7.2 “CTAA and CTAC mechanical strength” on page39Section 9.6 “CTAC WLCSP package” on page72Section 11.10 “CTAC WLCSP package” on page124Updated content:Feature list on the front page.Section 2.2.3 “CEAA, CFAC, CTAA, and CTAC WLCSP ball assignment and functions”on page17Section 3.2.1 “Code organization” on page22Section 3.2.2 “RAM organization” on page22Section 3.3 “Memory Protection Unit (MPU)” on page23Chapter 6 “Absolute maximum ratings” on page38Section 7.1 “WLCSP light sensitivity” on page39Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)” on page41Section 8.1.5 “32.768 kHz crystal oscillator (32k XOSC)” on page43Section 8.1.6 “32.768 kHz RC oscillator (32k RCOSC)” on page44Section 8.2 “Power management” on page45Section 8.8 “Serial Peripheral Interface Slave (SPIS) specifications” on page57 Section 10.6 “Code ranges and values” on page76Section 10.7 “Product options” on page78October 2014 3.1Added documentation for the following versions of the chip:nRF51822-QFAC AA0nRF51822-QFAC Ax0nRF51822-CDAB AA0nRF51822-CDAB Ax0nRF51822-CFAC AA0nRF51822-CFAC Ax0(The x in the build codes can be any number between 0 and 9.)Added content:Section 2.2.2 “CDAB WLCSP ball assignment and functions” on page14Section 9.2 “CDAB WLCSP package” on page68Section 9.4 “CFAC WLCSP package” on page70Updated content:Feature list on the front page.Section 2.2.3 “CEAA and CFAC WLCSP ball assignment and functions” on page17 Section 3.2.1 “Code organization” on page22Section 3.2.2 “RAM organization” on page22Section 3.3 “Memory Protection Unit (MPU)” on page23Section 8.2 “Power management” on page45Section 8.3 “Block resource requirements” on page49Section 8.12 “Analog to Digital Converter (ADC) specifications” on page61Section 10.6 “Code ranges and values” on page76Section 10.7 “Product options” on page78August 2014 3.0Update to reflect the changes in build code:nRF51822-QFAA Hx0nRF51822-CEAA Ex0nRF51822-QFAB Cx0(The x in the build codes can be any number between 0 and 9.)If you are working with a previous revision of the chip, read version 2.x of the document. Added content:Section 8.5.3 “Radio current consumption with DC/DC enabled” on page51Section 11.1.1 “PCB layout example” on page80Updated content:Feature list on the front page.Section 2.1 “Block diagram” on page11Section 3.2.1 “Code organization” on page22Section 3.2.2 “RAM organization” on page22Section 3.3 “Memory Protection Unit (MPU)” on page23Section 3.4 “Power management (POWER)” on page24Section 3.6 “Clock management (CLOCK)” on page28Section 3.8 “Debugger support” on page31Section 4.2 “Timer/counters (TIMER)” on page33Chapter 5 “Instance table” on page37Chapter 7 “Operating conditions” on page39Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)” on page41Section 8.1.3 “32 MHz crystal oscillator (32M XOSC)” on page42Section 8.1.4 “16 MHz RC oscillator (16M RCOSC)” on page43Section 8.1.6 “32.768 kHz RC oscillator (32k RCOSC)” on page44Section 8.1.7 “32.768 kHz Synthesized oscillator (32k SYNT)” on page44Section 8.2 “Power management” on page45Section 8.3 “Block resource requirements” on page49Section 8.4 “CPU” on page49Section 8.5.6 “Radio timing parameters” on page55Section 8.5.7 “Antenna matching network requirements” on page55Section 8.7 “Universal Asynchronous Receiver/Transmitter (UART) specifications”on page56Section 8.8 “Serial Peripheral Interface Slave (SPIS) specifications” on page57Section 8.12 “Analog to Digital Converter (ADC) specifications” on page61Section 8.13 “Timer (TIMER) specifications” on page62Section 8.15 “Temperature sensor (TEMP)” on page62Section 8.22 “Non-Volatile Memory Controller (NVMC) specifications” on page65Section 8.24 “Low Power Comparator (LPCOMP) specifications” on page66Section 9.2 “CDAB WLCSP package” on page68Section 10.7.2 “Development tools” on page78Chapter 11 “Reference circuitry” on page79October 2013 2.0This version of the document will target the nRF51822 QFAA G0 revision of the chip. If you are working with a previous revision of the chip, read version 1.3 or earlier of thedocument.Updated the following sections:Key Feature list on the front page,Chapter 1 “Introduction” on page10,Section 2.1 “Block diagram” on page11,Section 2.2 “Pin assignments and functions” on page12,Section 3.2 “Memory” on page21,Section 3.5 “Programmable Peripheral Interconnect (PPI)” on page27,Section 3.7 “GPIO” on page31,Section 4.1 “2.4 GHz radio (RADIO)” on page32,Section 4.2 “Timer/counters (TIMER)” on page33,Section 4.3 “Real Time Counter (RTC)” on page33,Section 4.10 “Serial Peripheral Interface (SPI/SPIS)” on page35,Section 4.12 “Universal Asynchronous Receiver/Transmitter (UART)” on page36,Section 4.14 “Analog to Digital Converter (ADC)” on page36,Section 4.15 “GPIO Task Event blocks (GPIOTE)” on page36,Chapter 5 “Instance table” on page37,Chapter 6 “Absolute maximum ratings” on page38,Chapter 8 “Electrical specifications” on page40,Section 8.1 “Clock sources” on page40,Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)” on page41,Section 8.1.3 “32 MHz crystal oscillator (32M XOSC)” on page42,Section 8.2 “Power management” on page45,Section 8.3 “Block resource requirements” on page49,Section 8.7 “Universal Asynchronous Receiver/Transmitter (UART) specifications” on page56,Section 8.9 “Serial Peripheral Interface (SPI) Master specifications” on page58,Section 8.11 “GPIO Tasks and Events (GPIOTE) specifications” on page60,Section 8.13 “Timer (TIMER) specifications” on page62,Section 8.16 “Random Number Generator (RNG) specifications” on page63,Section 8.17 “AES Electronic Codebook Mode Encryption (ECB) specifications” on page63, Section 8.18 “AES CCM Mode Encryption (CCM) specifications” on page63,Section 8.19 “Accelerated Address Resolver (AAR) specifications” on page63,Section 8.21 “Quadrature Decoder (QDEC) specifications” on page64,Section 11.1 “PCB guidelines” on page79,Section 11.3 “QFAA QFN48 package” on page82, andSection 11.7 “CEAA WLCSP package” on page106.Added the following sections:Section 3.3 “Memory Protection Unit (MPU)” on page23,Section 4.5 “AES CCM Mode Encryption (CCM)” on page34,Section 4.6 “Accelerated Address Resolver (AAR)” on page34,Section 4.16 “Low Power Comparator (LPCOMP)” on page36,Section 8.5.7 “Antenna matching network requirements” on page55,Section 8.8 “Serial Peripheral Interface Slave (SPIS) specifications” on page57,Section 8.18 “AES CCM Mode Encryption (CCM) specifications” on page63,Section 8.19 “Accelerated Address Resolver (AAR) specifications” on page63, and Section 8.24 “Low Power Comparator (LPCOMP) specifications” on page66.May 2013 1.3Updated schematics and BOMs in section 11.3 on page 61.April 2013 1.2Added chip variant nRF51822-CEAA. Updated feature list on front page. UpdatedSection 3.2.1 on page 15, Section 3.2.2 on page 15, Chapter 6 on page 28,Section 10.4 on page 52, and Section 10.5.1 on page 53.AddedSection 2.2.2 on page 10, Section 7.1 on page 29, Section 9.2 on page 50,and Section 11.3 on page 61.Removed PCB layouts in Chapter 11 on page 54.March 2013 1.1Added chip variant nRF51822-QFAB. Added 32 MHz crystal oscillator feature. Updated feature list on front page. Moved subsection ‘Calculating current when the DC/DCconverter is enabled’ from chapter 8 to the nRF51 Series Reference Manual.UpdatedChapter 1 on page 6, Section 2.2 on page 8, Section 3.2 on page 12,Section 3.5 on page 16, Section 3.5.1 on page 17, Section 4.2 on page 21, Chapter 5 onpage 24, Section 8.1 on page 27, Section 8.1.2 on page 28, Section 8.1.5 on page 30,Section 8.2 on page 32, Section 8.3 on page 34, Section 8.5.3 on page 36, Section 8.8 onpage 40, Section 8.9 on page 41, Section 8.10 on page 42, Section 8.14 on page 43,Chapter 10 on page 47, Section 11.2 on page 51, Section 11.3 on page 54, andSection 11.4 on page 57.AddedSection 3.5.4 on page 19, Section 8.1.3 on page 29, andSection 11.1 on page 50.November 2012 1.0Changed from PPS to PS. Updated the feature list on the front page.UpdatedTable 11 on page 25, Table 12 on page 26, Table 14 on page 28,Table 15 on page 28, Table 16 on page 29, Table 17 on page 29,Table 18 on page 30, Table 19 on page 31, Table 21 on page 32,Table 22 on page 32, Table 23 on page 33,Table 27 on page 36,Table 28 on page 37, Table 29 on page 37, Table 31 on page 38,Table 32 on page 38, Table 35 on page 39, Table 38 on page 40,Table 39 on page 40, Table 55 on page 47, Figure 9 on page 48, andTable 57 on page 50.Table of contents1Introduction (10)1.1Required reading (10)1.2Writing conventions (10)2Product overview (11)2.1Block diagram (11)2.2Pin assignments and functions (12)3System blocks (20)3.1CPU (20)3.2Memory (21)3.3Memory Protection Unit (MPU) (23)3.4Power management (POWER) (24)3.5Programmable Peripheral Interconnect (PPI) (27)3.6Clock management (CLOCK) (28)3.7GPIO (31)3.8Debugger support (31)4Peripheral blocks (32)4.1 2.4 GHz radio (RADIO) (32)4.2Timer/counters (TIMER) (33)4.3Real Time Counter (RTC) (33)4.4AES Electronic Codebook Mode Encryption (ECB) (33)4.5AES CCM Mode Encryption (CCM) (34)4.6Accelerated Address Resolver (AAR) (34)4.7Random Number Generator (RNG) (34)4.8Watchdog Timer (WDT) (34)4.9Temperature sensor (TEMP) (35)4.10Serial Peripheral Interface (SPI/SPIS) (35)4.11Two-wire interface (TWI) (35)4.12Universal Asynchronous Receiver/Transmitter (UART) (36)4.13Quadrature Decoder (QDEC) (36)4.14Analog to Digital Converter (ADC) (36)4.15GPIO Task Event blocks (GPIOTE) (36)4.16Low Power Comparator (LPCOMP) (36)5Instance table (37)6Absolute maximum ratings (38)7Operating conditions (39)7.1WLCSP light sensitivity (39)7.2CTAA and CTAC mechanical strength (39)8Electrical specifications (40)8.1Clock sources (40)8.2Power management (45)8.3Block resource requirements (49)8.4CPU (49)8.5Radio transceiver (50)8.6Received Signal Strength Indicator (RSSI) specifications (55)8.7Universal Asynchronous Receiver/Transmitter (UART) specifications (56)8.8Serial Peripheral Interface Slave (SPIS) specifications (57)8.9Serial Peripheral Interface (SPI) Master specifications (58)8.10I2C compatible Two Wire Interface (TWI) specifications (59)8.11GPIO Tasks and Events (GPIOTE) specifications (60)8.12Analog to Digital Converter (ADC) specifications (61)8.13Timer (TIMER) specifications (62)8.14Real Time Counter (RTC) (62)8.15Temperature sensor (TEMP) (62)8.16Random Number Generator (RNG) specifications (63)8.17AES Electronic Codebook Mode Encryption (ECB) specifications (63) 8.18AES CCM Mode Encryption (CCM) specifications (63)8.19Accelerated Address Resolver (AAR) specifications (63)8.20Watchdog Timer (WDT) specifications (64)8.21Quadrature Decoder (QDEC) specifications (64)8.22Non-Volatile Memory Controller (NVMC) specifications (65)8.23General Purpose I/O (GPIO) specifications (66)8.24Low Power Comparator (LPCOMP) specifications (66)9Mechanical specifications (67)9.1QFN48 package (67)9.2CDAB WLCSP package (68)9.3CEAA WLCSP package (69)9.4CFAC WLCSP package (70)9.5CTAA WLCSP package (71)9.6CTAC WLCSP package (72)10Ordering information (73)10.1Chip marking (73)10.2Inner box label (73)10.3Outer box label (74)10.4Order code (74)10.5Abbreviations (75)10.6Code ranges and values (76)10.7Product options (78)11Reference circuitry (79)11.1PCB guidelines (79)11.2Reference design schematics (81)11.3QFAA QFN48 package (82)11.4QFAB QFN48 package (88)11.5QFAC QFN48 package (94)11.6CDAB WLCSP package (100)11.7CEAA WLCSP package (106)11.8CFAC WLCSP package (112)11.9CTAA WLCSP package (118)11.10CTAC WLCSP package (124)12Glossary (130)万联芯城专注电⼦元器件配单服务,只售原装现货库存,万联芯城电⼦元器件全国供应,专为终端⽣产,研发企业提供现货物料,价格优势明显,BOM配单整单采购可享优惠价,提交BOM表报价,最快可当天发货,电⼦元器件现货销售,满⾜客户物料需求,万联芯城凭借丰富的电⼦元器件供应链体系已在业内打下良好的品牌⼝碑,完整PDF资料点击进⼊万联芯城。
OHTCOMTechnology Ltd.nRF51822模块规格说明书Datasheet of nRF51822 Modules2015.6.1目录1 简介 Introduction (3)2 nRF51822 M0 BLE模块介绍 specification for M0 Module . 4天线的连接 (7)程序的烧录 (8)表一 nRF51822 M0工作参数 (8)3 nRF51822 M1 BLE模块介绍 specification for M1 Module . 9程序的烧录 (11)表二 nRF51822 M1工作参数 (11)4 History (13)5 联系方式CONTACT US (14)NOTES:If you are customers from overseas, please contact sales@ for quotation and specifications of English version.1 简介IntroductionnRF51822 Mx BLE低功耗蓝牙模块目前包括nRF51822 M0、nRF51822 M1两款。
这两款BLE模块都是以nRF51822为主控芯片,封装不同的模块。
nRF51822 M0模块包含了LIS3DH3轴传感器,与百度手环使用相同的基础硬件,可以用来开发运动手环等穿戴设备。
nRF51822 M1模块单有一片nRF51822芯片,可以选择16kB RAM或者32kB RAM的不同版本,可以用来开发iBeacon、室内定位、穿戴设备,计算机控制等,应用更灵活,满足不同需求。
nRF51822 M0nRF51822 M12 nRF51822 M0 BLE模块介绍specification for M0 ModulenRF51822 M0采用BGA的nRF51822芯片封装并且集成了高低速晶振、LIS3DH三轴传感器,模块尺寸仅为10.5mm*8.5mm*1.5mm,为业界最小封装。
0、功能简介IC功能包括:256kB片上闪存和16kB RAM;数字和混合信号周边,包括SPI、2-wire、ADC以及正交解码器;16 PPI通道;撘配片上LDO时电源范围为1.8-3.6V,LDO旁路模式为1.75-1.95V ;片上下拉DC/DC转换器用于3V电池(例如,纽扣电池);片上+/- 250 ppm 32kHZ RC振荡器,在蓝牙低功耗应用,不需外部32kHz晶体,可节省成本和电路板空间;6x6mm 48脚QFN封装,提供最多可达32个GPIO;完整的蓝牙协议堆栈(到配置文件的链接层)。
nRF51822的S110是可下载、免版税、预编译二进制蓝牙低功耗堆栈,可独立编程和更新。
功能包括:异步和事件驱动SVC的API;运行时保护;GATT、GAP和L2CAP级别API;周边和广播器角色;GATT客户端和服务器;和2.4GHz RF专用协议的非并行多协议操作;少于128kB的代码和6kB的RAM,为应用程序留有超过128kB的闪存和10kB的RAM;与使用上一代nRF8001的双芯片应用相比,运行S110堆栈的nRF51822削减了高达50%的功耗。
S110堆栈和nRF51822加上nRF518 SDK相互配合,nRF518包含全面的蓝牙低功耗配置文件、服务以及示例应用集合。
1、架构围绕两条内部总线展开:AHB,APB AHB (Advanced High Performance BUS):CPU: ( Cortex-m0,NVIC,BBB,DAP)Memory : ( RAM, Flash)GPIO : P0(P0.0~P0.31)AHB to APB BridgeAPB (Advanced Peripheral BUS):左半边:Power:电源控制WDT:看门狗SPI0,SPI1TIMER0(32位),TIMER1(16位),TIMER2(16位)QDEC:正交译码器,CLOCK:提供两个时钟:HFCLK(16MHZ),LFCLK(32.768KHZ)TWI0,TWI1:两线接口,兼容I2C右半边:NVMC :非易失性存储控制器RADIO: 2.4GHZ 无线广播的数据率:250KBPS,1MBPS,2MBPS ECB: 加密功能(AES),产生HASH序列,数字签名,生成密钥流等RNG:产生随机数用于加密(基于内部热噪声),无需种子值。
(原创)使⽤nRF51822nRF51422创建⼀个简单的BLE应⽤---⼊门实例⼿册(中⽂)之⼆2 BLE介绍本章将介绍BLE协议不同的层,包括各个层的部件和它们的概念。
2.1 通⽤访问规范(Generic Access Profile,GAP)GAP是应⽤层能够直接访问BLE协议栈的最底层,它包括管理⼴播和连接事件的有关参数。
注意:GAP的更多详细介绍见《Bluetooth Core Specification》(蓝⽛核⼼规范)的第3卷C部分。
2.1.1 ⾓⾊为了创建和维持⼀个BLE连接,引⼊了“⾓⾊”这⼀概念。
⼀个BLE设备不是集中器⾓⾊就是外围设备⾓⾊,这是根据是谁发起这个连接来确定的。
集中器设备总是连接的发起者,⽽外围设备总是被连接者。
集中器和外围设备的关系就像链路层中的主机和从机的概念。
在LED Button应⽤例程中,使⽤S110 SoftDevice烧录到nRF51822作为外围设备,计算机或者⼿机作为集中器。
除了集中器⾓⾊和外围设备⾓⾊,蓝⽛核⼼规范还定义了观察者⾓⾊和⼴播者⾓⾊,观察者⾓⾊监听空中的事件,⼴播者⾓⾊只是⼴播信息⽽不接收信息。
观察者⾓⾊和⼴播者⾓⾊都只⼴播⽽并不建⽴连接。
它们在我们的这个应⽤中并不适⽤。
注意:在⼀个连接的另⼀端的设备被称为对等设备,不管它是集中器还是外围设备。
2.1.2 ⼴播集中器能够与外围设备建⽴连接,外围设备必须处于⼴播状态,它每经过⼀个时间间隔发送⼀次⼴播数据包,这个时间间隔称为⼴播间隔,它的范围是20ms到10.24s。
⼴播间隔影响建⽴连接的时间。
集中器发送⼀个连接请求来发起连接之前,必须接收到⼀个⼴播数据包,外围设备发送⼀个⼴播数据包之后⼀⼩段时间内只监听连接请求。
⼀个⼴播数据包最多能携带31字节的数据,它通常包含⽤户可读的名字、关于设备发送数据包的有关信息、⽤于表⽰此设备是否可被发现的标志等类似的标志。
当集中器接收到⼴播数据包后,它可能发送请求更多数据包的请求,称为扫描回应,如果它被设置成主动扫描,外围设备将会发送⼀个扫描回应做为对集中器请求的回应,扫描回应最多可以携带31字节的数据。
1.Timer在微處理器的開發上,時脈控制是必需的,把事件分時處理,才能讓微處理器效能才能夠提升,因此如何善用時脈控制是必要的技能。
2.System Clock -nRF51822 Clock 可以分為兩個部分,一部分是 LFCLK 使用是 32KHz 的時脈頻率。
,另一部分HFCLK 是使用 16/32 MHz 的時脈頻率。
2.1.Task2.2.Event2.3.RegisterLFCLK 可以使用外部的振盪器或者使用內部的 32.768KHz RC 振盪器。
由 LFCLKSRC register 來選擇振盪器 Source。
HFCLK 可以使用外部的振盪器或者使用內部的 16MHz RC 振盪器,當系統啟動時,內部的 16MHz RC 振盪器就會啟動,提供給 Clock 給 CPU 和週邊模組。
若使用32MHz 外部的振盪器需要設定XTALFREG register。
當開發者經由 HFCLKSTART Task 來使用外部的振盪器,而內部的振盪器也就會關閉。
當開發者經由 HFCLKSTOP Task 停止外部的振盪器,而內部的振盪器也就會柀自動啟動。
HFCLKSTAT regsiter 來查詢 HFCLK 的狀態。
在使用 RADIO 和 內部 RC 32.768KHz 振盪器校正程序時,都需要用到外部的16/32 MHz 的振盪器。
故 16/32 MHz 的外部振盪器是不能拿掉的,但是 32.768KHz 的外部振盪器是可以省略的。
3.RTCnRF51822 RTC 方塊圖❏RTC 的 Clock Source 是 32.768 KHz,當微處理器需要省電的情形下,16MHz 被停止的情況下,RTC 仍需要可以動作。
同時 LFCLK 的也是使用32.768KHz。
❏COUNTER 的計數是由 32.768 KHz 經過 PRESCALER 計數成 0,PRESCALER會重新載入設定值,同時 TICK Event 也會被觸發。
nRF51822SWD在线烧录参考指南Application NotenRF51822 SWD 在线编程参考指南⼴州致远电⼦股份有限公司类别内容关键词nRF51822, 在线编程, AK100Pro-4P ;主要特点1.独有的1拖4(甚⾄1拖16)量产⾼速在线编程;2.⽀持灵活的序列号烧写; 3.⽀持⼯程加密,保障固件安全; 4.⽀持⼀键添加多个⽂件烧写;5.⾃由的组合定制操作,允许定制任意操作序列;6.全⾃动上下电量产检测,⽆需操作软件,⼤幅提升烧写效率。
摘要本⽂主要介绍AK100Pro-4P 如何通过SWD 对Nordic 的nRF51822芯⽚进⾏在线编程⽬录1. nRF51822简介 (1)2. AK100Pro简介 (2)3. 准备条件 (4)3.1准备STM32F100VC⽬标板 (4)3.2安装KFlashPro软件 (4)3.3连接nRF51822-QFAA⽬标板⾄AK100Pro-4P (5)4. 基本烧写 (7)4.1创建⼯程 (7)4.2参数配置 (7)4.2.1硬件选择 (7)4.2.2主要设置 (8)4.2.3附加设置 (9)4.2.4程序烧写 (9)4.3烧写配置 (10)4.4进⾏烧写 (11)5. ⾼级烧写 (12)5.1量产烧写配置 (13)5.2加密与解密 (14)5.2.1加密 (14)5.2.2解密 (15)6. 技术⽀持 (16)7. 订购信息 (17)1. nRF51822简介nRF51822是Nordic Semiconductor公司推出的⼀款基于ARM⾼性能Cortex-M0 32位RISC内核的微控制器,配备256kB/128KB Flash + 16kB RAM。
嵌⼊2.4GHz 收发器,⽀持S110 低功耗蓝⽛协议栈及2.4GHz 协议栈(包括Gazell)。
nRF51822 还具备丰富的模拟和数字周边产品,可以在⽆需CPU 参与的情况下通过可编程周边产品互联(PPI) 系统进⾏互动。
OHTCOM
Technology Ltd.
nRF51822模块规格说明书Datasheet of nRF51822 Modules
2015.6.1
目录
1 简介 Introduction (3)
2 nRF51822 M0 BLE模块介绍 specification for M0 Module . 4
天线的连接 (7)
程序的烧录 (8)
表一 nRF51822 M0工作参数 (8)
3 nRF51822 M1 BLE模块介绍 specification for M1 Module . 9
程序的烧录 (11)
表二 nRF51822 M1工作参数 (11)
4 History (13)
5 联系方式CONTACT US (14)
NOTES:
If you are customers from overseas, please contact sales@ for quotation and specifications of English version.
1 简介Introduction
nRF51822 Mx BLE低功耗蓝牙模块目前包括nRF51822 M0、nRF51822 M1两款。
这两款BLE模块都是以nRF51822为主控芯片,封装不同的模块。
nRF51822 M0模块包含了LIS3DH3轴传感器,与百度手环使用相同的基础硬件,可以用来开发运动手环等穿戴设备。
nRF51822 M1模块单有一片nRF51822芯片,可以选择16kB RAM或者32kB RAM的不同版本,可以用来开发iBeacon、室内定位、穿戴设备,计算机控制等,应用更灵活,满足不同需求。
nRF51822 M0nRF51822 M1
2 nRF51822 M0 BLE模块介绍specification for M0 Module
nRF51822 M0采用BGA的nRF51822芯片封装并且集成了高低速晶振、LIS3DH三轴传感器,模块尺寸仅为10.5mm*8.5mm*1.5mm,为业界最小封装。
该模块引出了10个GPIO口和3个ADC(从LIS3DH 上引出,见下图),所有IO口可以任意配置为RX、TX、UART、SPI、I2C等接口——这是nRF51822芯片的优势之一,用户可以自由的定义GPIO口。
该模块的焊盘采用半孔工艺,孔间距为0.7mm,可以直接焊接到用户的主板上。
另外,我们提供了实验用的转接板(配有天线),引出所有接口,转接板焊盘间距为2.54mm标准间距,可供实验。
这款模块不含天线,需要在客户的主板上加天线,可以选择PCB印制天线(如我们提供的转接板),也可以选择在模块顶端加陶瓷天线或者SMA基座天线。
nRF51822 M0模块尺寸
M0转接板图片
LIS3DH中引出的3个ADC接口
M0模块GPIO口图
天线的连接
这款M0模块因为体积的原因,我们没有在板子上直接设计天线,用户可以在自己的主板上加上天线,推荐贴片天线或者印制天线,来控制体积的大小,如图所示。
1、PCB印制天线:如果用户选用PCB印制天线的话,那么将天线
设计在尽量靠近模块的地方,把模块焊接在主板上,并且把天线的连接点焊接上即可。
注意:PCB天线一般是和体积相关的,对体积有要求的客户可以选用贴片芯片。
2、贴片天线:市面上有陶瓷及金属贴片天线,都可以和模块匹配,
焊接的办法也是尽量的靠近模块,并且把天线的连接点接上,不要加任何匹配电容。
程序的烧录
1、少量程序的烧录
M0模块程序烧录用SWD的标准接口:VCC、SWDIO、SWDCLK、GND,如果用标准jlink v9的话即1,7,9,20 pin脚,用杜邦线一端连接到jlink上,另一端焊接到转接板对应的点上,即可下载程序。
2、批量程序的烧录
如果进入量产阶段,需要大量写入程序,可以做对应的测试架,把程序写好后生产HEX文件,交给工厂烧录。
表一nRF51822 M0工作参数
3 nRF51822 M1 BLE模块介绍specification for M1 Module
nRF51822 M1采用QFN48的nRF51822芯片封装模块尺寸为25mm*17mm*1mm。
该模块引出了20个GPIO口和6个ADC(P1-P6,见下图),所有GPIO口可以任意配置为RX、TX或UART等接口——这可以说是nRF51822芯片优势之一,用户可以自由的定义GPIO口。
该模块的焊盘采用全孔和半孔相结合工艺,孔间距为标准1.27mm,可直插面包板或用半孔焊接到用户的主板上。
这款模块德国设计师天线,经过阻抗匹配测试,信号优良,可媲美Balun+陶瓷天线,从而控制成本。
此模块可以定制两种不同版本的芯片,16kB RAM或者32kB RAM,32kB RAM支持物联网IPv6。
nRF51822 M1模块图
nRF51822 M1模块GPIO口图
nRF51822 M1 GPIO口设置图
程序的烧录
1、少量程序的烧录
M1模块采用标准的1.27mm排针间距,程序烧录用SWD的标准接口:VCC、SWDIO、SWDCLK、GND,如果用标准jlink v9的话即1,7,9,20 pin脚。
可以在模块上焊接上排针,然后用杜邦线一端连接到jlink 上,另一端焊接到排针对应的点上,即可下载程序。
2、批量程序的烧录
如果进入量产阶段,需要大量写入程序,可以订制对应的测试架(大约200人民币一台),把程序写好后生产HEX文件,交给工厂烧录。
表二nRF51822 M1工作参数
4 History
5 联系方式CONTACT US
网店地址: 微博地址:OHTCOM
技术论坛:
邮件地址:sales@
NOTES:
If you are customers from overseas, please contact sales@ for quotation and specifications of English version.
ONLINESHOP
WEIBO。