非接触式智能IC卡中英文资料对照外文翻译文献综述
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非接触式智能IC卡
中英文资料外文翻译
外文资料
IEEE JOURNAL OF SOLID-STATE CIRCUITS , VOL. 36 , NO.7, JULY 2001
A New Contact-less Smart Card IC Using an On-Chip Antenna and an
Asynchronous Micro-controller
André Abrial, Jacky Bouvier, Marc Renaudin,
Member, IEEE, Patrice Senn, Member, IEEE, and Pascal Vivet
Abstract—This paper describes a new generation of Contact-less Smart Card Chip which integrates an on-chip coil connected
to a power reception system and an emitter/receiver module compatible with the IS0 14443 standard, together with an
asynchronous quasi-delay insensitive (QDI) 8-bit micro-controller. Beyond the Contact-less Smart Card application field, this
new chip demonstrates that system-on-chip integrating power reception and management, radio-frequency communication, and
signal processing is feasible. It associates analog/digital parts as well as synchronous/asynchronous logics and has been
fabricated in a CMOS six metal layers 0.25--m technology from ST-Micro-electronics.
Index Terms— Asynchronous processor, coil-on-chip, quasi-delay insensitive circuits, Smart Cards, system-on-chip.
I. INTRODUCTION
The Smart Card market enters a new era, with a booming number of applications in various domains and
new countries willing to use this technology.
Smart Cards are becoming more and more ubiquitous and the trend is to integrate a card reader in all
kind of equipment (PCs,PDAs, mobile phones, etc.). E-commerce, citizen administration, and others could
be, through the Internet, good vehicles to allow service providers to develop new services using the Smart
Card as a high-security key element.
In this context, contact-less Smart Cards should play an important part. The absence of contact induces
lower maintenance cost, improves ease of use, reliability, and, therefore, end-user satisfaction. They are
2 declined in several types according to the location of the antenna. It can be on the card, on the module,or
integrated directly on the chip. This later technique significantly decreases card fabrication cost. Moreover,
as the user still inserts his card in a reader slot, transactions remain as safe as when using cards with contacts.
Since most applications require low-cost low-power systems, the goal of this work is to integrate on a single
chip an antenna, an ISO14443 compliant radio-frequency emitter/receiver, together with an asynchronous
micro-controller. Integrating the whole system on silicon should pave the way to new reliable low-cost
Contact-less Smart Card chips.
These main key technologies used to design this new Smart Card chip are presented in Section II. The
Smart Card chip de-sign is detailed in Section III, and the design methodology is briefly described in Section
IV. Experimental results are given in Section V.
II. INNOVATION
The innovation of this chip lies in the association on the same die of two key technologies [9]: an
integrated power reception system with an on-chip coil [5], and an 8-bit CISC QDI asynchronous
micro-controller [8]. This association enables us to take advantage of the asynchronous logic properties in
order to decrease the design constraints of the integrated power reception system and also to increase the
working domain of the digital processing part.
In fact, the asynchronous logic has three interesting advantages valuable for the Contact-less Smart Card
application considered here [6], [7]. Instead of being clock driven, asynchronous circuits are data driven
which results in a lower mean-power consumption. Instead of implementing a central control unit,
asynchronous circuits implement a distributed control system which results in smaller current peaks and then
lower electromagnetic emission because the electrical activity is spread over time. Finally, instead of being
―clock timed‖,asynchronous circuits are self-timed which enables an automatic regulation of the
performance. Hence, QDI asynchronous circuits are not sensitive to voltage variations, and runs at their
maximum speed with respect to the power received.
Since the QDI 8-bit micro-controller is so robust with respect to the power supply variations (see
Section III), the design of the power reception system is made easier: lower average power delivered, as well
as the peak power, and simplified regulation of the supply voltage. This not only makes the design easier,
but also decreases the area (smaller VDD smoothing capacitance).Finally, because of its low current peaks
the QDI asynchronous micro-controller does not interfere with the load modulation used in the ISO 14 443
standard for the communication between the card and the reader. This enables the micro-controller to run