tpic6273
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TPIC6273 POWER LOGIC OCTAL D-TYPE LATCH
SLIS011A – APRIL 1992 – REVISED OCTOBER 1995
Copyright © 1995, Texas Instruments Incorporated1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
•Low rDS(on)...1.3 Ω Typ
•Avalanche Energy ...75 mJ
•Eight Power DMOS Transistor Outputs of
250-mA Continuous Current•1.5-A Pulsed Current Per Output
•Output Clamp Voltage up to 45 V
•Low Power Consumption
description
The TPIC6273 is a monolithic high-voltagehigh-current power logic octal D-type latch withDMOS transistor outputs designed for use insystems that require relatively high load power.The device contains a built-in voltage clamp on theoutputs for inductive transient protection. Powerdriver applications include relays, solenoids, andother medium-current or high-voltage loads.
The TPIC6273 contains eight positive-edge-triggered D-type flip-flops with a direct clear input.Each flip-flop features an open-drain powerDMOS transistor output.
When clear (CLR) is high, information at the Dinputs meeting the setup time requirements istransferred to the DRAIN outputs on the positive-going edge of the clock pulse. Clock triggeringoccurs at a particular voltage level and is notdirectly related to the transition time of thepositive-going pulse. When the clock input (CLK)is at either the high or low level, the D input signalhas no effect at the output. An asynchronous CLRis provided to turn all eight DMOS-transistoroutputs off.
The TPIC6273 is characterized for operation overthe operating case temperature range of –40°Cto 125°C.
DRAIN14DRAIN25DRAIN36DRAIN47DRAIN514DRAIN615DRAIN716DRAIN8171234 567891020191817161514131211CLRD1D2DRAIN1DRAIN2DRAIN3DRAIN4D3D4GNDVCCD8D7DRAIN8DRAIN7DRAIN6DRAIN5D6D5CLKDW OR N PACKAGE(TOP VIEW)logic symbol†R111CLKC1CLR†This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12.INPUTSOUTPUTLHHHFUNCTION TABLE(each channel)CLKDX↑↑LXHLXHLHLatchedCLRDRAINH = high level, L = low level, X = irrelevant1D2D13D28D39D412D513D618D719D8
PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.TPIC6273POWER LOGIC OCTAL D-TYPE LATCH
SLIS011A – APRIL 1992 – REVISED OCTOBER 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)CLK11CLR1C1R
1DD12
DRAIN14
C1R1DD2
3
DRAIN25
C1R1DD3
8
DRAIN36
C1R1D9
DRAIN47
C1R1DD5
12
DRAIN514
C1R1DD6
13
DRAIN615
C1R1DD7
18
DRAIN716
C1R1DD8
19
DRAIN817
D410GNDTPIC6273POWER LOGIC OCTAL D-TYPE LATCH
SLIS011A – APRIL 1992 – REVISED OCTOBER 1995
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic of inputs and outputsEQUIVALENT OF EACH INPUTTYPICAL OF ALL DRAIN OUTPUTSVCC
Input
GNDGND
DRAIN45 V
12 V25 V12 V
absolute maximum ratings over recommended operating case temperature range (unlessotherwise noted)†
Logic supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic input voltage range, VI –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power DMOS drain-to-source voltage, VDS (see Note 2) 45 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous source-drain diode anode current 1 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulsed source-drain diode anode current 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulsed drain current, each output, all outputs on, IDn, TA = 25°C (see Note 3) 750 mA. . . . . . . . . . . . . . . . . . .
Continuous drain current, each output, all outputs on, IDn, TA = 25°C 250 mA. . . . . . . . . . . . . . . . . . . . . . . . . .
Peak drain current single output, IDM,TA = 25°C (see Note 3) 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single-pulse avalanche energy, EAS (see Figure 4) 75 mJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Avalanche current, IAS (see Note 4) 1 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating virtual junction temperature range, TJ –40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
