®TinyLogic UHS Two-Input AND GateFeaturesUltra-High Speed: t PD 2.7ns (Typical) into 50pF at 5V V CCHigh Output Drive: ±24mA at 3V V CCBroad V CC Operating Range: 1.65V to 5.5VMatches Performance of LCX Operated at 3.3V V CC Power Down High Impedance Inputs/OutputsOver-Voltage Tolerance inputs facilitate 5V to 3V TranslationProprietary Noise/EMI Reduction CircuitryUltra-Small MicroPak™ PackagesSpace-Saving SOT23 and SC70 Packages DescriptionThe NC7SZ08 is a single two-input AND gate from Fairchild’s Ultra-High Speed (UHS) series of TinyLogic®. The device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive while maintaining low static power dissipation over a broad V CC operating range. The devise is specified to operate over the 1.65V to 5.5V V CC operating range. The inputs and output are high impedance when V CC is 0V. Inputs tolerate voltages up to 6V, independent of V CC operating voltage.Ordering InformationPart Number Top Mark Eco Status Package Packing MethodNC7SZ08M5X 7Z08 RoHS 5-Lead SOT23, JEDEC MO-178 1.6mm 3000 Units on Tape & ReelNC7SZ08P5X Z08 RoHS 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & ReelNC7SZ08L6X GG RoHS 6-Lead MicroPak™, 1.00mm Wide 5000 Units on Tape & ReelNC7SZ08FHX GG Green 6-Lead,MicroPak2, 1x1mm Body, .35mm Pitch 5000 Units on Tape & ReelFor Fairchild’s definition of Eco Status, please visit: /company/green/rohs_green.html.NC7SZ08 — TinyLogic ® UHS Two-Input AND GateFigure 1. Logic SymbolPin ConfigurationsFigure 2. SC70 and SOT23 (Top View)Figure 3. MicroPak (Top Through View)Pin DefinitionsPin # SC70 / SOT23Pin # MicroPakNameDescription1 1 A Input2 2 B Input3 3 GND Ground4 4 Y Output56 V CC Supply Voltage5 NC No ConnectFunction TableY=ABInputs OutputNC7SZ08 — TinyLogic ® UHS Two-Input AND GateSymbol Parameter Min. Max. UnitV CC Supply Voltage -0.5 6.0 V V IN DC Input Voltage -0.5 6.0 V V OUT DC Output Voltage -0.56.0 V V IN < -0.5V -50 I IK DC Input Diode Current V IN > 6.0V +20 mAV OUT < -0.5V-50I OK DC Output Diode Current V OUT > 6V, V CC =GND+20 mAI OUT DC Output Current±50 mA I CC or I GND DC V CC or Ground Current±50 mA T STG Storage Temperature Range -65 +150 °C T J Junction Temperature Under Bias+150 °C T LJunction Lead Temperature (Soldering, 10 Seconds)+260°CSOT-23 200SC70-5 150MicroPak-6 130 P DPower Dissipation at +85°CMicroPak2-6 120mWHuman Body Model, JESD22-A114 4000 ESD Charged Device Model, JESD22-C1012000VRecommended Operating ConditionsThe Recommended Operating Conditions table defines the conditions for actual device operation. Recommendedoperating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.Symbol ParameterConditions Min. Max. UnitSupply Voltage Operating 1.65 5.50 V CCSupply Voltage Data Retention1.50 5.50 V V IN Input Voltage 0 5.5VV OUT Output Voltage0 V CC V T A Operating Temperature-40 +85 °C V CC at 1.8V, 2.5V ± 0.2V 0 20® UHS Two-Input AND Gate1.65 1.55 1.65 1.55 1.80 1.70 1.80 1.702.30 2.20 2.30 2.203.00 2.90 3.00 2.904.50V IN =V IH , I OH =-100µA 4.40 4.504.401.65 I OH =-4mA 1.29 1.52 1.292.30 I OH =-8mA 1.90 2.15 1.903.00 I OH =-16mA 2.50 2.80 2.40 3.00 I OH =-24mA 2.40 2.68 2.30VV OHHIGH LevelOutput Voltage4.50 I OH =-32mA 3.90 4.20 3.801.65 0.00 0.10 0.10 1.80 0.00 0.10 0.102.30 0.00 0.10 0.103.00 0.00 0.10 0.104.50V IN =V IL , I OL =100µA 0.00 0.10 0.10 1.65 I OL =4mA 0.80 0.24 0.24 2.30 I OL =8mA 0.10 0.30 0.30 3.00 I OL =16mA 0.15 0.40 0.40 3.00 I OL =24mA 0.22 0.55 0.55 VV OLLOW LevelOutput Voltage4.50 I OL =32mA0.22 0.55 0.55 I IN Input LeakageCurrent0 to 5.5V IN =5.5V, GND±1±10µAI OFF Power OffLeakage Current0 V IN or V OUT =5.5V 1 10 µAI CCQuiescent SupplyCurrent1.65 to 5.50 V IN =5.5V, GND220µA® UHS Two-Input AND Gate5.00 ± 0.500.5 2.2 4.1 0.5 4.4 3.30 ± 0.30 1.53.3 5.2 1.5 5.55.00 ± 0.50 C L =50pF,R L =500Ω0.8 2.7 4.5 0.84.8C IN Input Capacitance 0.00 4 pF 3.30 20 C PDPower DissipationCapacitance (2)5.0025pF Figure 6Note:2. C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operatingcurrent consumption (I CCD ) at no output lading and operating at 50% duty cycle. C PD is related to I CCD dynamic operating current by the expression: I CCD =(C PD )(V CC )(f IN )+(I CC static).Notes:3. C L includes load and stray capacitance.4. Input PRR=1.0MHz; t W 500ns.Figure 4. AC Test CircuitFigure 5. AC Waveforms=1.8ns; PRR=10MHz; Duty Cycle=50%.Test Circuit® UHS Two-Input AND Gate132LAND PATTERN RECOMMENDATIONC 0.10C0.20C A B0.60 REF0.550.35SEATING PLANE0.25GAGE PLANE8°0°NOTES: UNLESS OTHEWISE SPECIFIEDA) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, VARIATION AA,B) ALL DIMENSIONS ARE IN MILLIMETERS. 1.45 MAX1.300.900.150.051.900.950.500.301.502.600.701.00SEE DETAIL A0.220.08C) MA05Brev5TOP VIEW (0.30)Figure 7. 5-Lead SOT23, JEDEC MO-178 1.6mmPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: /packaging/.Tape and Reel Specifications®UHS Two-Input AND GateFigure 8. 5-Lead, SC70, EIAJ SC-88a, 1.25mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any mannerwithout notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verifyor obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specificallythe warranty therein, which covers Fairchild products.Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:/packaging/.Tape and Reel Specifications® UHS Two-Input AND Gate2. DIMENSIONS ARE IN MILLIMETERS1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD MAC06AREVCNotes:3. DRAWING CONFORMS TO ASME Y14.5M-1994TOP VIEWRECOMMENED LAND PATTERNBOTTOM VIEWA0.55MAX0.05C(0.75)(0.52)(0.30)6X 1X6X PIN 1DETAIL A0.075 X 45CHAMFER0.250.150.350.250.400.300.5(0.05) 1.0DETAIL APIN 1 TERMINAL0.400.300.450.350.100.000.10C B A 0.05CC0.05C0.050.005X 5X 6X(0.13)4X6XFigure 9. 6-Lead, MicroPak™, 1.0mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: /packaging/.®UHS Two-Input AND Gate DETAIL A5XFigure 10. 6-Lead, MicroPak2, 1x1mm Body, .35mm PitchPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any mannerwithout notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verifyor obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specificallythe warranty therein, which covers Fairchild products.Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:/packaging/.NC7SZ08 — TinyLogic ® UHS Two-Input AND Gate。
电气性能试验4 总纲4.1 外壳4.1.1内含电芯或电池组的外壳应有所要求强度和刚度来抵制可能发生的滥用，在预定使用中发生爆炸，为了减少火灾或人身伤害的危险。
4.1.2 电池组的外壳应固定好以防止晃动。
提供具有机械性的工具，例如钳子、螺丝刀、钢锯或类似的工具，此类工具的最小器械功能是能够打开外壳。
一类除外：此实验要求不适用于电极质量小于0.04g的电芯或电池。
二类除外：对于电池组重复晃动外壳，按第5章定义不会导致泄露或致使电池的温度超过60℃（140℉），这类要求不适用。
4.1.3 塑料外壳的电池。
电池的外壳应设计成不能被简单的工具将其打开，例如螺丝刀。
外壳应用超声波焊接好，或是用类似的方法将其密封好。
4.14电池外壳的材料应按高分子材料标准-电气设备使用评估UL746C归类为V-1或最小部分厚度是不易燃的。
此类除外：符合高分子材料-电气设备评估UL746C的外壳可燃性-3/4英尺火苗测试的材料不要求归类为V-1或是不易燃的。
4.2电解质4.2.1 当电池外壳在实验室温度为23±2℃条件下被砂轮刺破时，内含电芯不含有加压的蒸气或液体使材料被强制泄露。
操作5 总纲5.1 电池应按第9章进行测试。
按第12章节，进行强制放电试验，仅适用于被用于多电芯系列的电芯，比如电池组。
电池外壳测试，如18-21章节所述，仅适用于有塑料外壳的电池（包括250N持续压力，模具压力或是重物冲击试验）5.2 第22章节的燃烧试验，电芯或电池按标准测试的结果应无爆炸或着火。
对于第16章的冲击试验，17章的振动试验，19章的250N持物压力试验，20章的模具压力试验，21章的重物冲击试验，24章的温度循环试验，样品均不发生泄漏或漏液。
对于这些测试中，当质量损失结果超过图表5.1泄漏和漏液质量损失标准所示，已发生不可接受的漏液。
表 5.1 漏液或泄漏质量损失标准电芯或电池的质量最大质量损失不超过1g 0.5％1～5g 0.2％＞5g 0.1％5.4 某些终端产品设备要求电池的的输出功率是有限的。
GroundingPGT-61-164 UNIVERSAL SURETEST CIRCUIT ANALYZERPGT-61-164 SureTest 路, 可以检测以下线路状况• • • •另外, 使用正确接线 接地电压 接地阻抗 北美(标配) 中国(标配) 欧洲和英国(选配) GROUNDINGSureTest ®, 由Ideal Industries 制造, 美国 伊利诺斯州Sycamore.正确可靠的接地是进行测量的基本要求提供了一些仪器及附件用来检测接地的可靠性输出测量数据 通过电阻仪的RS-232 输出端口, 串行数据线和与Windows ® Excel ® 电® Windows 和Excel 是Microsoft 公司的注册商标。
PRS-812 Resistance Meter Prostat 电阻测量仪器提供测量所需的高精确度, 恒定的测量电压以及数据可比对功能• ANSI/ESD • ANSI/ESD • ANSI/ESD • ANSI/ESD • ESD 0.1 to 2.0x10 ohmsRS-232通信连接口 测量数据下载至 大量程 PRS-801 RESISTANCE SYSTEM SET 独特的大量程兆欧表PRS-812 可进行多种符合ResistancePSI-870 RESISTANCE /RESISTIVITY INDICATOR电池驱动 (2 x 9 Volts). PRS-801 Resistance Meter PRS-812 Resistance Meter PSI-870 Resistance/Resistivity Meter电阻测量范围从<0.1 (1.0E-1 Ω) 欧姆到200 兆兆欧姆(T Ω) (2.0E+14 Ω). 电阻测量范围从<0.1 (1.0E-1 Ω) 欧姆到 1兆兆欧姆(T Ω) (1.0E+12 Ω).电阻测量范围从1.0E+2 欧姆到 1.0E+11 欧姆.在温度23ºC 和湿度30% Rh 环境下, ± <5%. 在温度23ºC 和湿度30% Rh 环境下, ± <5%. ± 10% 两节9伏直流碱性电池供电。
