A Novel Strain Method for Enhancement of 90-nm Node and Beyond FUSI-Gated CMOS Performance

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A Novel Strain Method for Enhancement of 90-nm Node and Beyond FUSI-Gated
CMOS Performance

References: 10 Times Cited: 0
Author(s):

Chien-Ting Lin

Yean-Kuen Fang

Wen-Kuan Yen

Tung-Hsing Lee

Ming-Shing Chen

Chieh-Ming Lai

Che-Hua Hsu

Liang-Wei Chen

Li-Wei Cheng

Mike Ma

Abstract:

A novel strain engineering technique for a fully silicided (FUSI) metal gate called contact
etch stop layer (CESL)-enveloped FUSI was developed for the first time. A CESL was
deposited prior to the FUSI RTP2 (the second rapid thermal process of FUSI gate
formation) to confine the Ni{sub}xSi FUSI. Then, the phase transfer and volume change of
the enveloped FUSI after RTP2 induced a tensile stress to enhance I{sub}(ON). For
example, 500℃ RTP2 induced 1-GPa tensile stress on a blanket wafer test and gained
10% improvement in the I{sub}(ON) of the n-channel metal-oxide-semiconductor. The
mechanisms of the improvement were also nicely supported by
transmission-electron-microscope cross-section analysis, X-ray-diffraction spectrum, and
simulation confirmation data.

Source:
IEEE Electron Device Letters , 2007, 28 (2) : 111-113
ISSN:
0741-3106
Language:
English
Keywords:
Contact etch stop layer (CESL) ; Fully silicided (FUSI) ; Phase transfer ; Strain
engineering ; Tensile stress