74LVX08MTCX, 规格书,Datasheet 资料
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74LVX08 — Low Voltage Quad 2-Input AND GateLow Voltage Quad 2-Input AND GateFeatures■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level anddynamic threshold performanceGeneral DescriptionThe LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.Ordering InformationDevice also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.All packages are lead free per JEDEC: J-STD-020B standard.Connection Diagram Pin DescriptionLogic SymbolIEEE/IECOrder NumberPackage NumberPackage Description74LVX08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX08SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide74LVX08MTCMTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePin NamesDescriptionA n ,B n Inputs74LVX08 — Low Voltage Quad 2-Input AND GateRecommended Operating Conditions (1)The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.Note:1.Unused inputs must be held HIGH or LOW. They may not float.V CC Supply Voltage–0.5V to +7.0VI IK DC Input Diode Current, V I = –0.5V –20mA V I DC Input Voltage –0.5V to 7VI OKDC Output Diode Current V O = –0.5V –20mA V O = V CC + 0.5V+20mAV O DC Output Voltage–0.5V to V CC + 0.5VI O DC Output Source or Sink Current ±25mA I CC or I GND DC V CC or Ground Current±50mAT STG Storage Temperature –65°C to +150°CP Power Dissipation180mW T LLead Temperature (Soldering, 10 seconds)240°CSymbolParameter RatingV CC Supply Voltage 2.0V to 3.6V V I Input Voltage 0V to 5.5V V O Output Voltage 0V to V CCT A Operating Temperature –40°C to +85°C ∆ t / ∆VInput Rise and Fall Time0ns/V to 100ns/V74LVX08 — Low Voltage Quad 2-Input AND GateNoise Characteristics (2)Note:2.Input t r = t f = 3nsVoltage3.0 2.0 2.03.6 2.42.4V ILLOW Level Input Voltage2.00.50.5V3.00.80.83.60.80.8V OHHIGH Level Output Voltage2.0V IN = V IL or V IH ,I OH = –50µA 1.9 2.0 1.9V3.0V IN = V IL or V IH ,I OH = –50µA 2.9 3.02.9V IN = V IL or V IH ,I OH = –4mA2.582.48V OLLOW Level Output Voltage2.0V IN = V IL or V IH ,I OL = 50µA 0.00.10.1V3.0V IN = V IL or V IH ,I OL = 50µA 0.00.10.1V IN = V IL or V IH ,I OL = 4mA0.360.44I IN Input Leakage Current3.6V IN = 5.5V or GND ±0.1±1.0µA I CCQuiescent Supply Current3.6V IN = V CC or GND2.020.0µASymbolParameterV CC (V)C L (pF)T A = 25°CUnitsTyp.LimitV OLP Quiet Output Maximum Dynamic V OL 3.3500.30.5V V OLV Quiet Output Minimum Dynamic V OL3.350–0.3–0.5V V IHD Minimum HIGH Level Dynamic Input Voltage 3.350 2.0V V ILDMaximum LOW Level Dynamic Input Voltage3.3500.8V74LVX08 — Low Voltage Quad 2-Input AND GateNote:3.Parameter guaranteed by design t OSLH = |t PLHm –t PLHn |, t OSHL = |t PHLm –t PHLn |CapacitanceNote:4.C PDis defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the eqation: I CC(opr.) = 508.814.9 1.017.03.3 ± 0.315 4.87.1 1.08.5507.310.6 1.012.0t OSLH , t OSHL Output to Output Skew (3)2.7501.5 1.5ns3.31.51.5SymbolParameterT A = +25°CT A = –40°C to+85°CUnitsMin.Typ.Max.Min.Max.C IN Input Capacitance41010pF C PDPower Dissipation Capacitance (4)18pFC PD V CC f IN I CC×××4per Gate ,()--------------------------------------------------------Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, NOTES:UNLESS OTHERWISE SPECIFIEDA)THIS PACKAGE CONFORMS TO JEDECMS-012,VARIATION AB,ISSUE C,B)ALL DIMENSIONS ARE IN MILLIMETERS.C)DIMENSIONS DO NOT INCLUDE MOLDFLASH OR BURRS.D)LANDPATTERN STANDARD:SOIC127P600X145-14ME)DRAWING CONFORMS TO ASME Y14.5M-1994F)DRAWING FILE NAME:M14AREV138°0°SEATING PLANEDETAIL ASCALE:20:1GAGE PLANE X 45°0.10C CSEE DETAIL A1.75MAX1.501.250.250.100.250.19(1.04)0.900.500.36R0.10R0.100.500.25Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.C.DIMENSIONS ARE EXCLUSIVE OF BURRS,MOLD FLASH,AND TIE BAR EXTRUSIONSF.DRAWING FILE NAME:MTC14REV6R0.09min12.00°TOP&BOTTOM1.00D.DIMENSIONING AND TOLERANCES PER ANSI Y14.5M,1982R0.09minNDPATTERN STANDARD:SOP65P640X110-14M A.CONFORMS TO JEDEC REGISTRATION MO-153,VARIATION AB,REF NOTE 6B.DIMENSIONS ARE IN MILLIMETERSsubsidiaries,and is not intended to be an exhaustive list of all such trademarks.ACEx®Build it Now™CorePLUS™CROSSVOLT™CTL™Current Transfer Logic™EcoSPARK®EZSWITCH™*™®Fairchild®Fairchild Semiconductor®FACT Quiet Series™FACT®FAST®FastvCore™FlashWriter®*FPS™FRFET®Global Power Resource SMGreen FPS™Green FPS™e-Series™GTO™i-Lo™IntelliMAX™ISOPLANAR™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MillerDrive™Motion-SPM™OPTOLOGIC®OPTOPLANAR®®PDP-SPM™Power220®POWEREDGE®Power-SPM™PowerTrench®Programmable Active Droop™QFET®QS™QT Optoelectronics™Quiet Series™RapidConfigure™SMART START™SPM®STEALTH™SuperFET™SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS™SyncFET™®The Power Franchise®TinyBoost™TinyBuck™TinyLogic®TINYOPTO™TinyPower™TinyPWM™TinyWire™µSerDes™UHC®Ultra FRFET™UniFET™VCX™*EZSWITCH™and FlashWriter®are trademarks of System General Corporation,used under license by Fairchild Semiconductor.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY,FUNCTION,OR DESIGN.FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS,NOR THE RIGHTS OF OTHERS.THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,SPECIFICALLY THE WARRANTY THEREIN,WHICH COVERS THESE PRODUCTS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systemswhich,(a)are intended for surgical implant into the body or(b)support or sustain life,and(c)whose failure to performwhen properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury of the user.2.A critical component in any component of a life support,device,or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONSDefinition of TermsDatasheet Identification Product Status DefinitionAdvance Information Formative or In Design This datasheet contains the design specifications for product development.Specifications may change in any manner without notice.Preliminary First Production This datasheet contains preliminary data;supplementary data will bepublished at a later date.Fairchild Semiconductor reserves the right tomake changes at any time without notice to improve design.74LVX08 — Low Voltage Quad 2-Input AND Gate。