© 2001 Fairchild Semiconductor Corporation DS500506April 2001Revised September 2001FIN1019 3.3V LVDS High Speed Differential Driver/ReceiverFIN10193.3V LVDS High Speed Differential Driver/ReceiverGeneral DescriptionThis driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signals, with a typical differential input threshold of 100mV, into LVTTL levels. LVDS technology provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed clock or data transfer.Featuress Greater than 400Mbs data rate s 3.3V power supply operations 0.5ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protections 100mV receiver input sensitivitys Fail safe protection open-circuit, shorted and terminated conditions s Meets or exceeds the TIA/EIA-644 LVDS standard s Flow-through pinout simplifies PCB layout s 14-Lead SOIC and TSSOP packages save spaceOrdering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Function TableH = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High ImpedanceFail Safe = Open, Shorted, TerminatedConnection DiagramPin DescriptionsOrder Number Package NumberPackage DescriptionFIN1019M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1019MTCMTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WideInputsOutputsR IN +R IN −RE R OUT L H L L H L L H X XH Z Fail Safe ConditionL H D IN DE D OUT +D OUT −L H L H H H H L XL Z Z Open −Circuit or ZHLHPin NameDescriptionD IN LVTTL Data InputD OUT +Non-inverting LVDS Output D OUT −Inverting LVDS OutputDE Driver Enable (LVTTL, Active HIGH)R IN +Non-Inverting LVDS Input R IN −Inverting LVDS Input R OUT LVTTL Receiver OutputRE Receiver Enable (LVTTL, Active LOW)V CC Power Supply GND Ground NCNo Connect 2F I N 1019Absolute Maximum Ratings (Note 1)Recommended Operating ConditionsNote 1: The “Absolute Maximum Ratings ”: are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification.DC Electrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise specifiedSupply Voltage (V CC )−0.5V to +4.6V LVTTL DC Input Voltage (D IN , DE, RE)−0.5V to +6V LVDS DC Input Voltage (R IN +, R IN −)−0.5V to 4.7V LVTTL DC Output Voltage (R OUT )−0.5V to +6V LVDS DC Output Voltage (D OUT +, D OUT −)−0.5V to 4.7V LVDS Driver Short Circuit Current (I OSD )ContinuousLVTTL DC Output Current (I O )16 mAStorage Temperature Range (T STG )−65°C to +150°CMax Junction Temperature (T J )150°CLead Temperature (T L )(Soldering, 10 seconds)260°CESD (Human Body Model)≥ 6500V ESD (Machine Model)≥ 300VSupply Voltage (V CC ) 3.0V to 3.6VInput Voltage (V IN )0 to V CCMagnitude of Differential Voltage (|V ID |)100 mV to V CC Common-Mode Input Voltage (V IC )0.05V to 2.35V Operating Temperature (T A )−40°C to +85°CSymbolParameterTest ConditionsMinTyp MaxUnits(Note 2)LVDS Differential Driver Characteristics V OD Output Differential Voltage 250350450mV ∆V OD V OD Magnitude Change from 25mV Differential LOW-to-HIGH R L = 100Ω, See Figure 1V OS Offset Voltage1.1251.25 1.375V ∆V OS Offset Magnitude Change from 25mV Differential LOW-to-HIGH I OZD Disabled Output Leakage Current V OUT = V CC or GND, DE = 0V ±20µA I OFF Power Off Output Current V CC = 0V, V OUT = 0V or 3.6V ±20µA I OSShort Circuit Output CurrentV OUT = 0V, DE = V CC −8mAV OD = 0V, DE = V CC±8LVTTL Driver Characteristics V OHOutput HIGH VoltageI OH = −100 µA, RE = 0V, V CC −0.2VSee Figure 6 and Table 1I OH = −8 mA, RE = 0V, V ID = 400 mV 2.4V ID = 400 mV, V IC = 1.2V, see Figure 6V OLOutput LOW VoltageI OL = 100 µA, RE = 0V, V ID = −400 mV 0.2VSee Figure 6 and Table 1I OL = −8 mA, RE = 0V, V ID = −400 mV 0.5V ID = −400 mV, V IC = 1.2V, see Figure 6I OZ Disabled Output Leakage Current V OUT = V CC or GND, RE = V CC ±20µALVDS Receiver CharacteristicsV TH Differential Input Threshold HIGH See Figure 6 and Table 1100mV V TL Differential Input Threshold LOW See Figure 6 and Table 1−100mV I IN Input CurrentV IN = 0V or V CC±20µA I I(OFF)Power-OFF Input Current V CC = 0V, V IN = 0V or 3.6V±20µA LVTTL Driver and Control Signals CharacteristicsV IH Input HIGH Voltage 2.0V CC V V IL Input LOW Voltage GND 0.8V I IN Input CurrentV IN = 0V or V CC±20µA I I(OFF)Power-OFF Input Current V CC = 0V, V IN = 0V or 3.6V ±20µA V IKInput Clamp VoltageI IK = −18 mA−1.5VFIN1019DC Electrical Characteristics (Continued)Note 2: All typical values are at T A = 25°C and with V CC = 3.3V.AC Electrical CharacteristicsOver supply voltage and operating temperature ranges, unless otherwise specifiedNote 3: All typical values are at T A = 25°C and with V CC = 5V.Note 4: t SK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.Device Characteristics I CCPower Supply CurrentDriver Enabled, Driver Load: R L = 100 Ω12.5mAReceiver Disabled, No Receiver Load Driver Enabled, Driver Load: R L = 100 Ω, 12.5mAReceiver Enabled, (R IN + = 1V and R IN − = 1.4V)or (R IN + = 1.4V and R OUT − = 1V)Driver Disabled, Receiver Enabled,7.0mA(R IN + = 1V and R IN − = 1.4V) or (R IN + = 1.4V and R IN − = 1V)Driver Disabled, Receiver Disabled7.0mA C IN Input Capacitance Any LVTTL or LVDS Input 4pF C OUTOutput CapacitanceAny LVTTL or LVDS Output6pFSymbolParameterTest ConditionsMinTyp MaxUnits(Note 3)Driver Timing Characteristics t PLHD Differential Propagation Delay 0.5 1.5ns LOW-to-HIGHt PHLD Differential Propagation Delay 0.5 1.5ns HIGH-to-LOWR L = 100 Ω, C L = 10 pF,t TLHD Differential Output Rise Time (20% to 80%)See Figure 2 and Figure 30.4 1.0ns t THLD Differential Output Fall Time (80% to 20%)0.41.0ns t SK(P)Pulse Skew |t PLH - t PHL |0.5ns t SK(PP)Part-to-Part Skew (Note 4)1.0ns t ZHD Differential Output Enable Time from Z to HIGH R L = 100Ω, C L = 10 pF, 5.0ns t ZLD Differential Output Enable Time from Z to LOW See Figure 4 and Figure 5 5.0ns t HZD Differential Output Disable Time from HIGH to Z 5.0ns t LZD Differential Output Disable Time from LOW to Z 5.0ns Receiver Timing Characteristicst PLH Propagation Delay LOW-to-HIGH 0.9 2.5ns t PHL Propagation Delay HIGH-to-LOW 0.92.5ns t TLH Output Rise time (20% to 80%)|V ID | = 400 mV, C L = 10 pF,0.5ns t THL Output Fall time (80% to 20%)See Figure 6 and Figure 70.5ns t SK(P)Pulse Skew | t PLH - t PHL |0.5ns t SK(PP)Part-to-Part Skew (Note 4)1.0ns t ZH LVTTL Output Enable Time from Z to HIGH 5.0ns t ZL LVTTL Output Enable Time from Z to LOW R L = 500 Ω, C L = 10 pF, 5.0ns t HZ LVTTL Output Disable Time from HIGH to Z See Figure 85.0ns t LZLVTTL Output Disable Time from LOW to Z5.0ns4F I N 1019FIGURE 1. Differential Driver DC Test CircuitNote A: Input pulses have frequency = 10 MHz, t R or t F = 2 ns Note B: C L includes all probe and fixture capacitancesFIGURE 2. Differential Driver Propagation Delay andTransition Time Test CircuitFIGURE 3. AC Waveforms for Differential DriverNote B: Input pulses have the frequency = 10 MHz, t R or t F = 2 ns Note A: C L includes all probe and fixture capacitancesFIGURE 4. Differential Driver Enable andDisable Test CircuitFIGURE 5. Enable and Disable AC WaveformsFIN1019Note A:Input pulses have frequency = 10 MHz, t R or t F = 1ns Note B: C L includes all probe and fixture capacitanceFIGURE 6. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test CircuitTABLE 1. Receiver Minimum and Maximum Input Threshold Test VoltagesApplied Voltages (V)Resulting Differential Resulting Common ModeInput Voltage (mV)Input Voltage (V)V IA V IB V ID V IC 1.25 1.15100 1.21.15 1.25−100 1.22.4 2.3100 2.352.3 2.4−100 2.350.101000.0500.1−1000.051.50.9600 1.20.9 1.5−600 1.22.4 1.8600 2.11.8 2.4−600 2.10.606000.300.6−6000.3 6F I N 1019FIGURE 7. LVDS Input to LVTTL Output AC WaveformsTest Circuit for LVTTL OutputsVoltage Waveforms Enable and Disable TimesFIGURE 8. LVTTL Outputs Test Circuit and AC WaveformsFIN1019DC / AC Typical Performance CurvesDriversFIGURE 9. Output High Voltage vs.Power Supply VoltageFIGURE 10. Output Low Voltage vs.Power Supply VoltageFIGURE 11. Output Short Circuit Current vs.Power Supply Voltage FIGURE 12. Differential Output Voltage vs.Power Supply VoltageFIGURE 13. Differential Output Voltage vs.Load Resistor FIGURE 14. Offset Voltage vs.Power Supply Voltage 8F I N 1019DC / AC Typical Performance Curves (Continued)FIGURE 15. Power Supply Current vs.Frequency FIGURE 16. Power Supply Current vs.Power Supply VoltageFIGURE 17. Power Supply Current vs.Ambient TemperatureFIGURE 18. Differential Propagation Delay vs.Power SupplyFIGURE 19. Differential Propagation Delay vs.Ambient Temperature FIGURE 20. Differential Skew (t PLH - t PHL ) vs.Power Supply VoltageFIN1019DC / AC Typical Performance Curves(Continued)FIGURE 21. Differential Pulse Skew (t PLH - t PHL ) vs.Ambient TemperatureFIGURE 22. Transition Time vs.Power Supply VoltageFIGURE 23. Transition Times vs.Ambient Temperature 10F I N 1019DC / AC Typical Performance CurvesReceiverFIGURE 24. Output High Voltage vs.Power Supply VoltageFIGURE 25. Output Low Voltage vs.Power Supply VoltageFIGURE 26. Output Short Circuit Current vs.Power Supply Voltage FIGURE 27. Power Supply Current vs.FrequencyFIGURE 28. Power Supply Current vs.Power Supply VoltageFIGURE 29. Power Supply Current vs.Ambient TemperatureFIN1019DC / AC Typical Performance Curves(Continued)FIGURE 30. Differential Propagation Delay vs.Power Supply VoltageFIGURE 31. Differential Propagation Delay vs.Ambient TemperatureFIGURE 32. Differential Skew (t PHL - t PHL ) vs.Power Supply VoltageFIGURE 33. Differential Skew (t PLH - t PHL ) vs.Ambient TemperatureFIGURE 34. Differential Propagation Delay vs.Differential Input VoltageFIGURE 35. Differential Propagation Delay vs.Common-Mode Voltage 12F I N 1019DC / AC Typical Performance Curves(Continued)FIGURE 36. Transition Time vs.Power Supply VoltageFIGURE 37. Transition Time vs.Ambient TemperatureFIGURE 38. Differential Propagation Delay vs.LoadFIGURE 39. Transition Time vs.Load FIN1019Physical Dimensions inches (millimeters) unless otherwise noted14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage Number M14A14F I N 1019 3.3V L V D S H i g h S p e e d D i f f e r e n t i a l D r i v e r /R e c e i v e rPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC14Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。
