CY2DL818中文资料
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1:8 Clock Fanout BufferCY2DL818
CypressSemiconductorCorporation•3901NorthFirstStreet•SanJose•CA 95134•408-943-2600Document #: 38-07058 Rev. *B Revised December 15, 2002Features
•Low voltage operation•VDD = 3.3V•1:8 fanout•Single-input-configurable for LVDS, LVPECL, or LVTTL•8 pair of LVDS Outputs•Drives either a 50-ohm or 100-ohm load (selectable)•Low input capacitance•Low output skew•Low propagation delay•Typical (tpd < 4 ns)•Packages available include: TSSOP•Does not exceed Bellcore 802.3 standards•Operation at => 350 MHz – 700 MbpsDescription
This Cypress series of network circuits is produced usingadvanced 0.35-micron CMOS technology, achieving theindustry’s fastest logic.
The Cypress CY2DL818 fanout buffer features a single LVDSor a single-ended LVTTL-compatible input and eight LVDSoutput pairs.
Designed for data communications clock management appli-cations, the large fanout from a single input reduces loadingon the input clock. The Cypress CY2DL818 is ideal for bothlevel translations from single-ended to LVDS and/or for thedistribution of LVDS-based clock signals.
The Cypress CY2DL818 has configurable input and outputfunctions. The input can be selectable for LVCMOS/LVTTL,LVPECL, or LVDS signals, while the output drivers supportstandard and high-drive LVDS. Drive either a 50-ohm or100-ohm line with a single part number/device.
Block DiagramPin Configuration
1234567891011121314151617181938373635343332313029282726252423222120
38 pin TSSOPGND
VDDQ1AQ1BQ2AQ2BQ3AQ3B
Q4B
Q5AQ5BQ6AQ6BQ7AQ7BQ8AQ8BGNDQ4AGND
VDDGND
GNDVDDInConfig
INPUT AINPUT BCNTRL
GNDGNDCY2DL818 VDD VDD VDDVDD
VDDVDDVDDVDDINPUT(LVPECL / LVDS / LVTTL)
OUTPUT(LVDS)CNTRL7Q1AQ1B
Q2AQ2B
Q3AQ3B
Q4AQ4B
Q5AQ5B
Q6AQ6B
Q7AQ7B
Q8AQ8B3736
3534
3332
3130
2827
2625
2423
2221INPUT AINPUT B1011
6InConfig元器件交易网www.cecb2b.com
CY2DL818
Document #: 38-07058 Rev. *BPage 2 of 8 Pin DescriptionPin NumberPin NamePin Standard InterfacePin Description1, 9,12,18,19,20,38GNDPOWERGround
2,3,4,5,8, 1314,15,16,17,29VDDPOWERPower Supply
10,11Input A, Input B(#)Default: LVPECL / LDVSOptional: LVTTL/LVCMOS single pin.Differential input pair or single line.LVPECL/LVDS default. See InConfig below.
37, 36,35,34, 33,32,31, 30,28,27,26,25,24,23,22,21Q1A, Q1B, Q2A, Q2B, Q3A, Q3B, Q4A, Q4B, Q5A, Q5B, Q6A, Q6B,Q7A, Q7B, Q8A, Q8BLDVSDifferential Outputs
6InConfigLVTTL / LVCMOSConverts inputs from the default LVPECL/LVDS (logic = 0) To LVTTL/LVCMOS (logic = 1) “default pull-up”See Figure5 and Figure6 for additional information 7CNTRLLVTTL / LVCMOSConverts into a high-speed driver.Logic = 0 = 100 ohmLogic = 1 = 50-ohm “default pull-up”See Figure7 for additional Information
Output Drive Control for Standard and Bus/B/Hi-Drive
CNTRLPin 7 Binary ValueDrive STDImpedanceOutput Voltage Value0Standard 100 OhmsVO = Voutput50 OhmsV = 1/2 * VO1Hi-drive/Bus/B100 OhmsV = 2 * VO50 OhmsV = VOInput Receiver Configuration for Differential or LVTTL/LVCMOS
InCONFIG Pin 6 Binary ValueInput Receiver FamilyInput Receiver Type
1LVTTL in LVCMOSSingle-ended non-inverting, inverting, void of bias resistors.
0LVDSLow-voltage differential signalingLVPECLLow-voltage pseudo (positive) emitter coupled logic
Function Control of the TTL Input Logic Used to Accept or Invert the Input Signal
LVTTL/LVCMOS INPUT LOGICInput ConditionInput LogicOutput Logic Q Pins, Q1A or Q1Ground Input B (–) Pin 11InputInputInput A (+) Pin 10Input – BarInput – BarVCC Input B (–) Pin 11Input Input – Bar Input A (+) Pin 10Input – BarInputGround Input A (+) Pin 10InputInput Input B (–) Pin 11Input – BarInput – BarVCC Input A (+) Pin 10Input Input – Bar Input B (–) Pin 11Input – BarInput
Power Supply Characteristics
ParameterDescriptionTest ConditionsMin.Typ.Max.Unit
ICCDDynamic Power Supply CurrentVDD = MaxInput toggling 50% Duty Cycle, Outputs Open0.400.5mA/MHz
ICTotal Power Supply CurrentVDD = MaxInput toggling 50% Duty Cycle, Outputs OpenfL = 100 MHz4080mA元器件交易网www.cecb2b.com
CY2DL818
Document #: 38-07058 Rev. *BPage 3 of 8Maximum Ratings[1][2]
Storage Temperature:................................–65°C to + 150°C
Ambient Temperature:...................................–40°C to +85°C
Supply Voltage to Ground Potential
(Inputs and VCC only).......................................–0.3V to 4.6VSupply Voltage to Ground Potential
(Outputs only)........................................–0.3V to VDD + 0.3V
DC Input Voltage...................................–0.3V to VDD + 0.3V
DC Output Voltage.................................–0.3V to VDD + 0.9V
Power Dissipation........................................................0.75W
DC Electrical Characteristics: 3.3V–LVDS InputParameterDescriptionConditionsMin.Typ.Max.Unit
VID Magnitude of Differential Input Voltage 100600mV
