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Guidance Note No 11 1 MHRA GUIDANCE NOTE 11 CHANGING THE LEGAL CLASSIFICATION IN THE UNITED KINGDOM OF A MEDICINE FOR HUMAN USE

INTRODUCTION 1. A new medicine, when first authorised, is usually restricted to use under medical supervision and made available only on a prescription; a medicine restricted in this way is classified as a Prescription Only Medicine (POM). If, following experience gained during use, it can be demonstrated that the medicine is safe for use with pharmacist supervision, reclassification as a Pharmacy Medicine (P) may be undertaken by removing the prescription requirements to allow sale or supply from a pharmacy. If further experience demonstrates that access to professional advice is not required for safe use of the medicine, suitable presentations may then be reclassified as General Sale List (GSL) medicines to allow sale from a wider range of retail outlets.

2. Procedures for changing the legal classification of a medicine have been revised with a view to simplifying and speeding the process wherever possible and providing greater transparency. This booklet replaces earlier advice on legal and administrative requirements for reclassification. It should be treated as general advice and not as a complete and authoritative statement of the law. The European guideline on changing legal classification for the supply of medicinal products is also relevant and can be accessed via the Commission’s website in the Rules Governing Medicinal Products in the European Community – Volume IIIB - Guidelines.

3. Requests for change of legal classification of substances and associated policy matters are dealt with by the Post-Licensing Division of Medicines and Healthcare products Regulatory Agency. Further information on the new reclassification procedure may be obtained from Mrs Amanda Williams on 020 7084 2523 Guidance Note No 11 2

(advice on applications) or Miss Amanda Lawrence on 020 7084 2366 (on process).

BACKGROUND 4. The sale and supply of medicines is controlled by the Medicines Act 1968 and Directive 2001/83/EC. All medicines are classified according to one of the three following categories:  Prescription Only Medicines (POM) – available only on a prescription  Pharmacy (P) – available under the supervision of a pharmacist  General Sale List (GSL) – available in general retail outlets such as supermarkets. The presumption under law is that all medicines are P unless they meet the criteria for POM or GSL status. Pack size restrictions for GSL products are listed in the Medicines (Sale or Supply) (Miscellaneous Provisions) Regulations 1980.

5. Since 1 April 2002 changes in legislation mean that for all licensed medicines, legal status is determined by the Marketing Authorisation (MA).

6. The reclassification procedures are outlined below. If the guidance does not appear to describe adequately any particular circumstance relevant to an application, please contact Post-Licensing Division at the contact points listed on page 1. Applicants who are considering making a reclassification application are encouraged to discuss their proposals and prospective timetable with MHRA prior to submission. Contact numbers for discussion of professional aspects are listed in the MAIL bulletin, see contact points listed on page 1. Guidance Note No 11 3

PROCEDURES FOR RECLASSIFICATION Types of Application 7. Following receipt in MHRA, applications are validated and sifted on a triage basis. The reclassification process depends on the type of application. A major change requiring Committee referral will be allocated to the COMPLEX procedure and a change not requiring Committee referral will be allocated to the STANDARD procedure. A ―me-too‖ application based on an analogous product, which has already completed the reclassification procedure, may be dealt with simply as a variation. For these purposes, an analogous medicinal product is a medicinal product, which has a United Kingdom marketing authorisation or a Community marketing authorisation and which— (a) has the same active ingredient, route of administration and use; (b) has the same strength or a higher strength; (c) has the same dosage or daily dosage, or a higher dosage or daily dosage; and (d) is for sale or supply at the same quantity or a greater quantity,

as the medicinal product in relation to which the application is made. Fees 8. In line with these new categories, a new fee structure has been put in place. A higher fee is payable on all Complex applications requiring committee referral. For a Standard application the full fee is levied but where the MHRA are satisfied that the classification does not need to be considered by the relevant committee, half the fee will be refunded.

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144479-1资料

144479-1资料

144479-1 Product DetailsHome | Customer Support | Suppliers | Site Map | Privacy Policy | Browser Support© 2008 Tyco Electronics C orporation All Rights Reserved Searc hProducts Documentation Resources My Account Customer Support Home > Products > By Type > Product Feature Selector > Product Details144479-1Active Timer ConnectorsAlways EU RoHS/ELV Compliant (Statement of Compliance)Product Highlights:l Housing Assemblyl Connector Type = Junior Power Timerl Number of Positions = 2l Housing Color = Blackl SealedView all Features | Find SimilarProductsCheck Pricing &AvailabilitySearch for ToolingProduct FeatureSelectorContact Us AboutThis ProductQuick LinksDocumentation & Additional InformationProduct Drawings:l connecteur etanche 2 voies pour j.p.t. pour injecteur(PDF,English)Catalog Pages/Data Sheets:l None AvailableProduct Specifications:l None AvailableApplication Specifications:l None AvailableInstruction Sheets:l SEALED CRIMP CONNECTOR CET(PDF, English)CAD Files:l None AvailableList all Documents Related Products: l ToolingProduct Features (Please use the Product Drawing for all design activity)Product Type Features:l Product Type = Housing Assemblyl Connector Type = Junior Power Timer l Number of Positions = 2l Sealed = Yesl Comment = For injector.Housing Related Features:l Housing Color = Blackl Housing Material = PA 6.6 Industry Standards:l RoHS/ELV Compliance = RoHS compliant, ELVcompliantl Lead Free Solder Processes = Not reviewed forlead free solder processl RoHS/ELV Compliance History = Always wasRoHS compliantOther:l Brand = AMPProvide Website Feedback | Contact C ustomer Support。

LH79520中文资料

LH79520中文资料

LH75401/LH75411 Preliminary data sheet System-on-ChipDESCRIPTIONThe NXP BlueStreak LH75401/LH75411 family con-sists of two low-cost 16/32-bit System-on-Chip (SoC) devices.•LH75401 — contains the superset of features.•LH75411 — similar to LH75401, without CAN 2.0B.COMMON FEATURES•Highly Integrated System-on-Chip•ARM7TDMI-S™ Core•High Performance (84 MHz CPU Speed)–Internal PLL Driven or External Clock Driven–Crystal Oscillator/Internal PLL Can Operate with Input Frequency Range of 14 MHz to 20MHz •32kB On-chip SRAM–16kB Tightly Coupled Memory (TCM) SRAM–16kB Internal SRAM•Clock and Power Management–Low Power Modes: Standby, Sleep, Stop •Eight Channel, 10-bit Analog-to-Digital Converter •Integrated Touch Screen Controller•Serial interfaces–Two 16C550-type UARTs supporting baud rates up to 921,600 baud (requires crystal frequency of14.756 MHz).–One 82510-type UART supporting baud rates up to 3,225,600 baud (requires a system clock of70MHz).•Synchronous Serial Port–Motorola SPI™–National Semiconductor Microwire™–Texas Instruments SSI•Real-Time Clock (RTC)•Three Counter/Timers–Capture/Compare/PWM Compatibility–Watchdog Timer (WDT)•Low-Voltage Detector •JTAG Debug Interface and Boundary Scan •Single 3.3 V Supply• 5 V Tolerant Digital I/O–XTALIN and XTAL32IN inputs are 1.8 V ± 10%•144-pin LQFP Package•−40°C to +85°C Operating TemperatureUnique Features of the LH75401•Color and Grayscale Liquid Crystal Display (LCD) Controller–12-bit (4,096) Direct Mode Color, up to VGA–8-bit (256) Direct or Palettized Color, up to SVGA –4-bit (16) Direct Mode Color/Grayscale, up to XGA –12-bit Video Bus–Supports STN, TF T, HR-TF T, and AD-TF T Displays.•CAN Controller that supports CAN version 2.0B.Unique Features of the LH75411•Color and Grayscale LCD Controller (LCDC)–12-bit (4,096) Direct Mode Color, up to VGA–8-bit (256) Direct or Palettized Color, up to SVGA –4-bit (16) Direct Mode Color/Grayscale, up to XGA –12-bit Video Bus–Supports STN, TF T, HR-TF T, and AD-TF T Displays.元器件交易网Preliminary data sheet 1LH75401/LH75411System-on-Chip2Rev. 01— 16 July 2007Preliminary data sheetNXP SemiconductorsORDERING INFORMATIONTable 1.Ordering informationType number PackageVersionName DescriptionLH75401N0Q100C0LQFP144plastic low profile quad flat package; 144 leads;body 20 x 20 x 1.4 mmSOT486-1LH75411N0Q100C0LQFP144plastic low profile quad flat package; 144 leads;body 20 x 20 x 1.4 mmSOT486-1元器件交易网System-on-ChipLH75401/LH75411Preliminary data sheet Rev. 01 — 16 July 2007 3NXP SemiconductorsLH75401 BLOCK DIAGRAMFigure 1.LH75401 Block Diagram元器件交易网LH75401/LH75411System-on-Chip4Rev. 01— 16 July 2007Preliminary data sheetNXP SemiconductorsLH75411 BLOCK DIAGRAMFigure 2.LH75411 Block Diagram元器件交易网System-on-ChipLH75401/LH75411Preliminary data sheet Rev. 01 — 16 July 2007 5NXP SemiconductorsPIN CONFIGURATIONFigure 3.LH75401/LH75411 pin configuration元器件交易网LH75401/LH75411System-on-Chip6Rev. 01— 16 July 2007Preliminary data sheetNXP SemiconductorsLH75401 Numerical Pin ListingTable 2.LH75401 Numerical Pin ListPIN NO.FUNCTION AT RESETFUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPE BEHAVIOR DURINGRESETNOTES 1PA7D15I/O 8 mA Bidirectional Pull-up 12PA6D14I/O 8 mA Bidirectional Pull-up 13VDD Power None 4PA5D13I/O 8 mA Bidirectional Pull-up 15PA4D12I/O 8 mA Bidirectional Pull-up 16PA3D11I/O 8 mA Bidirectional Pull-up 17PA2D10I/O 8 mA Bidirectional Pull-up 18VSS Ground None 9PA1D9I/O 8 mA Bidirectional Pull-up 110PA0D8I/O 8 mA Bidirectional Pull-up 111VDDC Power None 12D7I/O 8 mA Bidirectional Pull-up 13D6I/O 8 mA Bidirectional Pull-up 14VSSC Ground None 15D5I/O 8 mA Bidirectional Pull-up 16D4I/O 8 mA Bidirectional Pull-up 17VDD Power None 18D3I/O 8 mA Bidirectional Pull-up 19D2I/O 8 mA Bidirectional Pull-up 20D1I/O 8 mA Bidirectional Pull-up 21D0I/O8 mA Bidirectional Pull-up 22nWE 8 mA Output HIGH 323nOE 8 mA Output HIGH 324PB5nWAIT 8 mA Bidirectional Pull-up 1, 325PB4nBLE18 mA Bidirectional Pull-up 1, 326VSS GroundNone 27PB3nBLE08 mA Bidirectional Pull-up 1, 328PB2nCS38 mA Bidirectional Pull-up 1, 329PB1nCS28 mA Bidirectional Pull-up 1, 330PB0nCS18 mA Bidirectional Pull-up 1, 331nCS08 mA Output Pull-up 332PC7A238 mA Bidirectional Pull-down 133PC6A228 mA BidirectionalPull-down134VDD PowerNone 35PC5A218 mA Bidirectional Pull-down 136PC4A208 mA Bidirectional Pull-down 137PC3A198 mA Bidirectional Pull-down 138PC2A188 mABidirectionalPull-down1元器件交易网System-on-ChipLH75401/LH75411Preliminary data sheet Rev. 01 — 16 July 2007 7NXP Semiconductors39PC1A178 mA Bidirectional Pull-down 140PC0A168 mA BidirectionalPull-down141VSS Ground None 42VDD PowerNone 43A158 mA Output LOW 44A148 mA Output LOW 45A138 mA Output LOW 46A128 mA Output LOW 47A118 mA OutputLOW48VSS GroundNone 49A108 mA Output LOW 50A98 mA Output LOW 51A88 mA Output LOW 52A78 mA Output LOW 53A68 mA OutputLOW54VDD Power None 55A58 mA Output LOW 56A48 mA Output LOW 57A38 mA Output LOW 58A28 mA OutputLOW59VSS Ground None 60A18 mA Output LOW 61A08 mA Output LOW 62nRESETIN None Input Pull-up 2, 363TEST2None Input Pull-up 264TEST1None Input Pull-up 265TMS None Input Pull-up266RTCK 8 mA Output 67TCK None Input 68TDI None Input Pull-up269TDO 4 mA Output 70LINREGEN None Input 571nRESETOUT8 mA Output 372PD6INT6DREQ 6 mA Bidirectional Pull-down173PD5INT5DACK 6 mA Bidirectional 1, 274PD4INT4UARTRX18 mA BidirectionalPull-up 175VDDC Power None 76PD3INT3UARTTX18 mA Bidirectional Pull-up 177PD2INT2 2 mA Bidirectional Pull-up178PD1INT1 6 mA Bidirectional 1, 279PD0INT02 mA Bidirectional180VSSCGroundNoneTable 2.LH75401 Numerical Pin List (Cont’d)PIN NO.FUNCTION AT RESETFUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPE BEHAVIOR DURINGRESETNOTES 元器件交易网LH75401/LH75411System-on-Chip8Rev. 01— 16 July 2007Preliminary data sheetNXP Semiconductors81nPOR None Input Pull-up2, 382XTAL32IN None Input 483XTAL32OUT None Output84VSSA_PLL Ground None 85VDDA_PLL PowerNone 86XTALIN None Input 487XTALOUT None Output88VSSA_ADC Ground None 89AN3 (LR/Y-)PJ7None Input 90AN4 (Wiper)PJ6None Input 91AN9PJ5None Input 92AN2 (LL/Y+)PJ4None Input 93AN8PJ3None Input 94AN1 (UR/X-)PJ2None Input 95AN6PJ1None Input 96AN0 (UL/X+)PJ0None Input 97VDDA_ADCPower None 98VDD Power None 99PE7SSPFRM 4 mA Bidirectional Pull-up 1100PE6SSPCLK 4 mA Bidirectional Pull-down 1101PE5SSPRX 4 mA Bidirectional Pull-up 1102PE4SSPTX 4 mA Bidirectional Pull-down 1103PE3CANTX UARTTX08 mA Bidirectional Pull-up 1104PE2CANRX UARTRX02 mA Bidirectional Pull-up 1105PE1UARTTX24 mA BidirectionalPull-up1106VSS GroundNone 107PE0UARTRX2 4 mA Bidirectional Pull-up1108PF6CTCAP2B CTCMP2B 4 mA Bidirectional 2109PF5CTCAP2A CTCMP2A 4 mA Bidirectional 110PF4CTCAP1B CACMP1B 4 mA Bidirectional 2111PF3CTCAP1ACTCMP1A4 mA Bidirectional112VDD PowerNone 113PF2CTCAP0E 4 mA Bidirectional 2114PF1CTCAP0D 4 mA Bidirectional 115PF0CTCAP0C 4 mA Bidirectional 2116PG7CTCAP0B CTCMP0B 4 mA Bidirectional 117PG6CTCAP0A CTCMP0A4 mA Bidirectional 2118PG5CTCLK4 mA Bidirectional119VSS GroundNone 120PG4LCDVEEEN LCDMOD8 mA Bidirectional 121PG3LCDVDDEN 8 mA Bidirectional 122PG2LCDDSPLENLCDREV 8 mABidirectional Table 2.LH75401 Numerical Pin List (Cont’d)PIN NO.FUNCTION AT RESET FUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPE BEHAVIOR DURINGRESETNOTES 元器件交易网System-on-ChipLH75401/LH75411Preliminary data sheet Rev. 01 — 16 July 2007 9NXP SemiconductorsNOTES:1.Signal is selectable as pull-up, pull-down, or no pull-up/pull-down via the I/O Configuration peripheral.2.CMOS Schmitt trigger input.3.Signals preceded with ‘n’ are active LOW.4.Crystal Oscillator Inputs should be driven to 1.8 V ±10% (MAX.)5.LINREGEN activation requires a 0 Ω pull-up to VDD.123PG1LCDCLS 8 mA Bidirectional 124PG0LCDPS 8 mA Bidirectional 125PH7LCDDCLK8 mABidirectional126VDD Power None 127VSS GroundNone 128PH6LCDLP LCDHRLP 8 mA Bidirectional 129PH5LCDFP LCDSPS 8 mA Bidirectional 130PH4LCDEN LCDSPL8 mA Bidirectional 131PH3LCDVD118 mA Bidirectional 132PH2LCDVD108 mA Bidirectional 133PH1LCDVD98 mABidirectional 134VDD PowerNone 135PH0LCDVD88 mA Bidirectional 136PI7LCDVD78 mA Bidirectional 137PI6LCDVD68 mA Bidirectional 138PI5LCDVD58 mA Bidirectional 139PI4LCDVD48 mABidirectional 140VSS GroundNone 141PI3LCDVD38 mA Bidirectional 142PI2LCDVD28 mA Bidirectional 143PI1LCDVD18 mA Bidirectional 144PI0LCDVD08 mABidirectionalTable 2.LH75401 Numerical Pin List (Cont’d)PIN NO.FUNCTION AT RESETFUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPE BEHAVIOR DURINGRESETNOTESLH75401/LH75411System-on-Chip10Rev. 01 — 16 July 2007Preliminary data sheetNXP SemiconductorsLH75401 Signal DescriptionsTable 3.LH75401 Signal DescriptionsPIN NO.SIGNAL NAMETYPEDESCRIPTIONNOTESMEMORY INTERFACE (MI)1245679101213151618192021D[15:0]Input/Output Data Input/Output Signals 122nWE Output Static Memory Controller Write Enable 223nOE Output Static Memory Controller Output Enable 224nWAIT Input Static Memory Controller External Wait Control 1, 225nBLE1Output Static Memory Controller Byte Lane Strobe 1, 227nBLE0Output Static Memory Controller Byte Lane Strobe 1, 228nCS3Output Static Memory Controller Chip Select 1, 229nCS2Output Static Memory Controller Chip Select 1, 230nCS1Output Static Memory Controller Chip Select 1, 231nCS0OutputStatic Memory Controller Chip Select23233 35363738394043444546474950515253555657586061A[23:0]Output Address Signals 1DMA CONTROLLER (DMAC)72DREQ Input DMA Request 173DACKOutputDMA Acknowledge1PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTESCOLOR LCD CONTROLLER (CLCDC)120LCDMOD Output Signal Used by the Row Driver (AD-TFT, HR-TFT only)1 120LCDVEEEN Output Analog Supply Enable (AC Bias SIgnal)1 121LCDVDDEN Output Digital Supply Enable1 122LCDDSPLEN Output LCD Panel Power Enable1 122LCDREV Output Reverse Signal (AD-TFT, HR-TFT only)1 123LCDCLS Output Clock to the Row Drivers (AD-TFT, HR-TFT only)1 124LCDPS Output Power Save (AD-TFT, HR-TFT only)1 125LCDDCLK Output LCD Panel Clock1 128LCDLP Output Line Synchronization Pulse (STN), Horizontal Synchronization Pulse (TFT)1 128LCDHRLP Output Latch Pulse (AD-TFT, HR-TFT only)1 129LCDFP Output Frame Pulse (STN), Vertical Synchronization Pulse (TFT)1 129LCDSPS Output Row Driver Counter Reset Signal (AD-TFT, HR-TFT only)1 130LCDEN Output LCD Data Enable1 130LCDSPL Output Start Pulse Left (AD-TFT, HR-TFT only)1 131132133135136137LCDVD[11:0]Output LCD Panel Data bus1 138139141142143144SYNCHRONOUS SERIAL PORT (SSP)99SSPFRM Output SSP Serial Frame1 100SSPCLK Output SSP Clock1 101SSPRX Input SSP RXD1 102SSPTX Output SSP TXD1UART0 (U0)103UARTTX0Output UART0 Transmitted Serial Data Output1 104UARTRX0Input UART0 Received Serial Data Input1UART1 (U1)74UARTRX1Input UART1 Received Serial Data Input1 76UARTTX1Output UART1 Transmitted Serial Data Output1UART2 (U2)105UARTTX2Output UART2 Transmitted Serial Data Output1 107UARTRX2Input UART2 Received Serial Data Input1CONTROLLER AREA NETWORK (CAN)103CANTX Output CAN Transmitted Serial Data Output1 104CANRX Input CAN Received Serial Data Input1ANALOG-TO-DIGITAL CONVERTER (ADC)89 90 91 92 93 94 95 96AN3 (LR/Y-)AN4 (Wiper)AN9AN2 (LL/Y+)AN8AN1 (UR/X-)AN6AN0 (UL/X+)Input ADC Inputs1TIMER 0117116115114113CTCAP0[A:E]Input Timer 0 Capture Inputs1117116CTCMP0[A:B]Output Timer 0 Compare Outputs1 118CTCLK Input Common External Clock1TIMER 1111110CTCAP1[A:B]Input Timer 1 Capture Inputs1 111110CTCMP1[A:B]Output Timer 1 Compare Outputs1 118CTCLK Input Common External Clock1TIMER 2109108CTCAP2[A:B]Input Timer 2 Capture Inputs1 109108CTCMP2[A:B]Input Timer 2 Compare Outputs1 118CTCLK Input Common External Clock1GENERAL PURPOSE INPUT/OUTPUT (GPIO)1 2 4 5 6 7 9 10PA7PA6PA5PA4PA3PA2PA1PA0Input/Output General Purpose I/O Signals - Port A124 25 27 28 29 30PB5PB4PB3PB2PB1PB0Input/Output General Purpose I/O Signals - Port B132 33 35 36 37 38 39 40PC7PC6PC5PC4PC3PC2PC1PC0Input/Output General Purpose I/O Signals - Port C1PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTES72 73 74 76 77 78 79PD6PD5PD4PD3PD2PD1PD0Input/Output General Purpose I/O Signals - Port D189 90 91 92 93 94 95 96PJ7PJ6PJ5PJ4PJ3PJ2PJ1PJ0Input General Purpose I/O Signals - Port J199 100 101 102 103 104 105 107PE7PE6PE5PE4PE3PE2PE1PE0Input/Output General Purpose I/O Signals - Port E1108 109 110 111 113 114 115PF6PF5PF4PF3PF2PF1PF0Input/Output General Purpose I/O Signals - Port F1116 117 118 120 121 122 123 124PG7PG6PG5PG4PG3PG2PG1PG0Input/Output General Purpose I/O Signals - Port G1125 128 129 130 131 132 133 135PH7PH6PH5PH4PH3PH2PH1PH0Input/Output General Purpose I/O Signals - Port H1136 137 138 139 141 142 143 144PI7PI6PI5PI4PI3PI2PI1PI0Input/Output General Purpose I/O Signals - Port I1 RESET, CLOCK, AND POWER CONTROLLER (RCPC)62nRESETIN Input User Reset Input2 71nRESETOUT Output System Reset Output2 72INT6Input External Interrupt Input 61 PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTESNOTES:1.These pin numbers have multiplexed functions.2.Signals preceded with ‘n’ are active LOW.73INT5Input External Interrupt Input 5174INT4Input External Interrupt Input 4176INT3Input External Interrupt Input 3177INT2Input External Interrupt Input 2178INT1Input External Interrupt Input 1179INT0Input External Interrupt Input 0181nPOR Input Power-on Reset Input282XTAL32IN Input 32.768 kHz Crystal Clock Input 83XTAL32OUT Output 32.768 kHz Crystal Clock Output 86XTALIN Input Crystal Clock Input 87XTALOUT Output Crystal Clock OutputTEST INTERFACE63TEST2Input Test Mode Pin 264TEST1Input Test Mode Pin 165TMS Input JTAG Test Mode Select Input 66RTCK Output Returned JTAG Test Clock Output 67TCK Input JTAG Test Clock Input 68TDI Input JTAG Test Serial Data Input 69TDOOutputJTAG Test Data Serial OutputPOWER AND GROUND (GND)31734425498112126134VDD Power I/O Ring VDD826414859106119127140VSS Power I/O Ring VSS1175VDDC Power Core VDD supply (Output if Linear Regulator Enabled, Otherwise Input)1480VSSC Power Core VSS70LINREGEN Input Linear Regulator Enable 84VSSA_PLL Power PLL Analog VSS 85VDDA_PLL Power PLL Analog VDD Supply 88VSSA_ADC Power A-to-D converter Analog VSS 97VDDA_ADCPowerA-to-D converter Analog VDD SupplyPIN NO.SIGNAL NAME TYPE DESCRIPTIONNOTESLH75411 Numerical Pin ListingTable 4.LH75411 Numerical Pin ListPIN NO.FUNCTIONAT RESETFUNCTION2FUNCTION3FUNCTIONTYPEOUTPUTDRIVEBUFFERTYPEBEHAVIOR DURINGRESET NOTES1PA7D15I/O8 mA Bidirectional Pull-up1 2PA6D14I/O8 mA Bidirectional Pull-up1 3VDD Power None4PA5D13I/O8 mA Bidirectional Pull-up1 5PA4D12I/O8 mA Bidirectional Pull-up1 6PA3D11I/O8 mA Bidirectional Pull-up1 7PA2D10I/O8 mA Bidirectional Pull-up1 8VSS Ground None9PA1D9I/O8 mA Bidirectional Pull-up1 10PA0D8I/O8 mA Bidirectional Pull-up1 11VDDC Power None12D7I/O8 mA Bidirectional Pull-up13D6I/O8 mA Bidirectional Pull-up14VSSC Ground None15D5I/O8 mA Bidirectional Pull-up16D4I/O8 mA Bidirectional Pull-up17VDD Power None18D3I/O8 mA Bidirectional Pull-up19D2I/O8 mA Bidirectional Pull-up20D1I/O8 mA Bidirectional Pull-up21D0I/O8 mA Bidirectional Pull-up22nWE8 mA Output HIGH3 23nOE8 mA Output HIGH3 24PB5nWAIT8 mA Bidirectional Pull-up1, 3 25PB4nBLE18 mA Bidirectional Pull-up1, 3 26VSS Ground None27PB3nBLE08 mA Bidirectional Pull-up1, 3 28PB2nCS38 mA Bidirectional Pull-up1, 3 29PB1nCS28 mA Bidirectional Pull-up1, 3 30PB0nCS18 mA Bidirectional Pull-up1, 3 31nCS08 mA Output Pull-up3 32PC7A238 mA Bidirectional Pull-down1 33PC6A228 mA Bidirectional Pull-down1 34VDD Power None35PC5A218 mA Bidirectional Pull-down1 36PC4A208 mA Bidirectional Pull-down1 37PC3A198 mA Bidirectional Pull-down1 38PC2A188 mA Bidirectional Pull-down1 39PC1A178 mA Bidirectional Pull-down1 40PC0A168 mA Bidirectional Pull-down1 41VSS Ground None42VDD PowerNone 43A158 mA Output LOW 44A148 mA Output LOW 45A138 mA Output LOW 46A128 mA Output LOW 47A118 mA OutputLOW48VSS GroundNone 49A108 mA Output LOW 50A98 mA Output LOW 51A88 mA Output LOW 52A78 mA Output LOW 53A68 mA OutputLOW54VDD Power None 55A58 mA Output LOW 56A48 mA Output LOW 57A38 mA Output LOW 58A28 mA OutputLOW59VSS Ground None 60A18 mA Output LOW 61A08 mA Output LOW 62nRESETIN None Input Pull-up 2, 363TEST2None Input Pull-up 264TEST1None Input Pull-up 265TMS None Input Pull-up266RTCK 8 mA Output 67TCK None Input 68TDI None Input Pull-up269TDO 4 mA Output 70LINREGEN None Input 571nRESETOUT8 mA Output 372PD6INT6DREQ 6 mA Bidirectional Pull-down173PD5INT5DACK 6 mA Bidirectional 1, 274PD4INT4UARTRX18 mA BidirectionalPull-up 175VDDC Power None 76PD3INT3UARTTX18 mA Bidirectional Pull-up 177PD2INT2 2 mA Bidirectional Pull-up178PD1INT1 6 mA Bidirectional 1, 279PD0INT02 mA Bidirectional180VSSC GroundNone 81nPOR None Input Pull-up2, 382XTAL32IN None Input 483XTAL32OUTNoneOutputPIN NO.FUNCTION AT RESETFUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPEBEHAVIOR DURINGRESETNOTES84VSSA_PLL Ground None 85VDDA_PLL PowerNone 86XTALIN None Input 487XTALOUT None Output88VSSA_ADC GroundNone 89AN3 (LR/Y-)PJ7None Input 90AN4 (Wiper)PJ6None Input 91AN9PJ5None Input 92AN2 (LL/Y+)PJ4None Input 93AN8PJ3None Input 94AN1 (UR/X-)PJ2None Input 95AN6PJ1None Input 96AN0 (UL/X+)PJ0None Input 97VDDA_ADCPower None 98VDD Power None 99PE7SSPFRM 4 mA Bidirectional Pull-up 1100PE6SSPCLK 4 mA Bidirectional Pull-down 1101PE5SSPRX 4 mA Bidirectional Pull-up 1102PE4SSPTX 4 mA Bidirectional Pull-down 1103PE3UARTTX08 mA Bidirectional Pull-up 1104PE2UARTRX0 2 mA Bidirectional Pull-up 1105PE1UARTTX24 mA BidirectionalPull-up1106VSS GroundNone 107PE0UARTRX2 4 mA Bidirectional Pull-up1108PF6CTCAP2B CTCMP2B 4 mA Bidirectional 2109PF5CTCAP2A CTCMP2A 4 mA Bidirectional 110PF4CTCAP1B CACMP1B 4 mA Bidirectional 2111PF3CTCAP1ACTCMP1A4 mA Bidirectional112VDD PowerNone 113PF2CTCAP0E 4 mA Bidirectional 2114PF1CTCAP0D 4 mA Bidirectional 115PF0CTCAP0C 4 mA Bidirectional 2116PG7CTCAP0B CTCMP0B 4 mA Bidirectional 117PG6CTCAP0A CTCMP0A4 mA Bidirectional 2118PG5CTCLK4 mA Bidirectional119VSS GroundNone 120PG4LCDVEEEN LCDMOD8 mA Bidirectional 121PG3LCDVDDEN 8 mA Bidirectional 122PG2LCDDSPLEN LCDREV 8 mA Bidirectional 123PG1LCDCLS 8 mA Bidirectional 124PG0LCDPS 8 mA Bidirectional 125PH7LCDDCLK8 mABidirectional PIN NO.FUNCTION AT RESET FUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPEBEHAVIOR DURINGRESETNOTESNOTES:1.Signal is selectable as pull-up, pull-down, or no pull-up/pull-down via the I/O Configuration peripheral.2.CMOS Schmitt trigger input.3.Signals preceded with ‘n’ are active LOW.4.Crystal Oscillator Inputs should be driven to 1.8 V ±10% (MAX.)5.LINREGEN activation requires a 0 Ω pull-up to VDD.126VDD Power None 127VSS GroundNone 128PH6LCDLP LCDHRLP 8 mA Bidirectional 129PH5LCDFP LCDSPS 8 mA Bidirectional 130PH4LCDEN LCDSPL8 mA Bidirectional 131PH3LCDVD118 mA Bidirectional 132PH2LCDVD108 mA Bidirectional 133PH1LCDVD98 mABidirectional 134VDD PowerNone 135PH0LCDVD88 mA Bidirectional 136PI7LCDVD78 mA Bidirectional 137PI6LCDVD68 mA Bidirectional 138PI5LCDVD58 mA Bidirectional 139PI4LCDVD48 mABidirectional 140VSS GroundNone 141PI3LCDVD38 mA Bidirectional 142PI2LCDVD28 mA Bidirectional 143PI1LCDVD18 mA Bidirectional 144PI0LCDVD08 mABidirectionalPIN NO.FUNCTION AT RESETFUNCTION2FUNCTION 3FUNCTION TYPE OUTPUTDRIVEBUFFERTYPE BEHAVIOR DURINGRESETNOTESLH75411 Signal DescriptionsTable 5.LH75411 Signal DescriptionsPIN NO.SIGNAL NAME TYPE DESCRIPTION NOTESMEMORY INTERFACE (MI)124567910D[15:0]Input/Output Data Input/Output Signals1 121315161819202122nWE Output Static Memory Controller Write Enable2 23nOE Output Static Memory Controller Output Enable2 24nWAIT Input Static Memory Controller External Wait Control1, 2 25nBLE1Output Static Memory Controller Byte Lane Strobe1, 2 27nBLE0Output Static Memory Controller Byte Lane Strobe1, 2 28nCS3Output Static Memory Controller Chip Select1, 2 29nCS2Output Static Memory Controller Chip Select1, 2 30nCS1Output Static Memory Controller Chip Select1, 2 31nCS0Output Static Memory Controller Chip Select2 323335363738394043444546A[23:0]Output Address Signals1 474950515253555657586061DMA CONTROLLER (DMAC)72DREQ Input DMA Request1 73DACK Output DMA Acknowledge1COLOR LCD CONTROLLER (CLCDC)120LCDMOD Output Signal Used by the Row Driver (AD-TFT, HR-TFT only)1 120LCDVEEEN Output Analog Supply Enable (AC Bias SIgnal)1 121LCDVDDEN Output Digital Supply Enable1 122LCDDSPLEN Output LCD Panel Power Enable1 122LCDREV Output Reverse Signal (AD-TFT, HR-TFT only)1 123LCDCLS Output Clock to the Row Drivers (AD-TFT, HR-TFT only)1 124LCDPS Output Power Save (AD-TFT, HR-TFT only)1 125LCDDCLK Output LCD Panel Clock1 128LCDLP Output Line Synchronization Pulse (STN), Horizontal Synchronization Pulse (TFT)1 128LCDHRLP Output Latch Pulse (AD-TFT, HR-TFT only)1 129LCDFP Output Frame Pulse (STN), Vertical Synchronization Pulse (TFT)1 129LCDSPS Output Row Driver Counter Reset Signal (AD-TFT, HR-TFT only)1 130LCDEN Output LCD Data Enable1 130LCDSPL Output Start Pulse Left (AD-TFT, HR-TFT only)1 131132133135136137138139141142143144LCDVD[11:0]Output LCD Panel Data bus1SYNCHRONOUS SERIAL PORT (SSP)99SSPFRM Output SSP Serial Frame1 100SSPCLK Output SSP Clock1 101SSPRX Input SSP RXD1 102SSPTX Output SSP TXD1UART0 (U0)104UARTRX0Input UART0 Received Serial Data Input1 103UARTTX0Output UART0 Transmitted Serial Data Output1UART1 (U1)74UARTRX1Input UART1 Received Serial Data Input1 76UARTTX1Output UART1 Transmitted Serial Data Output1UART2 (U2)105UARTTX2Output UART2 Transmitted Serial Data Output1 107UARTRX2Input UART2 Received Serial Data Input1ANALOG-TO-DIGITAL CONVERTER (ADC)89 90 91 92 93 94 95 96AN3 (LR/Y-)AN4 (Wiper)AN9AN2 (LL/Y+)AN8AN1 (UR/X-)AN6AN0 (UL/X+)Input ADC Inputs1Table 5.LH75411 Signal Descriptions (Cont’d)PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTESTIMER 0117116115114113CTCAP0[A:E]Input Timer 0 Capture Inputs1117116CTCMP0[A:B]Output Timer 0 Compare Outputs1 118CTCLK Input Common External Clock1TIMER 1111110CTCAP1[A:B]Input Timer 1 Capture Inputs1 111110CTCMP1[A:B]Output Timer 1 Compare Outputs1 118CTCLK Input Common External Clock1TIMER 2109108CTCAP2[A:B]Input Timer 2 Capture Inputs1 109108CTCMP2[A:B]Input Timer 2 Compare Outputs1 118CTCLK Input Common External Clock1GENERAL PURPOSE INPUT/OUTPUT (GPIO)1 2 4 5 6 7 9 10PA7PA6PA5PA4PA3PA2PA1PA0Input/Output General Purpose I/O Signals - Port A124 25 27 28 29 30PB5PB4PB3PB2PB1PB0Input/Output General Purpose I/O Signals - Port B132 33 35 36 37 38 39 40PC7PC6PC5PC4PC3PC2PC1PC0Input/Output General Purpose I/O Signals - Port C172 73 74 76 77 78 79PD6PD5PD4PD3PD2PD1PD0Input/Output General Purpose I/O Signals - Port D1PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTES89 90 91 92 93 94 95 96PJ7PJ6PJ5PJ4PJ3PJ2PJ1PJ0Input General Purpose I/O Signals - Port J199 100 101 102 103 104 105 107PE7PE6PE5PE4PE3PE2PE1PE0Input/Output General Purpose I/O Signals - Port E1108 109 110 111 113 114 115PF6PF5PF4PF3PF2PF1PF0Input/Output General Purpose I/O Signals - Port F1116 117 118 120 121 122 123 124PG7PG6PG5PG4PG3PG2PG1PG0Input/Output General Purpose I/O Signals - Port G1125 128 129 130 131 132 133 135PH7PH6PH5PH4PH3PH2PH1PH0Input/Output General Purpose I/O Signals - Port H1136 137 138 139 141 142 143 144PI7PI6PI5PI4PI3PI2PI1PI0Input/Output General Purpose I/O Signals - Port I1 RESET, CLOCK, AND POWER CONTROLLER (RCPC)62nRESETIN Input User Reset Input2 71nRESETOUT Output System Reset Output2 72INT6Input External Interrupt Input 61 73INT5Input External Interrupt Input 51 74INT4Input External Interrupt Input 41 76INT3Input External Interrupt Input 31 77INT2Input External Interrupt Input 21 78INT1Input External Interrupt Input 11 79INT0Input External Interrupt Input 01 PIN NO.SIGNAL NAME TYPE DESCRIPTION NOTESNOTES:1.These pin numbers have multiplexed functions.2.Signals preceded with ‘n’ are active LOW.81nPOR Input Power-on Reset Input282XTAL32IN Input 32.768 kHz Crystal Clock Input 83XTAL32OUT Output 32.768 kHz Crystal Clock Output 86XTALIN Input Crystal Clock Input 87XTALOUT Output Crystal Clock OutputTEST INTERFACE63TEST2Input Test Mode Pin 264TEST1Input Test Mode Pin 165TMS Input JTAG Test Mode Select Input 66RTCK Output Returned JTAG Test Clock Output 67TCK Input JTAG Test Clock Input 68TDI Input JTAG Test Serial Data Input 69TDOOutputJTAG Test Data Serial OutputPOWER AND GROUND (GND)31734425498112126134VDD Power I/O Ring VDD826414859106119127140VSS Power I/O Ring VSS1175VDDC Power Core VDD supply (Output if Linear Regulator Enabled, Otherwise Input)1480VSSC Power Core VSS70LINREGEN Input Linear Regulator Enable 84VSSA_PLL Power PLL Analog VSS 85VDDA_PLL Power PLL Analog VDD Supply 88VSSA_ADC Power A-to-D converter Analog VSS 97VDDA_ADCPowerA-to-D converter Analog VDD SupplyPIN NO.SIGNAL NAME TYPE DESCRIPTIONNOTESFUNCTIONAL OVERVIEWARM7TDMI-S ProcessorThe LH75401/LH75411 microcontrollers feature the ARM7TDMI-S core with an Advanced High-Performance Bus (AHB) 2.0 interface. The ARM7TDMI-S is a 16/32-bit embedded RISC processor and a member of the ARM7 Thumb family of processors. For more information, visit the ARM Web site at .Bus ArchitectureThe LH75401/LH75411 microcontrollers use the ARM Advanced Microcontroller Bus Architecture (AMBA) 2.0 internal bus protocol. Three AHB masters control access to external memory and on-chip peripherals:•The ARM processor fetches instructions and trans-fers data•The Direct Memory Access Controller (DMAC) trans-fers from memory to memory, from peripheral to memory, and from memory to peripheral•The LCDC refreshes an LCD panel with data from the external memory or from internal memory if the frame buffer is 16kB or less.The ARM7TDMI-S processor is the default bus mas-ter. An Advanced Peripheral Bus (APB) bridge is pro-vided to access to the various APB peripherals. Generally, APB peripherals are serviced by the ARM core. However, if they are DMA-enabled, they are also serviced by the DMAC to increase system performance while the ARM core runs from local internal memory.Power SuppliesFive-Volt-tolerant 3.3 V I/Os are employed. The LH75401/LH75411 microcontrollers require a single 3.3V supply. The core logic requires 1.8 V, supplied by an on-chip linear regulator. Core logic power may also be supplied externally to achieve higher system speeds. See the Electrical Specifications.Clock SourcesThe LH75401/LH75411 microcontrollers may use two crystal oscillators, or an externally supplied clock. There are two clock trees:•One clock tree drives an internal Phase Lock Loop (PLL) and the three UARTs. It supports a crystal oscillator frequency range from 14 MHz to 20 MHz. •The other is a 32.768 kHz oscillator that generates a 1Hz clock for the RTC. (Use of the 32.768 kHz crys-tal for the Real Time Clock is optional. If not using the crystal, tie XTAL32IN to VSS and allow XTAL32OUT to float.)The 14-to-20 MHz crystal oscillator drives the UART clocks, so an oscillator frequency of 14.7456 MHz is rec-ommended to achieve modem baud rates.The PLL may be bypassed and an external clock supplied at XTALIN; the SoC will operate to DC with the PLL disabled. When doing so, allow XTALOUT to float. The input clock with the PLL bypassed will be twice the desired system operating frequency, and care must be taken not to exceed the maximum input clock voltage. Maximum values for system speeds and input voltages are given in the Electrical Specifications.Figure 4.LH75401 System Application Example。

966575-3资料

966575-3资料

966575-3 Product DetailsHome | Customer Support | Suppliers | Site Map | Privacy Policy | Browser Support© 2008 Tyco Electronics Corporation All Rights Reserved Searc hProducts Documentation Resources My Account Customer Support Home > Products > By Type > PCB Connectors > Product Feature Selector > Product Details966575-3Active .100 inch AMPMODU HeadersAlways EU RoHS/ELV Compliant (Statement of Compliance)Product Highlights:l Headerl Header Type = Standardl Number of Rows = Singlel Number of Positions = 3l Mating Post Length = 6.70 mmView all Features | Find SimilarProductsCheck Pricing &AvailabilitySearch for ToolingProduct FeatureSelectorContact Us AboutThis ProductQuick LinksDocumentation & Additional InformationProduct Drawings:l AMPMODU II ACTION STIFTLEISTE, EINREIHIG(PDF, English)Catalog Pages/Data Sheets:l None AvailableProduct Specifications:l None AvailableApplication Specifications:l None AvailableInstruction Sheets:l None AvailableCAD Files:l None AvailableList all Documents Additional Information:l Product Line InformationRelated Products:l ToolingProduct Features (Please use the Product Drawing for all design activity)Product Type Features:l Product Type = Headerl Number of Positions = 3l Mount Angle = Verticall PCB Retention Feature = Yesl Surface Mount Compatible = Nol Board Standoff = Withl Mounting Ears = Withoutl Mating Connector Lock = Withoutl Post Size (mm [in]) = 0.64 [.025]l PCB Thickness (mm [in]) = 1.57 [0.062]Mechanical Attachment:l Mating Post Length (mm [in]) = 6.70 [0.264] l Panel Attachment = WithoutTermination Related Features:l Termination (Solder) Post Length (mm [in]) =3.20 [0.126]l Solder Tail Contact Plating = Tin over Nickel Body Related Features:l Header Type = Standardl Number of Rows = Singlel Centerline, Matrix (mm [in]) = 2.54 [.100]l Selectively Loaded = Nol PCB Retention Method = ACTION (Compliant)Press-fit Postsl Mount Type = PC Board Contact Related Features:l Contact Mating Area Plating = Gold (5) overNickell Contact Shape = Squarel Contact Material = Phosphor BronzeHousing Related Features:l Housing Material = PolyesterIndustry Standards:l RoHS/ELV Compliance = RoHS compliant, ELVcompliantl Lead Free Solder Processes = Not relevant forlead free processl RoHS/ELV Compliance History = Always wasRoHS compliantConditions for Usage:l High Temperature Housing = NoOperation/Application:l High Speed Serial Data Connector = No Other:l Brand = AMPProvide Website Feedback | Contact Customer Support。