单片机英文参考文献
篇一：5-单片机+外文文献+英文文献+外文翻译中英对照
AT89C51的介绍
（原文出处：http：///resource/）
描述
AT89C51是一个低电压，高性能CMOS8位单片机带有4K字节的可反复擦写的程序存储器（PENROM）。和128字节的存取数据存储器（RAM），这种器件采用ATMEL公司的高密度、不容易丢失存储技术生产，并且能够与MCS-51系列的单片机兼容。片内含有8位中央处理器和闪烁存储单元，有较强的功能的AT89C51单片机能够被应用到控制领域中。
功能特性
AT89C51提供以下的功能标准：4K字节闪烁存储器，128字节随机存取数据存储器，32个I/O口，2个16位定时/计数器，1个5向量两级中断结构，1个串行通信口，片内震荡器和时钟电路。另外，AT89C51还可以进行0HZ的静态逻辑操作，并支持两种软件的节电模式。闲散方式停止中央处理器的工作，能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。掉电方式保存随机存取数据存储器中的内容，但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。
引脚描述
VCC：电源电压 GND：地 P0口：
P0口是一组8位漏极开路双向I/O口，即地址/数据总线复用口。作为输出口时，每一个管脚都能够驱动8个TTL电路。当“1”被写入P0口时，每个管脚都能够作为高阻抗输入端。P0口还能够在访问外部数据存储器或程序存储器时，转换地址和数据总线复用，并在这时激活内部的上拉电阻。P0口在闪烁编程时，P0口接收指令，在程序校验时，输出指令，需要接电阻。
沈阳航空工业学院电子工程系毕业设计（外文翻译）
P1口：
P1口一个带内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动4个TTL电路。对端口写“1”，通过内部的电阻把端口拉到高电平，此时可作为输入口。因为内部有电阻，某个引脚被外部信号拉低时输出一个电流。闪烁编程时和程序校验时，P1口接收低8位地址。
P2口：
P2口是一个内部带有上拉电阻的8位双向I/O口，P2的输出缓冲级可驱动4个TTL电路。对端口写“1”，通过内部的电阻把端口拉到高电平，此时，可作为输入口。因为内部有电阻，某个引脚被外部信号拉低时会输出一个电流。在访问外部程序存储器或16位地址的外部数据存储器时，P2口送出高8位地址数据。在访问8位地址的外部数据存储器时，P2口线上的内容在整个运行期间不变。闪烁编程或校验时，P2口接收高位地址和其它控制信号。
P3口：
P3口是一组带有内部电阻的8位双向I/O口，P3口输出缓冲故可驱动4个TTL电路。对P3口写如“1”时，它们被内部电阻拉到高电平并可作为输入端时，被外部拉低的P3口将用电阻输出电流。
P3口除了作为一般的I/O口外，更重要的用途是它的第二功能，如下表所示：
P3- 2 -
RST：
复位输入。当震荡器工作时，RET引脚出现两个机器周期以上的高电平将使单片机复位。
ALE/PROG：
当访问外部程序存储器或数据存储器时，ALE输出脉冲用于锁存地址的低8位字节。即使不访问外部存储器，ALE以时钟震荡频率的1/16输出固定的正脉冲信号，因此它可对输出时钟或用于定时目的。要注意的是：每当访问外部数据存储器时将跳过一个ALE脉冲时，闪烁存储器编程时，这个引脚还用于输入编程脉冲。如果必要，可对特殊寄存器区中的8EH单元的D0位置禁止ALE操作。这个位置后只有一条MOVX和MOVC指令ALE才会被应用。此外，这个引脚会微弱拉高，单片机执行外部程序时，应设置ALE无效。
：
程序储存允许输出是外部程序存储器的读选通信号，当AT89C51由外部程序存储器读取指令时，每个机器周期两次PSEN 有效，即输
出两个脉冲。在此期间，当访问外部数据存储器时，这两次有效的PSEN 信号不出现。
EA/VPP：
外部访问允许。欲使中央处理器仅访问外部程序存储器，EA端必须保持低电平。需要注意的是：如果加密位LBI被编程，复位时内部会锁存EA端状态。如EA端为高电平，CPU则执行内部程序存储器中的指令。闪烁存储器编程时，该引脚加上+12V的编程允许电压VPP，当然这必须是该器件是使用12V编程电压VPP。
XTAL1：震荡器反相放大器及内部时钟发生器的输入端。 XTAL2：震荡器反相放大器的输出端。
时钟震荡器
AT89C51中有一个用于构成内部震荡器的高增益反相放大器，引脚XTAL1和XTAL2分别是该放大器的输入端和输出端。这个放大器与作为反馈元件的片外石英晶体或陶瓷谐振器一起构成自然震荡器。外接石英晶体及电容C1，C2接在放大器的反馈回路中构成并联震荡电路。对外接电容C1，C2虽然没有十分严格的要求，但
沈阳航空工业学院电子工程系毕业设计（外文翻译）
电容容量的大小会轻微影响震荡频率的高低、震荡器工作的稳定性、起振的难易程序及温度稳定性。如果使用石英晶体，我们推荐电容使用30PF±10PF，而如果使用陶瓷振荡器建议选择40PF±10PF。用户也可以采用外部时钟。采用外部时钟的电路如图示。这种情况下，外部时钟脉冲接到XTAL1端，即内部时钟发生器的输入端，XTAL2则
悬空。由于外部时钟信号是通过一个2分频触发器后作为内部时钟信号的，所以对外部时钟信号的占空比没有特殊要求，但最小高电平持续时间和最大的低电平持续时间应符合产品技术条件的要求。
内部振荡电路外部振荡电路
闲散节电模式
AT89C51有两种可用软件编程的省电模式，它们是闲散模式和掉电工作模式。这两种方式是控制专用寄存器PCON中的PD和IDL位来实现的。PD是掉电模式，当PD=1时，激活掉电工作模式，单片机进入掉电工作状态。IDL是闲散等待方式，当IDL=1，激活闲散工作状态，单片机进入睡眠状态。如需要同时进入两种工作模式，即PD和IDL同时为1，则先激活掉电模式。在闲散工作模式状态，中央处理器CPU保持睡眠状态，而所有片内的外设仍保持激活状态，这种方式由软件产生。此时，片内随机存取数据存储器和所有特殊功能寄存器的内容保持不变。闲散模式可由任何允许的中断请求或硬件复位终止。终止闲散工作模式的方法有两种，一是任何一条被允许中断的事件被激活，IDL被硬件清除，即刻终止闲散工作模式。程序会首先影响中断，进入中断服务程序，执行完中断服务程序，并紧随RETI指令后，下一条要执行
- 4 -
的指令就是使单片机进入闲散工作模式，那条指令后面的一条指令。二是通过硬件复位也可将闲散工作模式终止。需要注意的是：当由硬件复位来终止闲散工作模式时，中央处理器CPU通常是从激活空
闲模式那条指令的下一条开始继续执行程序的，要完成内部复位操作，硬件复位脉冲要保持两个机器周期有效，在这种情况下，内部禁止中央处理器CPU访问片内RAM，而允许访问其他端口，为了避免可能对端口产生的意外写入：激活闲散模式的那条指令后面的一条指令不应是一条对端口或外部存储器的写入指令。
掉电模式
在掉电模式下，振荡器停止工作，进入掉电模式的指令是最后一条被执行的指令，片内RAM和特殊功能寄存器的内容在中指掉电模式前被冻结。退出掉电模式的唯一方法是硬件复位，复位后将从新定义全部特殊功能寄存器但不改变RAM中的内容，在VCC恢复到正常工作电平前，复位应无效切必须保持一定时间以使振荡器从新启动并稳定工作。
闲散和掉电模式外部引脚状态。
程序存储器的加密
AT89C51可使用对芯片上的三个加密位LB1，LB2，LB3进行编程（P）或不编程（U）得到如下表所示的功能：
篇二：单片机毕业参考英文文献及翻译
附录：英文技术资料翻译
英文原文：
Structure and function of the MCS-51 series
Structure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series
which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computers .
An one-chip computer system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 6) Five cut off cutting
off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the above-mentioned part was joined through the inside data bus .Among
them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8’s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051
inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded.
There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form
constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to
arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated
form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.
8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . Make data can latch when outputting, data can buffer when making introduction , but four function of passway these self-same. Expand among the system of memory outside having slice, four port these may serve as
accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially , make the one-chip computer begin to hold the conduct procedure
from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there aren’t mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal:
Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitt’s trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake,
can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop one’s head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change.
注：文献来源
篇三：单片机基础外文翻译参考文献
单片机基础外文翻译参考文献
(文档含中英文对照即英文原文和中文翻译)
原文:
Fundamentals of Single-chip Microcomputer
Dr. Dobbs MacintoshJournal
Abstract
The single-chip microcomputer is the culmination of both the development of the digital computer and the integrated
circuit arguably the tow most significant inventions of the 20th century .
These tow types of architecture are found in single-chip microcomputer. Some employ the split program/data memory of the Harvard architecture, shown in , others follow the philosophy, widely adapted for general-purpose computers and microprocessors, of making no logical distinction between program and data memory as in the Princeton architecture.
In general terms a single-chip microcomputer is characterized by the incorporation of all the units of a computer into a single device.
Keyword: Single-chip Microcomputer ROM RAM Programming Algorithm
Features
? Compatible with MCS-51? Products
? 4K Bytes of In-System Reprogrammable Flash Memory
– Endurance: 1,000 Write/Erase Cycles
? Fully Static Operation: 0 Hz to 24 MHz
? Three-level Program Memory Lock
? 128 x 8-bit Internal RAM
? 32 Programmable I/O Lines
? Two 16-bit Timer/Counters
? Six Interrupt Sources
? Programmable Serial Channel
? Low-power Idle and Power-down Modes
Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard MCS-51 instruction set and pinout. The
on-chipFlash allows the program memory to be reprogrammed in-system or by a
conventionalnonvolatile memory programmer. By combining a versatile 8-bit CPU with Flashon a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which providesa highly-flexible and cost-effective solution to many embedded control
AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level
interrupt architecture,a full duplex serial port, on-chip oscillator and clock addition, the AT89C51 is designed with
static logicfor operation down to zero frequency and supports twosoftware selectable power saving modes. The Idle Modestops the CPU while allowing the RAM, timer/counters,serial port and interrupt system to continue functioning. ThePower-down Mode saves the RAM contents but freezesthe oscillator disabling all other chip functions until the nexthardware reset.
Pin Configurations
Block Diagram
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as highimpedanceinputs.
Port 0 may also be configured to be the multiplexed loworderaddress/data bus
during accesses to external programand data memory. In this mode P0 has
internalpullups.
Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal
1 also receives the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are
pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal
2 emits the high-order address byte during fetches from
external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function 2 also receives the high-order
Structure and fun cti on of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51is a nameof a piece of one-chip computer series which In tel Compa ny produces. This compa ny in troduced 8 top-grade on e-chip computers of MCS-51 series in 1980 after in troduc ing 8 on e-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031,8751, 80C51BH, 80C31BH,etc., their basic compositi on, basic performa nee and in structi on system are all the same. 8051 daily representatives- 51 serial on e-chip computers . An one-chip computer system is made up of several followi ng parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositti ng not can read ing /data that write, such as result not middle of operati on, final result and data wan ted to show, etc. ( 3) Procedure memoryROM/EPRC(4KB/8KB ), is used to preserve the procedure , some in itial data and form in slice. But does not take ROM/EPROM within some on e-chip computers, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O in terface P0 four P3, each mouth can use as introduction , may use as export ing too. ( 5) Two timer / coun ter, each timer / coun ter may set up and count in the way, used to count to the exter nal in cide nt, can set up into a timi ng way too, and can accord ing to count or result of timing realize the control of the computer. (6) Five cut off cutting off the control system of the source .
英文参考文献标准格式:论文参考文献格式规范 也可以在标点.之后加上一个空格，但一定要保证所有的项目空格个数一致一、参考文献的类型 参考文献（即引文出处）的类型以单字母方式标识，具体如下： [M]--专著,著作 [C]--论文集(一般指会议发表的论文续集，及一些专题论文集，如《***大学研究生学术论文集》 [N]-- 报纸文章 [J]--期刊文章：发表在期刊上的论文，尽管有时我们看到的是从网上下载的（如知网），但它也是发表在期刊上的，你看到的电子期刊仅是其电子版 [D]--学位论文：不区分硕士还是博士论文 [R]--报告：一般在标题中会有"关于****的报告"字样 [S]-- 标准 [P]--专利 [A]--文章：很少用，主要是不属于以上类型的文章 [Z]--对于不属于上述的文献类型，可用字母"Z"标识，但这种情况非常少见 常用的电子文献及载体类型标识： [DB/OL] --联机网上数据(database online) [DB/MT] --磁带数据库(database on magnetic tape) [M/CD] --光盘图书(monograph on CDROM) [CP/DK] --磁盘软件(computer program on disk)
[J/OL] --网上期刊(serial online) [EB/OL] --网上电子公告(electronic bulletin board online) 很显然，标识的就是该资源的英文缩写，/前面表示类型，/后面表示资源的载体，如OL表示在线资源 二、参考文献的格式及举例 1．期刊类 【格式】[序号]作者.篇名[J].刊名,出版年份,卷号(期号)起止页码. 【举例】 [1] 周融，任志国，杨尚雷，厉星星.对新形势下毕业设计管理工作的思考与实践[J].电气电子教学学报，2003(6):107-109. [2] 夏鲁惠.高等学校毕业设计(论文)教学情况调研报告[J].高等理科教育,2004(1):46-52. [3] Heider, E.R.& D.C.Oliver. The structure of color space in naming and memory of two languages [J]. Foreign Language Teaching and Research, 1999, (3): 62 67. 2．专著类 【格式】[序号]作者.书名[M].出版地:出版社,出版年份:起止页码. 【举例】 [4] 刘国钧,王连成.图书馆史研究[M].北京:高等教育出版社,1979:15-18,31. [5] Gill, R. Mastering English Literature [M]. London: Macmillan, 1985: 42-45. 3．报纸类 【格式】[序号]作者.篇名[N].报纸名,出版日期(版次). 【举例】 [6] 李大伦.经济全球化的重要性[N]. 光明日报，1998-12-27(3).
数据库外文参考文献及翻译 数据库外文参考文献及翻译数据库管理系统——实施数据完整性一个数据库，只有用户对它特别有信心的时候。这就是为什么服务器必须实施数据完整性规则和商业政策的原因。执行SQL Server的数据完整性的数据库本身，保证了复杂的业务政策得以遵循，以及强制性数据元素之间的关系得到遵守。因为SQL Server的客户机/服务器体系结构允许你使用各种不同的前端应用程序去操纵和从服务器上呈现同样的数据，这把一切必要的完整性约束，安全权限，业务规则编码成每个应用，是非常繁琐的。如果企业的所有政策都在前端应用程序中被编码，那么各种应用程序都将随着每一次业务的政策的改变而改变。即使您试图把业务规则编码为每个客户端应用程序，其应用程序失常的危险性也将依然存在。大多数应用程序都是不能完全信任的，只有当服务器可以作为最后仲裁者，并且服务器不能为一个很差的书面或恶意程序去破坏其完整性而提供一个后门。SQL Server使用了先进的数据完整性功能，如存储过程，声明引用完整性（DRI），数据类型，限制，规则，默认和触发器来执行数据的完整性。所有这些功能在数据库里都有各自的用途;通过这些完整性功能的结合，可以实现您的数据库的灵活性和易于管理，而且还安全。声明数据完整性声明数据完整原文请找腾讯3249114六,维-论'文.网 https://www.doczj.com/doc/9b12187010.html, 定义一个表时指定构成的主键的列。这就是所谓的主键约束。SQL Server使用主键约束以保证所有值的唯一性在指定的列从未侵犯。通过确保这个表有一个主键来实现这个表的实体完整性。有时，在一个表中一个以上的列（或列的组合）可以唯一标志一行，例如，雇员表可能有员工编号（ emp_id ）列和社会安全号码（ soc_sec_num ）列，两者的值都被认为是唯一的。这种列经常被称为替代键或候选键。这些项也必须是唯一的。虽然一个表只能有一个主键，但是它可以有多个候选键。 SQL Server的支持多个候选键概念进入唯一性约束。当一列或列的组合被声明是唯一的， SQL Server 会阻止任何行因为违反这个唯一性而进行的添加或更新操作。在没有故指的或者合适的键存在时，指定一个任意的唯一的数字作为主键，往往是最有效的。例如，企业普遍使用的客户号码或账户号码作为唯一识别码或主键。通过允许一个表中的一个列拥有身份属性，SQL Server可以更容易有效地产生唯一数字。您使用的身份属性可以确保每个列中的值是唯一的，并且值将从你指定的起点开始，以你指定的数量进行递增（或递减）。（拥有特定属性的列通常也有一个主键或唯一约束，但这不是必需的。）第二种类型的数据完整性是参照完整性。 SQL Server实现了表和外键约束之间的逻辑关系。外键是一个表中的列或列的组合，连接着另一个表的主键（或着也可能是替代键）。这两个表之间的逻辑关系是关系模型的基础;参照完整性意味着这种关系是从来没有被违反的。例如，一个包括出版商表和标题表的简单的select例子。在标题表中，列title_id （标题编号）是主键。在出版商表，列pub_id （出版者ID ）是主键。 titles表还包括一个pub_id列，这不是主键，因为出版商可以发布多个标题。相反， pub_id是一个外键，它对应着出版商表的主键。如果你在定义表的时候声明了这个关系， SQL Server由双方执行它。首先，它确保标题不能进入titles表，或在titles表中现有的pub_id无法被修改，除非有效的出版商ID作为新pub_id出现在出版商表中。其次，它确保在不考虑titles表中对应值的情况下，出版商表中的pub_id的值不做任何改变。以下两种方法可
基于单片机的大棚温湿度控制系统设计 发布: 2011-9-1 | 作者: —— | 来源:caiminghao| 查看: 530次| 用户关注： 摘要：针对研究蔬菜大棚智能温湿度控制，设计了一种基于计算机自动控制的智能蔬菜大棚温湿度控制系统。详细阐述了该系统的温湿度采集、温湿度显示、控制系统等系统软硬件的设计思想，以DS18B20和HM1500LF作为温湿度传感器，以AT89S52单片机为系统核心，最后利用DELPHI软件进行系统仿真。该研究设计的蔬菜大棚智能温湿度控制系统人机界面良好，操作简单方便，自动化程度高，造价低廉，具有良好的应用前景和推广价值。关键词：温度采 摘要：针对研究蔬菜大棚智能温湿度控制，设计了一种基于计算机自动控制的智能蔬菜大棚温湿度控制系统。详细阐述了该系统的温湿度采集、温湿度显示、控制系统等系统软硬件的设计思想，以DS18B20和HM1500LF作为温湿度传感器，以AT89S52单片机为系统核心，最后利用DELPHI软件进行系统仿真。该研究设计的蔬菜大棚智能温湿度控制系统人机界面良好，操作简单方便，自动化程度高，造价低廉，具有良好的应用前景和推广价值。 关键词：温度采集；湿度采集；LCD显示；单片机 0 引言 植物的生长都是在一定的环境中进行的，在生长过程中受到环境中各种因素的影响，其中影响最大的是温度和湿度。若昼夜的温度和湿度变化很大，其对植物生长极为不利。因此必须对温度和湿度进行监测和控制，使其适合植物的生长，以提高其产量和质量。 本系统就是针对大棚内温度、湿度，研究单片机控制的温室大棚自动控制，综合考虑系统的精度、效率以及经济性要求多方面因素之后，设计一种基于计算机自动控制的大棚温湿度控制系统。 本系统实现的蔬菜大棚温湿度控制系统的目标功能如下： (1)系统能对大棚环境温湿度进行采集和显示(现场观温、湿度，软件记录)。 (2)能通过上位机端远程设定蔬菜的生长期适宜温湿度。由主控机统一设置系统时间和温度湿度修正值。 (3)当大棚的环境温湿度参数超过设定的上下限值时控制相应的系统启动。 (4)可实时显示当前温度、时间、报警阈值等信息，并可查询各时间段的温湿度情况，并加以控制。 1 系统各组成模块
中文参考文献格式 参考文献（即引文出处）的类型以单字母方式标识： M——专著，C——论文集，N——报纸文章，J——期刊文章，D——学位论文，R——报告，S——标准，P——专利；对于不属于上述的文献类型，采用字母“Z”标识。 参考文献一律置于文末。其格式为： （一）专著 示例 [1] 张志建.严复思想研究[M]. 桂林：广西师范大学出版社，1989. [2] 马克思恩格斯全集：第1卷[M]. 北京：人民出版社，1956. [3] [英]蔼理士.性心理学[M]. 潘光旦译注.北京：商务印书馆，1997. （二）论文集 示例 [1] 伍蠡甫.西方文论选[C]. 上海：上海译文出版社，1979. [2] 别林斯基.论俄国中篇小说和果戈里君的中篇小说[A]. 伍蠡甫.西方文论选：下册[C]. 上海：上海译文出版社，1979. 凡引专著的页码，加圆括号置于文中序号之后。 （三）报纸文章 示例 [1] 李大伦.经济全球化的重要性[N]. 光明日报，1998-12-27，（3） （四）期刊文章 示例 [1] 郭英德.元明文学史观散论[J]. 北京师范大学学报（社会科学版），1995（3）. （五）学位论文 示例 [1] 刘伟.汉字不同视觉识别方式的理论和实证研究[D]. 北京：北京师范大学心理系，1998. （六）报告 示例 [1] 白秀水，刘敢，任保平. 西安金融、人才、技术三大要素市场培育与发展研究[R]. 西安：陕西师范大学西北经济发展研究中心，1998. （七）、对论文正文中某一特定内容的进一步解释或补充说明性的注释，置于本页地脚，前面用圈码标识。 参考文献的类型 根据GB3469-83《文献类型与文献载体代码》规定，以单字母标识： M——专著（含古籍中的史、志论著） C——论文集 N——报纸文章 J——期刊文章 D——学位论文 R——研究报告 S——标准 P——专利 A——专著、论文集中的析出文献 Z——其他未说明的文献类型 电子文献类型以双字母作为标识： DB——数据库 CP——计算机程序 EB——电子公告
基于反馈神经网络肘关节力矩的动态预测 R.Song K.Y.Tong 健康技术与信息学系，香港理工大学 KowIoon，香港
摘要 肌肉模型是身体部分运动分析的一个重要组成部分。尽管许多研究已经集中在静态条件下,但是肌电信号（EMG）和关节转矩在自愿动态情况下之间的关系并没有被很好的研究。本研究的目的是调查的一个反馈人工神经网络的性能（RANN）自愿动态情况下的复杂肘扭矩估计。肌电信号和运动数据，其中包括角度和角速度，被用来作为估计在运动过程中预期的扭矩输入。此外，角度和角速度的预测精度的作用进行了研究，并比较两个模型。一个模型的肌电图和关节运动的投入和其他的模型只使用肌电图无运动数据输入。六例健康体检者，和两个平均角速度（60°S 7和90°S 7）三种不同负荷（0公斤，1公斤，2公斤）在手的位置被选择来训练和测试90°屈肘、全伸肘之间的递归神经网络（0 ~）。训练结束后，根平均平方误差（RMSE）预期的扭矩和扭矩之间的模型预测，在训练数据集的肌电图和关节运动的投入和测试数据集，分别为0.17±0.03 nm和0.35 + 0.06 nm。预期的扭矩和预测模型的RMSE值之间的扭矩，在训练数据集只有肌电输入和测试集，分别为0.57 t - 0.07 nm和0.73 T 0.11 nm。结果表明，肌电信号一起运动的数据提供了更好的性能预测的关节力矩；关节角度和角速度提供了重要信息的关节力矩的估计在自愿的运动。 关键词:肌肉骨骼模型，自愿的运动，反馈人工神经网络，逆动力学模型
第一章绪论 由于希尔提出了1938肌肉的经典论文，神经生理学和神经肌肉骨骼系统的生物力学已被广泛研究，使人体运动生成的原理可以发现（希尔，1938）。 探讨中枢神经系统（CNS）激发肌肉和其后的发展力和产生不同的人体运动，许多模型来描述和定性的肌肉骨骼系统的不同层次的性能（温特斯，1990；扎杰克和温特斯，1990）。一个被普遍接受的山为基础的神经肌肉骨骼系统由以下子模型，一步一步：肌肉兴奋-收缩模型；肌腱骨骼模型；动态模型（扎耶克，1989）。 图1 肌肉骨骼模型框图 图1显示了基于hillbased模型的运动生成。图1，肌肉兴奋收缩模型是用来估计中枢神经系统指挥肌肉活动的状态。肌腱模型产生的肌肉力量不仅基于肌肉激活状态，而且基于肌腱式长度和肌腱式收缩速度，这与关节角速度和角速度（温特斯和斯塔克，1988）。前项状态的肌肉力量，它决定了肌腱的依从性，还负责肌肉力在后一阶段（扎耶克，1989）。一旦所有负责的关节运动的肌肉力量已经发现，肌肉的力量与各自的肌肉力臂和的结果求和乘法可以产生关节力矩。所有子模型的数学积分可以用来描述关节运动是中枢神经系统的命令产生哪些参数斧负责关节力矩。 肌电信号反映肌肉的活动，和许多类似的肌电力矩的关系已经在静态和动态情况的研究（张等人，1997；麦森纳和莫润，1995）。肌肉的肌电信号也常被认
外文文献： Knowledge of the stepper motor What is a stepper motor： Stepper motor is a kind of electrical pulses into angular displacement of the implementing agency. Popular little lesson: When the driver receives a step pulse signal, it will drive a stepper motor to set the direction of rotation at a fixed angle (and the step angle). You can control the number of pulses to control the angular displacement, so as to achieve accurate positioning purposes; the same time you can control the pulse frequency to control the motor rotation speed and acceleration, to achieve speed control purposes. What kinds of stepper motor sub-： In three stepper motors: permanent magnet (PM), reactive (VR) and hybrid (HB) permanent magnet stepper usually two-phase, torque, and smaller, step angle of 7.5 degrees or the general 15 degrees; reaction step is generally three-phase, can achieve high torque output, step angle of 1.5 degrees is generally, but the noise and vibration are large. 80 countries in Europe and America have been eliminated; hybrid stepper is a mix of permanent magnet and reactive advantages. It consists of two phases and the five-phase: two-phase step angle of 1.8 degrees while the general five-phase step angle of 0.72 degrees generally. The most widely used Stepper Motor. What is to keep the torque (HOLDING TORQUE) How much precision stepper motor? Whether the cumulative： The general accuracy of the stepper motor step angle of 3-5%, and not cumulative.
[1] 王青云. 基于单片机的温度测量系统[J] 2010，(05). [2] 彭立，张建洲，王少华. 自适应温度控制系统的研制[J]东北师大学报(自然科学版), 1994,(01) . [3] Jack Shandle. 即将来临的32位浪潮——ARM构架在32位微控制器领域的应用[J]单片机与嵌入式系统应用, 2004,(03) . [4] 刘侃,张永泰,刘洛琨. ARM程序设计优化策略与技术[J]单片机与嵌入式系统应用, 2004,(04) . [5] 何立民．从Cygnal 80C51F看8位单片机发展之路．单片机与嵌入式系统应用[M]，2002年，第5期：P5~8 [6] 夏继强. 单片机实验与实践教程. 北京：北京航空航天大学出版社, 2001 [7] 徐惠民、安德宁．单片微型计算机原理接口与应用．第1版[M]．北京：北京邮电大学出版社，1996 [8] 张媛媛,何怡刚,徐雪松. 基于C8051F020的温湿度控制箱设计[J]国外电子元器件, 2004,(10) . [9] 江孝国,王婉丽,祁双喜. 高精度PID温度控制器[J]电子与自动化, 2000,(05) . [10] 于洋. 高低温试验箱微机自动控制系统的设计[J]工业仪表与自动化装置, 2003,(02) . [11] 沈聿农.传感器及应用技术[M].北京:化学工业出版社,2001. [12] 范晶彦.传感器与检测技术应用[M].北京:机械工业出版社,2005. [13] 王俊峰,孟令启.现代传感器应用技术[M].北京:机械工业出版社,2007. [14] 金发庆.传感器技术与应用[M].北京:机械工业出版社,2006. [15] Goldman JM, Petterson MT, Kopotic RJ, Barker SJ.Masimosignal extraction pulse oximetry[J].J Clin Monit Comput.2000;16(7):7 5-83. [16] D. Tulone. On the feasibility of global time estimation under isolation conditions in wireless sensor networks. [17] 王春晖. 环境试验箱中制冷系统的原理分析及优化概述[J]电子质量, 2003,(12) [18] 李建中. 单片机原理及应用[M]西安电子科技大学出版社,2010.(02) [19] 周航慈.单片机应用程序设计技术[M].北京：北京航空航大大学出版社，2005. [20] 何立民.单片机高级教程[M].北京：北京航空航天大学出版社，2001. [21] 夏继强.单片机实验与实践教程[M].北京：北京航空航天大学出版社, 2001. [22] 徐惠民,安德宁.单片微型计算机原理接口与应用[M]．北京：北京邮电大学出版社，1996. [23] 李广第．单片机基础[M]．北京：北京航空航天大学出版社，1999. [24] 赵晓安. MCS-51单片机原理及应用[M]. 天津：天津大学出版社，2001. [25] 杨清梅,孙建民.传感器与测试技术[M].哈尔滨: 哈尔滨工程大学出版社,2005. [26] 范晶彦.传感器与检测技术应用[M].北京:机械工业出版社,2005. [27] 王俊峰,孟令启.现代传感器应用技术[M].北京:机械工业出版社,2007. [28] 宋文绪,杨帆.自动检测技术[M].北京:高等教育出版社,2000. [1] 王青云. 基于单片机的温度测量系统[J] 2010，(05). [2] 彭立，张建洲，王少华. 自适应温度控制系统的研制[J]东北师大学报(自然科学版), 1994, [3] YD. Tulone. Is it possible to ensure strong data guarantees in highly mobile [4] Jack Shandle. 即将来临的32位浪潮——ARM构架在32位微控制器领域的应用[J]单片机与嵌入式系统应用, 2004,(03) .
英语毕业论文引用和参考文献格式 英语专业毕业论文引用和参考文献格式采用APA格式及规。 一、文中夹注格式 英语学位论文引用别人的观点、方法、言论必须注明出处，注明出处时使用括号夹注的方法（一般不使用脚注或者尾注），且一般应在正文后面的参考文献中列出。关于夹注，采用APA格式。 （一）引用整篇文献的观点 引用整篇文献（即全书或全文）观点时有两种情况： 1.作者的姓氏在正文中没有出现，如： Charlotte and Emily Bronte were polar opposites, not only in their personalities but in their sources of inspiration for writing (Taylor, 1990). 2. 作者的姓氏已在正文同一句中出现，如： Taylor claims that Charlotte and Emily Bronte were polar opposites, not only in their personalities but in their sources of inspiration for writing (1990). 3. 如果作者的姓氏和文献出版年份均已在正文同一句中出现，按APA的规不需使用括号夹注，如： In a 1990 article, Taylor claims that Charlotte and Emily Bronte were polar opposites, not only in their personalities but in their sources of inspiration for writing. 4. 在英文撰写的论文中引用中文著作或者期刊，括号夹注中只需用汉语拼音标明作者的姓氏，不得使用汉字，如：(Zhang, 2005) （二）引用文献中具体观点或文字 引用文献中某一具体观点或文字时必须注明该观点或者该段文字出现的页码出版年份，没有页码是文献引用不规的表现。 1.引用一位作者的文献 （1）引用容在一页，如： Emily Bronte “expressed increasing hostility for the world of human relationships, whether sexual or social” (Taylor, 1988：11). （2）引用容在多页上，如： Newmark (1988：39-40) notes three characteristically expressive text-types: (a) serious imaginative literature (e.g. lyrical poetry); (b) authoritative statements (political speeches and documents, statutes and legal documents, philosophical and academic works by acknowledged authorities); (c) autobiography, essays, personal correspondence (when these are personal effusions).
Web应用程序安全外文翻译参考文献(文档含中英文对照即英文原文和中文翻译) 原文： Basic Security Practices for Web Applications Even if you have limited experience with and knowledge of application security, there are basic measures that you should take to help protect your Web applications. The following sections in this topic provide minimum-security guidelines that apply to all Web applications.General Web Application Security Recommendations;Run Applications with Minimum Privileges ;Know Your Users; Guard Against Malicious User Input;Access Databases Securely;Create Safe Error Messages;Keep Sensitive Information Safely;Use Cookies Securely;Guard Against Denial-of-Service Threats. 1. General Web Application Security Recommendations
Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computers . An one-chip computer system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 6) Five cut off cutting off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8's accumulation
这个垃圾期刊的格式很操蛋，参考文献格式我根本看不懂，找了好久终于找到了介绍。在最后部分。 EI收录的期刊Advanced Materials Research 论文的格式要求中文版详解,方便中国人使用,若想此刊投稿,值得收藏。 “Fig. 1, Fig. 2, ”表示，Fig.和后面的数字间加1空格，数字后面与文字之间加2个空格。注意图的质量。如要节省版面，可以一行中并排放置多个图片。 5. 公式的格式及其引用 5.1 所有公式及文中的复杂符号，均用公式编辑器输入，不要用文本框或图形输入。 5.2 公式单独成段，左缩进5mm，段前12磅，段后0磅；公式编号用“(数字)”表示，排在右端，两端对齐；正文中引用公式时，用“Eq.1, Eq.2 ”表示。例： c2 = a2 + b2. (1) 6. 参考文献格式及引用格式 6.1 参考文献按引用的先后，在正文的有关处用[1]，[2,3] 标明（请勿用上标标注），这些数字与文末的参考文献相对应。 6.2 参考文献的编号与内容用制表符Tab隔开，字体及大小与正文相同，行间距为单倍距，格式为悬挂缩进0.8cm。 6.3 参考文献中作者，名在前用简写，姓在后用全称，有多个作者时，作者与作者之间用逗号分开，最后一个作者与前面的作者之间用and相连（如玉娇龙，王处一，李静就写为：J.L. Yu, C.Y. Wang and J. Li）。 6.4参考文献中如果不是英文文献，请在参考文献后用英文注明语种，如：(In Chinese)。 6.5 几种常见参考文献的格式编排规范： (a) 期刊类：（作者: 刊名, 卷(年) No.期号, p.起始页码.），刊名的所有实词首字母大写。例： [1]
3000字英文参考文献及其翻译 【注意：选用的英文一定要与自己的论文题目相关。 如果文章太长，可以节选（用省略号省略一些段略）。如果字数不够，可以选2至3篇，但要逐一注明详细出处。英文集中在一起放前面，对应的中文翻译放后面。中文翻译也要将出处翻译，除非是网页。 对文献的翻译一定要认真！对英文文献及其翻译的排版也要和论文正文一样！ 特别注意：英文文献应该放在你的参考文献中。】 TOY RECALLS——IS CHINA THE PROBLEM Hari. Bapuji Paul W. Beamish China exports about 20 billion toys per year and they are the second most commonly imported item by U.S. and Canada. It is estimated that about 10,000 factories in China manufacture toys for export. Considering this mutual dependence, it is important that the problems resulting in recalls are addressed carefully. Although the largest portion of recalls by Mattel involved design flaws, the CEO of Mattel blamed the Chinese manufacturers by saying that the problem resulted ‘in this case （because） one of our manufacturers did not follow the rules’. Several analysts too blamed the Chinese manufacturers. By placing blame where it did not belong, there is a danger of losing the opportunity to learn from the errors that have occurred. The first step to learn from errors is to know why and where the error occurred. Further, the most critical step in preventing the recurrence of errors is to find out what and who can prevent it. ……
The Introduction of AT89C51 Description The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. Function characteristic The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, one 5 vector two-level interrupt architecture, a full duplex serial port, one-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC：Supply voltage. GND：Ground.