SP6601L HW-Platform PCB Layout Design Guide V1.0.0

Hardware Design GuideHDM1216V1.0中电器材ContentsContents ................................................................................................................................................................ I 1Hardware description ................................................................................................................................... 1 1.1 Overview.......................................................................................................................................... 1 1.2 Structure description (1)2Function Description ................................................................................................................................... 3 2.1 HD8020............................................................................................................................................ 3 2.2 RF matching circuit ......................................................................................................................... 4 2.3Connecting power (4)2.3.1 A VD33DC: Main supply voltage (3.3V) (4)2.3.2 A VD33BAK: Backup supply voltage (3.3V) (4)2.3.3 A VDUSB: USB supply voltage (3.3V) (5)2.3.4 ANT_BIAS: Output voltage for active antenna (3.3V) (5)2.4 TCXO (5)2.5 OSC 32.768KHz .............................................................................................................................. 5 2.6Pins and Interfaces ........................................................................................................................... 5 2.6.1 UART ....................................................................................................................................... 6 2.6.2 USB (6)3 Design .......................................................................................................................................................... 7 3.1 Pin description ................................................................................................................................. 7 3.2 Layout: Footprint ............................................................................................................................. 9 3.3PCB design suggestions ................................................................................................................. 10 3.3.1 PCB Layout suggestions ........................................................................................................ 10 3.3.2 RF 50Ω matching .................................................................................................................... 11 3.3.3 TCXO ..................................................................................................................................... 11 3.3.4 For Better DCDC Performance .............................................................................................. 12 3.3.5 Layers .................................................................................................................................... 13 3.4Antenna (16)中电器材3.4.1Passive antenna design (16)3.4.2Active antenna design (17)4ESD precautions (17)材器电中1Hardware description1.1OverviewThe HDM1216 is a high performance, compact and low power consumption module powered by HD8020 single chip GNSS solution with full independence intellectual property targeted for location awareness and logistic transportation markets. HDM1216 is easy to integrate with its leadless chip carrier (LCC) packages.1.2Structure descriptionFigure 1-1 HDM1216 structureThe HDM1216 is insisted of the follow parts:HD8020RF matchingPowerTCXOOSC 32.768KHzInterfaces: UART/USB/I2C/SPIIO Pins: PRRSTX/ PPS/EXTINT/PRTRG材器电中2 Function Description2.1 HD8020HD8020 is a highly integrated standalone GPS/GNSS (GPS, BDS, GLONASS, GALILEO) positioning chip developed to provide excellent location services.Figure 2-1 HD8020C11RF_IN2.2 RF matching circuitThe RF part is a L matching circuit. D1 is for ESD protection.Figure 2-2 RF matching circuit2.3 Connecting powerHDM1216 positioning modules have up to three power supply pins: A VD33DC, A VD33BAK and A VDUSB.2.3.1 A VD33DC: Main supply voltage (3.3V)The A VD33DC pin provides the main supply voltage. During operation, the current drawn by the module can vary by some orders of magnitude, especially if enabling low-power operation modes. For this reason, it is important that the supply circuitry be able to support the peak power for a short time.2.3.2 A VD33BAK: Backup supply voltage (3.3V)If the module supply has a power failure, the A VD33BAK pin supplies the real-time clock (RTC) and battery backed RAM (BBR). If no backup battery is connected, the module performs a cold start at power up.Avoid high resistance on the A VD33BAK line: During the switch from main supply to backup supply, ashort current adjustment peak can cause high voltage drop on the pin with possible malfunctions. If no backup supply is available, connect the A VD33BAK pin to A VD33DC.As long as power is supplied to the HDM1216 module through the A VD33DC pin, the backup battery isdisconnected from the RTC and the BBR to avoid unnecessary battery drain. In this case, AVD33DC supplies power to the RTC and BBR.C11RF_IN中电器材2.3.3 A VDUSB: USB supply voltage (3.3V)A VDUSB supplies the USB interface. If the USB interface is not used, please leave it open and delete C8.2.3.4 ANT_BIAS: Output voltage for active antenna (3.3V)ANT_BIAS supplies power to an active antenna or external LNA.2.4 TCXOFigure 2-3 TCXO2.5 OSC 32.768KHzFigure 2-4 32.768KHz2.6 Pins and InterfacesFigure 2-5 Pins and InterfacesY1PPS SPICXUSBDP USBDN EX TINT ANT_BIAS PRRSTXRF_IN ANT_ON SPIDI SPIDO SPICK UIN0UOUT0SCL SDA R40RPRTRG M1HDM1216GPIO91PRTRG 2GPIO133GPIO144USBDN 5USBDP 6AVDUSB 7PRRSTX 8ANT_BIAS 9GND110RF_IN 11GND212GND313GPIO214GPIO615GPIO716GPIO817GPIO418GPIO519TX D020RX D021AVD33BAK 22AVD33DC 23GND424AVDUSBAVD33DCAVD33BAK 中器2.6.1 UARTThe Universal Asynchronous Receiver / Transmitter (UART) provide serial communication with external device. It performs serial-to-parallel & parallel-to-serial data conversion during receiving & transmitting respectively. Add ESD Diodes to the UOUT0 and UIN0 signals for better ESD performance.2.6.2 USBUSB version 2.0 FS compatible interface can be used for communication as an alternative to the UART. Please pay attention to R2/R3 configuration as the follow table. If the USB interface is not used, just leave R2/R3/C8 open.R2TCXO YES YES(default)USB INTERFACE R316.369MHz 26MHz NONO 1k 1k 16.369MHz26MHzNC NC NC 1k NCNCNC 1uF 1uF C8NC中电器材3Design3.1Pin descriptionFigure 3-1 Pin Assignment Notice: GPIO ports can be configured to specific function as needed.Table 3-1 Pin out3.2 Layout: FootprintSymbol Min. (mm) Typ.(mm) Max. (mm) A 12.1 12.2 12.3 B 15.9 16.0 16.3 C 2.5 2.7 2.9 D 0.9 1.0 1.3 E 1.0 1.1 1.2 中电器材3.3PCB design suggestions3.3.1PCB Layout suggestionsFigure3-2 shows the recommend PCB layout for HDM1216 module. Please pay attention to the RF matching part, DCDC part and TCXO part.材器电中Figure 3-2 PCB Layout3.3.2 RF 50Ω matchingThe RF line must be 50Ω matching and as short as better. Put the matching parts nearest to the RF_IN pin. The GND/VCC/BOTTOM layer behind the RF part must be an integrity GND net without any other signals. Put some GND via along the RF signals for better performance. Put an integrity shape on the silkbottom layer for protection.Figure 3-3 RF 50Ω matching3.3.3 TCXOThe TCXO_IN signal should be as short as better. Put TCXO away from noisy part.Figure 3-4 TCXO中电器材3.3.4 For Better DCDC PerformanceFor better DCDC performance, place the DCDC 3.3V capacitor GND pad nearest to the 1.5V capacitor GND pad.Figure 3-5 DCDC part中电器材3.3.5LayersThe PCB for HDM1216 module has four layers. They are TOP, GND, VCC and BOTTOM. All the parts are putted on the TOP layer. The GND layer should be the important integrity GND net without any other net lines for the best RF and noise performance. The power net lines are on the VCC layer.3.3.5.1The TOP layer材器电中Figure 3-6 The TOP layerFigure 3-7 The GND layer中电器材Figure 3-8 The VCC layer中电器材3.3.5.4 The BOTTOM layerFigure 3-9 The BOTTOM layer3.4 Antenna3.4.1 Passive antenna designWhen a passive antenna is used, pay more attention to the layout of the RF section to reduce electrical noise that may interfere with the antenna performance. A DC bias voltage is not needed, passive antennas can be directly connected to the RF input pin, matching the impedance to 50Ω. Sometimes, a passive matching network to match the impedance to 50Ω is needed.中电器材3.4.2 Active antenna designActive antennas have an integrated low-noise amplifier. Active antenna requires a power supply. The power supply to the active antennas will contribute 5-20mA to the GNSS system power consumption. The ANT_BIAS pin is for the LNA power supply. The ANT_ON pin is for the EN signal of the LNA.4 ESD precautionsGNSS positioning modules are sensitive to ESD. Whenever handling the receiver, particular care must be exercised to reduce the risk of electrostatic charges. In addition to standard ESD safety practices, the following measures should be taken into account. Add ESD Diodes to the RF input part to prevent electrostatics discharge.Do not touch any exposed antenna area. Add ESD Diodes to the UART interface.中电器材。

SOM304RD-VI Development Kitwith 5S/ 4 USB/ VGA/ LCD/ LAN / 2GPIO/ PWMx24256MB DDR2 OnboardUser’s Manual(Revision 1.0A)CopyrightThe information in this manual is subject to change without notice for continuous improvement of the product. All rights are reserved. The manufacturer assumes no responsibility for any inaccuracy that may be contained in this document and makes no commitment to update or to keep current information contained in this manual.No part of this manual may be reproduced, copied, translated or transmitted, in whole or in part, in any form or by any means without the prior written permission of the ICOP Technology Inc.Copyright 2008 ICOP Technology Inc.Manual No. IUMSOM304RD-VI000-01 Ver.1.0A June, 2012Trademarks AcknowledgmentVortex86DX is the registered trademark of ICOP Technology Inc.Other brand names or product names appearing in this document are the properties and registered trademarks of their respective owners. All names mentioned herewith are reserved for identification purpose only.T a b l e o f C o n t e n t sT a b l e o f C o n t e n t s ............................................................. i iiC h a p t e r 1 Introduction (1)1.1 Packing List (1)1.2 Product Description (2)1.3 Specifications (2)1.4 Board Dimension (5)C h a p t e r 2 Installation (8)2.1 Board Outline (8)2.2 Connectors & Jumpers Location .................. .. (10)2.3 Connectors & Jumpers Summary (11)2.4 Pin Assignments & Jumper Settings (12)2.5 System Mapping (24)2.6 Watchdog Timer (29)2.7 GPIO (30)2.8 SPI flash (31)2.9 PWM (32)3.0 IDE to SD (33)C h a p t e r 3 Driver Installation (34)Appendix (35)A. TCP/IP library for DOS real mode (35)B. SOM304RD-VI & SOMDX-DEV-VI Schematic (36)C. BIOS Default Setting (37)Warranty (38)This page is blankC h a p t e r 1Introduction1.1 Packing ListProduct Name PackageSOM304DX-DEV-VI SOM304DX-DEV-VI x 1HDD 40P (2.54mm) x 1HDD 44P (2.0mm) x 1RS232 cable (2.54mm) x 4GPIO cable (2.54mm) x 2USB (2.54mm) x 1Print cable (2.54mm ) x 1GPIO cable x 2Product NamePackage SOM304RD-VI SOM304RD-VI CPU Module x11.2 Product DescriptionThe System on Module is a core module with the processor, memory and I/O that would contain the following benefits in the respect of system design.800MHz Vortex86DX System-On-Chip 256 / 512MB DDR2 system memory 4 USB Ver. 2.0 (host)Up to 5 serial ports (TX RX x1)16-bit GPIO x2ISA bus2 watchdog timerEnhanced IDE (UltraDMA-100/66/33) JTAG interfacePWM 24~32 channelsAMI BIOS4MB SPI flashSingle voltage +5V DCSupport extended operatingtemperature range of -20°C to +70°SOM304RD-VI is suitable for broad range of data-acquisition, Industrial automation, Process control, Automotive controller, AVL, Intelligent Vehicle management device,Medical device, Human machine interface, Robotics and machinery control.SOM304RD-VI measured at only 70mm (L)*70mm (W)*10.5mm (H), is designed particularly as the kernel for the diverse expandable applications. Through 8 rows of38pin connector, SOM304RD-VI is able to provide multiple functions, such as ISA BUS, RS-232, IDE, LAN, USB and GPIO.To assist users easily adapt SOM304RD-VI Module into their applications, ICOP offers a complete development board and referential circuit diagram for SOM304RD-VI Module in order to reduce users’ time.Please visit the website below for furtherinformation /tech/vortex86dx/As to the referential circuit drawing, please contact *************.tw1.3 SpecificationsSOM304RD-DEV-VIFeatures SOM304DX-DEV-VI Bus Interface ISA Bus standard compliantConnectors 1.27mm 76-pin header for signal x4 2.54mm 40-pin header for IDE x1 2.54mm 26-pin header for Printer x1 2.54mm 20-pin header for GPIO x22.54mm 10-pin header for USB x12.54mm 10-pin header for RS-232 x42.0mm 44-pin header for IDE x12.0mm 44-pin header for LCD x198-pin slot for ISA x1104-pin box header for PC/104 x1External RJ-45 connector for Ethernet x1External USB connector x2External 15-pin D-Sub female connector for VGA x1 External 9-pin D-Sub male connector for RS-232 x2 External 6-pin Mini DIN connector for Keyboard x1 External 6-pin Mini DIN connector for Mouse x1 External PHONEJACK for Audio x1Power Requirement Single Voltage +5V @80mA Dimension 170 X 170 mm (6.69 x 6.69 inches) Weight 280gOperating Temperature -20o C ~ +70o C-40°C ~ +85°C (Optional)SOM304RD-VIFeatures SOM304RD-VICPU DM&P SoC CPU Vortex86DX- 800MHzReal Time Clock with Lithium Battery BackupCache L1:16K I-Cache, 16K D-Cache L2 Cache 256KBBIOS AMI BIOSBus Interface ISA bus standard compliantSystem Memory 256 / 512MB DDR2 onboardWatchdog Timer Software programmable from 30.5 us to 512 seconds x2sets(Watchdog 1 fully compatible with M6117D)VGA XGI VOLARI Z9s ChipsetVGA and TFT Flat Panel Interface SupportOnboard 32MB VGA Memory, support resolution up to1280x1024, 16M colorsLAN Integrated 10/100Mbps EthernetFlash Disk Support Onboard 4MB SPI Flash DiskOnboard SST Flash Disk (512MB/1GB/2GB/4GB areoptional)MSTI EmbedDisk Module (16MB and above)44-pin IDE to Micro SD (Optional)PWM 24~32 ChannelsI2C Controlled by GP 34/35Serial Console Controlled by GP 36/37I /O Interface Enhanced IDE port (UltraDMA-100/66/33) x1RS-232 port x5 (TX RX x1)USB port x4Parallel port x116-bit GPIO port x210/100Mbps Ethernet port x1Connectors 1.27mm 76-pin box header for signal x41.25mm 6-pin Wafer for JTAG x1Power Requirement Single Voltage +5V @ 600mADimension 70 mm (L) x 70 mm (W) x 10.5 mm (H) (With Cover) Weight 25gOperating Temperature -20o C ~ +70o C-40°C ~ +85°C (Optional)1.4 Board DimensionS OM304DX-DEV-VISOM304RD-VIC h a p t e r 2Installation 2.1 Board OutlineSOM304DX-DEV-VIOM304RD-VIS2.2 Connectors & Jumpers LocationConnectorsSOM304DX-DEV-VI2.3 Connectors & Jumpers SummarySOM304DX-DEV-VINbr Description Type of Connections Pin nbrs.J1 IDE Connector Box Header, 2.0∅ ,22x2 44-pinJ2 IDE Connector Box Header, 2.54∅ , 20x2 40-pinJ3 USB 2/ USB 3 Box Header, 2.54∅ , 5x2 10-pinUSB1A USB 0/ USB 1 USB connector8-pinUSB1B Ethernet LAN RJ45 Connector 8-pinJ7A PS/2 Keyboard Mini-DIN Female6-pinJ7B PS/2 Mouse Mini-DIN Female6-pinJ9 TTL/RS232 Mode Selector Pin Header, 2,54∅,1x2 2-pinJ10 COM1/P4/PWM Box Header, 2.0∅ 5x2 10-pinJ11 GPIO ( P0 / P1 /PWM) Box Header, 2.0∅ ,10x220-pinJ12 GPIO (P2/P3/ SPI/2C/PWM) Box Header, 2.0∅ ,10x220-pinJ13 TTL/RS232 Mode Selector Pin Header, 2,54∅,1x2 2-pinJ14 COM2 Box Header, 2.0∅ 5x2 10-pinJ16 ATX Power ATX header 20-pinJ17 Power Connector Terminal Block 5.0∅,2x1 2-pinJ18 COM3 TTL Mode Box Header, 2.0∅ 5x2 10-pinJ19 Print Box Header, 2.0∅ , 13x2 26-pinJ20 COM4 TTL Mode Box Header, 2.0∅ 5x2 10-pinJ21A ISA Slot1 ISA Slot 98-pinJ35A PC104 Connector – 64 pin Box Header, 2.54∅ 32x2 64-pinJ35B PC104 Connector – 40 pin Box Header, 2.54∅ 20x2 40-pinJ37 LCD Box Header,2.0∅ ,22x2 44-pinJ38 VGA D-Sub Female 15-pinJ45A COM1 D-Sub Male 9-pinJ45B COM2 D-Sub Male 9-pinJ46A Audio Line-Out 1.25mm Phone JackJ46B Audio Mic-In 1.25mm Phone JackSP1 BUZZERSW2 ResetIDE- LED IDE Active LED (Green ) LED-SMDPWR-LED Power Active LED (Red) LED-SMDMTBF-LED MTBF-Out (Orange) LED-SMD2.4 Pin Assignments & Jumper SettingsSOM304DX-DEV-VI J1: IDE (44 Pins)J2: IDE (40 Pins)Pin # Signal Name Pin # Signal Name 1 IDERST 2 GND 3 IDED7 4 IDED8 5 IDED6 6 IDED9 7 IDED5 8 IDED10 9 IDED4 10 IDED11 11 IDED3 12 IDED12 13 IDED2 14 IDED13 15 IDED1 16 IDED14 17 IDED0 18 IDED15 19 GND 20 VCCPin # Signal Name Pin # Signal Name 1 IDERST 2 GND 3 IDED7 4 IDED8 5 IDED6 6 IDED9 7 IDED5 8 IDED10 9 IDED4 10 IDED11 11 IDED3 12 IDED12 13 IDED2 14 IDED13 15 IDED1 16 IDED14 17 IDED0 18 IDED15 19 GND 20 NC 21 IDEREQ 22 GND 23 IDEIOW 24 GND 25 IDEIOR 26 GND 27 ICHRDY 28 GND 29 IDEACK 30 GND 31 IDEINT 32 NC 33 IDESA1 34 IDECBLID 35 IDESA0 36 IDESA2 37 IDECS-0 38 IDECS1 39 IDELED 40 GND 41 VCC 42 VCC 43 GND 44 NC21 IDEREQ 22 GND23 IDEIOW 24 GND25 IDEIOR 26 GND27 ICHRDY 28 GND29 IDEACK 30 GND31 IDEINT 32 NC33 IDESA1 34 IDECBLID35 IDESA0 36 IDESA237 IDECS0 38 IDECS139 IDELED 40 GNDJ3: USBPin # Signal Name Pin # Signal Name1 VCC2 VCC3 LUSBD0-4 LUSBD1-5 LUSBD0+6 LUSBD1+7 GND 8 GND9 GGND 10 GGNDNote:USB port 0, 1 will be occupied if audio function is available USB1A: USB0/1Pin # Signal Name Pin # Signal Name1 VCC2 VCC3 -DATA4 -DATA5 +DATA6 +DATA7 GND 8 GNDUSB1B: Ethernet LANPin # Signal Name Pin # Signal Name1 TD+2 TD-3 RO+4 NC5 NC6 RO-7 NC 8 NCJ7A: PS/2 KeyboardPin # Signal Name Pin # Signal Name1 KBDATA2 NC3 GND4 VCC5 KBCLK6 RO-J7B: PS/2 MousePin # Signal Name Pin # Signal Name1 TD+2 TD-3 RO+4 NC5 NC6 RO-J9: TTL/RS232 Mode Selector (Open: On, Close: Off) Pin # Signal Name Pin # Signal Name1 GND2 VCCJ10: COM1/P4/PWMPin # SignalNamePin # Signal Name1 DCD12 RXD13 TXD14 DTR15 GND6 DSR17 RTS1 8 CTS19 RI1 10 TXDEN1/VCCJ11: GPIO (P0/ P1/ PWM)Pin # Signal Name Pin # Signal Name1 GND2 VCC3 GP004 GP105 GP016 GP117 GP02 8 GP129 GP03 10 GP1311 GP04 12 GP1413 GP05 14 GP1515 GP06 16 GP1617 GP07 18 GP1719 VCC 20 GNDJ12: GPIO (P2/ P3/ SPI/ I2C/PWM)Pin # Signal Name Pin # Signal Name1 GND2 VCC3 GP204 SPICS5 GP216 SPICLK7 GP22 8 SPIDO9 GP23 10 SPIDI11 GP24 12 GP3413 GP25 14 GP3515 GP26 16 GP3617 GP27 18 GP3719 VCC 20 GNDNote:If you Enable 4M SPI flash Disk on the BIOS setting, you cannot use GP30~GP37 Pins.J13: TTL/RS232 Mode Selector (Open: On, Close: Off)Pin # Signal Name Pin # Signal Name1 GND2 VCCJ14: COM1/P4/PWMPin # SignalNamePin # Signal Name1 DCD2 2 RXD23 TXD24 DTR25 GND6 DSR27 RTS2 8 CTS29 RI2 10 TXDEN2/VCCJ17: Power Connector (Terminal Block 5.0mm) Pin # Signal Name1 +5V2 GNDJ18: COM3 TTL ModePin # SignalNamePin #SignalName1 DCD32 RXD33 TXD34 DTR35 GND6 DSR37 RTS3 8 CTS39 RI3 10 VCCJ19: PRINTPin # Signal Name Pin # Signal Name1 STB- 14 AFD-2 PD0 15 ERR-3 PD1 16 INIT-4 PD2 17 SLIN-5 PD3 18 GND6 PD4 19 GND7 PD5 20 GND8 PD6 21 GND9 PD7 22 GND10 ACK- 23 GND11 BUSY 24 GND12 PE 25 GND13 SLCT 26 NC J20: COM 4 TTL ModePin # SignalNamePin #SignalName1 DCD42 RXD43 TXD4 4 DTR45 GND6 DSR47 RTS4 8 CTS49 RI4 10 VCCJ35A: PC104 Connector – 64pin Pin # Signal Name Pin # Signal Name1 IOCHCHK *2 GND3 SD74 RSTDRV5 SD6 6 VCC7 SD5 8 IRQ99 SD4 10 -5V11 SD3 12 DRQ2 13 SD2 14 -12V15 SD1 16 OWS 17 SD0 18 +12V 19 IOCHRDY 20 GND21 AEN 22 SMEMW * 23 SA19 24 SMEMR * 25 SA18 26 IOW * 27 SA17 28 IOR * 29 SA16 30 DACK3 * 31 SA15 32 DRQ3 33 SA14 34 DACK1 * 35 SA13 36 DRQ1 37 SA12 38 REFRESH * 39 SA11 40 SYSCLK41 SA10 42 IRQ7 43 SA9 44 IRQ6 45 SA8 46 IRQ5 47 SA7 48 IRQ4 49 SA6 50 IRQ3 51 SA5 52 DACK2 * 53 SA4 54 TC 55 SA3 56 BALE 57 SA2 58 VCC 59 SA1 60 OSC 61 SA0 62 GND 63 GND 64 GND J35B: PC104 Connector – 40pin Pin # Signal Name Pin # Signal Name1 GND2 GND3 MEMCS16 *4 SBHE *5 IOCS16 * 6 SA237 IRQ10 8 SA229 IRQ11 10 SA21 11 IRQ12 12 SA20 13 IRQ15 14 SA19 15 IRQ14 16 SA18 17 DACK0 * 18 SA17 19 DRQ0 20 MEMR * 21 DACK5 * 22 MEMW * 23 DRQ5 24 SD8 25 DACK6 * 26 SD9 27 DRQ6 28 SD10 29 DACK7 * 30 SD11 31 DRQ7 32 SD12 33 VCC 34 SD13 35 MASTER * 36 SD14 37 GND 38 SD15 39 GND 40 NCJ37: LCDPin # Signal Name Pin # Signal Name1 +3.3V2 +3.3V3 LG24 LG35 LG46 LG57 NC 8 NC9 LR0 10 LR111 LR2 12 LR313 LR4 14 LR515 GND 16 NC17 NC 18 NC19 NC 20 GND21 NC 22 NC23 LB0 24 LB125 LB2 26 LB327 LB4 28 LB529 NC 30 NC31 LG0 32 LG133 GND 34 GND35 NC 36 LCLK37 NC 38 LDE39 NC 40 LHSYNC41 NC 42 LVSYNC43 LBACKL 44 LVDDENJ38: VGAPin # Signal Name Pin # Signal Name1 R OUT2 G OUT3 B OUT4 NC5 GND6 GND7 GND 8 GND9 VCC 10 GND11 NC 12 DDCDAT13 HSYNC 14 VSYNC15 DDCCLKJ45A: COM 1Pin # SignalNamePin #SignalName1 DCD12 RXD13 TXD14 DTR15 GND6 DSR17 RTS1 8 CTS19 RI1J45B: COM 2Pin # SignalNamePin #SignalName1 DCD2 2 RXD23 TXD24 DTR25 GND6 DSR27 RTS28 CTS29 RI2J1/J2/J3/J4:SOM304RD-VI Signal Assignment2.5 System MappingMemory MappingAddress Description Usage 0000:0000 - 9000:FFFF System RAM *A000:0000 - A000:FFFF EGA/VGA Video MemoryB000:0000 - B000:7FFF MDA RAM, Hercules graphics display RAMB000:8000 - B000:FFFF CGA display RAMC000:0000 - C000:7FFF EGA/VGA BIOS ROMC000:8000 - C000:BFFF Boot ROM enableC000:C000 - C000:FFFF Console Redirection enableD000:0000 - D700:FFFF Expansion ROM spaceD800:0000 - DB00:FFFF SPI FLASH Emulation Floppy A EnableDC00:0000 - DF00:FFFF Expansion ROM SpaceE000:0000 - E000:FFFF USB Legacy SCSI ROM spaceF000:0000 - F000:FFFF Motherboard BIOS * FEFA:D000 - FFFF:F000 Standard OpenHCD USB Host Controller * FEFA:F800 - FFFF:FF00 Standard OpenHCD USB Host Controller * FEFA:F400 - FFFF:FF00 On board Ethernet Adapter * FEFA:E000 - FFFF:F000 Standard Enhanced PCI to USB Host Controller * FEFA:FC00 - FFFF:FF00 Standard Enhanced PCI to USB Host Controller *I/O MappingI/O Address Owner Usage 0000h - 000Fh DMA 8237-1 * 0010h - 0017h COM 90020h - 0021h PIC 8259-1 *0022h - 0023h Indirect Access Registers (6117D configuration port)*002Eh - 002Fh Forward to LPC BUS0040h - 0043h Timer Counter 8254 * 0048h - 004Bh PWM counter 8254 * 004Eh - 004Fh Forward to LPC BUS0060h Keyboard / Mouse data port * 0061h Port B + NMI control port * 0062h - 0063h 8051 download 4k address counter * 0064h Keyboard/ Mouse status/ command port * 0065h WatchDog0 reload counter * 0066h 8051 download 8bit data port * 0067h WatchDog1 reload counter * 0068h - 006Dh WatchDog1 control counter * 0070h - 0071h CMOS RAM port * 0072h - 0075h MTBF control register * 0078h - 007Ch GPIO port 0,1,2,3,4 default setup * 0080h - 008Fh DMA page register * 0092h System control register * 0098h - 009Ch GPIO direction control *00A0h - 00A1h PIC 8259-2 * 00C0h - 00DFh DMA 8237-2 * 00E0h - 00EFh DOS 4G Page access * 0170h - 0177h IDE1(IRQ 15)01F0h - 01F7h IDE0 (IRQ 14) * 0220h - 0227h COM8 Forward to LPC BUS0228h - 022Fh COM7 Forward to LPC BUS0238h - 023Fh COM6 Forward to LPC BUS0278h - 027Fh Printer port (IRQ7, DMA 0) * 02E8h - 02EFh COM4 (IRQ 11) * 02F8h - 02EFh COM2 (IRQ3) * 0338h - 033Fh COM5 Forward to LPC BUS0376h IDE1 ATAPI device control write only register * 03E8h - 03EFh COM3 (IRQ 10) * 03F0h - 03F7h Floppy Disk (IRQ6, DMA2)03F6h IDE0 ATAPI device control write only register * 03F8h - 03FFh COM1 (IRQ 4) * 0480h - 048Fh DMA High page register * 0490h - 0499h Instruction counter register * 04D0h - 04D1h 8259 Edge / level control register * 0CF8h - 0CFFh PCI configuration port * DE00h - DEFFh On board LAN * FC00h - FC05h SPI Flash BIOS control register * FC08h - FC0Dh External SPI BUS control register *IRQ# Description Usage IRQ0 System Timer * IRQ1 Keyboard Controller * IRQ2 Cascade for IRQ8 – 15IRQ3 Serial Port 2 * IRQ4 Serial Port 1 * IRQ5 USB * IRQ6 USB * IRQ7 Printer Port * IRQ8 Real Time Clock * IRQ9 USB/ Ethernet 10/100M LAN * IRQ10 Serial Port 3 * IRQ11 Serial Port 4 * IRQ12 Mouse * IRQ13 Math Coprocessor * IRQ14 Hard Disk Controller#1 * IRQ15 Hard Disk Controller#2 *DMA# Description Usage DMA0DMA1DMA2 Floppy Disk ControllerDMA3DMA4DMA5DMA6DMA72.6 Watchdog TimerThere are two watchdog timers in Vortex86SX/DX CPU. One is compatible with M6117D watchdog timer and the other is new. The M6117D compatible watchdog timer is called WDT0 and new one is called WDT1.We also provide DOS, Linux and WinCE example for your reference. For more technical support, please visit: /tech or download the PDF file:/tech/vortex86dx/2.7 GPIO (General Purpose Input / Output)40 GPIO pins are provided by the Vortex86SX/DX for general usage in the system. All GPIO pins are independent and can be configured as inputs or outputs, with or without pull-up/pull-down resistors.We also offer DOS, Linux and WinCE example for your reference. For more technical support, please visit: /tech or download the PDF file:/tech/vortex86dx/2.8 SPI flash (Serial Peripheral Interface)As SPI Flash (Serial Peripheral Interface) offers many benefits including: reduced controller pin count, smaller and simpler PCBs, reduced switching noise, less power consumption, and lower system costMany of users may consider using a formatted SPI flash to boot for the system or emulate SPI flash as Floppy (A: Driver or B: Driver). Then you must know how to set for this condition in CMOS Setup and boot up under DOS 6.22, X-DOS, DR-DOS and Free DOS.For more technical support, please visit: /tech or download the PDF file: /tech/vortex86dx/2.9 PWM (Pulse-width modulation)Pulse-width modulation (PWM) of a signal or power source involves the modulation of its duty cycle, to either convey information over a communications channel or control the amount of power sent to a load.The popular applications of pulse width modulation are in speed control of electric motors, volume control of Class D audio amplifiers or brightness control of light sources and many other power electronics applications.The Vortex86DX SoC integrated 32 channels of PWM interface enabling the Automation, robotic industry to a New Age x86 SoC platform and we also offer the sample code of PWM which will guide the engineer to control the PWM functionality smoothly.For more inquire of this sample code that please contact our sales team or mail to:*************.tw3.0 IDE to SD (Micro-SD)Vortex86DX SoC also built-in simulation circuit to adapt SD to IDE in order to allow your system to recognize Micro-SD card as C: or D: DriverSD-1917: 44 pins IDE to SD Adapter is an ideal solution for industrial PC or embedded system and 44 pins IDE to SD Adapter can be easily installed on all Vortex86DX-63xx CPU boards. You or your customers just do the BIOS setting and use SD-1917 to connect IDE connector of Vortex86DX-63xx directly.For further inquiries of SD-1917, please contact ICOP sales team or mail to: *************.tw for your request.<BIOS setting>Get into the BIOS setup UtilityChoose Primary IDE Pin Select: SD cardPress “F10” to Save configuration changes and exit setupSD-1917SD-1917: /pddetail.aspx?id=125&pid=4C h a p t e r 4Driver InstallationVGAThe Vortex86DX processor also uses external Display Card ““Volari™ Z9s” which is an ultra low powered graphics chipset with total power consumption at around 1-1.5 W. It is capable in providing VGA display output upto 1600x1200. With DVO interface, developers could easily connect flat Panel to support TFT and LVDS output.Please download the Driver: /sd/sd_download.aspLANThe Vortex86DX processor also integrated 10/100Mbps Ethernet controller that supports both 10/100BASE-T and allows direct connection to your 10/100Mbps Ethernet based Local Area Network for full interaction with local servers, wide area networks such as the Internet.The controller supports: Half / Full-Duplex Ethernet function to double channel bandwidth, auto media detection.Operating system supportThe SOM304RD-VI CPU module provides the VGA and LAN drivers for DOS 6.22 Windows CE 5.0, CE 6.0, Windows 98, Windows XP Professional, Windows Embedded standard (XPE) and Windows 2000 (SP4).Please get the drivers from the Driver CD which attached with the standard packing ofSOM304RD-VI CPU module or please get it from DMP official website:/tech/vortex86dx/SOM304RD-VI CPU module also supports most of the popular Linux distributions, for more detail information, please visit DMP official website: /tech/vortex86dx/AppendixA. TCP/IP library for DOS real modeDSock is a TCP/IP library for DOS real mode, which is used by RSIP. It provides simple C functions for programmer to write Internet applications. ICOP also provide Internet examples using DSock: BOOTP/DHCP, FTP server, SMTP client/server, HTTP server, TELNET server, Talk client/server, etc.DSock provides a lot of example source code. Programmer can add Internet functions to their project easily and save development time. With a utility "MakeROM”, programmer also can make a ROM image to fit their application, those examples can be seen in the following Application systems: Mity-Mite Serial Server,Web Camera Tiny Server and RSIP Serial Server.DSock is free for All ICOP products using M6117D/Vortex86/Vortex86SX/Vortex86DX CPU and ICOP also provide the business version of DSock for those customers who are using other x86 CPUs.If you would like to use DSock or business version of DSock, Please mail to *************.tw or contact your regional sales.Please download the trial DSock software and Utilities from our website:/tech/dmp-lib/dsock/B. SOM304RD-VI & SOM304DX-DEV-VI SchematicSchematic information can help baseboard designer to optimize exactly how each of these functions implements physically. Designer can place connectors precisely where needed for the application on a baseboard designed to optimally fit a system’s packaging.Please contact or e-mail our regional sales to get SOM304RD-VI CPU module andSOM304DX-DEV-VI Schematic.C. BIOS Default settingIf the system cannot be booted after BIOS changes are made, Please follow below procedures in order to restore the CMOS as default setting.Press “End” Key, when the power onPress <Del> to enter the AMI BIOS setupPress “F9” to Load Optimized DefaultsPress “F10” to Save configuration changes and exit setupWarrantyThis product is warranted to be in good working order for a period of one year from the date of purchase. Should this product fail to be in good working order at any time during this period, we will, at our option, replace or repair it at no additional charge except as set forth in the following terms. This warranty does not apply to products damaged by misuse, modifications, accident or disaster. Vendor assumes no liability for any damages, lost profits, lost savings or any other incidental or consequential damage resulting from the use, misuse of, originality to use this product. Vendor will not be liable for any claim made by any other related party. Return authorization must be obtained from the vendor before returned merchandise will be accepted. Authorization can be obtained by calling or faxing the vendor and requesting a Return Merchandise Authorization (RMA) number. Returned goods should always be accompanied by a clear problem description.。

鸿湖万联（江苏）科技发展有限公司目录产品概述 (3)适用范围 (4)产品概述 (4)产品特点 (4)外观及接口示意图 (5)基本功能列表 (6)PCB尺寸和接口布局 (7)PCB尺寸图 (7)接口参数说明 (8)电源输入接口（6pin/2.54mm） (8)BAT2RTC电池接口（2pin/1.25mm） (8)USB接口（4pin/2.0mm*4） (9)MIC接口（2pin/2.0mm） (9)遥控接收接口（3pin/2.54mm） (9)工作指示灯 (10)LED/IR接口（7pin/2.54mm） (10)背光控制接口（6pin/2.0mm*2） (11)IO/KEY接口（8pin/2.0mm） (11)LVDS屏接口（15*2pin/2.0mm） (12)232串口插座接口（4pin/2.54mm*2） (14)TTL串口插座接口*2（4pin/2.0mm*2） (15)485串口插座接口（4pin/2.0mm） (15)CAN接口（4pin/2.0mm） (16)TP接口（6pin/2.0mm） (16)MIPI Camera接口（30pin/0.5mm*2） (17)喇叭接口（4pin/2.0mm） (18)其它一些标准接口以及功能 (19)电气性能 (20)注意事项 (21)产品概述适用范围扬帆“竞”开发板属于自助终端主板，普遍适用于：互动广告机、互动数字标牌、智能自助终端、智能零售终端、工控主机、机器人设备等。

产品概述扬帆“竞”开发板采用瑞芯微RK3568（Cortex-A55）四核64位超强CPU，搭载OpenHarmony系统，主频最高达2.0GHz。

采用Mali-G52GPU，支持4K、H.265/H.264视频解码。

多路视频输出和输入，性能更强，速度更快，接口更丰富，是您在人机交互、智能终端、工控项目上的最佳选择。

产品特点高集成度。

集成HDMI/LVDS/以太网/Wi-Fi/BT于一体，简约超薄，卓尔不凡。

X6818开发板硬件手册深圳市九鼎创展科技有限公司版权声明本手册版权归属深圳市九鼎创展科技有限公司所有, 并保留一切权力。

非经九鼎创展同意(书面形式)，任何单位及个人不得擅自摘录本手册部分或全部，违者我们将追究其法律责任。

敬告：在售开发板的手册会经常更新，请在 网站下载最新手册，不再另行通知。

版本说明技术支持如果您对文档有所疑问，您可以在办公时间（星期一至星期五上午9:00~12:00；下午1:30~6:00）通过拨打技术支持电话、E-mail、留言到BBS论坛（）。

网址：联系电话：销售*************（400-003-3436）*************技术支持专线：*************软件专线：*************硬件专线：*************E - mail：********************销售与服务网络公司：深圳市九鼎创展科技有限公司地址：深圳市宝安中心区兴业路宝安互联网产业基地B区3003B室邮编：518101电话：*************（400-003-3436）*************网址：论坛：淘宝：阿里：速卖通：/store/2340163技术交流QQ群QQ群号x210/i210一群23831259x210/i210二群211127570x4412/ibox4412一群16073601x4412/ibox4412二群211128231X4418/ibox4418论坛199358213x6818/ibox6818论坛189920370x3288/x3399论坛159144256热烈欢迎广大同仁扫描右侧九鼎创展官方公众微信号，关注有礼，您将优先得知九鼎创展最新动态！目录版权声明 (1)第1章X6818开发板简介 (4)1.1产品简介 (5)1.2产品功能特性 (5)第2章硬件资源 (7)2.1硬件接口描述 (7)2.2开发板启动指引 (9)2.3扩展接口定义 (9)2.3.1核心板引脚定义1 (9)2.3.2核心板引脚定义2 (10)2.3.3核心板引脚定义3 (11)2.3.4核心板引脚定义4 (11)2.3.5J12(MIPI DSI扩展口) (12)2.3.6J13(SPI/UART/ADC/GPIO扩展口) (12)2.3.7J39(LVDS扩展口) (12)2.3.8U451(camera接口) (13)2.3.9J15(MIPI CSI接口) (13)2.3.10LCD1(LCD&VGA接口) (14)2.3.11J42(电源输出接口) (14)2.4硬件接口 (14)2.4.1DC插座 (14)2.4.2调试串口 (15)2.4.3普通串口 (15)2.4.4HDMI接口 (15)2.4.5camera接口（并口） (15)2.4.6camera接口（MIPI CSI接口） (15)2.4.7以太网接口 (15)2.4.8耳机接口 (16)2.4.9喇叭接口 (16)2.4.10录音接口 (16)2.4.11TF卡槽与SIM卡槽 (16)2.4.12独立按键 (16)2.4.13调试LED灯 (17)2.4.14电源指示灯 (17)2.4.15USB OTG接口 (17)2.4.16USB HOST接口 (17)2.4.17LCD接口（RGB接口） (17)2.4.18后备电池 (17)2.4.19蜂鸣器 (18)2.4.20红外一体化接收头 (18)2.4.21LVDS接口 (18)2.4.22MIPI接口 (18)2.4.23PCI-E接口 (18)2.4.24电池接口 (19)第3章配置清单 (20)3.1标配硬件清单 (20)3.2选配硬件清单 (20)3.3开发板资料清单 (20)第4章其他产品介绍 (21)4.1核心板系列 (21)4.2开发板系列 (21)4.3卡片电脑系列 (21)第1章X6818开发板简介非常感谢您选择九鼎创展x6818开发平台，本文档讲述x6818开发平台的硬件资源，电路原理以及支持的接口等。

•引言•HDIPCB板制造工艺概述•制造过程中的挑战•解决方案与技术进步目录•设备与工艺协同优化•质量控制与检测手段完善•总结与展望01引言目的和背景汇报范围0102030402HDIPCB板制造工艺概述图形转移原材料准备蚀刻丝印与表面处理阻焊层制作传统PCB 制造工艺HDIPCB制造工艺特点采用微细线路和微小孔径设计，实现更高布线密度。

通过优化材料和工艺，提高产品可靠性和稳定性。

采用自动化生产线和先进设备，提高生产效率和降低成本。

采用环保材料和工艺，减少对环境的影响。

高密度高可靠性高效率环保性内层制作层压钻孔030201孔金属化外层制作阻焊层制作工艺流程及关键步骤丝印与表面处理测试与检验03制造过程中的挑战1 2 3基材选择铜箔要求粘结片材料选择及性能要求精细线路制作难度线宽/线距控制导通孔制作导通孔的尺寸和位置精度对信号传输质量和多层板可靠性至关重要，制作过程中需严格控制钻孔参数和镀铜工艺。

高密度互连技术挑战盲孔与埋孔技术多层板压合技术可靠性问题热稳定性耐湿性抗机械应力04解决方案与技术进步新型材料应用及性能提升高性能基材新型导体材料高性能覆铜板精细线路制作技术优化高精度光刻技术01激光直接成像技术02微电子加工技术03高密度互连技术创新盲埋孔技术微通孔技术高频高速传输技术可靠性增强措施表面处理技术01热设计优化02环境适应性提升0305设备与工艺协同优化设备升级改造方向高精度、高效率提升设备加工精度和生产效率，满足HDIPCB板高精度、高效率的制造需求。

智能化、自动化引入先进的控制系统和自动化技术，提高设备智能化水平，降低人工干预程度。

环保、节能采用环保材料和节能技术，降低设备能耗和废弃物排放，提高生产过程的环保性。

工艺流程优化策略精简工艺流程优化工艺参数引入新工艺技术设备与工艺协同作用设备升级推动工艺进步工艺优化提升设备效能设备与工艺相互促进06质量控制与检测手段完善质量控制关键环节识别原材料质量控制加工过程控制成品检验自动化检测设备应用引入先进的自动化检测设备，如AOI（自动光学检测）、AXI（自动X射线检测）等，提高检测效率和准确性。

奥伟斯科技为您提供WINCOM电容式触摸控制IC万代触摸感应芯片应用设计解决方案!!!公司以专业的集成电路设计技术和高效的市场拓展能力为核心，专注于电容式触摸感应IC的设计和销售, 为电器产品提供美观、坚固、无磨损、无限寿命、绝对安全、低成本的人机界面解决方案。

公司自主研发的WTC系列触摸感应IC内部集成了高精度电容测量电路和高效的处理器,可以透过0-20mm的绝缘面板准确地侦测到手指对按键的有效触摸并输出数据，非常容易与单片机接口实现各种电器产品的触摸感应控制，产品具有优良的防水和抗干扰性能，在温度和潮湿度大范围波动的环境下长期稳定工作。

基于高性能、高品质、多品种的产品和专业的服务， WTC系列触摸感应IC已经覆盖家用电器、计算机、手持设备、工业控制、安防设备、军用产品等几乎所有应用领域。

为响应广大用户对提高触摸控制集成度和降低成本的要求，我公司成功研发出WM系列触控MCU，WM系列触控MCU内建了万代历时十年上亿出货量证明其高度稳定和高度可靠的触摸感应核心，为用户提供品质一流，使用灵活的可编程触摸感应单片机，该系列产品已于2014年7月正式推出，并与2014年10月量产出货。

WTC02SPWTC02DWTC6104BSIWTC6104BSI-LWTC6106BSIWTC6106BSI-LWTC6106BSI-MWTC6208BSIWTC6208BSI-MWTC6208D1MWTC6506D32WTC6508BSIWTC6508BSI-MWTC1006BSIWTC1006BSI-MWTC1008BSIWTC1008BSI-MWTC6212MLWTC6212ML-5WTC6212ML-10WTC6212BSIWTC6212BSI-LWTC6216BSIWTC6216BSI-LWTC6216ASI WTC6312ML WTC6312ML-2 WTC6312ML-2F WTC6312ML-10 WTC6312ML-10F WTC6312BSI WTC6312BSW WTC6316BSI WTC6316BSI-L WTC6320DSI WTC6320DSI-L WTC62K1R WTC64K1R WTC66K1R WTC68K1R WTC6401RSI WTC6601RSI WTC801SPI WTC801SPI-L WTC7508DSI WTC401SPI WTC40-1SPI-L WTC708AWM708A16N WM708A24A WM708A24W WM708A28A WTC708BWM708B16N WM708B24A WM708B24W WM708B28A WTC708CWM708C24A WM708C24W WM708C28A WTC7514DSI WTC7514DSW WM708DWM708D16N WM708D24A WM708D24W WM708D28AWTC1006BSI 系列触摸感应 IC 是为实现人体触摸界面而设计的集成电路。

Printed Circuit Board Workmanship CriteriaWorkmanship Standard – Level IDocument Number: WS-019Revision: 02Effective Date: 10/24/2022Point of Contact: Brad TooneTitle: Technical ExpertTABLE OF CONTENTS PURPOSE & SCOPE (1)WORKMANSHIP STANDARD ............................................................................................................................................................. 1 1.MICROSECTION AND SOLDER SAMPLE REQUIREMENTS .......................................................................................................... 1 2. NON-CONDUCTIVE VIA FILL & PLATED COPPER CAP (PLUG & CAP) REQUIREMENTS .. (2)RECORDS (5)DOCUMENT INFORMATION (5)PURPOSE & SCOPEThis Workmanship Standard details the workmanship acceptance criteria to be applied to all deliverable printed circuit board products. This standard outlines the microsection, solder sample, and plug and cap requirements and acceptance criteria as applied to L3 Communication Systems-West (CSW), Salt Lake City facility products.It is the responsibility of all personnel involved with build, inspection, and purchasing to ensure that all printed circuit board product meets the minimum acceptance criteria during all phases of product realization.WORKMANSHIP STANDARD1. MICROSECTION AND SOLDER SAMPLE REQUIREMENTS1.1. General Requirements1.1.1. Representative microsections and a solder sample shall be delivered with each new manufacturingdate code/lot number by part number.1.1.2. Microsection requirements are as follows:• For criteria and feature requirements in microsections with standard plated through holes seesection 1.2.• For criteria and feature requirements in all HDI features and plated through holes with plug andcap technology see section 1.3.• Multiple microsections may be needed to provide representative samples of all requiredfeatures.• Multiple samples and/or features may also be included within a single microsection.1.1.3. Solder sample requirements are as follows:• Solder sample may be a nonfunctional PCB from the same part number and manufacturing datecode/lot number.• Solder sample shall be representative of product quality and compliance to manufacturingspecifications.1.2.Standard Plated Through-Holes1.2.1. Microsection requirements for Printed Circuit Boards with plated through holes are as follows:• Microsection(s) shall be per IPC-TM-650 method 2.1.1 or 2.1.1.2.• Test specimens may be removed from a printed circuit board or test coupon.• All specimens shall be thermally stressed per IPC-TM-650, method 2.6.8, test condition B for 5 stress cycles.• If A/B coupons are used, they must be designed per IPC-2221.• A minimum of 2 holes of the plated through hole with the greatest aspect ratio (typically the smallest via) and 2 holes of the largest component hole (up to .070 inches) must be included in the microsection(s) provided.1.3. HDI Features & PTHs With Plug & Cap Technology1.3.1. HDI features are defined as any blind or buried via that has been drilled either mechanically or bylaser.1.3.2. Microsection requirements for Printed Circuit Boards with HDI features and/or plated through holeswith plug and cap technology are as follows:• Microsection(s) shall be per IPC-TM-650 method 2.1.1.• Test specimens may be removed from a printed circuit board or test coupon.• All specimens shall be thermally stressed per IPC-TM-650, method 2.6.8, test condition B for 5 stress cycles.• Microsections of HDI features shall include a minimum of 3 specimens representing eachfeature/hole size.• Microsections of plated through holes with plug and cap technology shall include a minimum of 3 specimens representing the hole with the greatest aspect ratio (typically the smallest via).2. NON-CONDUCTIVE VIA FILL & PLATED COPPER CAP (PLUG & CAP) REQUIREMENTS2.1. Visual Inspection Plug & Cap Acceptance CriteriaTarget Condition• Feature is free of indentations, pin holes and surfacenodules• Cap is centered to through hole with no breakout.Acceptable• Cap indentation is completely plated with no exposedplug material and/or lamination materials.• No separation or lifting of cap from base copper.• No cap breakout from land.• Surface imperfections shall be in accordance withapplicable performance specification as detailed in IPC6010 series.• Indentation within cap is less than .005” in diameter andmeets the previous requirements.• Indentation is not in a BGA or fine pitch (less than .025”from reference pad center to adjacent pad center) surfacemount pad.Nonconforming• Cap has a void in center of solderable land and continuousplating cannot be seen at the base of the opening.Nonconforming• Cap is miss-registered with the through hole resulting inbreakout.2.2. Microsection Inspection Plug & Cap Acceptance Criteria2.2.1.General Cross Section InspectionTarget Condition• Plug is free of voids and is continuous throughout thelength of the plated through hole.• Cap is centered to the hole with no evidence of peeling atthe interface between the cap and base copper.• Minimum copper plating thickness requirements are met.• There are no dents or voids in the cap plating.• Plug may have up to 10% voiding so long as plug materialhas been fully cured and does not adversely affectformation of cap.• Minimum of .002” overlap between cap and capture landpreferred, misregistration is acceptable so long asminimum plating requirements are met throughout thehole-wall and extending on to the plating surface.• Cap indentation is completely plated with no exposedplug material and/or lamination materials.• All other imperfections shall be in accordance withapplicable performance specifications as detailed in IPC6010 series.Nonconforming• Void in cap material that has exposed plug material.• Plug has greater than 10% voiding.• Hole wall copper has been reduced just below the kneeof the hole in the voided area.2.2.2.Copper Interface Cross Section InspectionTarget Condition•No separation between copper cap and base copper before or after thermal stress. •No separation between copper cap and via fill material before or after thermal stress. •No separation between vial fill material and hole wall copper.Acceptable• Cap indentation is completely plated with no exposedplug material and/or lamination materials.• No separation between copper cap and base copperbefore or after thermal stress.• No separation between copper cap and via fill materialbefore or after thermal stress.Nonconforming• Copper separation has been identified between thecopper cap and base copper following thermal stress.• Separation can be seen between the via fill material andcopper cap following thermal stress.Nonconforming• Copper separation from via fill material following thermalstress is unacceptable even though there is no evidenceof separation between copper cap and copper base.RECORDSThere are no records associated with this document.END OF DOCUMENTDOCUMENT INFORMATIONResponsible Organization:Operations Function/Sub-function:Workmanship Standards Governing Document(s):Y-001, Quality Management System Subordinate Document(s):N/A Related Document(s): IS-005, Printed Wiring Board Workmanship & Design CriteriaP-047, InspectionWS-000, Workmanship Standards IntroductionIPC-A-600, Acceptance of Printed BoardsRelated Training: N/AApproval Requirements: Manager, Engineering ManagementSr. Manager, Supply Chain ManagementScientist, Mechanical EngineeringReview Requirements:Associate Manager, Quality ManagementSupervisor, Quality ManagementManager, Manufacturing EngineeringManager, engineering ManagementRevision History Summary。

AO6601Complementary Enhancement Mode Field Effect TransistorD1 D2G1S1 S2AO6601n-channel MOSFET Electrical Characteristics (T J=25°C unless otherwise noted)A: The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t≤ 10s thermal resistance rating.B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using 80∝s pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA curve provides a single pulse rating.Rev 3 : June 2005THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.AO6601 n-channel typical characteristicsTYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS15 10V101294.5V3V8V DS =5V6 25°C125°C6 3 0 2.5VV GS =2V12345V DS (Volts)Fig 1: On-Region Characteristics4 21.8 1.6 00.511.522.533.5V GS (Volts)Figure 2: Transfer CharacteristicsV GS =4.5V1.4V GS =10V750 0246810I D (A)Figure 3: On-Resistance vs. Drain Current and GateVoltage1.210.8V GS =2.5V0 255075100125150175Temperature (°C)Figure 4: On-Resistance vs. Junction Temperature200 150 1.0E+01 1.0E+00I D =2A1.0E-01125°C100125°C1.0E-02 1.0E-035025°C25°C1.0E-040 0246810V GS (Volts)Figure 5: On-Resistance vs. Gate-Source Voltage1.0E-050.00.2 0.4 0.6 0.8 1.0 1.2V SD (Volts)Figure 6: Body-Diode CharacteristicsV GS =2.5VV GS =4.5VV GS =10VAlpha and Omega Semiconductor, Ltd.I D (A ) I D (A )R D S (O N )(m Ω)I S (A ) N o r m a l i z e d O n -R e s i s t a n c e R D S (O N )(m Ω)AO6601 n-channel typical characteristicsTYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS5V DS =15V 6004 I D =3.4A5003 2 1 0 0123456Q g (nC)Figure 7: Gate-Charge Characteristics400 300 200 100 0 C issC ossC rss51015202530V DS (Volts)Figure 8: Capacitance Characteristics 100.010.0 1.0R DS(ON)limited1s 10sT J(Max)=150°C T A =25°C10∝s100∝s 1ms0.1s 10ms2015 105T J(Max)=150°C T A =25°C0.1 DC0.1110 100V DS (Volts)Figure 9: Maximum Forward Biased SafeOperating Area (Note E)0.0010.01 0.1 1 10 100 1000Pulse Width (s)Figure 10: Single Pulse Power Rating Junction-to-Ambient (Note E)1010.1D=T on /TT J,PK =T A +P DM .Z θJA .R θJA R θJA =110°C/W In descending orderD=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulseP DT onSingle Pulse0.010.000010.00010.0010.010.1110 100 1000Pulse Width (s)Figure 11: Normalized Maximum Transient Thermal ImpedanceTV G S (V o l t s )C a p a c i t a n c e (p F )P o w e r (W )Z θJ A N o r m a l i z e d T r a n s i e n t T h e r m a l R e s i s t a n c eI D (A m p s )AO6601p-channel MOSFET Electrical Characteristics (T J=25°C unless otherwise noted)A: The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t≤ 10s thermal resistance rating. B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.D. The static characteristics in Figures 1 to 6,12,14 are obtained using 80∝s pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA curve provides a single pulse rating.Rev 3 : June 2005THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.AO6601, AO6601LP-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS2015-10V-5V-4.5V -4V108 V DS =-5V25°C1050 V GS =-3.5V-3V-2.5V-2V12345-V DS (Volts)Fig 1: On-Region CharacteristicsV GS =-2.5V6420 1.61.4 1.2 125°C0.511.522.533.54-V GS (Volts)Figure 2: Transfer CharacteristicsV GS =-4.5V, V GS =-10VV GS =-2.5VI D =-2A1501234 5 6-I D (A)Figure 3: On-Resistance vs. Drain Current and GateVoltage0.8 025 50 75 100 125 150 175Temperature (°C)Figure 4: On-Resistance vs. Junction Temperature350 1.0E+01 1.0E+001.0E-01 125°C1.0E-02 1.0E-0325°C246810-V GS (Volts)Figure 5: On-Resistance vs. Gate-Source Voltage1.0E-04 1.0E-05 1.0E-060.00.2 0.4 0.6 0.8 1.0 1.2-V SD (Volts)Figure 6: Body-Diode CharacteristicsV GS =-4.5VV =-10VI D =-2A125°C25°C-I D (A )-I D (A )R D S (O N )(m Ω)-I S (A )N o r m a l i z e d O n -R e s i s t a n c eR D S (O N )(m Ω)AO6601 p-channel typical characteristicsTYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS5V DS =-15V 6004 3 2 1 0 I D =-2.0A123456-Q g (nC)Figure 7: Gate-Charge Characteristics500 400 300 200 100 0 C issC ossC rss51015202530-V DS (Volts)Figure 8: Capacitance Characteristics 100.010.01.0T J(Max)=150°C T A =25°CR DS(ON) limited0.1s1s10s10∝s 100∝s 1ms10ms2015105T J(Max)=150°C T A =25°C0.1 DC0.1110100-V DS (Volts)Figure 9: Maximum Forward Biased SafeOperating Area (Note E)0.0010.01 0.1 1 10 100 1000Pulse Width (s)Figure 10: Single Pulse Power Rating Junction-to-Ambient (Note E)1010.1D=T on /TT J,PK =T A +P DM .Z θJA .R θJA R θJA =110°C/W In descending orderD=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulseP DT onSingle Pulse0.010.000010.00010.0010.010.1110 100 1000Pulse Width (s)Figure 11: Normalized Maximum Transient Thermal ImpedanceT-V G S (V o l t s )C a p a c i t a n c e (p F )P o w e r (W )Z θJ A N o r m a l i z e d T r a n s i e n t T h e r m a l R e s i s t a n c e-I D (A m p s )。

© 2018 NXP B.V.MIMXRT1020 EVK Board Hardware User’sGuide1.IntroductionThis Hardware User’s Guide for the MIMXRT 1020Evaluation Kit (EVK) is based on the NXP Semiconductor i.MX RT1020 Processor. This board is fully supported by NXP Semiconductor. The guide includes system setup and debugging, and provides detailed information on overall design and usage of the EVK board from a hardware systems perspective.1.1. Board overviewThis EVK board is a platform designed to showcase the most commonly used features of the i.MX RT1020 Processor in a small, low cost package. The MIMXRT1020 EVK board is an entry level development board, which gives the developer the option of becoming familiar with the processor before investing a large amount or resources in more specific designs.NXP Semiconductors Document Number: MIMXRT1020EVKHUGUser's GuideRev. 0 , 05/2018Contents1.Introduction ........................................................................ 11.1.Board overview ....................................................... 11.2.MIMXRT1020 EVK contents ................................. 21.3.MIMXRT1020 EVK Board revision history ........... 32.Specifications ..................................................................... 32.1.i.MX RT1020 processor .......................................... 52.2.Boot Mode configurations ....................................... 52.3.Power tree ............................................................... 62.4.SDRAM memory .................................................... 92.5.SD Card slot ............................................................ 92.6.QSPI flash ............................................................... 92.7.Ethernet connector .................................................. B PHY connector ............................................. 102.9.Audio input / output connector .............................. 102.10.OpenSDA circuit (DAP-Link) ............................... 102.11.JTAG connector .................................................... 102.12.Arduino expansion port ......................................... er interface LED indicator ................................ 133.PCB information .............................................................. 134.EVK design files .............................................................. 135.Contents of the Evaluation Kit ......................................... 146.Revision history (14)IntroductionFeatures of the MIMXRT1020 EVK board are shown in Table 11.2. MIMXRT1020 EVK contentsThe MIMXRT1020 EVK contains the following items: •MIMXRT1020 EVK Board•USB Cable (Micro B)Specifications 1.3. MIMXRT1020 EVK Board revision history•Rev A: Prototype.2. SpecificationsThis chapter provides detailed information about the electrical design and practical considerations of the EVK Board, and is organized to discuss each block in the following block diagram of the EVK board.( Figure 1)Figure 1. Block diagramThe overview of the MIMXRT1020 EVK Board is shown in Figure 1 & Figure 2.SpecificationsFigure 2. Overview of the MIMXRT1020 EVK Board (Front side)Figure 3. Overview of the MIMXRT1020 EVK Board (Back side)Specifications 2.1. i.MX RT1020 processorThe i.MX RT1020 is a new processor family featuring NXP's advanced implementation of the Arm® Cortex®-M7 Core. It provides high CPU performance and best real-time response. The i.MX RT1020 provides various memory interfaces, including SDRAM, Raw NAND FLASH, NOR FLASH,SD/eMMC, Quad SPI, HyperBus and a wide range of other interfaces for connecting peripherals, such as WLAN, Bluetooth™, GPS. Same as other i.MX processors, i.MX RT1020 also has rich audio features, including SPDIF and I2S audio interface.The i.MX RT1020 applications processor can be used in areas such as industrial HMI, IoT, motor control and home appliances. The architecture's flexibility enables it to be used in a wide variety of other general embedded applications too. The i.MX processor provides all interfaces necessary to connectp eripherals such as WLAN, Bluetooth™, GPS.The more detail information about i.MX RT1020 can be found in the Datasheet and Reference Manual2.2. Boot Mode configurationsThe device has four boot modes (one is reserved for NXP’s use). The boot mode is selected based on the binary value stored in the internal BOOT_MODE register. Switch (SW8-3 & SW8-4) is used to select the boot mode on the MIMXRT1020 EVK Board.Typically, the internal boot is selected for normal boot, which is configured by external BOOT_CFG GPIOs. The following Table 3 shows the typical Boot Mode and Boot Device settings.NOTEFor more information about boot mode configuration, see the System Boot chapter of theMIMXRT1020 Reference Manual. (waiting for update)For more information about MIMXRT1020 EVK boot device selection and configuration, see the main board schematic. (waiting for update)Specifications2.3. Power treeA DC 5 V external power supply is used to supply the MIMXRT1020 EVK Board at J2, and a slide switch SW1 is used to turn the Power ON/OFF. J23 and J9 also can be used to supply the EVK Board. Different power supply need to configure different Jumper setting of J1. Table 4 shows the details:NOTEFor some computers’ USB, it cannot support 500ma before establishingcommunication. In this case, it is recommended to replace the computer oruse the power adapter(J2) to power the EVK Board.The power tree is shown in Figure 4SpecificationsFigure 4. Power TreeThe power control logic of the MIMXRT1020 EVK board is shown in the Figure 5: •It will power up SNVS, and then PMIC_REQ_ON will be switched on to enable external DC/DC to power up other power domains.•ON/OFF button is used to switch ON/OFF PMIC_REQ_ON to control power modes.•RESET button and WDOG output are used to reset the system power.SpecificationsFigure 5. Power Control Diagram The power rails on the board are shown in Table 5.Specifications2.4. SDRAM memoryOne 256 Mb, 166MHz SDRAM (MT48LC16M16A2P) is used on the EVK Board.2.5. SD Card slotThere is a SD card slot(J15) on the MIMXRT1020 EVK Board. J15 is the Micro SD slot for USDHC1 interface. If the developer wants to boot from the SD Card, the boot device switch (SW8) settings should be: OFF, ON, ON, OFF, as shown in Table 3.2.6. QSPI flashA 64 Mbit QSPI Flash is used on the MIMXRT1020 EVK Board. If the developer wants to boot from the QSPI Flash, the boot device switch(SW8) settings should be: OFF, OFF, ON, OFF, as shown in Table 3.2.7. Ethernet connectorThere is one Ethernet Mac controller in the MIMXRT1020 processor. The Ethernet subsystem of the MIMXRT1020 EVK Board is provided by the KSZ8081RNB 10/100M Ethernet Transceiver (U11) and a RJ45 (J14) with integrated Magnetic.Figure 6. Ethernet Connector RJ45Specifications2.8. USB PHY connectorThe MIMXRT1020 contains a integrated USB 2.0 PHYs capable of connecting to USB host/device systems at the USB low-speed (LS) rate of 1.5 Mbits/s, full-speed (FS) rate of 12 Mbits/s or at the USB 2.0 high-speed (HS) rate of 480 Mbits/s.2.9. Audio input / output connectorThe Audio CODEC used on the MIMXRT1020 EVK Board is Wolfson’s Low Power, high quality Stereo Codec, WM8960.The MIMXRT1020 EVK Board include one headphone interface (J11), one onboard MIC (P1), two speaker interfaces (J12, J13). J11 is a 3.5 mm audio stereo headphone jack, which supports jack detect.2.10. OpenSDA circuit (DAP-Link)The OpenSDA circuit (CMSIS–DAP) is an open-standard serial and debug adapter. It bridges serial and debug communications between a USB host and an embedded target processor.CMSIS-DAP features a mass storage device (MSD) bootloader, which provides a quick and easy mechanism for loading different CMSIS-DAP Applications such as flash programmers, run-control debug interfaces, serial-to-USB converters, and more. Two or more CMSIS-DAP applications can run simultaneously. For example, run-control debug application and serial-to-USB converter runs in parallel to provide a virtual COM communication interface while allowing code debugging via CMSIS-DAP with just single USB connection.For the MIMXRT1020 EVK Board, J23 is the connector between the USB host and the target processor. Jumper to serial downloader mode to use stable DAP-Link debugger function. If developer wants to make OpenSDA going to the bootloader mode, and press SW5 when power on. Meanwhile, the OpenSDA supports drag/drop feature for U-Disk. First, use the seral downloader mode and drag/drop the image file to U-Disk. Then select QSPI Flash as boot device and reset the Board, the image will run.2.11. JTAG connectorJ16 is a standard 20-pin/2.54 mm Box Header Connector for JTAG. The pin definitions are shown in Figure 7. Support SWD by default.SpecificationsFigure 7. JTAG pin definitions2.12. Arduino expansion portJ17 – J20 (unpopulated) is defined as Arduino Interface. The pin definitions of Arduino Interface are shown in Table 6.Specifications2.12.1. Power switchSW1 is a slide switch to control the power of the MIMXRT1020 EVK Board when the power supply is from J2. The function of this switch is listed below:•Sliding the switch to the ON position connects the 5 V power supply to the Evaluation board main power system.•Sliding the switch to OFF position immediately removes all power from the board.2.12.2. ON/OFF buttonSW2 is the ON/OFF button for MIMXRT1020 EVK Board. A short pressing in OFF mode causes the internal power management state machine to change state to ON. In ON mode, a short pressing generates an interrupt (intended to be a software-controllable(power-down). An approximate 5 seconds or more pressing causes a forced OFF. Both boot mode inputs can be disconnected.2.12.3. Reset buttonThere are two Reset Button on the EVK Board. SW5 is the Power Reset Button. Pressing the SW5 in the Power On state will force to reset the system power except SNVS domain. The Processor will be immediately turn off and reinitiate a boot cycle from the Processor Power Off state. SW3 is POR Reset Button.EVK design files 2.12.4. USER buttonSW4 is the USER Button(GPIO5-00) for developers using. Pressing can produce changes in high and low levels.2.13. User interface LED indicatorThere are four LED status indicators located on the EVK Board. The functions of these LEDs include: •Main Power Supply(D3)Green: DC 5V main supply is normal.Red: J2 input voltage is over 5.6V.Off: the board is not powered.•Reset RED LED(D15)•OpenSDA LED(D16)•USER LED(D5)3. PCB informationThe MIMXRT1020 EVK Board is made using standard 2-layer technology. The material used was FR-4. The PCB stack-up information is shown in Table 7.4. EVK design filesThe schematics, layout files, and gerber files (including Silkscreen) can be downloaded from/MIMXRT1020-EVK(waiting for update).Revision history5. Contents of the Evaluation KitNOTEPower adaptor, Micro SD Card are not standard parts of the Evaluation Kit.6. Revision historyTable 9 summarizes the changes made to this document since the initial release.Document Number: MIMXRT1020EVKHUGRev. 0 05/2018How to Reach Us: Home Page: Web Support: /supportInformation in this document is provided solely to enable system and softwareimplementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein.NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequenti al or incidental damages. “Typical” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals”, must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the following address: /SalesTermsandConditions . While NXP has implemented advanced security features, all products may be subject to unidentified vulnerabilities. Customers are responsible for the design and operation of their applications and products to reduce the effect of these vulnerabilities oncustomer’s applications and products, and NXP accepts no liability for any vulne rability that is discovered. Customers should implement appropriate design and operating safeguards to minimize the risks associated with their applications and products NXP, the NXP logo, NXP SECURE CONNECTIONS FOR A SMARTER WORLD, , Freescale, the Freescale logo, and Kinetis, are trademarks of NXP B.V. All other product or service names are the property of their respective owners. Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved. © 2018 NXP B.V.。

W800芯片设计指导书V1.8北京联盛德微电子有限责任公司(Winner Micro)地址：北京市海淀区阜成路67号银都大厦18层电话：+86-10-62161900网址：文档修改记录版本修订时间修订记录作者审核V0.12020/04/30初稿V0.22020/06/10更新外围参数HuzjV1.02020/07/20增加ADC电路说明HuzjHuzjV1.12020/08/04删除冗余内容，增加GPIO上下拉电阻典型值V1.22020/11/27增加芯片电源脚说明HuzjV1.32020/12/23增加芯片防静电，layout说明HuzjHuzjV1.42021/4/14增加touch sensor功能说明修改防天线口静电电路V1.520210602修改天线部分说明HuzjV1.620211009修改天线部分说明LindaV1.720220317修改天线部分说明及ADC范围HuzjV1.820220706修改原理图部分Huzj目录文档修改记录 (5)1概述 (7)2管脚定义 (7)3芯片外围电路设计 (10)3.1RESET复位电路设计 (10)3.2参考时钟电路设计 (11)3.3ADC电路设计 (11)3.4射频电路设计 (12)3.5GPIO设计 (12)3.6下载口 (13)3.7电源设计 (13)3.8防静电设计 (14)4Layout设计 (15)5天线设计 (17)5.1外置天线 (17)5.2板载天线 (17)1概述W800 芯片是一款安全 IoT Wi-Fi/蓝牙双模SoC芯片。

支持2.4G IEEE802.11b/g/n Wi-Fi通讯协议；支持BT/BLE双模工作模式，支持BT/BLE4.2协议。

芯片集成32位 CPU 处理器，内置QFlash、SPI、UART、GPIO、I2C、I2S、7816等丰富的数字接口；支持多种硬件加解密算法，内置DSP、浮点运算单元与安全引擎，支持代码安全权限设置，内置2MBFlash存储器，支持固件加密存储、固件签名、安全调试、安全升级等多项安全措施，保证产品安全特性。

一文看懂超薄电源的pcb设计和制造窍门|干货分享
几年前市场上就开始有了宣称超薄电几年前市场上就开始有了宣称超薄电源产品，随着电子技术的飞速发展，人们源产品，随着电子技术的飞速发展，人们日常生活中所使用的电子产品越来越趋向日常生活中所使用的电子产品越来越趋向于轻薄、便携，最具代表性的要数笔记本于轻薄、便携，最具代表性的要数笔记本电脑了，其性能在不断增强的同时体积也电脑了，其性能在不断增强的同时体积也在不断缩小、日趋轻薄，其配套的电源适在不断缩小、日趋轻薄，其配套的电源适配器却依然笨重，当然轻薄的电源适配器配器却依然笨重，当然轻薄的电源适配器也有，但可算得上是屈指可数了，为什么也有，但可算得上是屈指可数了，为什么呢？
超薄电源的基本构成特点
■细长的电解电容
■超薄的磁芯
■高效率
高效率的一般方案
■BUCK PFC
■交错交错PFC
■LLC 谐振
■SR同步整流
其实，电源实现超薄最大困难不是在元件的选用上，也不是在方案的选型上，而是在工艺的设计上。

为什么这么说呢？
一个超薄的电源生产出来，其制造成本将会占整个电源的50%以上，甚至更以上，甚至更高…
下面将我个人在超薄电源工艺设计上的一些领悟分享给大家。

产品是几年前设计的一个全电压输入，输出65W的笔记本适配器。