AO4886
- 格式：pdf
- 大小：965.81 KB
- 文档页数：6
AO4886100V Dual N-Channel MOSFETGeneral DescriptionThe AO4886 combines advanced trench MOSFET technology with a low resistance package to provide extremely low RDS(ON).This device is ideal for boost converters and synchronous rectifiers for consumer, telecom, industrial power supplies and LED backlighting.Product SummaryVDS ID (at VGS=10V) RDS(ON) (at VGS=10V) RDS(ON) (at VGS = 4.5V) 100V 3.3A < 80mΩ < 91mΩ100% UIS Tested 100% Rg TestedSOIC-8 Top View Bottom View Top View S2 G2 S1 G1 1 2 3 4 8 7 6 5 D2 D2 D1 D1D1D2G1 S1G2 S2Pin1Absolute Maximum Ratings TA=25° unless otherwise noted C Symbol Parameter Drain-Source Voltage VDS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current C Avalanche energy L=0.1mH C TA=25° C Power Dissipation B TA=70° C Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-LeadCMaximum 100 ±20 3.3 2.7 17 14 10 2.00 1.28 -55 to 150Units V V A A mJ W ° CVGS TA=25° C TA=70° C ID IDM IAS, IAR EAS, EAR PD TJ, TSTGSymbolt ≤ 10s Steady-State Steady-StateRθJA RθJLTyp 48 74 32Max 62.5 90 40Units ° C/W ° C/W ° C/WRev 0: Sep 2010Page 1 of 6Electrical Characteristics (TJ=25° unless otherwise noted) C Symbol Parameter Conditions ID=250µA, VGS=0V VDS=100V, VGS=0V C TJ=55° VDS=0V, VGS= ±20V VDS=VGS ID=250µA VGS=10V, VDS=5V VGS=10V, ID=3A RDS(ON) gFS VSD IS Static Drain-Source On-Resistance VGS=4.5V, ID=3A Forward Transconductance Diode Forward Voltage VDS=5V, ID=3A IS=1A,VGS=0V C TJ=125° 1.6 17 63.5 122 70 20 0.74 1 2.5 620 VGS=0V, VDS=50V, f=1MHz VGS=0V, VDS=0V, f=1MHz 38 13 0.7 13 VGS=10V, VDS=50V, ID=3A 6.4 2.2 2.4 VGS=10V, VDS=50V, RL=16.7Ω, RGEN=3Ω IF=3A, dI/dt=500A/µs 14 65 778 55 24 1.45 16.3 8.1 2.8 4.1 6 2.5 21 2.4 21 94 28 123 942 81 35 2.2 20 10 3.4 5.8 80 152 91 2.2 Min 100 1 5 ±100 2.7 Typ Max Units V µA nA V A mΩ mΩ S V A pF pF pF Ω nC nC nC nC ns ns ns ns ns nCSTATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS IGSS VGS(th) ID(ON) Zero Gate Voltage Drain Current Gate-Body leakage current Gate Threshold Voltage On state drain currentMaximum Body-Diode Continuous CurrentDYNAMIC PARAMETERS Input Capacitance Ciss Coss Crss Rg Output Capacitance Reverse Transfer Capacitance Gate resistanceSWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Qgd tD(on) tr tD(off) tf trr Qrr Gate Source Charge Gate Drain Charge Turn-On DelayTime Turn-On Rise Time Turn-Off DelayTime Turn-Off Fall Time Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF=3A, dI/dt=500A/µsA. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Rev 0: Sep 2010Page 2 of 6TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS20 10V 15 4.5V 15 3.5V 10 ID(A) 10 20 VDS=5VID (A)5 VGS=3V 0 0 1 2 3 4 5 VDS (Volts) Fig 1: On-Region Characteristics (Note E) 100 Normalized On-Resistance 90 RDS(ON) (mΩ) Ω VGS=4.5V 80 70 VGS=10V 60 50 0 10 15 20 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 55125°C 25°C0 0 1 2 3 4 5 6 VGS(Volts) Figure 2: Transfer Characteristics (Note E) 2.8 2.4 2 1.6 1.2 0.8 0 25 50 75 100 125 150 175 200VGS=10V ID=3A17 5 VGS=4.5V ID=3A 2 100 Temperature (° C) Figure 4: On-Resistance vs. Junction Temperature 18 (Note E)150 ID=3A 130 RDS(ON) (mΩ) Ω 125°C IS (A)1.0E+02 1.0E+01 1.0E+0040125°C1101.0E-01 1.0E-02 1.0E-03 1.0E-04 1.0E-05 25°C90 25°C 7050 2 6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) 40.00.20.40.60.81.0VSD (Volts) Figure 6: Body-Diode Characteristics (Note E)Rev 0: Sep 2010Page 3 of 6TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS10 1200 1000 Capacitance (pF) VDS=50V ID=3A Ciss 800 600 400 200 0 0 10 15 Qg (nC) Figure 7: Gate-Charge Characteristics 5 20 0 20 40 60 80 VDS (Volts) Figure 8: Capacitance Characteristics 1008VGS (Volts)642CrssCoss0100.0 IAR (A) Peak Avalanche Current TA=100°C100.0RDS(ON) limited10.0ID (Amps)TA=25°C 10.0 TA=125°C TA=150°C10µs1.0100µs 1ms0.1TJ(Max)=150°C TA=25°C DC10ms 10s1.0 1 10 100 1000 Time in avalanche, tA (µs) µ Figure 9: Single Pulse Avalanche capability (Note C)0.0 0.1 10 100 VDS (Volts) Figure 10: Maximum Forward Biased Safe Operating Area (Note F) 110000TA=25°C1000Power (W)100101 1E-05 0.001 0.1 10 1000Pulse Width (s) Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)Rev 0: Sep 2010Page 4 of 6AO4886TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS10 Zθ JA Normalized Transient Thermal Resistance D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 RθJA=90°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse0.1 PD 0.01 Single Pulse Ton 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance (Note F) TRev 0: Sep 2010Page 5 of 6Gate Charge Test Circuit & WaveformVgs Qg+VDC10VVDCDUT Vgs Ig+ Vds -QgsQgdChargeResistive Switching Test Circuit & WaveformsRL Vds VdsVgs RgDUTVDC+ Vdd Vgst d(on) t on tr t d(off) toff tf90%10%VgsUnclamped Inductive Switching (UIS) Test Circuit & WaveformsL Vds Id Vgs Rg DUT Vgs Vgs Vgs Vds E AR = 1/2 LIAR2BVDSSVDC+ Vdd IdI ARDiode Recovery Test Circuit & WaveformsVds + DUT Vgst rrQ rr = - IdtVds Isd Vgs IgLIsdIFdI/dt I RM VddVDC+ Vdd VdsRev 0: Sep 2010Page 6 of 6。
