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SM320C6201BS14中文资料

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Copyright 2001, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, allse noted. On all other products, production processing does not necessarily include testing of all parameters.
D 1M-Bit On-Chip SRAM
– 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) – 512K-Bit Dual-Access Internal Data (64K Bytes) 32-Bit External Memory Interface (EMIF) – Glueless Interface to Synchronous Memories: SDRAM and SBSRAM – Glueless Interface to Asynchronous Memories: SRAM and EPROM Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel 16-Bit Host-Port Interface (HPI) – Access to Entire Memory Map Two Multichannel Buffered Serial Ports (McBSPs) – Direct Interface to T1/E1, MVIP, SCSA Framers – ST-Bus-Switching Compatible – Up to 256 Channels Each – AC97-Compatible – Serial-Peripheral-Interface (SPI) Compatible (Motorola) Two 32-Bit General-Purpose Timers Flexible Phase-Locked-Loop (PLL) Clock Generator IEEE-1149.1 (JTAG†) Boundary-Scan-Compatible 429-Pin Ceramic Ball Grid Array (CBGA) Package (GLP Suffix) 0.18-µm/5-Level Metal Process – CMOS Technology 3.3-V I/Os, 1.9-V Internal
元器件交易网
SMJ320C6701 FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS030B – APRIL 2000 – REVISED MAY 2001
D Highest Performance Floating-Point Digital
GLP PACKAGE (BOTTOM VIEW)
AA Y W V U T R P N M L K J H G F E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
description
The SMJ320C67x DSPs are the floating-point DSP family in the SMJ320C6000 platform. The SMJ320C6701 (’C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the ’C6701 offers cost-effective solutions to high-performance DSP programming challenges. The ’C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The ’C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The ’C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The ’C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals. The ’C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
Signal Processor (DSP) SMJ320C6701 – 7-, 6-ns Instruction Cycle Time – 140-, 167-MHz Clock Rate – Eight 32-Bit Instructions/Cycle – Up to 1 GFLOPS Performance – Pin-Compatible With ’C6201 Fixed-Point DSP SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing Operating Temperature Ranges – Extended (W) –55°C to 115°C – Extended (S) –40°C to 90°C VelociTI Advanced Very Long Instruction Word (VLIW) ’C67x CPU Core – Eight Highly Independent Functional Units: – Four ALUs (Floating- and Fixed-Point) – Two ALUs (Fixed-Point) – Two Multipliers (Floating- and Fixed-Point) – Load-Store Architecture With 32 32-Bit General-Purpose Registers – Instruction Packing Reduces Code Size – All Instructions Conditional Instruction Set Features – Hardware Support for IEEE Single-Precision Instructions – Hardware Support for IEEE Double-Precision Instructions – Byte-Addressable (8-, 16-, 32-Bit Data) – 32-Bit Address Range – 8-Bit Overflow Protection – Saturation – Bit-Field Extract, Set, Clear – Bit-Counting – Normalization
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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SM320C6201BGLPS20中文资料

SM320C6201BGLPS20中文资料

元器件交易网
SM320C6201B, SMJ320C6201B DIGITAL SIGNAL PROCESSOR
SGUS031B – APRIL 2000 – REVISED AUGUST 2001
D Highest Performance Fixed-Point Digital
Copyright 2001, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
AA Y W V U T R P N M L K J H G F E D C B A
GLP 429-PIN BALL GRID ARRAY (BGA) PACKAGE (BOTTOM VIEW)
D
D
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21
D Two Multichannel Buffered Serial Ports
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 device characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 CPU description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 signal groups description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 device and development support nomenclature . . . . . . . . . 23 documentation support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 clock PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 power-supply sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 absolute maximum ratings over operating case temperature ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 recommended operating conditions . . . . . . . . . . . . . . . . . . . 28 electrical characteristics over recommended ranges of supply voltage and operating case temperature . . . . 29 parameter measurement information . . . . . . . . . . . . . . . 30 signal transition levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . input and output clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . asynchronous memory timing . . . . . . . . . . . . . . . . . . . . . synchronous-burst memory timing . . . . . . . . . . . . . . . . . synchronous DRAM timing . . . . . . . . . . . . . . . . . . . . . . . . HOLD/HOLDA timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . external interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . host-port interface timing . . . . . . . . . . . . . . . . . . . . . . . . . multichannel buffered serial port timing . . . . . . . . . . . . . DMAC, timer, power-down timing . . . . . . . . . . . . . . . . . . JTAG test-port timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 31 34 36 40 44 45 47 48 51 59 60 61
ICN6201 技术介绍文档

ICN6201 技术介绍文档


1
2013/12/3
CONFIDENTIAL
MIPI接口简介 ( 1 )
MIPI
stands for Mobile Industry Processor Interface
Board Members in MIPI Alliance Intel, Motorola, Nokia, NXP, Samsung, ST, TI DSI (Display Serial Interface) DSI specifies a high-speed serial interface between a host processor and display module. D-PHY D-PHY provides the physical layer definition for DSI
CONFIDENTIAL
ICN6201和主要竞争对手的比较（二）
ICN6201与东芝公司芯片的比较 Item
电源
ICN6201
1.8V单电源供电
TC358764XBG
o MIPI DSI D-PHY: 1.2 V o LVDS PHY: 3.3 V o I/O: 1.8 V - 3.3V o Digital Core: 1.2 V 上电和下电时序有要求 800Mbps 单链路 1366*768 85MHz 有固定的操作要求 功耗较高 相当 BGA49 IIC slave/master 防护等级低
Copyright © Chipone Corp. all rights reservONFIDENTIAL
Q&A
Q&A
Copyright © Chipone Corp. all rights reserved.
SM320 中文说明书

SM320 中文说明书


3.2. 紧急停止 (Emergency Stop) ................................................................. 3-4
3.2.1. 人为的紧急停止.........................................................................................3-4 3.2.2. 系统紧急停止 ............................................................................................3-5
2.1.1. 设备启动前的检验 .....................................................................................2-1 2.1.2. 打开主开关 ................................................................................................2-3 2.1.3. MMI 初始化与 Machine Ready..................................................................2-3 2.1.4. 原点复位 (Return-To-Origin) ....................................................................2-3 2.1.5. 预热（Warming Up）................................................................................2-4
TI DSP选型

TI DSP选型

C6000™ 经过功耗优化的 DSP：
C6000™ DSP 平台提供行业最高性能的定点和浮点DSP，其中包括运行速度高达 1.2GHz 的最快定点DSP。

它是高性能音频、视频、影像和宽带基础设施
应用的理想选择。

系列的主要特点是低功耗，所以最适合个人与便携式上网以及无线通信应用，如手机、PDA、GPS等应用。

处理速度在80MIPS-PI并行接口、定时器、DMA 等外设。

值得注意的是C55XX 提供了EMIF 外部存储器扩展接口，可以直接使用SDRAM，而C54XX则，C28x该系芯片具有大量外设资源，如：A/D、定时器、各种串口（同步和异步），WATCHDOG、CAN 总线/PWM 发生器、数字IO C2000 有FLASH，也只有该系列有异步串口可以和PC 的UART 相连。

适合宽带网络和数字影像应用。

32bit，其中：C62XX 和C64X 是定点系列，C67XX是浮点系列。

该系列提供EMIF扩展存储器接同为浮点系列的C3X 中的VC33现在虽非主流产品，但也仍在广泛使用，但其速度较低，最高在150MIPS。

还提供DSP 的低功耗实时信号处理能力，最适合移动上网设备和多媒体家电。

其他系列的DSP 曾经有过风光，但现在都非TI X 的浮点系列：C30，C31，C32 C2X 和C5X 系列：C20，C25，C50每个系列的DSP 都有其主要应用领域。