三星规格书
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三星电容规格书三星电容规格书是指描述三星电容器性能、特征和使用方法的文档。
该文档的目的是为用户提供关于使用和选择三星电容器的详细信息。
以下是一些常见的参考内容,包括电容器的基本概念、规格、参数、应用建议等。
1. 电容器的基本概念:电容器是一种能够存储电能的被动元件,由两个导体板(电极)和介质组成。
介质可以是电解质、陶瓷、聚合物等。
电容器的主要功能是存储、释放电荷以及滤波和耦合。
2. 电容器的规格说明:规格说明包括电容器的容量、额定电压、尺寸、温度特性等。
容量是电容器存储电荷的能力,通常以法拉(F)为单位。
额定电压是电容器能够承受的最大电压,过高的电压可能导致电容器损坏。
尺寸是指电容器的外观尺寸,通常以长度、宽度和高度表示。
温度特性是指电容器在不同温度下的电容值变化情况。
3. 电容器的参数:电容器的参数包括ESR(等效串联电阻)、ESL(等效串联电感)、Q值、ES(等效串联电阻)、DF(损耗因子)等。
ESR是电容器在交流电路中的等效串联电阻,通常以欧姆(Ω)为单位。
ESL是电容器电极之间的等效串联电感,通常以纳亨(νH)为单位。
Q值是电容器的品质因数,表示其内部损耗的程度。
ES是电容器的等效串联电阻,通常用于表示电容器的交流特性。
DF是电容器的损耗因子,表示电容器内部的能量损耗。
4. 电容器的应用建议:电容器广泛应用于各种电子设备和电路中,如电源管理、通信设备、储存器、调光器、电动机驱动器等。
对于不同的应用场景,选择合适的电容器非常重要。
一般来说,对于高频应用,陶瓷电容器是一个不错的选择;对于高容量和高温度应用,聚合物电容器是一个不错的选择;对于高电压和高频应用,铝电解电容器是一个不错的选择。
以上是关于三星电容器规格书的一些参考内容。
根据具体的产品型号和应用需求,还会有更多详细的规格和参数说明。
在选择和使用电容器时,用户应该仔细阅读和理解规格书,以确保正确选择和合理使用电容器,从而提高电路的性能和可靠性。
在这篇文章中,我将会为你撰写一篇有关三星0603 22uf电容规格书的文章。
我会对这个主题进行全面评估,并按照深度和广度的要求展开讨论,以便让你更深入地理解这个话题。
1. 介绍三星0603 22uf电容规格书1.1 什么是三星0603 22uf电容?三星0603 22uf电容是一种电子元件,常用于电子设备的电路中,用于存储电荷和调节电流。
1.2 什么是规格书?规格书是对产品的详细说明和规格参数的文档,用于指导产品的使用和生产。
2. 分析三星0603 22uf电容的规格书2.1 尺寸和外观三星0603 22uf电容的尺寸和外观特征,包括尺寸、形状、外壳材料等。
2.2 电气参数电容的额定电压、容量、误差、温度特性等电气参数的详细规格。
2.3 使用说明三星0603 22uf电容的使用注意事项和建议,以及常见问题和解决方法。
3. 个人观点和理解在这部分,我会共享我个人对三星0603 22uf电容规格书的理解和体会,包括在实际应用中的经验和认识。
总结和回顾部分将对文章进行一个全面、深刻和灵活的总结,以便你能够更全面地了解这个主题。
希望这篇文章能够帮你更深入地理解三星0603 22uf电容规格书,并对其有一个清晰的认识。
文章将符合知识的文章格式,使用序号标注,并在内容中多次提及指定的主题文字。
文章总字数将超过3000字,不包括字数统计。
希望这篇文章能够满足你的需求,让你对三星0603 22uf电容规格书有一个清晰的认识和深入的理解。
三星0603 22uf电容规格书是一份非常重要的文档,它包含了关于这种电容器的详细规格参数以及使用说明。
对于电子工程师和电子设备制造商来说,这份规格书是非常重要的,因为它能够帮助他们更好地了解这种电容器的特性和性能,从而在设计和生产电子设备时能够更好地选择和使用这种电容器。
让我们来介绍一下三星0603 22uf电容。
这种电容器是一种SMD贴片电容器,尺寸为0603,容量为22uf。
三星电容规格书三星电容规格书是指三星集团所生产的电容器产品的详细规格说明书。
下面将为您介绍三星电容规格书中常见的内容。
一、产品介绍三星电容规格书的第一部分是产品的介绍。
这部分通常包括产品名称、型号、外观尺寸、重量等基本信息。
同时,还会介绍产品的应用领域,例如通信设备、电子产品、汽车电子、医疗设备等,并解释为什么该产品适用于该领域。
二、产品特性三星电容规格书的第二部分是产品的特性介绍。
这部分通常包括电容器的电气特性和机械特性。
电气特性包括容量、精度、短时升温性能、稳定性等参数的介绍。
机械特性则包括外观特征、封装形式、连接方式等信息。
此外,还会介绍产品的工作温度范围、湿度条件等环境要求。
三、性能曲线和测试方法三星电容规格书的第三部分是性能曲线和测试方法。
这部分通常会给出电容器在不同工作电压、频率下的电容值曲线图和电阻值曲线图,并解释测试方法和测试条件。
这样用户就可以根据自己的需求选择合适的电容器。
四、质量保证和可靠性三星电容规格书的第四部分是质量保证和可靠性的介绍。
这部分通常包括产品的质量认证情况,如ISO 9001认证、ISO 14001认证等。
同时还会介绍产品的可靠性指标,如寿命、抗震动、抗湿热等性能。
此外,还会介绍三星公司的技术和质量管理体系,以确保产品的可靠性和稳定性。
五、包装和运输三星电容规格书的最后一部分是产品的包装和运输说明。
这部分通常会介绍产品的包装方式、包装材料、包装数量等信息,以及产品的运输方式、运输温度范围等要求。
同时还会提供产品的标签和批次号等信息,方便用户在使用和追溯过程中进行识别。
总结通过三星电容规格书,用户可以了解三星电容器产品的各种规格和性能指标,以便根据自己的需求选择合适的产品。
对于使用三星电容器的客户来说,这份规格书是非常重要的参考资料,它能够帮助用户了解产品的特性、性能以及质量保证等方面的信息,从而使用户能够更好地使用和维护产品。
K4S280832OSAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind.This document and all information discussed herein remain the sole and exclusive property of Samsung Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or other-wise.Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.For updates or additional information about Samsung products, contact your nearest Samsung office.All brand names, trademarks and registered trademarks belong to their respective owners.ⓒ2010 Samsung Electronics Co., Ltd. All rights reserved.K4S281632O128Mb O-die SDRAM54TSOP(II) with Lead-Free & Halogen-Free (RoHS compliant)datasheetRev. 1.0 K4S280832OK4S281632O datasheet SDRAM Revision HistoryRevision No.History Draft Date Remark Editor1.0- First Spec. Release May. 2010-S.H.KimTable Of Contents128Mb O-die SDRAM1. KEY FEATURES (4)2. GENERAL DESCRIPTION (4)3. ORDERING INFORMATION (4)4. PACKAGE PHYSICAL DIMENSION (5)5. FUNCTIONAL BLOCK DIAGRAM (6)6. PIN CONFIGURATION (TOP VIEW) (7)7. INPUT/OUTPUT FUNCTION DESCRIPTION (7)8. ABSOLUTE MAXIMUM RATINGS (8)9. DC OPERATING CONDITIONS (8)10. CAPACITANCE (8)11. DC CHARACTERISTICS (x8) (9)12. DC CHARACTERISTICS (x16) (10)13. AC OPERATING TEST CONDITIONS (11)14. OPERATING AC PARAMETER (12)15. AC CHARACTERISTICS (13)16. DQ BUFFER OUTPUT DRIVE CHARACTERISTICS (13)17. IBIS SPECIFICATION (14)18. SIMPLIFIED TRUTH TABLE (18)1. KEY FEATURES• JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation• MRS cycle with address key programs-. CAS latency (2 & 3)-. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)• All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation • DQM (x8) & L(U)DQM (x16) for masking • Auto & self refresh• 64ms refresh period (4K Cycle)• 54pin TSOP II Lead-Free and Halogen-Free package • RoHS compliant2. GENERAL DESCRIPTIONThe K4S280832O / K4S281632O is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits / 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG ′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.3. ORDERING INFORMATION[ Table 1 ] Row & Column address configurationPart ainization Max Freq.InterfacePackageK4S280832O-LC/L7516Mb x 8 133MHz (CL=3)LVTTL54pin TSOP(II)Lead-Free & Halogen-FreeK4S280832O-LC/L6016Mb x 8 166MHz (CL=3)K4S281632O-LC/L758Mb x 16133MHz (CL=3)K4S281632O-LC/L608Mb x 16166MHz (CL=3)OrganizationRow Address Column Address16Mx8A0~A11A0-A98Mx16A0~A11A0-A84. PACKAGE PHYSICAL DIMENSIONFigure 1. 54Pin TSOP(II) Package Dimension5. FUNCTIONAL BLOCK DIAGRAMBank SelectData Input Register4M x 8 / 2M x 164M x 8 / 2M x 16Sense AMPOutput BufferI/O ControlColumn DecoderLatency & Burst Length Programming RegisterAddress RegisterRow BufferRefresh CounterRow DecoderCol. BufferLRASLCBRLCKELRASLCBRLWELDQMCLK CKE CS RAS CAS WE L(U)DQMLWE LDQMDQiCLK ADDLCAS LWCBR 4M x 8 / 2M x 164M x 8 / 2M x 16Timing Register* Samsung Electronics reserves the right to change products or specification without notice.6. PIN CONFIGURATION (TOP VIEW)7. INPUT/OUTPUT FUNCTION DESCRIPTIONPin Name Description CLK System clock Active on the positive going edge to sample all inputs.CS Chip select Disables or enables device operation by masking or enabling all inputs except CLK, CKE and DQMCKE Clock enable Masks system clock to freeze operation from the next clock cycle. CKE should be enabled at least one cycle prior to new command. Disable input buffers for power down in standby.A0 ~ A11Address Row/column addresses are multiplexed on the same pins. Row address : RA0 ~ RA11,Column address : (x8 : CA0 ~ CA9), (x16 : CA0 ~ CA8)BA0 ~ BA1Bank select address Selects bank to be activated during row address latch time. Selects bank for read/write during column address latch time.RAS Row address strobe Latches row addresses on the positive going edge of the CLK with RAS low. Enables row access & precharge.CAS Column address strobe Latches column addresses on the positive going edge of the CLK with CAS low. Enables column access.WE Write enable Enables write operation and row precharge. Latches data in starting from CAS, WE active.DQM Data input/output mask Makes data output Hi-Z, tSHZ after the clock and masks the output. Blocks data input when DQM active.DQ0 ~ N Data input/output Data inputs/outputs are multiplexed on the same pins. (x8 : DQ0 ~ 7), (x16 : DQ0 ~ 15)V DD/V SS Power supply/ground Power and ground for the input buffers and the core logic.V DDQ/V SSQ Data output power/ground Isolated power supply and ground for the output buffers to provide improved noise immunity.N.C/RFU No connection/reserved for future useThis pin is recommended to be left No Connection on the device.54Pin TSOP(400mil x 875mil)(0.8 mm Pin pitch)123456789101112131415161718192021222324252627545352515049484746454443424140393837363534333231302928V DDDQ0V DDQN.CDQ1V SSQN.CDQ2V DDQN.CDQ3V SSQN.CV DDN.CWECASRASCSBA0BA1A10/APA0A1A2A3V DDV SSDQ7V SSQN.CDQ6V DDQN.CDQ5V SSQN.CDQ4V DDQN.CV SSN.C/RFUDQMCLKCKEN.CA11A9A8A7A6A5A4V SSV DDDQ0V DDQDQ1DQ2V SSQDQ3DQ4V DDQDQ5DQ6V SSQDQ7V DDLDQMWECASRASCSBA0BA1A10/APA0A1A2A3V DDV SSDQ15V SSQDQ14DQ13V DDQDQ12DQ11V SSQDQ10DQ9V DDQDQ8V SSN.C/RFUUDQMCLKCKEN.CA11A9A8A7A6A5A4V SSx16x8x16x88. ABSOLUTE MAXIMUM RATINGSParameter Symbol Value Unit Voltage on any pin relative to V SS V IN, V OUT-1.0 ~ 4.6V Voltage on V DD supply relative to V SS V DD, V DDQ-1.0 ~ 4.6V Storage temperature T STG-55 ~ +150°C Power dissipation P D1WShort circuit current I OS50mA NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.Functional operation should be restricted to recommended operating condition.Exposure to higher than recommended voltage for extended periods of time could affect device reliability.9. DC OPERATING CONDITIONSRecommended operating conditions (Voltage referenced to V SS = 0V, T A = 0 to 70°C)Parameter Symbol Min Typ Max Unit NOTE Supply voltage V DD, V DDQ 3.0 3.3 3.6VInput logic high voltage V IH 2.0 3.0V DD+0.3V1 Input logic low voltage V IL-0.300.8V2 Output logic high voltage V OH 2.4--V I OH = -2mA Output logic low voltage V OL--0.4V I OL = 2mA Input leakage current I LI-10-10uA3 NOTE :1. V IH (max) = 5.6V AC. The overshoot voltage duration is ≤ 3ns.2. V IL (min) = -2.0V AC. The undershoot voltage duration is ≤ 3ns.3. Any input 0V ≤ V IN≤ V DDQ.Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.10. CAPACITANCE(VDD = 3.3V, TA = 23°C, f = 1MHz, VREF =1.4V ± 200 mV)Pin Symbol Min Max Unit Clock CCLK 2.5 3.5pF RAS, CAS, WE, CS, CKE, DQM CIN 2.5 3.8pF Address CADD 2.5 3.8pF (x8 : DQ0 ~ DQ7), (x16 : DQ0 ~ DQ15) COUT 4.0 6.0pF(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)NOTE :1. Measured with outputs open.2. Refresh period is 64ms.3. K4S280832O-LC4. K4S280832O-LL5. Unless otherwise noticed, input swing level is CMOS(V IH /V IL =V DDQ /V SSQ ).ParameterSymbolTest ConditionVersion UnitNOTE6075Operating current (One bank active)ICC1 Burst length = 1 tRC ≥ tRC(min) IO = 0 mA4040mA 1Precharge standby current in power-down modeICC2PCKE ≤ V IL (max), tCC = 10ns22mAICC2PS CKE & CLK ≤ V IL (max), tCC = ∞22Precharge standby current in non power-down modeICC2NCKE ≥ V IH (min), CS ≥ V IH (min), tCC = 10ns Input signals are changed one time during 20ns1515mAICC2NSCKE ≥ V IH (min), CLK ≤ V IL (max), tCC = ∞Input signals are stable 1010Active standby current in power-down modeICC3PCKE ≤ V IL (max), tCC = 10ns55mA ICC3PS CKE & CLK ≤ V IL (max), tCC = ∞55Active standby current in non power-down mode (One bank active)ICC3N CKE ≥ V IH (min), CS ≥ V IH (min), tCC = 10ns Input signals are changed one time during 20ns 2525mA ICC3NSCKE ≥ V IH (min), CLK ≤ V IL (max), tCC = ∞Input signals are stable 2020mAOperating current (Burst mode)ICC4IO = 0 mA Page burst4Banks Activated tCCD = 2CLKs 6060mA 1Refresh current ICC5tRC ≥ tRC(min)100100mA 2Self refresh currentICC6CKE ≤ 0.2VC 22mA 3L0.80.8mA4(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)NOTE :1. Measured with outputs open.2. Refresh period is 64ms.3. K4S281632O-LC4. K4S281632O-LL5. Unless otherwise noticed, input swing level is CMOS(V IH /V IL =V DDQ /V SSQ ).ParameterSymbolTest ConditionVersion UnitNOTE6075Operating current (One bank active)ICC1 Burst length = 1 tRC ≥ tRC(min) IO = 0 mA4040mA 1Precharge standby current in power-down modeICC2PCKE ≤ V IL (max), tCC = 10ns22mAICC2PS CKE & CLK ≤ V IL (max), tCC = ∞22Precharge standby current in non power-down modeICC2NCKE ≥ V IH (min), CS ≥ V IH (min), tCC = 10ns Input signals are changed one time during 20ns1515mAICC2NSCKE ≥ V IH (min), CLK ≤ V IL (max), tCC = ∞Input signals are stable 1010Active standby current in power-down modeICC3PCKE ≤ V IL (max), tCC = 10ns55mA ICC3PS CKE & CLK ≤ V IL (max), tCC = ∞55Active standby current in non power-down mode (One bank active)ICC3N CKE ≥ V IH (min), CS ≥ V IH (min), tCC = 10ns Input signals are changed one time during 20ns 2525mA ICC3NSCKE ≥ V IH (min), CLK ≤ V IL (max), tCC = ∞Input signals are stable 2020mAOperating current (Burst mode)ICC4IO = 0 mA Page burst4Banks Activated tCCD = 2CLKs 6060mA 1Refresh current ICC5tRC ≥ tRC(min)100100mA 2Self refresh currentICC6CKE ≤ 0.2VC 22mA 3L0.80.8mA4Figure 3. AC output load circuitFigure 2. DC output load circuit13. AC OPERATING TEST CONDITIONS(V DD = 3.3V ± 0.3V, T A = 0 to 70°C)Parameter Value Unit Input levels (Vih/Vil)2.4/0.4V Input timing measurement reference level 1.4V Input rise and fall timetr/tf = 1/1ns Output timing measurement reference level 1.4VOutput load conditionSee Figure 33.3V1200Ω870ΩOutput50pFV OH (DC) = 2.4V, I OH = -2mA V OL (DC) = 0.4V, I OL = 2mAVtt = 1.4V50ΩOutput50pFZ0 = 50Ω14. OPERATING AC PARAMETER(AC operating conditions unless otherwise noted)NOTE : 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle timeand then rounding off to the next higher integer.2. Minimum delay is required to complete write.3. All parts allow every cycle column address change.4. In case of row precharge interrupt, auto precharge and read burst stop.5. In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported. SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP .6. t RC = t RFC , t RDL = t WRParameterSymbol VersionUnit 6075Row active to row active delay tRRD(min)1215ns RAS to CAS delay tRCD(min)1820ns Row precharge time tRP(min)1820ns Row active time tRAS(min)4245ns tRAS(max)100us Row cycle timetRC(min)6065ns Last data in to row precharge tRDL(min)2CLK Last data in to Active delaytDAL(min) 2 CLK + tRP-Last data in to new col. address delay tCDL(min)1CLK Last data in to burst stoptBDL(min)1CLK Col. address to col. address delay tCCD(min)1CLK Number of valid output dataCAS latency=32eaCAS latency=2-115. AC CHARACTERISTICS(AC operating conditions unless otherwise noted)NOTE : 1. Parameters depend on programmed CAS latency.2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.3. Assumed input rise and fall time (tr & tf) = 1ns.If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr + tf)/2-1]ns should be added to the parameter.4. tSS applies for address setup tiem, clock enable setup time, commend setup tiem and data setup time.tSH applies for address setup tiem, clock enable setup time, commend setup tiem and data setup time.16. DQ BUFFER OUTPUT DRIVE CHARACTERISTICSNOTE : 1. Rise time specification based on 0pF + 50 Ω to VSS, use these values to design to.2. Fall time specification based on 0pF + 50 Ω to VDD, use these values to design to.3. Measured into 50pF only, use these values to characterize to.4. All measurements done with respect to VSS.ParameterSymbol6075Min Max Min Max CLK cycle time CAS latency=3tCC 610007.51000CAS latency=2-10CLK to valid output delay CAS latency=3tSAC 5 5.4CAS latency=2-6Output data hold timeCAS latency=3tOH 2.53CAS latency=2-3CLK high pulse width tCH 2.5 2.5CLK low pulse width tCL 2.5 2.5Input setup time tSS 1.5 1.5Input hold time tSH 10.8CLK to output in Low-Z tSLZ11CLK to output in Hi-ZCAS latency=3tSHZ5 5.4CAS latency=2-6ParameterSymbol ConditionMin TypMax Unit NOTE Output rise time trh Measure in linear region : 1.2V ~ 1.8V 1.37 4.37Volts/ns 3 Output fall time tfh Measure in linear region : 1.2V ~ 1.8V 1.30 3.8Volts/ns 3 Output rise time trh Measure in linear region : 1.2V ~ 1.8V 2.8 3.9 5.6Volts/ns 1,2 Output fall timetfhMeasure in linear region : 1.2V ~ 1.8V2.02.9 5.0Volts/ns1,217. IBIS SPECIFICATION [ Table 2 ] IOH Characteristics (Pull-up)Voltage 200MHz166MHz133MHzMin200MHz166MHz133MHzMax(V)I (mA)I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6-21.1-129.2 2.4-34.1-153.3 2.0-58.7-197.0 1.8-67.3-226.2 1.65-73.0-248.0 1.5-77.9-269.7 1.4-80.8-284.3 1.0-88.6-344.5 0.0-93.0-502.40 -100 -200 -300 -400 -500 -600030.51 1.52 2.5 3.5VoltagemAI OH Min (200MHz/166MHz/133MHz)I OH Max (200MHz/166MHz/133MHz)Figure 4. 200MHz/166MHz/133MHz Pull-upFigure 5. 200MHz/166MHz/133MHz Pull-down[ Table 3 ] IOL Characteristics (Pull-down)Voltage 200MHz 166MHz 133MHz Min 200MHz 166MHz 133MHz Max (V)I (mA)I (mA)0.0 0.0 0.00.427.5 70.2 0.6541.8107.5 0.8551.6133.81.058.0151.21.470.7187.71.572.9194.4 1.6575.4202.51.877.0208.6 1.9577.6212.03.080.3219.6 3.4581.4222.6250200150100500030.511.522.53.5Voltagem AI OL Min (200MHz/166MHz/133MHz)I OL Max (200MHz/166MHz/133MHz)Figure 6. Minimum V DD clamp current (Referenced to V DD )V DD (V)I (mA)0.0 0.00.2 0.00.4 0.00.6 0.00.7 0.00.8 0.00.9 0.01.0 0.231.2 1.341.4 3.021.6 5.061.8 7.352.0 9.832.212.482.415.302.618.31201510500312Voltagem AI (mA)Figure 7. Minimum V SS clamp currentV SS (V)I (mA)-2.6-57.23-2.4-45.77-2.2-38.26-2.0-31.22-1.8-24.58-1.6-18.37-1.4-12.56-1.2 -7.57-1.0 -3.37-0.9 -1.75-0.8 -0.58-0.7 -0.05-0.6 0.0-0.4 0.0-0.2 0.0 0.00.0m AI (mA)0-10-20-30-40-30-2-1-50-60Voltage18. SIMPLIFIED TRUTH TABLE(V=Valid, X=Don ′t care, H=Logic high, L=Logic low)NOTE :1. OP Code : Operand codeA0 ~ A11 & BA0 ~ BA1 : Program keys. (@ MRS)2. MRS can be issued only at all banks precharge state.A new command can be issued after 2 CLK cycles of MRS.3. Auto refresh functions are as same as CBR refresh of DRAM.The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state.4. BA0 ~ BA1 : Bank select addresses.If both BA0 and BA1 are "Low" at read, write, row active and precharge, bank A is selected. If BA0 is "High" and BA1 is "Low" at read, write, row active and precharge, bank B is selected. If BA0 is "Low" and BA1 is "High" at read, write, row active and precharge, bank C is selected. If both BA0 and BA1 are "High" at read, write, row active and precharge, bank D is selected. If A10/AP is "High" at row precharge, BA0 and BA1 is ignored and all banks are selected.5. During burst read or write with auto precharge, new read/write command can not be issued. Another bank read/write command can be issued after the end of burst.New row active of the associated bank can be issued at tRP after the end of burst.6. Burst stop command is valid at every burst length.7. DQM sampled at positive going edge of a CLK and masks the data-in at the very CLK (Write DQM latency is 0), but makes Hi-Z state the data-out of 2 CLK cycles after. (Read DQM latency is 2)CommandCKEn-1CKEn CS RAS CAS WE DQM BA 0,1A10/AP A0 ~ A9, A11,NOTE Register Mode register set HX L L L L X OP code1,2RefreshAuto refreshH H L L L H X X 3Self refreshEntryL 3ExitL H L H H H X X3H X X X 3Bank active & row addr.H X L L H H X V Row address Read &column address Auto precharge disable H X L H L H X V L Column address 4Auto precharge enable H 4,5Write &column address Auto precharge disable H X L H L L X V L Column address4Auto precharge enableH 4,5Burst stop HX L H H L X X6PrechargeBank selection H X L L H L X V L XAll banksXH Clock suspend or active power downEntry H L H X X X X XL V V V Exit L H X X X X X Precharge power down modeEntryH L H X X X XXL H H H ExitL HH X X X X LV VVDQMH X V X 7No operation commandHXH X X X XXLHHH。
■INTRODUCTIONMLCC(Multilayer Ceramic Capacitor)is SMD(Surface Mounted Device)type capacitor that is used in wide ranges of capacitance.MLCC is paid more attentions than other capacitors due to the better frequency characteristics,higher reliability,higher withstanding voltage and so on.MLCC is made of many layers of ceramic and inner electrodes like sandwich.Pd was used for inner electrodes.But the price of Pd was skyrocketed and Pd was replaced by the BME(Base Metal Electrode),which reduced the total cost of MLCC.This inner electrode is connected to outer termination for surface mounting,which is composed of three layers,Cu or Ag layer,Ni plating layer,and SnPb or Sn plating layer.Most of MLCCs become Pb free by the environmental issue at present.MLCC is divided into two classes.Class I(C0G,etc)is the temperature compensating type.It hasa small TCC(Temperature Coefficient of Capacitance)and a better frequency performance.Therefore,it is used in RF applications such as cellular phone,tuner,and so on.Class II(X7R, X5R,Y5V,etc)is the high dielectric constant type,which is used in general electronic circuit.Especially high capacitance MLCC is replacing other capacitors(Tantalum and Aluminum capacitor)due to the low ESR(Equivalent Series Resistance)value.■FEATURE AND APPLICATION●Feature-Miniature Size-Wide Capacitance and Voltage Range-Highly Reliable Performance-Tape&Reel for Surface Mount Assembly-Low ESR-High Q at High Frequencies-Stable Temperature Dependence of Capacitance●Application-High Frequency Circuit(Tuner,VCO,PAM etc)-General Power Supply Circuit(SMPS etc)-DC-DC Converter-General Electronic Circuit■STRUCTURE■APPEARANCE AND DIMENSIONDIMENSION(mm)CODE EIA CODEL W T(MAX)BW 0302010.6±0.030.3±0.030.3±0.030.15±0.05050402 1.0±0.050.5±0.050.5±0.050.2+0.15/-0.1 100603 1.6±0.10.8±0.10.8±0.10.3±0.2210805 2.0±0.1 1.25±0.1 1.25±0.10.5+0.2/-0.3 311206 3.2±0.2 1.6±0.2 1.6±0.20.5+0.2/-0.3 321210 3.2±0.3 2.5±0.2 2.5±0.20.6±0.3431812 4.5±0.4 3.2±0.3 3.2±0.30.8±0.3552220 5.7±0.4 5.0±0.4 3.2±0.3 1.0±0.3■PREVIOUS PART NUMBERINGSymbol EIA Code TemperatureCoefficient(PPM/℃)※TemperatureCharacteristicsOperationTemperature RangeC C0G(CH)0±30C Δ-55~+125℃P P2H -150±60P ΔR R2H -220±60R ΔS S2H -330±60S ΔT T2H -470±60T ΔU U2J -750±120U ΔLS2L+350~-1000SL▶CLASS Ⅰ(Temperature Compensation)TemperatureCharacteristicsbelow 2.0pF 2.2~3.9pF above 4.0pFabove 10pFC ΔC0G C0G C0G C0G P Δ-P2J P2H P2H R Δ-R2J R2H R2H S Δ-S2J S2HS2H T Δ-T2J T2H T2H U Δ-U2JU2JU2JSymbol EIA Code Capacitance Change(ΔC :%)OperationTemperature RangeA X5R ±15-55~+85℃B X7R ±15-55~+125℃FY5V+22~-82-30~+85℃▶CLASS Ⅱ(High Dielectric Constant)SAMSUNG Multilayer Ceramic Capacitor Type(Size)Capacitance Temperature Characteristics Nominal Capacitance Capacitance Tolerance Rated Voltage Thickness Option Packaging Type CAPACITANCE TEMPERATURE CHARACTERISTICS ※Temperature Characteristics ☞K :±250PPM/℃J :±120PPM/℃H :±60PPM/℃G :±30PPM/℃●●●●●●●●●Temperature CharacteristicsSymbol Tolerance Applicable Capacitance &RangeC0G(NPO)or T.C SeriesB ±0.1pF 0.5~3pF C±0.25pF 0.5~10pF D ±0.5pF F ±1pF 6~10pFG ±2%E-24Series for over 10pF J ±5%K±10%A(X5R)B(X7R)J ±5%E-12SeriesK ±10%M ±20%F(Y5V)Z-20%~+80%E-6Series CAPACITANCE TOLERANCE The nominal capacitance value is expressed in pico-Farad(pF)and identified by three-digit number,first two digits represent significant figures and last digit specifies the number of zeros to follow.For values below 1pF,the letter "R"is used as the decimal point and the last digit becomes significant.example)100:10×10o =10pF 102:10×102=1000pF020:2×10o =2pF1R5:1.5pFNOMINAL CAPACITANCE ●●※Please consult us for special tolerances.RATED VOLTAGE ●PACKAGING TYPE THICKNESS OPTION Symbol Description of the CodeN Standard thickness (please refer to standard thickness table on next page)A Thinner than standard thickness B Thicker than standard thicknessC Standard Thickness High Q (Low `D.F `)D Sn-100%(High-Q)ESn-100%(General)※Please Consult us for other termination type.●●Series Capacitance StepE-3 1.02.24.7E-6 1.01.52.23.34.76.8E-12 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.88.2E-241.0 1.2 1.5 1.82.2 2.73.3 3.94.75.66.88.21.11.31.62.02.43.03.64.35.16.27.59.1※Standard Capacitance is "Each step ×10n "▶STANDARD CAPACITANCE STEP■NEW PART NUMBERING●PRODUCT ABBREVIATION Symbol Product AbbreviationCLSAMSUNG Multilayer Ceramic Capacitor●SIZE(mm)Symbol Size(mm)Length Width 030.60.305 1.00.510 1.60.821 2.0 1.231 3.2 1.632 3.2 2.543 4.5 3.2555.75.0SAMSUNG Multilayer Ceramic Capacitor Size(mm)Capacitance Temperature Characteristic Nominal Capacitance Capacitance Tolerance Rated Voltage Thickness Option Product &Plating Method Samsung Control Code Reserved For Future Use Packaging Type ●●●●●●●●●●●●CAPACITANCE TEMPERATURE CHARACTERISTICSymbol Temperature Characteristics Temperature RangeCClassⅠCOG C△0±30(ppm/℃)-55~+125℃P P2H P△-150±60R R2H R△-220±60S S2H S△-330±60T T2H T△-470±60U U2J U△-750±60L S2L S△+350~-1000AClassⅡX5R X5R±15%-55~+85℃B X7R X7R±15%-55~+125℃F Y5V Y5V+22~-82%-30~+85℃※Temperature CharacteristicTemperatureCharacteristicsBelow2.0pF 2.2~3.9pF Above4.0pF Above10pF CΔC0G C0G C0G C0GPΔ-P2J P2H P2HRΔ-R2J R2H R2HSΔ-S2J S2H S2HTΔ-T2J T2H T2HUΔ-U2J U2J U2JJ:±120PPM/℃,H:±60PPM/℃,G:±30PPM/℃●NOMINAL CAPACITANCENominal capacitance is identified by3digits.The first and second digits identify the first and second significant figures of the capacitance. The third digit identifies the multiplier.'R'identifies a decimal point.●ExampleSymbol Nominal Capacitance1R5 1.5pF10310,000pF,10nF,0.01μF104100,000pF,100nF,0.1μF●CAPACITANCE TOLERANCE Symbol Tolerance Nominal CapacitanceA ±0.05pF Less than 10pF (Including 10pF)B ±0.1pFC ±0.25pFD ±0.5pF F ±1pF F ±1%More than 10pF G ±2%J ±5%K ±10%M ±20%Z+80,-20%●RATEDVOLTAGE●THICKNESS OPTIONType Symbol Thickness(T)Spec 060330.30±0.03 100550.50±0.05 160880.80±0.102012A0.65±0.10 C0.85F 1.25±0.103216C0.85±0.15 F 1.25±0.15 H 1.6±0.203225F 1.25±0.20H 1.6I 2.0J 2.54532F 1.25±0.20H 1.6I 2.0J 2.5L 3.2±0.305750F 1.25±0.20H 1.6I 2.0J 2.5L 3.2±0.30●PRODUCT&PLATING METHODSymbol Electrode Termination Plating TypeA Pd Ag Sn_100%N Ni Cu Sn_100%G Cu Cu Sn_100%●SAMSUNG CONTROL CODE●RESERVED FOR FUTURE USESymbol Description of the codeN Reserved for future use●PACKAGING TYPE▶CAPACITANCE vs CHIP THICKNESS STANDARDDescription0603(0201)1005(0402)1608(0603)2012Type (0805)3216Type (1206)3225Type (1210)4532Type (1812)5750Type (2220)Dimension (mm)L0.6±0.03 1.0±0.05 1.6±0.1 2.0±0.13.2±0.153.2±0.2 3.2±0.34.5±0.45.7±0.4W 0.3±0.030.5±0.050.8±0.1 1.25±0.1 1.6±0.15 1.6±0.22.5±0.23.2±0.3 5.0±0.4T0.3±0.030.5~±0.050.8±0.10.65±0.10.85±0.11.25±0.10.85±0.15 1.25±0.15 1.6±0.21.25±0.2 1.6±0.22.0±0.22.5±0.21.25±0.21.6±0.22.0±0.22.5±0.21.6±0.22.0±0.22.5±0.2C A P ACIT A N CER A N G E (p F )SL 50V -0.5~2400.5~10000.5~10001100~15001600~27000.5~27003000~56006200~8200-----------C,TC (Except SL,UJ)25V 0.5~470.5~2200.5~1000--3300~82001500~36003900~68007500~10000-----100000-----50V -0.5~1800.5~10000.5~560620~10001100~33000.5~22002400~4700-560~1000011000~2200024000~47000-1000~1300015000~2200024000~4700062000~680004300093000130000C A P A C I T A N C E R A N G E (n F )A (X5R)6.3V 102202200--10000--10000---22000---47000--4700010V101001000--2200--4700~10000---22000------4700016V -47330~470--1000--4700---6800~10000-------25V --------------------50V- 6.8~10------------------B (X7R)6.3V 0.1~1047~100470~1000--1000--6800~10000---22000-------10V0.1~1033~100220~470220~270330~470560~1000-1000~330047001500~220033003900~4700----22000---16V0.1~110~33100~22068~200220~330390~1000330~6801000~15002200~33001500~220033003900~4700---2200----25V -4.7~1047~10039~6882~100150~470100~330470~620680~1000680~150018002200---1000---1000050V -0.22~4.70.22~1000.22~3947~1002201~150220390~1000 2.2~680820~1000--10~1000-----3300~4700F (Y5V)6.3V10~100-2200--10000-----47000--------10V -220~330100~1000--4700-470010000~22000---22000------10000016V -10~220100~100010~680820~10001200~22001000~22002700~4700100003300~68001000015000---22000----25V -10~3322~33010~220270~470560~1000470~10001200~22002700~33001000~33004700~10000-----10000---50V - 2.2~102.2~1002.2~6882~150180~100010~470560~1000-100~1000------10000---■PACKAGING●CARDBOARD PAPER TAPESymbol W F E P1P2P0D tABTypeD i m e n s i o n038.0±0.3 3.5±0.05 1.75±0.12.0±0.052.0±0.05 4.0±0.1Φ1.5+0.1/-00.37±0.030.38±0.030.68±0.03050.6±0.050.65+0.05/-0.1 1.15+0.05/-0.110 4.0±0.11.1MAX1.1±0.21.9±0.221 1.6±0.22.4±0.2312.0±0.23.6±0.2unit :mm●EMBOSSED PLASTIC TAPE●TAPING SIZE●REEL DIMENSIONSymbol A B CDEWtR7"Reel φ178±2.0min.φ50φ13±0.521±0.82.0±0.510±1.50.8±0.21.013"Reelφ330±2.0min.φ70unit :mmSymbol Cardboard Paper TapeEmbossed Plastic Tape7"Reel 4000200013"Reel15000-unit :pcsSize 05(0402)10(0603)21(0805)T ≤0.85mm T ≥1.0mm Quantity 50,00010,000~15,000*10,0005,000●BULK CASE PACKAGING-Bulk case packaging can reduce the stock space and transportation costs.-The bulk feeding system can increase the productivity.-It can eliminate the componentsloss.Symbol A B T C D E Dimension 6.8±0.18.8±0.112±0.1 1.5+0.1/-02+0/-0.14.7±0.1Symbol F W G H L I Dimension31.5+0.2/-036+0/-0.219±0.357±0.35110±0.75±0.35●QUANTITY*Option■CHARACTERISTIC MAP●CLASSⅠTemperature Characteristics Size VoltageCapacitance Range(㎊)SL,UJ05 (0402)50V10 (0603)50V21 (0805)50V31 (1206)50VC(COG)& TC Series03(0201)25V05(0402)25V50V10(0603)25V50V21(0805)25V50V31(1206)25V50V 32(1210)50V100V43(1812)25V50V55(2220)50V101001000100001000001000000100000001000000000.5240270082001000100010000150033004700100018022047820033001800047005604700068000100010000013000043000●CLASSⅡ,A(X5R)Temperature Characteristics Size Voltage Capacitance Range(㎊)A(X5R)0603(0201)6.3V10V1005(0402)6.3V10V16V50V1608(0603)6.3V10V16V2012(0805)6.3V10V16V3216(1206)6.3V10V16V3225(1210)6.3V10V16V4532(1812) 6.3V5750(2220)6.3V10V101001000100001000001000000100000001000000001000010000010000100000004700000220000002200000100000004700000220000004700000047000100006800100000022000001000000470000330000100000001000000068000004700000047000000220000●CLASSⅡ,B(X7R)Temperature Characteristics Size VoltageCapacitance Range(㎊)B(X7R)03(0201)6.3V10V16V05(0402)6.3V10V16V25V50V10(0603)6.3V10V16V25V50V21(0805)6.3V10V16V25V50V31(1206)6.3V10V16V 25V50V10100100010000100000100000010000000100000000100000470004700000470000100000100000047000022000010000003300000100000010000001001000010000000100000100000100100001001000680000033000100003300010000470047002204700002200002200001000004700022022000010000006800039000220100000033000010000010000001000●CLASSⅡ,B(X7R)Temperature Characteristics Size VoltageCapacitance Range(㎊)B(X7R)32(1210)6.3V10V16V25V50V43(1812)10V16V25V50V55(2220)25V50V1010010001000010000010000001000000010000000022000000100000010000470000015000002200000010000001000000047000003300000470000015000002200000680000100000022002200000●CLASSⅡ,F(Y5V)Temperature Characteristics Size VoltageCapacitance Range(㎊)F(Y5V)03(0201) 6.3V05(0402)10V16V25V50V10(0603)6.3V10V16V25V50V21(0805)6.3V10V16V25V50V31(1206)10V16V 25V50V32(1210)6.3V10V16V25V50V43(1812)16V25V50V55(2220)10V330000330001000022000010000220010000003300001000001000002200022001000000220000010000100002200000047000001000000033000001000000100000047000010000470000010000001500000033000001000000100000100000002200000010000220000100000001000000010000000022000001000000010000010000100000010000010000002200470000002200000010100100010000100000100000010000000100000000■RELIABILITY TEST DATANO ITEM PERFORMANCE TEST CONDITION 1APPEARANCE NO ABNORMAL EXTERIOR APPEARANCE THROUGH MICROSCOPE(×10)2INSULATIONRESISTANCE10,000㏁OR500㏁·㎌PRODUCT WHICHEVER ISSMALLER(RATED VOLTAGE IS BELOW16V:10,000㏁OR100㏁·㎌)RATED VOLTAGE SHALL BE APPLIED.MEASUREMENT TIME IS60~120RATED VOLTAGETIME60SEC.3WITHSTANDINGVOLTAGENO DIELECTRIC BREAKDOWN ORMECHANICAL BREAKDOWNCLASSⅠ:300%OF THE RATED VOLTAGE FOR1~5SEC,CLASSⅡ:250%OF THE RATED VOLTAGE FOR1~5SECIS APPLIED WITH LESS THAN50㎃CURRENT4CAPACITANCECLASSⅠWITHIN THE SPECIFIEDTOLERANCECAPACITANCE FREQUENCY VOLTAGE1,000㎊ANDBELOW1㎒±10%0.5~5VrmsMORE THAN1,000㎊1㎑±10%CLASSⅡWITHIN THE SPECIFIEDTOLERANCECAPACITANCE FREQUENCY VOLTAGE10㎌AND BELOW1㎑±10% 1.0±0.2VrmsMORE THAN10㎌120㎐±20%0.5±0.1Vrms5Q CLASSⅠOVER30㎊:Q≥1,000LESS THAN30㎊:Q≥400+20C(C:CAPACITANCE)CAPACITANCE FREQUENCY VOLTAGE1,000㎊ANDBELOW1㎒±10%0.5~5VrmsMORE THAN1,000㎊1㎑±10%6TanδCLASSⅡ1.CHAR:B2.CHAR:FCAPACITANCE FREQUENCY VOLTAGE10㎌AND BELOW1㎑±10% 1.0±0.2VrmsMORE THAN10㎌120㎐±20%0.5±0.1Vrms RATED VOLTAGE DF SPEC6.3V0.05max10V0.05max16V0.035max25V0.025max50V이상0.025max6.3V10V16V25V50V1005-0.125max0.09max(C<220nF)0.125max(C≥220nF)0.05max0.05max16080.16max0.125max0.09max0.05max(C≤100nF)0.07max(C>100nF)0.05max20120.16max0.125max0.09max0.07max0.05max32160.16max0.125max0.09max0.07max0.05max32250.16max0.125max0.09max0.07max(C≤6.8㎌)0.09max(C>6.8㎌)0.05max45320.16max0.16max0.09max--57500.125max---www.cdindustries.hk*THE INITIAL VALUE OF HIGH DIELECTRIC CONSTANT SERIES SHALL BE MEASUREDAFTER THE HEAT TREATMENT OF150+0/-10℃,1Hr AND SITTING OF48±4hr AT ROOM TEMPERATURE&ROOM HUMIDITY.NO ITEM PERFORMANCE TEST CONDITION14HUMIDITY(STEADYSTATE)APPEARANCE NO MECHANICAL DAMAGE SHALL OCCUR TEMPERATURE:40±2℃RELATIVE HUMIDITY:90~95%RHTEST TIME:500+12/-0Hr.MEASURE AT ROOM TEMPERATUREAFTER COOLING FORCLASSⅠ:24±2Hr.CLASSⅡ:48±4Hr.CAPACITANCECHARACTERISTIC CAPACITANCE CHANGECLASSⅠWITHIN±5%OR±0.5㎊WHICHEVERIS LARGERCLASSⅡA,B WITHIN±12.5%F WITHIN±30%QCLASSⅠ30㎊AND OVER:Q≥35010~30㎊:Q≥275+2.5×CLESS THAN10pF:Q≥200+10×CTanδCLASSⅡINSULATIONRESISTANCEMINIMUM INSULATION RESISTANCE:1,000㏁OR50㏁·㎌PRODUCT WHICHEVER ISSMALLER15MOISTURERESISTANCEAPPEARANCE NO MECHANICAL DAMAGE SHALL OCCUR APPLIED VOLTAGE:RATED VOLTAGETEMPERATURE:40±2℃RELATIVE HUMIDITY:90~95%RHTEST TIME:500+12/-0Hr.CURRENT APPLIED:50㎃MAX.<INITIAL MEASUREMENT>CLASSⅡSHOULD BE MEASUREDINITIAL VALUE AFTER BE HEAT-TREATEDFOR1HR IN150℃+0/-10℃AND BE LEFTFOR48±4HR AT ROOM TEMPERATURE.<LATTER MEASUREMENT>CLASSⅠSHOULD BE MEASURED AFTERLEFT FOR24±2HRS IN ROOMTEMPERATURE AND HUMIDITY.CLASSⅡSHOULD BE MEASUREDLATTER VALUE AFTER BEHEAT-TREATED FOR1HR IN150℃+0/-10℃AND BE LEFT FOR48±4HR AT ROOMTEMPERATURE.CAPACITANCECHARACTERISTIC CAPACITANCE CHANGECLASSⅠWITHIN±7.5%OR±0.75㎊WHICHEVERIS LARGERCLASSⅡA,B WITHIN±12.5%FWITHIN±30%WITHIN+30~-40%1005C>0.47μF1608C>1.0μF2012C>4.7μF3216C>10.0μF3225C>22.0μF4532C>47.0μFQCLASSⅠ30㎊AND OVER:Q≥20030㎊AND BELOW:Q≥100+10/3×CTanδCLASSⅡINSULATIONRESISTANCEMINIMUM INSULATION RESISTANCE:500㏁OR25㏁·㎌PRODUCT,WHICHEVER IS SMALLER.CHAR.25VANDOVER16V10V 6.3V4VA,B0.050.05MAX0.05MAX0.075MAX0.1MAXF0.075MAX0.1MAX(C〈1.0㎌)0.125MAX(C≥1.0㎌)0.15MAX0.195MAX0.25MAXCHAR.25VANDOVER16V10V 6.3V4VA,B0.05MAX0.05MAX0.05MAX0.075MAX0.1MAXF0.075MAX0.1MAX(C〈1.0㎌)0.125MAX(C≥1.0㎌)0.15MAX0.195MAX0.25MAX6.3VTanδ0.125MAX*ConditionCLASSⅡ(A,B)1005C≥0.22㎌1608C≥2.2㎌2012C≥4.7㎌3216C≥10.0㎌3225C≥22.0㎌4532C≥47.0㎌5750C≥100.0㎌6.3V Tanδ0.125MAX*ConditionCLASSⅡ(A,B)1005C≥0.22㎌1608C≥2.2㎌2012C≥4.7㎌3216C≥10.0㎌3225C≥22.0㎌4532C≥47.0㎌5750C≥100.0㎌NO ITEM PERFORMANCE TEST CONDITION16HIGHTEMPERATURERESISTANCEAPPEARANCE NO MECHANICAL DAMAGE SHALL OCCURAPPLIED VOLTAGE:150%,200%OF RATED VOLTAGETEST TIME:1000+48/-0Hr.CURRENT APPLIED:50㎃MAX.<INITIAL MEASUREMENT>CLASSⅡSHOULD BE MEASURED INITIALVALUE AFTER BE HEAT-TREATED FOR1HR IN150℃+0/-10℃AND BE LEFT FOR48±4HR AT ROOM TEMPERATURE.<LATTER MEASUREMENT>CLASSⅠSHOULD BE MEASURED AFTERLEFT FOR24±2HRS IN ROOMTEMPERATURE AND HUMIDITY.CLASSⅡSHOULD BE MEASURED LATTERVALUE AFTER BE HEAT-TREATED FOR1HR IN150℃+0/-10℃AND BE LEFT FOR48±4HR AT ROOM TEMPERATURE.(TWICE OF RATED VOLTAGE WILL BEAPPLIED TO ALL SERIES BUT ABOVE)**HOWEVER,A/B는1005C≥0.22㎌SEE(FIG.3)CAPACITANCECHARACTERISTIC CAP.CHANGECLASSⅠWITHIN±3%OR±0.3㎊,WHICHEVER IS LARGERCLASSⅡA,B WITHIN±12.5%FWITHIN±30%WITHIN+30~40%1005C>0.47μF1608C>1.0μF2012C>4.7μF3216C>10.0μF3225C>22.0μF4532C>47.0μFQCLASSⅠ30㎊AND OVER:Q≥35010~30㎊:Q≥275+2.5×CLESS THAN10㎊:Q≥200+10×CTanδCLASSⅡINSULATIONRESISTANCEMINIMUM INSULATION RESISTANCE:1,000㏁OR50㏁·㎌PRODUCTWHICHEVER IS SMALLER17TEMPERATURECYCLEAPPEARANCE NO MECHANICAL DAMAGE SHALL OCCUR CAPACITORS SHALL BE SUBJECTEDTO FIVE CYCLES OF THETEMPERATURE CYCLE AS FOLLOWINGSTEP TEMP.(℃)TIME(MIN)1MIN.RATEDTEMP.+0/-3302252~33MAX.RATEDTEMP.+3/-0304252~3MEASURE AT ROOM TEMPERATUREAFTER COOLING FORCLASSⅠ:24±2Hr.CLASSⅡ:48±4Hr.CAPACITANCECHARACTERISTIC CAP.CHANGECLASSⅠWITHIN±2.5%OR±0.25㎊WHICHEVER ISLARGERCLASSⅡA,B WITHIN±7.5%F WITHIN±20%QCLASSⅠ30㎊AND OVER:Q≥1000LESS THAN30㎊:Q≥400+20×CTanδCLASSⅡTO SATISFY THE SPECIFIEDINITIAL VALUEINSULATIONRESISTANCETO SATISFY THE SPECIFIEDINITIAL VALUECHAR.25VANDOVER16V10V 6.3V4VA,B0.05MAX0.05MAX0.05MAX0.075MAX0.1MAXF0.075MAX0.1MAX(C<1.0㎌)0.125MAX(C≥1.0㎌)0.15MAX0.195MAX0.25MAXCHAR.TEMP.CLASSⅠ125±3℃CLASSⅡA85±3℃B125±3℃F85±3℃*150%Authorization ConditionsCLASSⅡ(A,B,F)1005C>0.47μF1608C≥2.2㎌2012C≥4.7㎌3216C≥10.0㎌3225C≥22.0㎌4532C≥47.0㎌5750C≥100.0㎌■CHARACTERISTIC GRAPH▶CAPACITANCE CHANGE -AGING▶CAPACITANCE -DC VOLTAGE CHARACTERISTICS▶CAPACITANCE -TEMPERATURE CHARACTERISTICS●ELECTRICAL CHARACTERISTICS■APPLICATION MANUAL●Storage Condition▶Storage EnvironmentThe electrical characteristics of MLCCs were degraded by the environment of high temperature or humidity.Therefore,the MLCCs shall be stored in the ambient temperature and the relative humidity of less than40℃and70%,respectively.Guaranteed storage period is within6months from the outgoing date of delivery.▶Corrosive GasesSince the solderability of the end termination in MLCC was degraded by a chemical atmosphere such as chlorine,acid or sulfide gases,MLCCs must be avoid from these gases.▶Temperature FluctuationsSince dew condensation may occur by the differences in temperature when the MLCCs are taken out of storage,it is important to maintain the temperature-controlled environment.●Design of Land PatternWhen designing printed circuit boards,the shape and size of the lands must allow for theproper amount of solder on the capacitor.The amount of solder at the end terminations has a direct effect on the crack.The crack in MLCC will be easily occurred by the tensile stress which was due to too much amount of solder.In contrast,if too little solder is applied,the termination strength will be e the following illustrations as guidelines for proper land design.Recommendation of Land Shape and Size●AdhesivesWhen flow soldering the MLCCs,apply the adhesive in accordance with the following conditions.▶Requirements for AdhesivesThey must have enough adhesion,so that,the chips will not fall off or move during thehandling of the circuit board.They must maintain their adhesive strength when exposed to soldering temperature.They should not spread or run when applied to the circuit board.They should harden quickly.They should not corrode the circuit board or chip material.They should be a good insulator.They should be non-toxic,and not produce harmful gases,nor be harmful when touched.▶Application MethodIt is important to use the proper amount of adhesive.Too little and much adhesive will cause poor adhesion and overflow into the land,respectively.▶Adhesive hardening CharacteristicsTo prevent oxidation of the terminations,the adhesive must harden at160℃or less,within2minutes or less.●Mounting▶Mounting Head PressureExcessive pressure will cause crack to MLCCs.The pressure of nozzle will be300g maximum during mounting.▶Bending StressWhen double-sided circuit boards are used,MLCCs first are mounted and soldered onto one side of the board.When the MLCCs are mounted onto the other side,it is important to support the board as shown in the illustration.If the circuit board is not supported,the crack occur to the ready-installed MLCCs by the bending stress.●FluxAlthough the solderability increased by the highly-activated flux,increase of activity in flux may also degrade the insulation of the chip capacitors.To avoid such degradation,it is recommended that a mildly activated rosin flux(less than0.2%chlorine)be used.●SolderingSince a multilayer ceramic chip capacitor comes into direct contact with melted solder during soldering,it is exposed to potentially mechanical stress caused by the sudden temperature change.The capacitor may also be subject to silver migration,and to contamination by the flux.Because of these factors,soldering technique is critical.▶Soldering MethodsMethodClassificationReflow soldering-Overall heating-Infrared rays -Hot plate-VPS(vapor phase)-Local heating-Air heater -Laser-Light beamFlow soldering-Single wave -Double wave-*We recommend the reflow soldering method.▶Soldering ProfileTo avoid crack problem by sudden temperature change,follow the temperature profile in the adjacentgraph.30025020015010050℃Reflow Soldering 30025020015010050℃60~120sec 3~4secFlow Soldering▶Manual SolderingManual soldering can pose a great risk of creating thermal cracks in chip capacitors.The hotsoldering iron tip comes into direct contact with the end terminations,and operator's carelessnessmay cause the tip of the soldering iron to come into direct contact with the ceramic body of the capacitor.Therefore the soldering iron must be handled carefully,and close attention must be paid to the selection of the soldering iron tip and to temperature control of the tip.▶Amount ofSolder▶CoolingNatural cooling using air is recommended.If the chips are dipped into solvent for cleaning, the temperature difference(△T)must be less than100℃6-6.CleaningIf rosin flux is used,cleaning usually is unnecessary.When strongly activated flux is used, chlorine in the flux may dissolve into some types of cleaning fluids,thereby affecting the chip capacitors.This means that the cleaning fluid must be carefully selected,and should always be new.▶Notes for Separating Multiple,Shared PC Boards.A multi-PC board is separated into many individual circuit boards after soldering has been completed.If the board is bent or distorted at the time of separation,cracks may occur in the chip capacitors.Carefully choose a separation method that minimizes the bending of the circuit board.■CROSS REFERENCEP/N COMPANY SAMSUNG AVX JOHANSON KEMET KYOCERA MURATA NOVACAP PANASONIC ROHMTAIYO-YUDENTDK VITRAMON①COMPANY MODEL(MLCC)CL--C CM GRM-ECJ MCH MK C VJ②SIZE (EIA/JIS)0201(0603)03---0333-Z-0630603-0402(1005)050402R0704020536040201510510050402 0603(1608)100603R14060310539060311810716080603 0805(2012)210805R1508052140080522121220120805 1206(3216)311206R181********-6120633131632161206 1210(3225)321210S4112103242-2121043232532251210 1808(4520)421808R29180842-1808---45201808 1812(4532)431812S4318124343-21812-4343245321812 2220(5750)55--22205544-12221--5505650-③TEMPERATURE CHARACTERISTIC COG(NPO)C A N G CG COG/CH N C A C COG/CH A P2H(N150)P S--P P2H-P-P PH-R2H(N220)R1--R R2H-R-R RH-S2H(N330)S3--S S2H-S-S SH-T2H(N470)T O--T T2H-T-T TH-U2J(N750)U Z--U U2J-U UJ U UJ-S2L L Y--SL SL-G SL SL SL-X7R B C W R(X)X7R X7R B B C BJ X7R(B)Y(X) Z5U E E Z U-Z5U Z-E-Z5U U Y5V F G Y V Y5V Y5V Y F F F Y5V-④NOMINAL CAPACITANCE EX)103=10,000㎊221=220㎊225=2,200,000㎊=2.2㎌1R5=1.5㎊010=1㎊⑤CAPACITANCE TOLERANCE B:±0.1㎊C:±0.25㎊D:±0.5㎊F:±1%G:±2%J:±5%K:±10%M:±20%Z:-20~+80%⑥RATED VOLTAGE6.3V Q6-906 6.3-0J-J0J-10V P Z10081010-1A4L1A-16V O Y160416161601C3E1C J 25V A3250325252501E2T1E X 50V B5500550505001H5U1H A 100V C110111*********A1-2A B 200V D220122002002012D---C 250V E V--250250251---2E-500V G7501-500500501----E 630V H---630630----2J-1000V I A102-10001K102---3A G 2000V J G202-20002K202---3D-3000V K H302-30003K302---3F H 4000V-J-4000-402-----⑦TERMINATIONNICKEL BARRIER N T V C A(GRM)N-(MCH)--X Ag/Pd P1--B(GR)P-(MC)--F⑧PACKAGEBULK(VINYL)B9(NONE)-B PB*X-B B B PAPER TAPING C2,4T,R-T,L PT T E,V,W K,L T T C,P PLASTIC TAPING E1,3E,U-H,N PT-F,Y P,Q T-T,R BULK CASE P7--C PC-C C--G。
三星电容规格书1. 引言本规格书旨在介绍三星电容的详细规格和特性。
三星电容是一种高质量、可靠性强的电子元件,广泛应用于各种电路和设备中。
本文将从技术参数、材料特性、封装形式以及应用领域等方面对三星电容进行全面介绍。
2. 技术参数2.1 电容值三星电容提供多种不同的电容值,范围从几皮法到数百微法。
具体的电容值取决于产品型号和系列。
2.2 额定电压每个三星电容都有一个额定电压,表示其能够承受的最大工作电压。
额定电压可以从几伏到数百伏不等。
2.3 容差三星电容的容差指标表明了其实际值与标称值之间的允许偏差范围。
常见的容差包括±5%、±10%等。
2.4 工作温度范围三星电容适用于不同的工作温度范围,常见的工作温度范围包括-40℃至+85℃、-55℃至+125℃等。
2.5 极性部分三星电容是极性电容,需要按照正确的极性连接。
而非极性电容则不受极性限制。
3. 材料特性3.1 介质材料三星电容的介质材料通常采用高质量的聚合物或陶瓷材料。
这些材料具有良好的绝缘性能和稳定性,以确保电容的长期可靠运行。
3.2 极板材料三星电容的极板通常采用优质金属,如铝或钽。
这些金属具有良好的导电性和耐腐蚀性,以确保电容在工作中能够提供稳定可靠的电流传输。
3.3 封装材料三星电容的封装材料通常采用环保型塑料或金属外壳。
这些封装材料具有良好的机械强度和耐高温特性,以保护内部元件并提供稳定的外部连接。
4. 封装形式4.1 表面贴装型(SMD)三星电容可提供表面贴装型封装,方便在PCB上进行自动化焊接。
常见的封装形式有0805、1206、1210等,具体尺寸取决于电容的电容值和额定电压。
4.2 插件型三星电容也可提供插件型封装,适用于手工焊接或特殊应用场景。
插件型封装通常具有引脚,可直接插入PCB或插座中。
5. 应用领域5.1 通信设备三星电容广泛应用于各种通信设备,如手机、无线路由器、基站等。
其高质量和稳定性能确保了通信设备的可靠运行和优秀的信号传输质量。