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第六章Verilog的数据类型及逻辑系统学习内容：•学习Verilog逻辑值系统•学习Verilog中不同类的数据类型•理解每种数据类型的用途及用法•数据类型说明的语法Verilog采用的四值逻辑系统’0’, Low, False, Logic Low, Ground,VSS,Negative Assertion‘1’, High, True, Logic High, Power,VDD, VCC, Positive Assertion’X’ Unknown: Occurs at Logical Which Cannotbe Resolved ConflictHiZ, High Impedance, Tri-Stated,Disabled Driver (Unknown)主要数据类型Verilog主要有三类(class)数据类型：•net （线网）: 表示器件之间的物理连接•register （寄存器）：表示抽象存储元件•parameters(参数) : 运行时的常数(run-time constants)net（线网）net需要被持续的驱动，驱动它的可以是门和模块。
当net驱动器的值发生变化时，Verilog自动的将新值传送到net上。
在例子中，线网out由or门驱动。
当or门的输入信号置位时将传输到线网net上。
•有多种net 类型用于设计(design-specific)建模和工艺(technology-specific)建模•没有声明的net 的缺省类型为1 位(标量)wire 类型。
但这个缺省类型可由下面的编译指导改变：`default_nettype <nettype>net 类型功能wire, trisupply1, supply0wor, triorwand, triandtriregtri1, tri0标准内部连接线(缺省)电源和地多驱动源线或多驱动源线与能保存电荷的net 无驱动时上拉/下拉综合编译器不支持的net 类型•wire类型是最常用的类型，只有连接功能。
