FDEQUI-084 AI SMT New Program Input Procedure AI SMT 新机种导入程序

Pro face错误报警代码pro-face错误报警代码史趋势图)等。

检查地址时，请从gp-proex的[系统设置]窗口选择[外接设备列表]，然后查看[控制器/plc管理地址列表]。

5.3.13[系统设置]-[外接设备列表]设置指南如果错误仅出现在某些特定画面中，请通过特定画面中运行的函数来检查地址。

*2掌控继续执行或暂停通讯读取的位地址的设置范围就是内部控制器地址的ls9550至ls9557。

从十一位0已经开始的每个控制器/plc地址，将被依次分配给每个驱动程序的控制器/plc(从第一个设备开始)。

比如，您可以将掌控驱动程序1的第1个至第16个设备的通讯读取的位地址设置为ls9550。

ls9550位0:启动/停止驱动程序1的第一个plc的扫描。

通过将位0复置on，暂停驱动程序1的第一个plc的读取(读取第一关)。

将位0复置off则再次已经开始读取。

如果为设备指定了系统区起始地址，则您不能停止对该设备的通讯扫描。

但是，如果您没有使用系统数据区，则可以停止通讯扫描。

5.3.6[系统设置]-[主机]-[系统区]设置指南在有些控制器/plc上，可以将ls区的地址设置为32位。

此时，使用低16位作为控制通讯扫描的位地址。

当关闭通讯扫描时，所显示部件的数据仍将保留。

但是，如果您切换画面后再次显示该画面，将不显示部件数据。

以raaa结尾的错误(应用程序错误)错误代码错误消息原因及解决方法参照34.2.1usb传输-从pc传输到人机界面(发送)34.3.1传输-从pc传输至人机界面(传送)raaa001noprojectdataexists.(transfer工程文件不存有。

aproject.)恳请传输一个工程。

raaa002工程数据大小少于最小容量*。

或者，画面数量超过了16000个文件。

请参阅中的gp-proextheprojectdatasizeexceeds工程信息，保证它不少于总容thecapacity.量。

Chapter 7:External Memory Interfaces in Arria II DevicesMemory Interfaces Pin Support for Arria II Devicesf For more information about pin location requirements, which pins to use as memoryclock pins, and pin connections between an Arria II device and an external memorydevice, refer to Section I. Device and Pin Planning in volume 2 of the External MemoryInterface Handbook.Memory clock pins in Arria II devices are generated with a DDIO register going todifferential output pins (refer to Figure7–3), marked in the pin table with DIFFIN orDIFFIO_RX prefixes (Arria II GX devices) and DIFFOUT, DIFFIO_TX, or DIFFIO_RXprefixes (Arria II GZ devices). These pins support the differential output function andyou can use them as memory clock pins.Figure7–3.Memory Clock Generation for Arria II Devices(Note1)Notes to Figure7–3:(1)Global or regional clock networks are required for memory output clock generation to minimize jitter.(2)The mem_clk[0] and mem_clk_n[0] pins for DDR3, DDR2, and DDR SDRAM interfaces use the I/O input buffer for feedback; therefore,bidirectional I/O buffers are used for these pins. For memory interfaces with a differential DQS input, the input feedback buffer is configured as differential input; for memory interfaces using a single-ended DQS input, the input buffer is configured as a single-ended input. Using a single-ended input feedback buffer requires that the I/O standard’s V REF voltage is provided to that I/O bank’s VREF pins.Arria II devices offer differential input buffers for differential read-data strobe andclock operations. In addition, Arria II devices also provide an independent DQS logicblock for each CQn pin for complementary read-data strobe and clock operations. Inthe Arria II pin tables, the differential DQS pin pairs are denoted as DQS and DQSnpins, and the complementary CQ signals are denoted as CQ and CQn pins. DQSn andCQn pins are marked separately in the pin table. Each CQn pin connects to a DQSlogic block and the shifted CQn signals go to the negative-edge input registers in theDQ IOE registers.1Use differential DQS signaling for DDR2 SDRAM interfaces running at 333MHz.DQ pins can be bidirectional signals, as in DDR3, DDR2, and DDR SDRAM, andRLDRAM II common I/O (CIO) interfaces or unidirectional signals, as in QDR II+,QDR II SRAM, and RLDRAM II separate I/O (SIO) devices. Connect theunidirectional read-data signals to Arria II DQ pins and the unidirectional write-datasignals to a different DQ/DQS group than the read DQ/DQS group. The write clocksmust be assigned to the DQS/DQSn pins associated to this write DQ/DQS group. Donot use the CQ/CQn pin-pair for write clocks.1Using a DQ/DQS group for the write-data signals minimizes output skew and allows vertical migration. Arria II GX devices do not support vertical migration withArria II GZ devices.Arria II Device Handbook Volume 1: Device Interfaces and IntegrationChapter 6:I/O Features in Arria II DevicesTermination Schemes for I/O Standardsmini-LVDSArria II GX devices support true mini-LVDS with a three-resistor network using twosingle-ended output buffers for external three-resistor networks.For Arria II GZ devices, use two single-ended output buffers with external one- orthree-resistor networks (mini-LVDS_E_1R or mini-LVDS_E_3R). Arria II GZ row I/Obanks support mini-LVDS output using true LVDS output buffers without an externalresistor network.Figure6–18 shows the one-resistor and three-resistor topology for RSDS andmini-LVDS I/O standard termination.Figure6–18.RSDS and mini-LVDS I/O Standard Termination for Arria II Devices(Note1)Notes to Figure6–18:(1)R p = 170 Ω and R s= 120 Ω(2)mini-LVDS_E_1R is applicable for Arria II GZ devices only.A resistor network is required to attenuate the LVDS output-voltage swing to meetRSDS and mini-LVDS specifications. You can modify the three-resistor networkvalues to reduce power or improve the noise margin. The resistor values chosenshould satisfy the equation shown in Equation6–1.Equation6–1.Resistor Network1To validate that custom resistor values meet the RSDS requirements, Alterarecommends performing additional simulations with IBIS models.f For more information about the RSDS I/O standard, refer to the RSDS Specificationfrom the National Semiconductor website at .f For more information about the mini-LVDS I/O standard, see the mini-LVDSSpecification from the Texas Instruments website at .Arria II Device Handbook Volume 1: Device Interfaces and IntegrationChapter 6:I/O Features in Arria II DevicesArria II OCT CalibrationArria II OCT CalibrationArria II GX devices support calibrated R S OCT and Arria II GZ devices supportcalibrated R S and R T OCT on all I/O pins. You can calibrate the I/O banks with any ofthe OCT calibration blocks available in the device provided the V CCIO of the I/O bankwith the pins using calibrated OCT matches the V CCIO of the I/O bank with thecalibration block and its associated RUP and RDN pins.f For more information about the location of the OCT calibration blocks in Arria IIdevices, refer to the Arria II Device Family Connection Guidelines and Arria II DevicePin-Outs.OCT Calibration BlockAn OCT calibration block has the same V CCIO as the I/O bank that contains the block.R S OCT calibration is supported on all user I/O banks with different V CCIO voltagestandards, up to the number of available OCT calibration blocks. You can configureI/O banks to receive calibrated codes from any OCT calibration block with the sameV CCIO. All I/O banks with the same V CCIO can share one OCT calibration block, even ifthat particular I/O bank has an OCT calibration block.For example, Figure6–10 shows a group of I/O banks that has the same V CCIOvoltage. If a group of I/O banks has the same V CCIO voltage, you can use one OCTcalibration block to calibrate the group of I/O banks placed around the periphery.Because banks 3B, 4C, 6C, and 7B have the same V CCIO as bank 7A, you can calibrateall four I/O banks (3B, 4C, 6C, and 7B) with the OCT calibration block (CB7) locatedin bank 7A. You can enable this by serially shifting out R S OCT calibration codes fromthe OCT calibration block located in bank 7A to the I/O banks located around theperiphery.1I/O banks that do not contain calibration blocks share calibration blocks with I/O banks that do contain calibration blocks.Arria II Device Handbook Volume 1: Device Interfaces and Integration。

第1共13页页ATM8F8040数据手册版本号更新时间更新内容V1.02020-09-05V1.0正式版本发布V1.12020-09-16V1.1版本发布，修正DNL参数V1.22020-12-10统一数据手册和应用手册的关于T2CAP的描述V1.32021-3-1增加16脚SOP16封装信息V1.42021-3-8更新IDD2测试条件第2页1.主要特色CPU 特性通信8位1T 8051内核支持两路UART 支持1/2/4/8系统分频模拟模块支持双DPTR 支持12路12位ADC 支持双线调试支持上电复位ROM支持低压复位16K 字节FLASH（擦写寿命1000次）时钟128字节EEPROM（擦写寿命10000次）内部时钟频率最高到32MHz，1%精度数据保持时间：10年内部时钟32KHz 低频振荡器RAM支持外部1-20MHz 晶振256字节内部IRAM 工作模式512字节外部XRAM 正常模式GPIO待机模式（IDLE）最多支持18个GPIO 停机模式（Stop），最小电流<1uA 支持任意端口变化中断工作条件Timer/PWM工作频率：最大32MHz 16位8051标准定时器T0/T1工作电压： 2.7~5.5V 带捕获和可编程输出的16位定时器T2工作温度：-40℃~85℃7路16位带互补输出PWM 输出模块封装唤醒Timer 20-TSSOP 看门狗定时器20-QFN 4x4SOP16其他CRC16循环冗余检测模块可配置逻辑计算单元（CPL）外部晶振停振检测1.主要特色 (2)2.概述 (4)2.1.说明 (4)2.2.应用方向 (4)3.设计框图 (4)4.引脚分布图 (5)5.封装尺寸图 (7)5.1.20-TSSOP (7)5.2.20-QFN (8)5.3.SOP16 (9)6.电气特性 (10)6.1.极限参数 (10)6.2.DC特性 (10)6.3.ADC特性 (11)6.4.内部高频振荡器特性 (11)6.5.内部低频振荡器特性 (11)6.6.外部振荡器特性 (12)6.7.存储器工作特性 (12)6.8.外部复位及中断管脚特性 (12)7.芯片选型 (13)2.概述2.1.说明ATM8F8040是一款内嵌16K字节FLASH的8位单片机。

Calibration Services OverviewWith National Instruments Calibration Services,you can have confidence in your measurements andkeep your measurement devices operating in peakprecision.NI recommends that you externallycalibrate most of your measurement hardwareannually,or at intervals recommended in theproduct’s specification.What Is Calibration?Calibration determines the error associated witha measurement,and,if possible,reduces that error.This means that calibration is more than just adjusting themeasurement capability of a device.Instead,the calibrationprocess includes three parts:•Verifying that the measurement capability of the measurement device is within specification•Adjusting the device to reduce its measurement error •Verifying the new measurement capability of the deviceto ensure that it is operating within specificationsInternational committees have created calibration guidelines to ensure procedural consistency and calibration acceptance among companies and countries.Benefits of CalibrationCalibration improves your measurement accuracy and ensures that your product meets its required specifications.Calibration also provides a number of other benefits,such as:•Increased production yields•Overall measurement consistency•Standardization of qualityTo maintain your measurement accuracy,you must calibrate your measurement device at set intervals.External Calibration and Self-CalibrationY ou can externally calibrate all National Instruments measurement products and self-calibrate many of them.With external calibration, you can ensure that measurement accuracy is traceable to a known standard.External calibration requires the use of high-precision calibration standards.Metrology laboratories or other facilities maintain traceable standards for this type of calibration.Through self-calibration,you adjust the measurement device for use in environments other than those in which it was externally calibrated. In essence,self-calibration acts as the autocalibration or autozero found on benchtop instruments.System CalibrationEven if all of your measurement components are properly calibrated, your system still can have uncertainties associated with cabling and transducers.You can reduce these uncertainties by performing a system calibration.Also known as end-to-end calibration,system calibration is a software compensation method to remove system errors from measurements.By applying a known source to the input of your measurement system and taking readings,you can quickly determine the correction factor to apply to future measurements. System calibration does not replace the need to externally calibrate each component of your system according to the recommended calibration time interval of each component.You can perform a system calibration on any computer-based system you have. For more information on how to perform a system calibration, visit /calibration.Calibration CertificatesNational Instruments ships all hardware products with a Certificate of Conformance.This certificate states that the product has been tested and meets all of its performance standards.In addition,for many products NI provides an online Basic Calibration Certificate. The Basic Calibration Certificate provides NIST-traceable documentation and states that the calibration process conforms to relevant ISO 9002 clauses.You can view your Basic Calibration Certificate at /calibration.If you need a higher level of certification or detailed calibration data,NI can supply ANSI/NCSL Z540-1-compliant certificates for selected products.Calibration Services2National Instruments •Tel: (800) 813 3693•***********•National Instruments and Calibration ServicesNI offers two levels of calibration services – Basic Calibration Service and Detailed Calibration Service.Both are traceable to national and international standards.For situations requiring ANSI Z540compliance,or detailed calibration data,you can purchase Detailed Calibration Service.Simply return your measurement device to National Instruments and order the service as needed or on a regularly scheduled basis.Basic Calibration ServiceDepending on your calibration requirements,you can return your measurement product for basic,traceable recalibration.NI provides an online Basic Calibration Certificate stating that the calibration process conforms to relevant ISO 9002 clauses.Detailed Calibration ServiceInternational committees have created calibration guidelines,such as ANSI/NCSL Z540-1,to ensure acceptable calibration verification and adjustment between companies and countries.For situations requiring ANSI Z540 compliance or detailed calibration data,you can purchase Detailed Calibration service.Manual Calibration ProceduresFor metrology laboratories and companies that maintain calibration facilities,NI offers manual calibration procedures for selected products.These procedures eliminate the need to send your product to National Instruments or a metrology laboratory for calibration.However,to use these procedures,you must have a good working knowledge of metrology and access to traceable calibration standards.You can access NI manual calibration procedures at /calibration .Automated CalibrationManual calibration can be time-consuming and costly.The National Instruments Calibration Executive,developed primarily for metrology laboratories,automates the verification and adjustment of your NI products.By using NI Calibration Executive,you easily can automate your calibration operations and benefit from NI technology such as National Instruments LabVIEW,NI-VISA,Interchangeable Virtual Instruments (IVI),andNational Instruments TestStand.Figure 1. To view your basic certificate, visit /calibration .3National Instruments •Tel: (800) 813 3693•***********•Calibration ServicesNI Calibration ExecutiveNational Instruments Calibration Executive provides an integrated software environment for verifying andadjusting NI measurement devices.Calibration Executive is designed using NI LabVIEW,NI-VISA,IVI,and NI TestStand.Additional HardwareCalibration Executive includes all of the software you need for calibrating your NI measurement device.In addition to your calibration instruments,you also need hardware such as adapters,cables,and chassis.Order the appropriate calibration-specific hardware for your measurement device.For a complete list of required NI hardware and recommended calibration instruments,visit /calibration .Contacting NI for Calibration ServicesTo return your product to NI for calibration services,please contact us to obtain pricing,terms of service,and a return material authorization (RMA) for recalibration.If you require calibration services in your local area,NI also offers calibration through metrology laboratories in selected countries.Visit /calibration for a list of applicable products and calibration service providers in your local area.Calibration ServicesBasic Certificate of CalibrationDetailed Certificate of Calibration forhigh-speed digitizers,DSA,DMMs,signal generators,loggers,or analog output products E Series,M Series,and S Series devices SCXI products NI FieldPoint Calibration Executive SoftwareNI Calibration Executive..............................................777608-02Calibration-Specific HardwareCalibration Executive hardware adapterfor E Series,M Series,and S Series devices ............778056-03Calibration Executive hardware adapterfor NI 435x devices ..................................................778031-03FieldPoint FP-TB-CAL calibration base......................777519-90BUY NOW!For complete product specifications,pricing,andaccessory information,call (800) 813 3693 (U.S.only) or go to /calibration .Ordering Information© 2005 National Instruments Corporation. All rights reserved. FieldPoint, LabVIEW, National Instruments, National Instruments Alliance Partner, NI, ,NI TestStand, NI-VISA, and SCXI are trademarks of National Instruments. Other product and company names listed are trademarks or trade names of their respective NI Services and Supportand development through deployment and ongoing maintenance.We offer services and service levels to meet customer requirements in research,design,validation,Visit /services .Training and CertificationNI training is the fastest,most certain route to productivity with our products.NI training can shorten your learning curve,save development time,and reduce maintenance costs over the application life cycle.We schedule instructor-led courses in cities worldwide,or we can hold a course at your facility.We also offer a professional certification program that identifies individuals who have high levels of skill and knowledge on using NI products.Visit /training .Professional ServicesOur Professional Services Team is comprised of NI applications engineers,NI Consulting Services,and a worldwide National Instruments Alliance Partner program of more than 600 independent consultantsand integrators.Services range from start-up assistance to turnkey system integration.Visit /alliance .OEM SupportWe offer design-in consulting and product integration assistance if you want to use our products for OEM applications.For information about special pricing and services for OEM customers,visit /oem .Local Sales and Technical SupportIn offices worldwide,our staff is local to the country,giving you access to engineers who speak your language.NI delivers industry-leading technical support through online knowledge bases,our applications engineers,and access to 14,000 measurement and automation professionals within NI Developer Exchange forums.Find immediate answers to your questions at /support .We also offer service programs that provide automatic upgrades to your application development environment and higher levels of technical support.Visit /ssp .Hardware ServicesNI Factory Installation ServicesNI Factory Installation Services (FIS) is the fastest and easiest way to use your PXI or PXI/SCXI combination systems right out of the box.Trained NI technicians install the software and hardware and configure the system to your specifications.NI extends the standard warranty by one year on hardware components (controllers,chassis,modules) purchased with FIS.To use FIS,simply configure your system online with /pxiadvisor .Calibration ServicesNI recognizes the need to maintain properly calibrated devices for high-accuracy measurements.We provide manual calibration procedures,services to recalibrate your products,and automated calibration software specifically designed for use by metrology laboratories.Visit /calibration .Repair and Extended WarrantyNI provides complete repair services for our products.Express repairand advance replacement services are also available.We offer extended warranties to help you meet project life-cycle requirements.Visit /services .National Instruments • *********** • (800) 813 36932005_5630_812_101_D。

// Pinout://// P2.2 -> LED#include <C8051F340.h> // SFR declarations show at the end of the file#define SYSCLK 12000000/8 // SYSCLK in Hz (12 MHz internal// oscillator / 8)// the internal oscillator has a// tolerance of +/- 2%#define TIMER_PRESCALER 48 // Based on Timer CKCON settings// There are SYSCLK/TIMER_PRESCALER timer ticks per second, so// SYSCLK/TIMER_PRESCALER/1000 timer ticks per millisecond.#define TIMER_TICKS_PER_MS SYSCLK/TIMER_PRESCALER/1000// Note: TIMER_TICKS_PER_MS should not exceed 255 (0xFF) for the 8-bit timer#define AUX1 TIMER_TICKS_PER_MS#define AUX2 -AUX1#define LED_TOGGLE_RATE 100 // LED toggle rate in milliseconds// if LED_TOGGLE_RATE = 1, the LED will// be on for 1 millisecond and off for// 1 millisecond#define TIMER0_RELOAD_HIGH AUX2 // Reload value for Timer0 high bytesbit LED = P2^2; // LED//-----------------------------------------------------------------------------// Function Prototypes//-----------------------------------------------------------------------------void Port_Init (void); // Port initialization routinevoid Timer0_Init (void); // Timer0 initialization routine//-----------------------------------------------------------------------------// main() Routine//-----------------------------------------------------------------------------void main (void){PCA0MD &= ~0x40; // WDTE = 0 (clear watchdog timer// enable)Timer0_Init (); // Initialize the Timer0Port_Init (); // Init PortsEA = 1; // Enable global interruptswhile (1); // Loop forever}//-----------------------------------------------------------------------------// Initialization Subroutines//-----------------------------------------------------------------------------//-----------------------------------------------------------------------------// Port_Init//-----------------------------------------------------------------------------//// Return Value : None// Parameters : None//// This function configures the crossbar and GPIO ports.//// Pinout://// P2.2 -> LED//// all other port pins unused////-----------------------------------------------------------------------------void Port_Init (void){XBR1 = 0x40; // Enable crossbarP2MDOUT = 0x0C; // Set LEDs}//-----------------------------------------------------------------------------// Timer0_Initvoid Timer0_Init(void){TH0 = TIMER0_RELOAD_HIGH; // Init Timer0 High registerTL0 = TH0; // Set the intial Timer0 valueTMOD = 0x02; // Timer0 in 8-bit reload modeCKCON = 0x02; // Timer0 uses a 1:48 prescaler ET0=1; // Timer0 interrupt enabled TCON = 0x10; // Timer0 ON}//-----------------------------------------------------------------------------// Interrupt Service Routines//-----------------------------------------------------------------------------//-----------------------------------------------------------------------------// Timer0_ISR//-----------------------------------------------------------------------------//// Here we process the Timer0 interrupt and toggle the LED when appropriate ////-----------------------------------------------------------------------------void Timer0_ISR (void) interrupt 1{static int counter = 0;if((counter++) == LED_TOGGLE_RATE){LED = ~LED; // Toggle the LEDcounter = 0;}}//-----------------------------------------------------------------------------// End Of File//-----------------------------------------------------------------------------//C8051f340.h//-----------------------------------------------------------------------------#ifndef C8051F340_H#define C8051F340_H//-----------------------------------------------------------------------------// Byte Registers//-----------------------------------------------------------------------------sfr P0 = 0x80; // Port 0 Latchsfr SP = 0x81; // Stack Pointersfr DPL = 0x82; // Data Pointer Lowsfr DPH = 0x83; // Data Pointer Highsfr EMI0TC = 0x84; // EMIF Timingsfr EMI0CF = 0x85; // EMIF Configurationsfr OSCLCN = 0x86; // Internal Low-Freq Oscillator Control sfr PCON = 0x87; // Power Controlsfr TCON = 0x88; // Timer/Counter Controlsfr TMOD = 0x89; // Timer/Counter Modesfr TL0 = 0x8A; // Timer/Counter 0 Lowsfr TL1 = 0x8B; // Timer/Counter 1 Lowsfr TH0 = 0x8C; // Timer/Counter 0 Highsfr TH1 = 0x8D; // Timer/Counter 1 Highsfr CKCON = 0x8E; // Clock Controlsfr PSCTL = 0x8F; // Program Store R/W Controlsfr P1 = 0x90; // Port 1 Latchsfr TMR3CN = 0x91; // Timer/Counter 3Controlsfr TMR3RLL = 0x92; // Timer/Counter 3 Reload Lowsfr TMR3RLH = 0x93; // Timer/Counter 3 Reload Highsfr TMR3L = 0x94; // Timer/Counter 3Lowsfr TMR3H = 0x95; // Timer/Counter 3 Highsfr USB0ADR = 0x96; // USB0 Indirect Address Registersfr USB0DAT = 0x97; // USB0 Data Registersfr SCON0 = 0x98; // UART0 Controlsfr SBUF0 = 0x99; // UART0 Data Buffersfr CPT1CN = 0x9A; // Comparator1 Controlsfr CPT0CN = 0x9B; // Comparator0 Controlsfr CPT1MD = 0x9C; // Comparator1 Mode Selectionsfr CPT0MD = 0x9D; // Comparator0 Mode Selectionsfr CPT1MX = 0x9E; // Comparator1 MUX Selectionsfr CPT0MX = 0x9F; // Comparator0 MUX Selectionsfr P2 = 0xA0; // Port 2 Latchsfr SPI0CFG = 0xA1; // SPI Configurationsfr SPI0CKR = 0xA2; // SPI Clock Rate Controlsfr SPI0DAT = 0xA3; // SPI Datasfr P0MDOUT = 0xA4; // Port 0 Output Mode Configuration sfr P1MDOUT = 0xA5; // Port 1 Output Mode Configuration sfr P2MDOUT = 0xA6; // Port 2 Output Mode Configuration sfr P3MDOUT = 0xA7; // Port 3 Output Mode Configuration sfr IE = 0xA8; // Interrupt Enablesfr CLKSEL = 0xA9; // Clock Selectsfr EMI0CN = 0xAA; // External Memory Interface Control sfr SBCON1 = 0xAC; // UART1 Baud Rate Generator Control sfr P4MDOUT = 0xAE; // Port 4 Output Mode Configuration sfr PFE0CN = 0xAF; // Prefetch Engine Controlsfr OSCXCN = 0xB1; // External Oscillator Controlsfr OSCICN = 0xB2; // Internal Oscillator Controlsfr OSCICL = 0xB3; // Internal Oscillator Calibrationsfr SBRLL1 = 0xB4; // UART1 Baud Rate Generator Lowsfr SBRLH1 = 0xB5; // UART1 Baud Rate Generator High sfr FLSCL = 0xB6; // Flash Scalesfr FLKEY = 0xB7; // Flash Lock and Keysfr IP = 0xB8; // Interrupt Prioritysfr CLKMUL = 0xB9; // Clock Multipliersfr AMX0N = 0xBA; // AMUX0 Negative Channel Select sfr AMX0P = 0xBB; // AMUX0 Positive Channel Selectsfr ADC0CF = 0xBC; // ADC0 Configurationsfr ADC0L = 0xBD; // ADC0 Lowsfr ADC0H = 0xBE; // ADC0 Highsfr SMB0CN = 0xC0; // SMBus Controlsfr SMB0CF = 0xC1; // SMBus Configurationsfr SMB0DAT = 0xC2; // SMBus Datasfr ADC0GTL = 0xC3; // ADC0 Greater-Than Compare Low sfr ADC0GTH = 0xC4; // ADC0 Greater-Than Compare High sfr ADC0LTL = 0xC5; // ADC0 Less-Than Compare Word Low sfr ADC0LTH = 0xC6; // ADC0 Less-Than Compare Word High sfr P4 = 0xC7; // Port 4 Latchsfr TMR2CN = 0xC8; // Timer/Counter 2 Controlsfr REG0CN = 0xC9; // Voltage Regulator Controlsfr TMR2RLL = 0xCA; // Timer/Counter 2 Reload Lowsfr TMR2RLH = 0xCB; // Timer/Counter 2 Reload Highsfr TMR2L = 0xCC; // Timer/Counter 2 Lowsfr TMR2H = 0xCD; // Timer/Counter 2 Highsfr PSW = 0xD0; // Program Status Wordsfr REF0CN = 0xD1; // Voltage Reference Controlsfr SCON1 = 0xD2; // UART1 Controlsfr SBUF1 = 0xD3; // UART1 Data Buffersfr P0SKIP = 0xD4; // Port 0 Skipsfr P1SKIP = 0xD5; // Port 1 Skipsfr P2SKIP = 0xD6; // Port 2 Skipsfr USB0XCN = 0xD7; // USB0 Transceiver Controlsfr PCA0CN = 0xD8; // PCA0 Controlsfr PCA0MD = 0xD9; // PCA0 Modesfr PCA0CPM0 = 0xDA; // PCA0 Module 0 Mode Registersfr PCA0CPM1 = 0xDB; // PCA0 Module 1 Mode Registersfr PCA0CPM2 = 0xDC; // PCA0 Module 2 Mode Registersfr PCA0CPM3 = 0xDD; // PCA0 Module 3 Mode Registersfr PCA0CPM4 = 0xDE; // PCA0 Module 4 Mode Registersfr ACC = 0xE0; // Accumulatorsfr XBR0 = 0xE1; // Port I/O Crossbar Control 0sfr XBR1 = 0xE2; // Port I/O Crossbar Control 1sfr XBR2 = 0xE3; // Port I/O Crossbar Control 2sfr IT01CF = 0xE4; // INT0/INT1 Configurationsfr SMOD1 = 0xE5; // UART1 Modesfr EIE1 = 0xE6; // Extended Interrupt Enable 1sfr EIE2 = 0xE7; // Extended Interrupt Enable 2sfr ADC0CN = 0xE8; // ADC0 Controlsfr PCA0CPL1 = 0xE9; // PCA0 Capture 1 Lowsfr PCA0CPH1 = 0xEA; // PCA0 Capture 1 Highsfr PCA0CPL2 = 0xEB; // PCA0 Capture 2 Lowsfr PCA0CPH2 = 0xEC; // PCA0 Capture 2 Highsfr PCA0CPL3 = 0xED; // PCA0 Capture 3 Lowsfr PCA0CPH3 = 0xEE; // PCA0 Capture 3 Highsfr RSTSRC = 0xEF; // Reset Source Configuration/Status sfr B = 0xF0; // B Registersfr P0MDIN = 0xF1; // Port 0 Input Mode Configuration sfr P1MDIN = 0xF2; // Port 1 Input Mode Configuration sfr P2MDIN = 0xF3; // Port 2 Input Mode Configuration sfr P3MDIN = 0xF4; // Port 3 Input Mode Configuration sfr P4MDIN = 0xF5; // Port 4 Input Mode Configuration sfr EIP1 = 0xF6; // Extended Interrupt Priority 1sfr EIP2 = 0xF7; // Extended Interrupt Priority 2sfr SPI0CN = 0xF8; // SPI0 Controlsfr PCA0L = 0xF9; // PCA0 Counter Lowsfr PCA0H = 0xFA; // PCA0 Counter Highsfr PCA0CPL0 = 0xFB; // PCA0 Capture 0 Lowsfr PCA0CPH0 = 0xFC; // PCA0 Capture 0 Highsfr PCA0CPL4 = 0xFD; // PCA0 Capture 4 Lowsfr PCA0CPH4 = 0xFE; // PCA0 Capture 4 Highsfr VDM0CN = 0xFF; // VDD Monitor Control//-----------------------------------------------------------------------------// Bit Definitions//-----------------------------------------------------------------------------// TCON 0x88sbit TF1 = 0x8F; // Timer1 overflow flagsbit TR1 = 0x8E; // Timer1 on/off controlsbit TF0 = 0x8D; // Timer0 overflow flagsbit TR0 = 0x8C; // Timer0 on/off controlsbit IE1 = 0x8B; // Ext interrupt 1 edge flagsbit IT1 = 0x8A; // Ext interrupt 1 typesbit IE0 = 0x89; // Ext interrupt 0 edge flagsbit IT0 = 0x88; // Ext interrupt 0 type// SCON0 0x98sbit S0MODE = 0x9F; // Serial mode control bit 0// Bit6 UNUSEDsbit MCE0 = 0x9D; // Multiprocessor communication enable sbit REN0 = 0x9C; // Receive enablesbit TB80 = 0x9B; // Transmit bit 8sbit RB80 = 0x9A; // Receive bit 8sbit TI0 = 0x99; // Transmit interrupt flagsbit RI0 = 0x98; // Receive interrupt flag// IE 0xA8sbit EA = 0xAF; // Global interrupt enablesbit ESPI0 = 0xAE; // SPI0 interrupt enablesbit ET2 = 0xAD; // Timer2 interrupt enablesbit ES0 = 0xAC; // UART0 interrupt enablesbit ET1 = 0xAB; // Timer1 interrupt enablesbit EX1 = 0xAA; // External interrupt 1 enablesbit ET0 = 0xA9; // Timer0 interrupt enablesbit EX0 = 0xA8; // External interrupt 0 enable// IP 0xB8// Bit7 UNUSEDsbit PSPI0 = 0xBE; // SPI0 interrupt prioritysbit PT2 = 0xBD; // Timer2 prioritysbit PS0 = 0xBC; // UART0 prioritysbit PT1 = 0xBB; // Timer1 prioritysbit PX1 = 0xBA; // External interrupt 1 prioritysbit PT0 = 0xB9; // Timer0 prioritysbit PX0 = 0xB8; // External interrupt 0 priority// SMB0CN 0xC0sbit MASTER = 0xC7; // Master/slave indicatorsbit TXMODE = 0xC6; // Transmit mode indicatorsbit STA = 0xC5; // Start flagsbit STO = 0xC4; // Stop flagsbit ACKRQ = 0xC3; // Acknowledge requestsbit ARBLOST = 0xC2; // Arbitration lost indicatorsbit ACK = 0xC1; // Acknowledge flagsbit SI = 0xC0; // SMBus interrupt flag// TMR2CN 0xC8sbit TF2H = 0xCF; // Timer2 high byte overflow flagsbit TF2L = 0xCE; // Timer2 low byte overflow flagsbit TF2LEN = 0xCD; // Timer2 low byte interrupt enablesbit T2SOF = 0xCC; // Timer2 start-of-frame capture enable sbit T2SPLIT = 0xCB; // Timer2 split mode enablesbit TR2 = 0xCA; // Timer2 on/off control// Bit1 UNUSEDsbit T2XCLK = 0xC8; // Timer2 external clock select// PSW 0xD0sbit CY = 0xD7; // Carry flagsbit AC = 0xD6; // Auxiliary carry flagsbit F0 = 0xD5; // User flag 0sbit RS1 = 0xD4; // Register bank select 1sbit RS0 = 0xD3; // Register bank select 0sbit OV = 0xD2; // Overflow flagsbit F1 = 0xD1; // User flag 1sbit P = 0xD0; // Accumulator parity flag// PCA0CN 0xD8sbit CF = 0xDF; // PCA0 counter overflow flagsbit CR = 0xDE; // PCA0 counter run control// Bit5 UNUSEDsbit CCF4 = 0xDC; // PCA0 module4 capture/compare flag sbit CCF3 = 0xDB; // PCA0 module3 capture/compare flag sbit CCF2 = 0xDA; // PCA0 module2 capture/compare flag sbit CCF1 = 0xD9; // PCA0 module1 capture/compare flag sbit CCF0 = 0xD8; // PCA0 module0 capture/compare flag// ADC0CN 0xE8sbit AD0EN = 0xEF; // ADC0 enablesbit AD0TM = 0xEE; // ADC0 track modesbit AD0INT = 0xED; // ADC0 converision complete interrupt flag sbit AD0BUSY = 0xEC; // ADC0 busy flagsbit AD0WINT = 0xEB; // ADC0 window compare interrupt flag sbit AD0CM2 = 0xEA; // ADC0 conversion mode select 2sbit AD0CM1 = 0xE9; // ADC0 conversion mode select 1sbit AD0CM0 = 0xE8; // ADC0 conversion mode select 0// SPI0CN 0xF8sbit SPIF = 0xFF; // SPI0 interrupt flagsbit WCOL = 0xFE; // SPI0 write collision flagsbit MODF = 0xFD; // SPI0 mode fault flagsbit RXOVRN = 0xFC; // SPI0 rx overrun flagsbit NSSMD1 = 0xFB; // SPI0 slave select mode 1sbit NSSMD0 = 0xFA; // SPI0 slave select mode 0sbit TXBMT = 0xF9; // SPI0 transmit buffer empty sbit SPIEN = 0xF8; // SPI0 SPI enable//-----------------------------------------------------------------------------// Interrupt Priorities//-----------------------------------------------------------------------------#define INTERRUPT_INT0 0 // External Interrupt 0#define INTERRUPT_TIMER0 1 // Timer0 Overflow#define INTERRUPT_INT1 2 // External Interrupt 1#define INTERRUPT_TIMER1 3 // Timer1 Overflow#define INTERRUPT_UART0 4 // Serial Port 0#define INTERRUPT_TIMER2 5 // Timer2 Overflow#define INTERRUPT_SPI0 6 // Serial Peripheral Interface 0#define INTERRUPT_SMBUS0 7 // SMBus0 Interface#define INTERRUPT_USB0 8 // USB Interface#define INTERRUPT_ADC0_WINDOW 9 // ADC0 Window Comparison #define INTERRUPT_ADC0_EOC 10 // ADC0 End Of Conversion#define INTERRUPT_PCA0 11 // PCA0 Peripheral#define INTERRUPT_COMPARATOR0 12 // Comparator0#define INTERRUPT_COMPARATOR1 13 // Comparator1#define INTERRUPT_TIMER3 14 // Timer3 Overflow#define INTERRUPT_VBUS_LEVEL 15 // VBUS level-triggered interrupt #define INTERRUPT_UART1 16 // Serial Port 1//-----------------------------------------------------------------------------// Header File PreProcessor Directive//-----------------------------------------------------------------------------#endif // #define C8051F340_H//-----------------------------------------------------------------------------// End Of File//-----------------------------------------------------------------------------。

Rev. 0.1 8/09Copyright © 2009 by Silicon LaboratoriesAN4311. IntroductionMicrocontrollers in the C8051F93x-C8051F90x product family are designed to be software compatible with each other. This allows a single code base to be developed which targets MCUs that range from 8 to 64kB in program memory size. Figure 1 shows the various memory size options in the C8051F93x-C8051F90x device family. This porting guide is designed to help the programmer easily port code between devices in the product family or write processor-independent software that can execute on any device in the product family.This porting guide highlights differences between the various MCUs in the product family. Two devices, the C8051F912 and C8051F902, have more features than the rest of the devices in the family. The use of these “plus” features will make the software incompatible with the rest of the devices in the family. These features should only be used if there are no future plans to use the same software on a different device in the product family.2. Key Points⏹Header File Usage : The C8051F93x-C8051F90x family has two header files that may be usedinterchangeably when writing code that targets any device in the product family.⏹Plus Features : ‘F912 and ‘F902 devices are more feature-rich than other devices in the C8051F93x-C8051F90x product family. To maintain codecompatibility across all devices in the product family, the additional “plus” features should not be used.⏹Package : C8051F93x-C8051F90x devices ranging from 8 to 64kB are available in the 24-pin QFNpackage. These devices are pin-for-pin and software compatible with each other.⏹Power : All devices in the C8051F93x-C8051F90x family share the same low power modes and have excellent power efficiency. The ‘F912 and ‘F902 have even more power saving modes than the standard devices in the C8051F93x-C8051F90x family.Relevant DevicesThis application note applies to the following devices:C8051F930, C8051F931, C8051F920, C8051F921, C8051F912, C8051F911, C8051F902, C8051F901Figure 1.C8051F93x-C8051F90x MCU Family Memory Size OptionsAN4313. Package OptionsC8051F93x-C8051F90x devices are available in four package options. Table 1 describes the Flash sizes available in each package option. While the package option has little effect on device functionality, it may affect certain aspects of firmware such as the port initialization code.Note:On the 64kB and 32kB versions of the 24-pin QFNpackage, port match capability is not available on P1.6.4. SimilaritiesThere are many similarities between devices in the C8051F93x-C8051F90x product family. The following list of peripherals have identical behavior between the various devices. Functions or peripherals not listed below have minor differences in implementation between devices in the C8051F93x-C8051F90x family.⏹UART0⏹SPI0 and SPI1⏹IREF0 (when used in 6-bit mode)⏹Comparator 0 and Comparator 1⏹CIP-51⏹Interrupt Handler ⏹Clocking Sources⏹Timer 0, Timer 1, Timer 2, and Timer 3⏹DC-DC Converter (when not using the “plus” features)⏹PCA (when not using the “plus” features)⏹ADC0 (when used in 10-bit mode)5. Plus FeaturesC8051F912 and C8051F902 devices have a set of “plus” features that are not available on other devices in the C8051F93x-C8051F90x product family. These features include:⏹0.9 to 3.6V continuous operating supply voltage.⏹DC-DC converter bypass mode that saves power when the input voltage is higher than the programmed output voltage.⏹12-bit, 75ksps mode on ADC0. 10-bit, 300ksps functionality is retained.⏹SmaRTClock with a built-in low frequency oscillator that only requires 250nA of supply current.⏹Buffered RTC clock output available in active and sleep mode.⏹VBAT Low “warning” indicator with optional interrupt.⏹Wakeup request output signal that can enable an external DC-DC converter or power switch.⏹Ability to disable VBAT Supply Monitor to achieve a sleep mode current of 10nA.6. SFR MapDevices in the C8051F93x-C8051F90x family share the same SFR address locations for most registers. This allows the C8051F930_defs.h and C8051F912_defs.h header files to be used interchangeably in applications that target devices in the C8051F93x-C8051F90x family. It also allows code developed on one device to be executed on any other device in the product family without modification.There are a few minor differences between the C8051F930_defs.h and the C8051F912_defs.h header files. When writing software that targets multiple devices in the C8051F93x-C8051F90x family, the C8051F930_defs.h header file is recommended because it does not contain definitions for the “plus”registers which are only found on the ‘F912 and ‘F902devices. When using this header file, a compiler error will be generated if any of the “plus” registers are used in the software.Table 1. Flash Sizes Available by PackagePackage Available Flash Sizes32-pin QFP 64kB, 32kB 32-pin QFN 64kB, 32kB 24-pin QFN 64kB, 32kB, 16kB, 8kB24-pin QSOP16kB, 8kBAN431Table 2 highlights the registers that are not identical on all devices in the C8051F93x-C8051F90x product family7. Flash MemoryDevices in the C8051F93x-C8051F90x MCU family have in-system programmable Flash memory in various sizes. For 64kB and 32kB devices, Flash memory is organized in 1024 byte pages and the scratchpad size is 1024 bytes. For 16kB and 8kB devices, the Flash memory is organized in 512 byte pages and the scratchpad size is 512 bytes.Flash security works the same way on all devices,however, the location of the lock byte will vary based on Flash size. Check the device datasheet for detailed information on Flash security and the location of the lock byte.When creating applications that program their own Flash such as bootloaders, data loggers, etc., it is possible to write generic Flash management routines that operate on either 512 byte or 1024 byte Flash pages; however, this may not result in the most optimal memory usage. For example, in such a system, the logical Flash page size must be set to 1024 bytes. This can pose limitations on devices with a small Flash size.For example, an 8kB device would only have 8 logical Flash pages. For larger Flash devices that have 1024byte pages, each Flash page must be erased twice in order for the same code to support smaller devices that have 512 bytes per physical Flash page. In most applications, the most efficient method to support various devices is to use conditional compilation to tailor the Flash write/erase routines for each device.8. RAMAll devices in the C8051F93x-C8051F90x family have 256 bytes of RAM mapped to internal DATA/IDATA space and either 4kB (C8051F930/31/20/21) or 512bytes (C8051F912/11/02/01) of RAM mapped to XDATA space. 32-pin devices (C8051F930/20) also have a multiplexed EMIF that supports memory mapping external devices with a 12-bit address space (8kB address range, 4kB on-chip and 4kB off-chip).9. DC-DC ConverterDC-DC converter functionality remains consistent across the C8051F93x-C8051F90x product family.‘F912 and ‘F902 devices support additional “plus”modes that reduce supply current and allow an increased input voltage range. See the C8051F91x-90x data sheet for more information about these modes. All the standard modes are also supported on ‘F912 and ‘F902 devices.Table 2. Select Registers with varying functionRegister NameDescription of differenceRegisters Found only in C8051F930_defs.h EMI0CF EMI0TC Only apply to 32-pin devices. EMIF is not available on 24-pin devices.P2SKIP P2MDINOnly apply to 32-pin devices. On 24-pin devices, P2 does not have Crossbar oranalog functionality.Registers Found only in C8051F912_defs.h PMU0MD DC0MD IREF0CFOnly apply to the ‘F912 and ‘F902. Notavailable on the ‘F911 or ‘F901.Registers with bit differences PCA0MDOn ‘F912 and ‘F902 devices, SmaRT-Clock/8 may be selected as the PCAtimebase.VDM0CNOn ‘F912 and ‘F902 devices, configura-tion bits for the VBAT supply monitor can be used to enable a VBAT low “earlywarning” interrupt.DC0CFOn ‘F912 and ‘F902 devices, bit 7 enables the low power mode for the dc-dc converter. This low power mode is a“plus” feature.ADC0ACOn ‘F912 and ‘F902 devices, bit 7 enables the 12-bit mode for ADC0. The12-bit mode is a “plus” feature.ADC0PWROn ‘F912 and ‘F902 devices, bit 7 enables the low power mode for ADC0. This low power mode is a “plus” feature.Indirect SmaRTClock registers with bit differences RTC0XCNOn ‘F912 and ‘F902 devices, bit 3 enables the SmaRTClock’s internal low frequency oscillator. The LFO is a “plus”feature.RTC0PINOn C8051F930/31/20/21 devices, this register is write only. It is R/W on allother devices.AN43110. Power Management UnitThe recommended procedure for entering and exiting low power modes described in “AN358: Optimizing Low Power Operation of the ‘F9xx” applies to all devices in the C8051F93x-C8051F90x family. When writing code that targets any device in the family, the entire procedure should be followed. When writing code that only targets a single power mode on a single device,some steps in the procedure may be omitted. The steps that may be omitted are outlined in AN358.When porting existing code from C8051F930/31/20/21devices to run on C8051F912/11/02/01 devices, it is important to note that C8051F912/11/02/01 devices require the execution of 4 NOP instructions immediately after waking up from sleep mode.When porting existing code from C8051F912/11/02/01devices to run on C8051F930/31/20/21 devices, it is important to note that C8051F930/31/20/21 devices require the CLKSEL register to contain a value of 0x14when entering suspend or sleep mode and that a dummy write to the FLWR register is required after clearing the Flash one-shot timer BYPASS bit.‘F912 and ‘F902 devices have a PMU0MD register which allows the SmaRTClock oscillator output to be routed to P0.2, a wake-up request signal to be routed to P0.3, or the VBAT supply monitor to be disabled to achieve a sleep mode current as low as 10nA. The PMU0MD register is not available on other devices in the C8051F93x-C8051F90x family.11. SMBusWhen the hardware acknowledge feature is not used,the SMBus peripheral on all devices in the C8051F93x-C8051F90x family behave in an identical manner. If the hardware acknowledge feature is being used, then C8051F930/31/20/21 devices have errata items that need to be addressed with the proper software workaround as described in the C8051F930/31/20/21errata sheet. The errata items do not apply to other devices in the C8051F93x-C8051F90x family, such as the C8051F912/11/02/01, and no software workaround is required to use the hardware acknowledge feature.To write SMBus software that uses hardware acknowledge and is compatible with all devices in the product family, the workaround code should be included. The workaround code will function on devices that do not require the workaround. An example which implements the workaround code can be found in the C8051F93x/2x SMBus examples folder with the following default path:C:\Silabs\MCU\Examples\C8051F93x_92x\SMBus12. IREF0When IREF0 is used in 6-bit mode, behavior is identical on all devices in the C8051F93x-C8051F90x family.‘F912 and ‘F902 devices support a PWM Enhanced Mode which allows the IREF0 precision to be increased using a PCA channel configured to generate a PWM signal. To maintain code compatibility across all devices in the C8051F93x-C8051F90x family, use IREF0 in 6-bit mode.13. PCAThe PCA functions identically across all devices in the C8051F93x-C8051F90x family, with the exception that ‘F912 and ‘F902 devices have the option to select SmaRTClock / 8 as a clock source for the PCA. For code compatibility across all devices in the C8051F93x-C8051F90x family, do not select SmaRTClock / 8 as the clock source for the PCA.14. ADCWhen used in 10-bit mode, the ADC on all devices in the C8051F93x-C8051F90x family behaves in the same way. ‘F912 and ‘F902 devices have an additional 12-bit mode that may be used to increase ADC resolution. The maximum SAR clock on C8051F912/11/02/01devices may be higher than the maximum SAR clock for C8051F930/31/20/21 devices. For code compatibility across all devices in the C8051F93x-C8051F90x family,use the ADC in 10-bit mode with the maximum SAR clock frequency specified for the C8051F930/31/20/21devices.15. SmaRTClockThe SmaRTClock behaves the same on all devices in the C8051F93x-C8051F90x when used with an external 32.768kHz crystal. When used without a crystal (in self-oscillate or LFO mode), then there are differences. To short XTAL3 and XTAL4 together on C8051F930/31/20/21 devices, write a value of 0xE7 to the write-only RTC0PIN indirect register. On C8051F912/11/02/01 devices, XTAL3 and XTAL4 can be shorted by reading the value of RTC0PIN, setting the most significant bit (value |= 0x80), then writing back the updated value. On any device, the XTAL3 and XTAL4pins may also be shorted externally using a wire. In this case, the RTC0PIN register does not need to be modified. “F912 and ‘F901 devices also have an LFO mode that has a tighter tolerance than self-oscillate mode. See the C8051F91x-C8051F90x data sheet for details.Silicon Laboratories Inc.400 West Cesar Chavez Austin, TX 78701USASimplicity StudioOne-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux!IoT Portfolio /IoTSW/HW/simplicityQuality/qualitySupport and CommunityDisclaimerSilicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Silicon Labs shall have no liability for the consequences of use of the information supplied herein. This document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any Life Support System without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons.Trademark InformationSilicon Laboratories Inc.® , Silicon Laboratories®, Silicon Labs®, SiLabs® and the Silicon Labs logo®, Bluegiga®, Bluegiga Logo®, Clockbuilder®, CMEMS®, DSPLL®, EFM®, EFM32®, EFR, Ember®, Energy Micro, Energy Micro logo and combinations thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZRadio®, EZRadioPRO®, Gecko®, ISOmodem®, Precision32®, ProSLIC®, Simplicity Studio®, SiPHY®, Telegesis, the Telegesis Logo®, USBXpress® and others are trademarks or registered trademarks of Silicon Labs. ARM, CORTEX, Cortex-M3 and THUMB are trademarks or registered trademarks of ARM Holdings. Keil is a registered trademark of ARM Limited. All other products or brand names mentioned herein are trademarks of their respective holders.。

【STM8】外挂存储器W25Q16好像有⼏张图⽚被强制缩⼩了？看到这篇博客的⼈先对你们说声抱歉，我不知道怎么设置⽂字就可以很长（⽂章宽度的全部），图⽚就只有⽂章宽度的2/3宽度开新分页应该就是原始尺⼨了，这点还是和⼤家说抱歉。

⽂章⾥⾯提到的页编程，就是写数据了，因为这是英⽂直译的结果（PageProgram）为了测试这个外挂Flash存储器，我在淘宝买了⼀个⼩板，3元不到其实也可以直接买芯⽚回来⾃⼰接，反正没⼏个元件这个芯⽚是⽤SPI通讯的我找不到没⽔印的图⽚，暂时先⽤W25Q128的不过他俩板⼦长得⼀模⼀样，元件也⼀样。

除了芯⽚型号板⼦上的LED和电阻串联，上电后LED就亮，没别的意思电容是滤波⽤的，它紧靠芯⽚的VCC引脚另外附上两个链接，这是我之前写的博客，是关于『STM8开发环境』和『STM8 - SPI通讯』，这篇博客的测试基础，是建⽴在STM8上的关于如何接线，SPI通讯这篇博客有提到，如果有需要可以观看SPI相关知识有了，就可以开始了开始之前，还是先介绍⼀下⼤纲【W25Q16芯⽚介绍】：芯⽚命名规则、芯⽚引脚图、引脚功能介绍【W25Q16指令】：官⽅定义的指令，还有时序图介绍【W25Q16初步测试】：执⾏其中⼀个指令（读取芯⽚ID），看看执⾏的效果，以此确认步骤是否正确，如果这⼀步都不正确，就不⽤谈最主要的读和写吧？【W25Q16状态寄存器】：寄存器的⼀些状态，例如芯⽚是不是在忙、是不是处于保护状态、保护的区域、是否可写状态。

等等【W25Q16读、写、擦除】：读、写、擦除相关代码【W25Q16芯⽚介绍】应该很好理解，像W25Q02系列，就是2G的Flash，下⽅的红字也提醒了，这是2G bit，像我们下载的电影、⾳乐，这些都是byte为单位的，设计的时候要考虑⼀下提取码：iq4jW25Q16的引脚如下统⼀说明：前⽅有斜线的/，例如/CS，这个斜线代表低电平使能【/CS】：⽚选引脚，低电平呢芯⽚⼯作，⾼电平芯⽚就罢⼯，当然，别想着⼀劳永逸这种事，直接把它接GND，我就吃到苦头了，这引脚请务必接GPIO【DO】：数据输出【/WP】：写保护，低电平呢只能读，⾼电平就随你读写【GND】：接地【DI】：数据输⼊（接收外来的指令）【CLK】：时钟【/HOLD】：数据暂停控制，低电平代表暂停，⾼电平⼯作，通常⽤于多个设备共享⼀个SPI，如果只有⼀主⼀从，可以把这引脚接VCC 【VCC】：2.7～3.6V另外，这个芯⽚可以⽀持『双输出』和『四输出』，可以提升读数据的速度具体的⽅法是把其他引脚的功能都改为输出（IO1、2、3、4）就好⽐⼤家的车速都⼀样，道路有两条的情况下，⼀定⽐只有⼀条道路，处理车流量来的快在引脚图的上⽅，有芯⽚的介绍，其中会看到104MHz、208MHz、416MHz分别是SPI单输出、双输出和四输出遗憾的是STM8的SPI，最快也只有10MHz左右，想要处理双输出和四输出，是不可能的不过对于我的项⽬来说，这已经⾜够了【W25Q16指令】下⾯介绍写使能的时序图，但是在『W25Q16初步测试』的环节中，会读取JEDEC ID（指令发送0x9F），最终看看W25Q16有没有反馈『⽣产商ID』和『芯⽚ID』给我给下降沿的原因，在介绍引脚图时，⽚选引脚/CS已经说明了，下达每个指令之前，必须给下降沿DI，也就是W25Q16接收的数据，0x06，⽂章往上拉找到指令的图⽚，找对应的位置，0x06就是写使能DO，因为这个指令不需要反馈数据给主机，所以是⾼阻态【W25Q16初步测试】我是透过Uart来打印数据的，图⽚左上有⽰意图⽤⽰意图上的1234来表⽰流程，就是『1 234 234 234 234 234 234 234 234 234 234』234出现了⼗次，因为在『SPI接收中断』⾥⾯，判断count < 10除了第⼀个『2』是指令（0x9F）以外，后⾯所有的『2』全部都是伪字节（0xFE），这是为了制造时钟给从机，在我另⼀篇博客有提到下⾯贴上完整代码，另外附上链接，需要代码的朋友也可以下载提取码：4pbw#include"iostm8s103F3.h"#include "W25Qxx.h"typedef unsigned char u8;typedef unsigned short int u16;typedef unsigned int u32;void UART1_sendchar(unsigned char c);void SPI_sendchar(unsigned char c);u8 count = 0;/* ====================================== *//* ============ 【Uart】init ============ *//* ====================================== */void Init_UART1(void){UART1_CR1 = 0x00;UART1_CR2 = 0x00;UART1_CR3 = 0x00;// 设置波特率，必须注意以下⼏点：// (1) 必须先写BRR2// (2) BRR1存放的是分频系数的第11位到第4位，// (3) BRR2存放的是分频系数的第15位到第12位，和第3位// 到第0位// 例如对于波特率位9600时，分频系数=2000000/9600=208// 对应的⼗六进制数为00D0，BBR1=0D,BBR2=00UART1_BRR2 = 0x00;UART1_BRR1 = 0x0d;UART1_CR2 = 0x2c; // 允许接收，发送，开接收中断}/* ====================================== *//* =========== 【Uart】发送函数 ========= *//* ====================================== */void UART1_sendchar(unsigned char c){while((UART1_SR & 0x80) == 0x00); // 等待发送缓冲区为空UART1_DR = c;}/* ====================================== *//* =========== 【Uart】接收中断 ========= *//* ====================================== */#pragma vector= UART1_R_OR_vector//0x19__interrupt void UART1_R_OR_IRQHandler(void){PC_ODR_ODR4 = 0; // 串⼝收到数据后进⼊中断，先给W25Qxx下降沿，等等透过SPI发送指令SPI_sendchar(UART1_DR); // 发送SPI数据（UART接收到什么就发什么），然后等待SPI中断，实现⾃发⾃收}/* ====================================== *//* ============ 【SPI】init ============= *//* ====================================== */void Init_SPI(void){CLK_PCKENR1 |= 0x02; //打开SPI时钟/*PC6、PC5设置为输出，最⼤10MHz*///PC_DDR = 0x60; // ⽤下⽅⽐较详细的写法//PC_CR1 = 0xe0; // ⽤下⽅⽐较详细的写法//PC_CR2 = 0x60; // ⽤下⽅⽐较详细的写法PC_DDR_DDR4 = 1; // 配置PC4（/CS）端⼝为输出模式PC_CR1_C14 = 1; // 配置PC4（/CS）端⼝为推挽输出模式PC_CR2_C24 = 1; // 配置PC4（/CS）端⼝为⾼速率输出PC_DDR_DDR5 = 1; // 配置PC5（SCK）端⼝为输出模式PC_CR1_C15 = 1; // 配置PC5（SCK）端⼝为推挽输出模式PC_CR2_C25 = 1; // 配置PC5（SCK）端⼝为⾼速率输出PC_DDR_DDR6 = 1; // 配置PC6（MOSI）端⼝为输出模式PC_CR1_C16 = 1; // 配置PC6（MOSI）端⼝为推挽输出模式PC_CR2_C26 = 1; // 配置PC6（MOSI）端⼝为⾼速率输出PC_DDR_DDR7 = 0; // 配置PC7（MISO）端⼝为输⼊模式PC_CR1_C17 = 1; // 配置PC7（MISO）端⼝为弱上拉输⼊模式PC_CR2_C27 = 0; // 禁⽌PC7（MISO）端⼝外部中断SPI_ICR_RXIE = 1; // 开启SPI中断接收// [7]先发MSB// [6]禁⽌SPI// [5][4][3]f_Master / 2// [2]主设备// [1]空闲时SCK保持低电平// [0]数据采样从第⼀个时钟沿开始SPI_CR1 = 0x04; /*MSB、1MHz、主设备、CPOL空闲为低、CPHA第⼀个时钟开始*/// [7]双线单向模式// [6]输⼊使能（只接收模式）// [5]CRC计算禁⽌// [4]下个发送数据来⾃Tx缓冲// [3]保留// [2]全双⼯（同时收发）// [1]使能软件从设备管理（不需要判断硬件CS位，节省⼀个引脚）// [0]主模式SPI_CR2 = 0x03; /*双线单向视距传输、CRC计算禁⽌、软件NSS、主模式*/SPI_CR1_SPE = 1; // 打开SPI}/* ====================================== *//* =========== 【SPI】发送函数 ========== *//* ====================================== */void SPI_sendchar(unsigned char c){while(!(SPI_SR & 0x02)); // 等待发送缓冲区为空SPI_DR = c; // 将发送的数据写到数据寄存器//while(!(SPI_SR & 0x01)); // 等待接收缓冲区⾮空，这是轮询的⽅式，但是我想在中断来处理//UART1_sendchar(SPI_DR);}/* ====================================== *//* =========== 【SPI】接收中断 ========== *//* ====================================== */#pragma vector=SPI_RXNE_vector__interrupt void SPI_RXNE_IRQHandler(void){//RxBuf[cnt++]=SPI_DR;while(!(SPI_SR & 0x01));UART1_sendchar(SPI_DR); // 把SPI接收到的数据，透过UART，传回给USB转TTL⼩板count++;if(count < 10) SPI_sendchar(0xfe); // 发送伪字节else{count = 0;PC_ODR_ODR4 = 1; // 重新置为⾼电平，等待下⼀次的指令}}/* ====================================== *//* ============== 【Main】 ============== *//* ====================================== */main(){Init_UART1();Init_SPI();PC_ODR_ODR4 = 1; // 初始上电给⾼电平，后续W25Qxx在执⾏指令前，再给下降沿asm("rim"); // 开中断，sim为关中断while (1);}【W25Q16状态寄存器】⽂章有点长，再说明⼀个寄存器就好了先上⼀张图，这是状态寄存器⾥的内容下⾯是寄存器内各个『位』的说明，另外『R』代表『只可读』，『W』代表『只可写』，『RW』代表『可读可写』【BUSY】（R）：芯⽚在忙的时候，状态=1，不忙时=0，什么时候在忙呢？执⾏『页编程』『任何⼀种擦除』『写状态』都是，芯⽚忙完这些事会⾃动清0【WEL】（R）：『写保护』位，执⾏写使能后，由芯⽚⾃动置1，芯⽚处于『写保护』时该位=0，写禁⽤状态发⽣在『通电时』『写禁⽌』『页编程』『任何⼀种擦除』和『写状态寄存器』【BP0、1、2】（RW）：这三位决定了需要保护的区域，例如⼀些固件，你不想后续被修改的东西，都可以保护。