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KK74VHC00中文资料

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TECHNICAL DATAKK 74VHC00Quad 2-Input NAND GateKK 74VHC00 is high-speed logic IC made by CMOS technology and designed for use in high-performance calculating systems with a wide supply voltage range. As for operation speed, KK 74VHC00 can be compared with equivalent bipolar ICs based on Schottky TTL and two times surpasses ICs of KK 74НС series.KK 74VHC00 tolerates operation under conditions when voltage on input is exceeded up to 7V without affecting characteristics and IC reliability. This possibility allows to use KK 74VHC00 in radio-electronic devices for interfacing with supply voltages 5V and 3V, eliminate IC failure under supply voltage source emergency outage.Use of output edge shaping block in the microcircuit allows to reduce noise amplitude of noises when switching outputs into the same state simultaneously.Input and output levels of KK 74VHC00 are compatible with CMOS levelsFeatures:• Supply voltage range 2.0 to 5.5 V. • Output current 8 mA.• Low consumption current: 0.2 mkA (typical value) at Та = 25 °С. • Latchup current not less than 300 mA at Та = 85 °С.• Tolerable value of static potential not less than 2000 V as per human body model (HBM) and not less than 200 V as per machine model (ММ). • Ambient operation temperature minus 40 to plus 85°С. • Balanced signal propagation delay.• Ensures voltage exceeding mode on input• Low noise level at the simultaneous switching of outputs in the same state: V OLP = 0.8 V (max).• For pins and functions, compatible with KK 74НС00..KK74VHC00 truth tablePins description in KK74VHC00Absolute maximum conditions*Parameter, unit Symbol Valueminmax Supply voltage, V V CC-0.5 7.0Input voltage, V Vin -0.5 7.0Output voltage, V Vout -0.5 Vcc+0.5VInput diode current, mA Iik – -20Current of common output and supplyoutput, mAIcc – ± 75Output current, mA Iout – ± 25Output diode current, mA Iok – ± 20Dissipated power, mW Pd – 180*Under absolute maximum conditions operation of microcircuit is not guaranteed. Operation isguaranteed under maximum conditionsMaximum conditionsSymbol ValueParameter, unitminmax Supply voltage, V V CC 2.0 5.5Input voltage,V Vin 0 V CCOutput voltage, V Vout 0 V CCOutput current, mA Iout – ± 8.0Input rise and fall time, ns/V at Vcc = (3.3 ± 0.3) Vat Vcc = (5.0 ± 0.5) V t LH, t HL10020DC electrical characteristicsValue25 °C–40 to 85 °CSymbo l Parameter Test conditionsV CC ,V min max min maxUnit 2.01.5 – 1.5 – VV IHHigh input voltage–3.0-5.50.7Vcc– 0.7Vcc –2.0 – 0.5 – 0.5 V IL Low input voltage–3.0-5.5– 0.3Vcc – 0.3Vcc2.0 1.92– 1.9 –3.0 2.92– 2.9 –4.5 4.42– 4.4 – V I = V IH or V IL I O = -50 mkA5.5 5.52– 5.4 –V I = V IH or V IL ; I O = -4 mA3.0 2.58– 2.48 –V OHHigh output voltage V I = V IH or V IL ; I O = -8 mA4.5 3.94– 3.80 –2.0 – 0.09– 0.13.0 – 0.09– 0.14.5 – 0.09– 0.1 V I =V IH orV IL I O = 50 mkA 5.5 – 0.09– 0.1V I = V IH or V IL I O = 4 mA 3.0 – 0.36– 0.44V OLLow output voltage V I = V IH or V IL I O = 8 mA4.5 – 0.36– 0.44I OZ Output current in "off" stateV I = V IH or V IL V O = V CC or 0V 5.5 - ±0.25- ±2.5mkA I I Input current V I = 5.5V or 0V 0 – 5.5- ±0.1- ±1.0I CCConsumption current V I =V CC or 0V5.5 - 4.0 - 40.0AC electrical characteristics (t LH = t HL = 3.0 ns)Value25 °C–40to 85 °CSymbol Parameter Testconditi ons V CC , VC L , pF min max min maxUnit 15- 7.9- 9.5 3.3 ± 0.350 11.4 13.0 155.56.5 t PHL , t PLHPropagation delay time when switching "on", "off" Figure 2 5.0 ± 0.550 7.5 8.5ns C I Input capacity - 5.0 10 -C РDDynamic capacity V I = 0 V orV CC5.0 38 -pFNoise characteristics (C L = 50 pF)ValueSymbol Parameter V CC , V min maxUnit V OLP Positive noise of low output voltage 5.0 - 0.8 V V OLV Negative noise of low output voltage5.0 -0.8 - V IHD Input dynamic high voltage 5.0 3.5 - V ILDInput dynamic low voltage5.0-1.5- Time diagram of input and output pulsesVССGNDVCC0 V。

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74VHC00N_NL资料

74VHC00N_NL资料

74VHC00 — Quad 2-Input NAND GateQuad 2-Input NAND GateFeatures■ High Speed: t PD = 3.7ns (typ.) at T A = 25°C ■ High noise immunity: V NIH = V NIL = 28% V CC (min.) ■ Power down protection is provided on all inputs ■ Low noise: V OLP = 0.8V (max)■ Low power dissipation: I CC = 2µA (max.) at T A = 25°C ■ Pin and function compatible with 74HC00General DescriptionThe VHC00 is an advanced high-speed CMOS 2-Input NAND Gate fabricated with silicon gate CMOS technol-ogy. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is com-posed of 3 stages, including buffer output, which provide high noise immunity and stable output. An input protec-tion circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.Ordering InformationDevice also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.All packages are lead free per JEDEC: J-STD-020B standard.Order NumberPackage NumberPackage Description74VHC00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow74VHC00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC00MTC MTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide74VHC00NN14A14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide元器件交易网Pin DescriptionTruth Table Pin Names DescriptionA n,B n Inputs O n Outputs A B O L L H L H H H L H H H L元器件交易网74VHC00 — Quad 2-Input NAND Gate74VHC00 — Quad 2-Input NAND GateRecommended Operating Conditions (1)The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.Note:1.Unused inputs must be held HIGH or LOW. They may not float.V CC Supply Voltage –0.5V to +7.0V V IN DC Input Voltage –0.5V to +7.0V V OUT DC Output Voltage –0.5V to V CC + 0.5VI IK Input Diode Current –20mA I OK Output Diode Current ±20mA I OUT DC Output Current ±25mA I CC DC V CC /GND Current ±50mAT STG Storage Temperature–65°C to +150°CT LLead Temperature (Soldering, 10 seconds)260°CSymbol ParameterRatingV CC Supply Voltage 2.0V to +5.5V V IN Input Voltage 0V to +5.5V V OUT Output Voltage 0V to V CCT OPR Operating Temperature –40°C to +85°C t r , t fInput Rise and Fall Time, V CC = 3.3V ± 0.3V V CC = 5.0V ± 0.5V0ns/V ∼ 100ns/V 0ns/V ∼20ns/V元器件交易网74VHC00 — Quad 2-Input NAND GateNoise CharacteristicsNote:2.Parameter guaranteed by design.Voltage3.0–5.50.7 x V CC0.7 x V CCV IL LOW Level Input Voltage 2.00.500.50V3.0–5.50.3 x V CC0.3 x V CCV OHHIGH Level Output Voltage2.0V IN = V IH or V ILI OH = –50µA 1.9 2.0 1.9V 3.0 2.9 3.0 2.94.5 4.4 4.54.43.0I OH = –4mA 2.58 2.484.5I OH = –8mA3.943.80V OLLOW Level Output Voltage2.0V IN = V IH or V ILI OL = 50µA 0.00.10.1V3.00.00.10.14.50.00.10.13.0I OL = 4mA 0.360.444.5I OL = 8mA0.360.44I IN Input Leakage Current 0–5.5V IN = 5.5V or GND ±0.1±1.0µA I CCQuiescent Supply Current5.5V IN = V CC or GND2.020.0µASymbolParameterV CC (V)ConditionsT A = 25°CUnitsTyp.LimitsV OLP (2) Quiet Output Maximum Dynamic V OL5.0C L = 50pF 0.30.8V V OLV (2) Quiet Output Minimum Dynamic V OL5.0C L = 50pF –0.3–0.8V V IHD (2) Minimum HIGH Level Dynamic Input Voltage 5.0C L = 50pF 3.5V V ILD (2)Maximum LOW Level Dynamic Input Voltage5.0C L =50pF1.5V元器件交易网74VHC00 — Quad 2-Input NAND GateNote:3.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I CC (opr.) = C PD • V CC • f IN + I CC / 4 (per gate).C L = 50pF 8.011.4 1.013.05.0 ± 0.5C L = 15pF 3.7 5.5 1.0 6.5ns C L = 50pF 5.27.5 1.08.5C IN Input Capacitance V CC = Open41010pF C PDPower Dissipation Capacitance(3)19pF元器件交易网Figure 1. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or LAND PATTERN RECOMMENDATIONNOTES:UNLESS OTHERWISE SPECIFIEDA)THIS PACKAGE CONFORMS TO JEDECMS-012,VARIATION AB,ISSUE C,B)ALL DIMENSIONS ARE IN MILLIMETERS.C)DIMENSIONS DO NOT INCLUDE MOLDFLASH OR BURRS.D)LANDPATTERN STANDARD:SOIC127P600X145-14ME)DRAWING CONFORMS TO ASME Y14.5M-1994F)DRAWING FILE NAME:M14AREV13INDICATOR8°0°SEATING PLANEDETAIL ASCALE:20:1GAGE PLANE 0.25X 45°0.10C CB C AMSEE DETAIL A(0.33)1.270.510.351.75MAX1.501.250.250.100.250.19(1.04)0.900.500.36R0.10R0.100.500.25Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify orFigure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.C.DIMENSIONS ARE EXCLUSIVE OF BURRS,MOLD FLASH,AND TIE BAR EXTRUSIONSF.DRAWING FILE NAME:MTC14REV6R0.09min12.00°TOP&BOTTOM1.00D.DIMENSIONING AND TOLERANCES PER ANSI Y14.5M,1982R0.09minNDPATTERN STANDARD:SOP65P640X110-14M 6.100.45A.CONFORMS TO JEDEC REGISTRATION MO-153,VARIATION AB,REF NOTE 6B.DIMENSIONS ARE IN MILLIMETERSFigure 4. 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.NOTES:UNLESS OTHERWISE SPECIFIEDA)THIS PACKAGE CONFORMS TO JEDEC MS-001VARIATION BAB)ALL DIMENSIONS ARE IN MILLIMETERS.C)DIMENSIONS ARE EXCLUSIVE OF BURRS,MOLD FLASH,AND TIE BAR EXTRUSIONS.D)DIMENSIONS AND TOLERANCES PER ASME Y14.5-1994E)DRAWING FILE NAME:MKT-N14AREV78.127.620.350.203.563.305.33MAX 0.38MIN1.771.140.580.352.543.813.178.82(1.74)subsidiaries,and is not intended to be an exhaustive list of all such trademarks.ACEx ®Build it Now ™CorePLUS ™CROSSVOLT ™CTL™Current Transfer Logic™EcoSPARK ®EZSWITCH™*™®Fairchild®Fairchild Semiconductor ®FACT Quiet Series™FACT ®FAST ®FastvCore ™FlashWriter ®*FPS ™FRFET ®Global Power Resource SM Green FPS ™Green FPS ™e-Series ™GTO ™i-Lo ™IntelliMAX ™ISOPLANAR ™MegaBuck™MICROCOUPLER ™MicroFET ™MicroPak ™MillerDrive™Motion-SPM™OPTOLOGIC ®OPTOPLANAR ®®PDP-SPM™Power220®Power247®POWEREDGE ®Power-SPM ™PowerTrench ®Programmable Active Droop ™QFET ®QS ™QT Optoelectronics ™Quiet Series ™RapidConfigure ™SMART START ™SPM ®STEALTH™SuperFET ™SuperSOT ™-3SuperSOT ™-6SuperSOT ™-8SyncFET™®The Power Franchise ®TinyBoost ™TinyBuck ™TinyLogic ®TINYOPTO ™TinyPower ™TinyPWM ™TinyWire ™µSerDes ™UHC ®Ultra FRFET ™UniFET ™VCX ™*EZSWITCH™and FlashWriter ®are trademarks of System General Corporation,used under license by Fairchild Semiconductor.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY,FUNCTION,OR DESIGN.FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS,NOR THE RIGHTS OF OTHERS.THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,SPECIFICALLY THE WARRANTY THEREIN,WHICH COVERS THESE PRODUCTS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body or (b)support or sustain life,and (c)whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury of the user.2.A critical component in any component of a life support,device,or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status DefinitionAdvance InformationForm First Productionative or In DesignThis datasheet contains the design specifications for productdevelopment.Specifications may change in any manner without notice.PreliminaryThis datasheet contains preliminary data;supplementary data will be published at a later date.Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.74VHC00 — Quad 2-Input NAND Gate。

74HC系列芯片资料

74HC系列芯片资料

74HC00四2输入与非门 国际通用符号 54/7400 , 54/74H00, 54L 00 , 54/74S00 , 54/74LS0074LV00 , 74LVC0074HC02四2输入或非门 国际通用符号54/7402 , 54L 02 , 54/74S02 , 54/74LS02 , 54/74AS02 , 54/74ALS02 , 54/ 74F 02 , 54/74HC02 , 74AC 02 , 54/74HCT02 , 54/74ACT02 , 54/74AHC02 , 54/AHCT02 , 74LV02 , 74LVC0254/74HC00 , 54/ 74AC 00 , 54/74HCT00 54/74ACT00 , 54/74AHC0054/74AHCT00 ,54/74ALS00 , 54/ 74F 00 ,]Y 1A IB 2Y 2A 2B GND74HC04六反相器国际通用符号54/7404 , 54L 04 , 54/74H04 , 54/74S04 , 54/74LS04 , 54/74AS04 , 54/74ALS04 , 54/ 74F 04 , 54/74HCU04 , 54/74HC04 , 54/ 74AC 04 , 54/74HCT04 , 54/74ACT04 , 54/74AHC04 , 54/74AHCT04 , 74LV04 , 74LVC04 , 54/74AHCU04 , 74LVU04 , 74LVCU0474HC08四2输入与门国际通用符号54/7408 , 54/74S08 , 54/74LS08 , 54/74AS08 , 54/74ALS08 , 54/ 74F 08 , 54/74HC08 , 54/74HCT08 , 54/ 74AC08 , 54/74ACT08 , 54/74AHC08 , 54/74AHCT08 , 74LV08 , 74LVC08Y = AB74HC10三3输入与非门国际通用符号54/7410 , 54L 10 , 54/74H10 , 54/74S10 ,54/74LS10 54/74AS10 54/ 74F 10 , 54/74HC10 , 54/ 74AC 10 54/74HCT10 , 54/74ACT10 54/74ALS10 74LV101C 1Y 1C 3 日3A 3¥cP1A IB 2A 2B 2C 2Y GND 74HC20双4输入与非门国际通用符号54/7420 , 54L 20 , 54/74H20 , 54/74S20 54/ 74F 20 , 54/74HC20 , 54/ 74AC 20 ,,54/74LS20 , 54/74AS2054/74HCT20 , 54/74ACT2054/74ALS20¥ = ABCDO2YalrTHliTLir 4ID 1Y GNDV c< 2D 2C \C 2B 2A74HC30 8输入与非门国际通用符号54/7430 , 54L 30 , 54/74H30 , 54/74S30 ,54/74LS30 54/74AS30 54/74ALS30/ = ABCDEFGH.V<x NC H G NC MC Y7—L 1A B C D E F GND74HC32四2输入或门国际通用符号54/7432 , 54/74S32 , 54/74LS32 , 54/74AS32 , 54/74ALS32 , 54/ 74F 32 , 54/74HC32 ,54/ 74AC32 , 54/74HCT32, 54/74ACT32 , 54/74AHC32 , 54/74AHCT32 , 74LV32 , 74LVC32Y = A+BO74HC42 BCD —十进制译码器国际通用符号 54/ 7442A , 54L 42, 54/74LS42, 54/74HC42, 54/74HCT42十选一，在所有无效输入状态下，输出维持高电平。

74HC00(芯片资料)

74HC00(芯片资料)


Molded Dual-In Line Package (N) Order Number MM74HC00N NS Package N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user
VIN e VIH lIOUTl s4 0 mA lIOUTl s5 2 mA IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN e VCC or GND VIN e VCC or GND IOUT e 0 mA
74VHC00M资料

74VHC00M资料

74VHC00QUAD 2-INPUT NAND GATEPRELIMINARY DATAJune 1999s HIGH SPEED:t PD =3.7ns (TYP.)at V CC =5V sLOW POWER DISSIPATION:I CC =2µA (MAX.)at T A =25o C sHIGH NOISE IMMUNITY:V NIH =V NIL =28%V CC (MIN.)s POWER DOWN PROTECTION ON INPUTS sSYMMETRICAL OUTPUT IMPEDANCE:|I OH |=I OL =8mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅t PHLsOPERATING VOLTAGERANGE:V CC (OPR)=2V to 5.5VsPIN AND FUNCTION COMPATIBLE WITH 74SERIES 00s IMPROVED LATCH-UP IMMUNITY sLOW NOISE:V OLP =0.8V(Max.)DESCRIPTIONThe 74VHC00is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology.The internal circuit is composed of 3stagesincluding buffer output,which provide high noiseimmunity and stable output.Power down protection is provided on all inputs and 0to 7V can be accepted on inputs with no regard to the supply voltage.This device can be used to interface 5V to 3V.All inputs and outputs are equipped with protection circuits against static discharge,giving them 2kV ESD immunity and transient excess voltage.PIN CONNECTION AND IEC LOGIC SYMBOLSORDER CODES :74VHC00M 74VHC00TM(Micro Package)T(TSSOP Package)®1/7INPUT EQUIVALENT CIRCUITABSOLUTE MAXIMUM RATINGSSymbol ParameterValue Unit V CC Supply Voltage -0.5to +7.0V V I DC Input Voltage -0.5to +7.0V V O DC Output Voltage -0.5to V CC +0.5V I IK DC Input Diode Current -20mA I OK DC Output Diode Current ±20mA I O DC Output Current ±25mA I CC or I GND DC V CC or Ground Current±50mAT stg Storage Temperature -65to +150o C T LLead Temperature (10sec)300oCAbsolute Maximum Ratingsarethose values beyond which dam age to the device may occur.Functional operation un der these condition is not implied.TRUTH TABLEA B Y L L H L H H H L H HHLPIN DESCRIPTIONPIN No SYMBOL NAME AND FUNCTION 1,4,9,121A to 4A Data Inputs 2,5,10,131B to 4B Data Inputs 3,6,8,111Y to 4Y Data Outputs 7GND Ground (0V)14V CCPositive Supply VoltageRECOMMENDED OPERATING CONDITIONSSymbol ParameterValue Unit V CC Supply Voltage 2.0to 5.5V V I Input Voltage 0to 5.5V V O Output Voltage 0to V CC VT op Operating Temperature-40to +85oCdt/dvInput Rise and Fall Time (see note 1)(V CC =3.3±0.3V)(V CC =5.0±0.5V)0to 1000to 20ns/V ns/V1)V IN from 30%to70%of V CC74VHC002/7DC SPECIFICATIONSSymbolParameterTest Conditions ValueUnitV CC (V)T A =25oC -40to 85oC Min.Typ.Max.Min.Max.V IH High Level Input Voltage 2.0 1.5 1.5V 3.0to 5.50.7V CC0.7V CCV IL Low Level Input Voltage2.00.50.5V3.0to 5.50.3V CC0.3V CC V OHHigh Level Output Voltage2.0I O =-50µA 1.9 2.0 1.9V3.0I O =-50µA 2.9 3.0 2.94.5I O =-50µA 4.4 4.54.43.0I O =-4mA 2.58 2.484.5I O =-8mA 3.943.8V OLLow Level Output Voltage2.0I O =50µA 0.00.10.1V3.0I O =50µA 0.00.10.14.5I O =50µA 0.00.10.13.0I O =4mA 0.360.444.5I O =8mA 0.360.44I I Input Leakage Current 0to 5.5V I =5.5V or GND ±0.1±1.0µA I CCQuiescent Supply Current5.5V I =V CC or GND220µACAPACITIVE CHARACTERISTICSSymbolParameterTest ConditionsValueUnitT A =25oC -40to 85oC Min.Typ.Max.Min.Max.C IN Input Capacitance 41010pF C PDPower Dissipation Capacitance (note 1)19pF1)C PD isdefined as the value of the IC’sinternal equiva lent capacitance which is calculated fromthe operating current consumption without load.(Referto Test Circuit).Average operating current can be obtained bythe following equation.I CC (opr)=C PD •V CC •f IN +I CC /4(per Gate)AC ELECTRICAL CHARACTERISTICS (Input t r =t f =3ns)SymbolParameterTest Condition ValueUnitV CC (V)C L (pF)T A =25o C -40to 85o C Min.Typ.Max.Min.Max.t PLH t PHL Propagation Delay Time3.3(*)15 5.57.9 1.09.5ns3.3(*)508.011.4 1.013.05.0(**)15 3.7 5.5 1.0 6.55.0(**)505.27.51.08.5(*)Voltag e range is 3.3V ±0.3V (**)Voltage range is 5V ±0.5V74VHC003/7DYNAMIC SWITCHING CHARACTERISTICSSymbol Parameter Test Conditions Value UnitV CC (V)T A=25o C-40to85o C Min.Typ.Max.Min.Max.V OLP Dynamic Low VoltageQuiet Output(note1,2)5.0C L=50pF 0.30.8VV OLV-0.8-0.3V IHD Dynamic High VoltageInput(note1,3)5.0 3.5V ILD Dynamic Low VoltageInput(note1,3)5.0 1.51)Worst case package.2)Max num ber of outputs defined as(n).Data inputs aredriven0V to5.0V,(n-1)outputs switching and one out put at GND.3)Max num ber of data inputs(n)switching.(n-1)switching0V to5.0V.Inputs under test switching:5.0V to threshold(V ILD),0V to threshold(V IHD),f=1MHz. TEST CIRCUITC L=15/50pF or equ ivalent(includes jigand probe capacitance)R T=Z OU T of pulse generator(typ ically50Ω)WAVEFORM:PROPAGATION DELAYS(f=1MHz;50%duty cycle)74VHC004/7DIM.mm inch MIN.TYP.MAX.MIN.TYP.MAX.A 1.750.068a10.10.20.0030.007a2 1.650.064b 0.350.460.0130.018b10.190.250.0070.010C 0.50.019c145(typ.)D 8.558.750.3360.344E 5.86.20.2280.244e 1.270.050e37.620.300F 3.8 4.00.1490.157G 4.6 5.30.1810.208L 0.5 1.270.0190.050M 0.680.026S8(max.)P013GSO-14MECHANICAL DATA74VHC005/7DIM.mminch MIN.TYP.MAX.MIN.TYP.MAX.A 1.10.433A10.050.100.150.0020.0040.006A20.850.90.950.3350.3540.374b 0.190.300.00750.0118c 0.090.200.00350.0079D 4.95 5.10.1930.1970.201E 6.25 6.4 6.50.2460.2520.256E1 4.34.4 4.480.1690.1730.176e 0.65BSC0.0256BSCK 0o 4o 8o 0o 4o 8o L0.500.600.700.0200.0240.028cEbA2AE1D1PIN 1IDENTIFICATIONA1LKeTSSOP14MECHANICAL DATA74VHC006/774VHC00 Information furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequence sof use of such information nor for any infringement of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specification mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a trademark of STMicroelectronics©1999STMicroelectronics–Printed in Italy–All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A..7/7。