当前位置：文档之家 › zl20200ldf中文资料_数据手册_IC数据表

zl20200ldf中文资料_数据手册_IC数据表

  • 格式：pdf
  • 大小：429.32 KB
  • 文档页数：50

1Zarlink Semiconductor Inc.Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.Features

•Dual Band IS136 (800/1900 MHz) Compatible•Fully Integrated Dual Band Transceiver•Receive - IF to Baseband I and Q•Transmit - Baseband I / Q to RF•Integrated Filters•FM Demodulator•RF and IF Synthesizers•Fully Programmable via serial bus•3 Volt operation•Small scale package

Applications

•Dual Band (850/PCS1900) TDMA/AMPS Mobile Telephones•Cellular 850MHz TDMA/AMPS Mobile Telephones•PCS1900 TDMA Mobile Telephones•Cellular Telematic SystemsDescription

The ZL20200 is a fully integrated transceiver for dualband IS136/AMPS handsets. The IF input to the receivepath is amplified and down-converted to baseband Iand Q signals. Gain control is provided. Basebandfiltering is also included. A FM demodulator is alsoprovided to support AMPS operation.

The transmit path consists of a quadrature modulator,gain control at IF and up-conversion to RF. Dual bandRF outputs are provided. The transmit output stagescan be programmed to optimize performance andcurrent consumption.November 2006Ordering InformationZL20200/LDG56 Pin QFNTrays, Bake & DrypackZL20200/LDF56 Pin QFNTrays, Bake & DrypackZL20200/LDG156 Pin QFN*Trays, Bake & DrypackZL20200/LDF156 Pin QFN*Trays, Bake & Drypack*Pb Free Matte Tin-40 to +85°CZL20200

Dual Band IS136/AMPS TransceiverData Sheet

Figure 1 - Block Diagram

Rx VHFPLLSerialInterfaceControlFMDemod

IQModUHFPLLTx VHFPLLRx I

Rx Q

FMRSSI

Tx I

Tx QIS136

UHF VCO

900 MHz Tx

1900 MHz Tx

Tx IF Filter(Opt)90°

UHF LO O/PLOCK DETZL20200Data Sheet

2Zarlink Semiconductor Inc.ZL20200 also includes a fractional N RF synthesizer and two IF synthesizers to provide all local oscillator signalsrequired.

Flexible programming is provided via a 3 wire serial bus. Additional control pins allow accurate timing control whenswitching between modes.

Package Diagram

Figure 2 - ZL20200 Package Diagram

SDATSCLKSLATCHTCXOVCC UHF PLLUHF CP

900 LO OUT1900 LO OUTRESETBENABLE1900 LO INVCC UHF LO

TX 900

TX DEG900

TX DEG1900

TX 1900

ENABLE2

TX FILT IN+

TX FILT IN-

VCC TX

TX Q-

TX FILT OUT+

TX FILT OUT-

TX Q+VCC CONTROL

IF1 IN+

IF1 IN-

NCNCRX GAIN

VCC RX PLL

RX VCO+

FM OUT

RX I-RX I+RX VCO-

RX Q-RX Q+RSSIRX CPVCC VHF CP

LOCK DET

TX RXBTX CP

TX I-TX I+ISET

VCC TX PLLTX VCO-VCC UHF LO OUT

TX VCO+

VCC TX RF1900 LO IN

TX GAINVCC RX

FM FB

ZL20200ZL20200Data Sheet

3Zarlink Semiconductor Inc.Pin Description

Pin Description TableNoPin NameTypeDescription1SDATInputSerial Interface - Data2SCLKInputSerial interface - Clock3SLATCHInputSerial Interface - Latch4TCXOInputReference input from TCXO5VCC UHF PLLPowerPower6UHF CPOutputUHF PLL Charge Pump Output7VCC UHF LO OUTPowerPower to LO output stages8900 LO OUTOutput900 MHz buffered LO output to external receiver mixer91900 LO OUTOutput1900 MHz buffered LO output to external receiver mixer 10RESETBInputReset (Active low)11ENABLE1InputMode Control12900 LO INInput900 MHz LO input13VCC UHF LOPowerPower to UHF LO input stage141900 LO INInput1900 MHz LO input15VCC TX RFPowerPower to transmit RF output stages16TX 900Output900 MHz transmit output17TX DEG900Degeneration for 900 MHz output - Connect to Ground18TX DEG1900Degeneration for 1900 MHz output - Connect to Ground19TX 1900Output1900 MHz transmit output20ENABLE2InputMode Control21TX GAINInputTransmit gain control22TX FILT IN+InputInput from transmit IF filter (optional)23TX FILT IN-Input24VCC TXPowerPower to transmit stages25TX FILT OUT+OutputOutput to transmit IF filter (optional)26TX FILT OUT-Output27TX Q+InputQ transmit signal from baseband28TX Q-Input29TX VCO+Transmit Oscillator tank circuit30TX VCO-31VCC TX PLLPowerPower to Transmit VHF PLL32TX I+InputI transmit signal from baseband33TX I-Input34TX RXBInputTransmit / Receive control35TX CPOutputTransmit VHF PLL charge pump output36LOCK DETOutputPLL Lock Detect Output37ISETConnect 50kohm resistor to ground to set internal reference current ZL20200Data Sheet

4Zarlink Semiconductor Inc.

38VCC VHF CPPowerPower to VHF charge pump outputs39RX CPOutputReceive VHF PLL charge pump output40RSSIOutputRSSI Output41RX Q+OutputBaseband Q signal42RX Q-Output43RX I+OutputBaseband I signal44RX I-Output45FM OUTOutputDemodulated FM output46FM FBFeedback to FM output stage47RX VCO-Receive second LO Oscillator tank circuit48RX VCO+49VCC RX PLLPowerPower to receive VHF PLL50VCC RXPowerPower to receive stages51RX GAINInputReceive gain control52NCNot Connected53NCNot Connected54IF1 IN-InputIF Input (1) 55IF1 IN+InputIS136 Input56VCC CONTROLPowerPower to serial interface logicPin Description Table (continued)NoPin NameTypeDescription

合集下载

电子元器件zr25d中文资料_数据手册_IC数据表

电子元器件zr25d中文资料_数据手册_IC数据表

V R

G ndDEVICE DESCRIPTION

The ZR25D uses a bandgap circuit design toachieve a precision micropower voltagereference of 2.5 volts. The device is availablein a small outline SOT23 surface mountpackage, ideal for applications where spacesaving is important.

The ZR25D design provides a stable voltagewithout an external capacitor and is stablewith capacitive loads. The ZR25D isrecommended for operation between 50µAand 5mA and so is ideally suited to lowpower and battery powered applications.

Excellent performance is maintained to anabsolute maximum of 25mA, however therugged design and 20 volt processing allowsthe reference to withstand transient effectsand currents up to 200mA. Superiorswitching capability allows the device toreach stable operating conditions in only afew microseconds.FEATURES

•Small outline SOT23 package.•No stabilising capacitor required•Typical TC 30ppm/°C•Typical slope resistance 0.4Ω•± 3%, 2% and 1% tolerance•Industrial temperature range•Operating current 50µA to 5mA•Transient response, stable in less than10µs•Alternative package options available

电子元器件zumts20中文资料_数据手册_IC数据表

电子元器件zumts20中文资料_数据手册_IC数据表

SOT323 NPN SILICON PLANAR

VHF TRANSISTOR

ISSUE 1 – DECEMBER 19987

PARTMARKING DETAIL — T3ABSOLUTE MAXIMUM RATINGS.

PARAMETERSYMBOLVALUEUNIT

Collector-Base VoltageVCBO30V

Collector-Emitter VoltageVCEO20V

Emitter-Base VoltageVEBO4V

Peak Pulse CurrentICM25mA

Continuous Collector CurrentIC25mA

Power Dissipation at Tamb=25°CPtot330mW

Operating and Storage Temperature RangeTj:Tstg-55 to +150°CELECTRICAL CHARACTERISTICS (at Tamb = 25°C).

PARAMETERSYMBOLMIN.TYP.MAX.UNITCONDITIONS.

Collector Cut-Off

CurrentICBO100

10nA

µAVCB=20V, IE=0

VCB=20V, IE=0,

Tamb=100°C

Base-Emitter VoltageVBE740900mVIC=7mA, VCE

=10V*

Static Forward

Current Transfer Ratioh

FE4085IC

=7mA, V

CE=10V*

Transition FrequencyfT275450MHzIC=5mA, VCE=10V

f=100MHz

Feedback CapacitanceCre0.350.40pFIC=1mA, VCE=10V

f=1MHz

Collector CapacitanceCTC0.8pFIE=Ie=0, VCB=10V

f=1MHz

* Measured under pulsed conditions. Pulse width=300µs. Duty cycle ≤ 2%ZUMTS20

zl4081中文资料_数据手册_IC数据表

zl4081中文资料_数据手册_IC数据表

1Zarlink Semiconductor Inc.Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.Features

•Very High Operating Speed•Low Phase Noise (Typically better than-146dBc/Hz at 10kHz offset)•5V Single Supply Operation•Low Power Dissipation: 500mW(Typ)•Surface Mount Plastic Package with Exposed Pad (See Application Notes)

Prescaler Modulus

•ZL40813 - Divide by 8•ZL40814 - Divide by 16•ZL40818 - Divide by 4

Applications

•10.5 to 13.5GHz PLL applications•LMDS•Instrumentation•Satellite Communications•Fibre Optic Communications; OC48, OC192•Ultra Low Jitter Clock Systems

Description

The ZL40813, 14 and 18 are 5V supply, very highspeed low power prescalers for professionalapplications with a fixed modulus of 8, 16, or 4respectively. The dividing elements are dynamicD typeflip flops and allow operation from 10.5GHz to 13.5GHzwith a sinewave input (Note these prescalers are notsuitable for D.C. operation). The output stage hasinternal 50ohm pull up giving a 1v p-p output. Seeapplication notes for more details.July 2003

微晟半导体 ZL40200 低噪声高频精密 LVPECL 双输出时钟缓冲器数据表说明书

微晟半导体 ZL40200 低噪声高频精密 LVPECL 双输出时钟缓冲器数据表说明书

1Microsemi Corporation

Copyright 2014, Microsemi Corporation. All Rights Reserved.Features

Inputs/Outputs

•Accepts differential or single-ended input•LVPECL, LVDS, CML, HCSL, LVCMOS

•Two precision LVPECL outputs

•Operating frequency up to 750 MHz

Power

•Options for 2.5 V or 3.3 V power supply

•Core current consumption of 49 mA

•On-chip Low Drop Out (LDO) Regulator for superior power supply rejection

Performance

•Ultra low additive jitter of 39 fs RMS

Applications

•General purpose clock distribution•Low jitter clock trees•Logic translation•Clock and data signal restoration•Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC•PCI Express generation 1/2/3 clock distribution•Wireless communications•High performance microprocessor clock distributionApril 2014

Figure 1 - Functional Block Diagramout1_pout1_nout0_pout0_nclk_pclk_nBufferZL40200Precision 1:2 LVPECL Fanout Buffer