瑞萨单片机R8CTiny内部培训讲解

瑞萨R8C：达到16位高性能的8位微控制器4位740380007600740族H8/300H H8/300L H8/300L 超低功耗H8族8位16位32位CISCH8S/2100H8S/2200H8S/2300H8S/2400H8S/2500H8S/2600H8S族H8/TinyM16C/TinyR8C/Tiny32引脚～80引脚20引脚～80引脚M16C/30M16C/60M16C/80M32C/80M32C/90R32C/100M16C族H8SX/1500H8SX/1600H8SX族SH/TinySH2-DSP SH-1SH-2SH3-DSP SH-3SH-4SH-4A SuperH族开发中MMU超标量体系结构控制器类型处理器类型按CPU内核展开单周期指令32位RISC SH-2A M32R族M32R/ECU7204500单周期指令单周期指令48引脚～80引脚TinyTiny瑞萨MCU的发展蓝图“”是什么?“”是瑞萨MCU的一个品牌名，它具有成本低、引脚少及封装小型化等特点。

20引脚～80引脚1. 高性能CPU (16bit及以上)，小型化封装，2. 高可靠性闪存(可在工厂出货时写入)3. 具有高性能的常用外围功能，以削减应用系统成本。

4. 系列产品之间具备下列共同点，可使系列之间兼容无障碍。

-低成本开发工具-统一的通用外围功能-网站技术支持-简单的OS、中间件支持等“”MCU包括H8/Tiny 系列、R8C/Tiny 系列、M16C/Tiny 系列和SH/Tiny 系列。

“”MCU最适合应用于系统控制器或子控制器，如用于家电、AC、PC外设和工业设备等。

无障碍的共通性H8 TINY R8C TINY M16C TINY SH TINY网站提供强大的技术支持低成本的开发环境简单的实时OS中间件、解决方案(加密、TCP-IP等)外围功能的标准化规格入门套件、低价CPU板R8C/Tiny系列产品概念【产品概念】－产品全部为低价位的闪存MCU (可在工厂出货时写入)－由于采用16bit内核，具有强大的运算处理能力(最大工作频率：20MHz)－具备丰富的产品线：20～80pin/4～128KB －内置易于使用的高性能外围功能(高速片内振荡器、通用的定时器、SSU/I 2C、D/A转换、数据闪存)－特别适合C语言编程的高ROM代码效率－低功耗工作－低价位的开发环境：提供On-chip 调试器、入门套件、CPU板等－提供丰富的支持信息(网页、应用笔记、各种手册等)R8CCPU名称族名R8C/TinyR8C/10, 11, 12, 13, 14…系列名R: Renesas 瑞萨8: 内部总线宽度(CPU: 16bit)C: 轻巧型(同M16C族MCU)Tiny: 少引脚, 小型闪存MCUM16C族(M16C 平台)R8C/Tiny系列发展图R8C／Tiny系列MCU 的特有功能■R8C/Tiny具有高性能的CPU、低功耗和高性能的外围功能。

瑞萨单片机入门教程本教程以R7F0C002L单片机为例一、开发环境下载安装与工程注意：该工程目录和工程名不能含有中文1.1、 CubeSuite+环境的下载：官网下载地址将安装环境下载到本地，该文件大小532M在安装过程中有提示需要填写注册码，请输入以下注册码，如果无效请联系供应商。

查看是否已经注册：在IDE环境中选择 Help->About后有下面窗口：注册码：67DCS-V3Q7L-XMGL9-FI6L9-EE1BJ该注册码有限制台数的，一旦注册了就会把MAC绑定，重装无需注册！当有以下报错时：请查看是否已经注册。

1.2、按照一般的软件安装方法安装好IDE环境，下面介绍IDE环境的配置：1、将DIF_RFP文件夹下的Device_Custom文件夹拷贝到安装目录下的C:\Program Files\Renesas Electronics\CubeSuite+下（这里是默认的安装目录，另外注意：DIF_RFP中Readme_Device_Custom.txt说将Device_Custom文件夹拷贝到C:\Program Files\Renesas Electronics\CubeSuite+\Device下，但是实际上不可以！）。

DIF_RFP文件夹安装根目录当配置成功以后会在芯片族里面多出R7F系列的单片机，如下图示：2、将DIF_RFP文件夹下的RFP_R7F0C002L_V10000子目录下面的两个文件（Device_Custom文件夹和Custom_Productlist.xml文件）拷贝到安装目录下的C:\Program Files\Renesas Electronics\Programming Tools\Renesas Flash Programmer V2.01\Device下（这里是默认安装路径）。

1.3、开发环境新建工程：1、启动CubeSuite+环境，会弹出如下启动界面：2、创建Project工程，在上述启动界面中，点击Creat New Project栏中GO按钮，将会弹出以下对话框：选择工程路径创建输入工程名选择芯片型号选择芯片族3、点击Create创建工程，会得到如下工程界面：4、通过生成工具生成一个简单的代码：5、将芯片型号换成R7F0C002单片机，并且将选项字节配置好！详细设置请参考第三章代码生成与编码。

第1章R8C/1A、1B单片机概述随着半导体技术和工艺的快速发展，单片机已经渗透到人们生活的各个领域。

由于其体积小、重量轻、价格便宜、具有很强的灵活性，为学习、应用和开发提供了便利条件。

环顾身边，几乎很难找到哪个领域没有单片机的踪迹。

遥控器、洗衣机、电冰箱、空调、电饭煲等家电产品，移动电话等通信产品，电视、音响等AV设备，以及汽车音响、安全气囊等汽车电子产品，单片机在各个领域都得到了广泛的应用。

瑞萨公司由日立制作所、三菱电机的半导体部门合并而成，是MCU市场占有率位居全球第一的企业，业务范围更是涵盖了“移动通信”、“数码家电”和“汽车电子”三大领域。

1.1 瑞萨R8C/Tiny系列单片机随着单片机技术的发展，电子化使得产品的性能得到大幅度的提高，而一些尚未使用单片机的产品，例如还在使用机械式定时器的电子微波炉等，都有向高性能、多功能产品转化的趋势。

瑞萨公司为帮助用户完成产品高性能化的目标，秉承为用户打造“Easy to Use”的单片机理念，设计开发了具有低价位、少引脚、小型封装等特征的R8C/Tiny系列单片机，可应用于家电、AV，以及工业设备的系统控制器等。

1.1.1 R8C/Tiny系列单片机的特点作为瑞萨单片机的特色产品，R8C/Tiny系列单片机具有如下特点：1．采用16位CPU内核在当今的单片机应用领域，8位单片机依然在中国市场上占据主导地位，但是随着网络时代的到来，例如，通信协议的控制和安全性的验证对运算的复杂性提出了更高的需求，而8位单片机的数据处理和运算能力显然不足以满足要求。

R8C/Tiny系列单片机拥有M16C族单片机的高性能16位中央处理器内核，但为了减少引脚数，CPU与外围功能电路间的总线宽度变为8位，且内置了硬件乘法器，提高了CPU 的处理能力。

2．内置Flash存储器出于成本考虑，过去的单片机内置程序存储器以掩模ROM为主流；内置Flash程序存瑞萨R8C/1A、1B单片机原理和应用·2·储器的单片机通常只为开发才进行少数的量产。

瑞萨单片机启动文件介绍1.NC30介绍NC30的组件：nc30----------------编译驱动器cpp30---------------预处理器ccom30--------------编译器aopt30--------------汇编优化器sbauto--------------SB寄存器自动更新工具stkviewer & stk-----STK查看器与堆栈大小计算工具utl30---------------SBDATA声明及SPECIAL页函数声明工具mapview-------------映射查看器看下NC30处理流程：程序开发流程，生成X30文件的流程：以上就是编译器所做的工作和流程。

看了之后大家有了大概的了解。

具体的大家可以参看NC30编译器手册，待会会上传附件给大家下载。

2：启动程序介绍ncrt0.a30这个程序在程序启动或复位后立即运行，它主要执行下列处理：.设置SBDATA区.设置处理器的操作模式.初始化堆栈指针.初始化SB寄存器.初始化INTB寄存器.初始化NEAR数据区.初始化FAR数据区.初始化堆区.初始化标准I/O函数程序库.初始化FB寄存器.调用MAIN函数ncrt0.a30汇编文件，在建立工程的时候会自动生成。

以下附带详细注释，附件也可下载。

;***************************************************************************; C Compiler for R8C/Tiny, M16C/60,30,20,10; Copyright(C) 1999(2000-2006). Renesas Technology Corp.; and Renesas Solutions Corp., All rights reserved.;; ncrt0.a30 : Startup Program for M16C family;; $Date: 2006/11/22 04:13:23 $; $Revision: 1.1.4.1 $;***************************************************************************;---------------------------------------------------------------------; include files ;包含文件;---------------------------------------------------------------------.list OFF ;控制行输出数据输出到列表文件OFF:停止ON:开始.include nc_define.inc ;包含宏文件.include sect30.inc ;包含存储器映射文件.list ON;---------------------------------------------------------------------; BankSelect definition for 4M mode;---------------------------------------------------------------------; .glb __BankSelect;__BankSelect .equ 0BH;===================================================================== ; Interrupt section start ;中断段起始;---------------------------------------------------------------------.insf start,S,0.glb start.section interruptstart: ;复位后从这个标签开始运行;---------------------------------------------------------------------; after reset,this program will start ;复位后程序将启动;---------------------------------------------------------------------ldc #istack_top,isp ;设置istack指针(中断堆栈) ldc向专用寄存器ISP传递数据mov.b #02h,0ah ;保护寄存器PRCR PRC1=1 允许写PM0mov.b #00h,04h ;设置处理器模式PM0mov.b #00h,0ah ;关闭写保护.if __STACKSIZE__ != 0ldc #0080h,flg ;设置FLG寄存器IPL和其他状态FLG是16位标志寄存器堆栈指针选择USPldc #stack_top,sp ;设置堆栈指针.elseldc #0000h,flg.endifldc #data_SE_top,sb ;设置SB静态基址寄存器ldintb #__VECTOR_ADR__ ;向INTB寄存器传送指令,所以这里省了目标操作数intb;=====================================================================; NEAR area initialize. ;NEAR区初始化;---------------------- -----------------------------------------------; bss zero clear ;bss零清除;---------------------------------------------------------------------N_BZERO bss_SE_top,bss_SE ;清除NEAR bss段至零N_BZERO bss_SO_top,bss_SO ;N_BZERO清零宏定义N_BZERO bss_NE_top,bss_NE ;sect30.inc中有定义N_BZERO bss_NO_top,bss_NO;---------------------------------------------------------------------; initialize data section ;初始化数据段;---------------------------------------------------------------------N_BCOPY data_SEI_top,data_SE_top,data_SE ;将NEAR数据段和SBDA TA数据段的初始值转移到RAMN_BCOPY data_SOI_top,data_SO_top,data_SO ;N_BCOPY拷贝宏定义N_BCOPY data_NEI_top,data_NE_top,data_NE ;sect30.inc中有定义N_BCOPY data_NOI_top,data_NO_top,data_NO;=====================================================================; FAR area initialize. ;FAR区初始化;---------------------------------------------------------------------; bss zero clear ;bss零清除;---------------------------------------------------------------------.if __FAR_RAM_FLG__ != 0BZERO bss_FE_top,bss_FEBZERO bss_FO_top,bss_FO.endif;---------------------------------------------------------------------; initialize data section ;将FAR段数据段的初始值移到RAM中;---------------------------------------------------------------------.if __FAR_RAM_FLG__ != 0 ;从edata_EI(OI)段复制edata_E(O)段BCOPY data_FEI_top,data_FE_top,data_FEBCOPY data_FOI_top,data_FO_top,data_FOldc #stack_top,sp.stk -40.endif;===================================================================== ; heap area initialize ;堆区初始化;---------------------------------------------------------------------.if __HEAPSIZE__ != 0.glb __mnext.glb __msizemov.w #(heap_top&0FFFFH),__mnextmov.w #(heap_top>>16),__mnext+2mov.w #(__HEAPSIZE__&0FFFFH),__msizemov.w #(__HEAPSIZE__>>16),__msize+2.endif;===================================================================== ; Initialize standard I/O ;初始化标准I/O;---------------------------------------------------------------------.if __STANDARD_IO__ == 1.glb __init.call __init,Gjsr.a __init.endif;===================================================================== ; Call main() function ;调用MAIN函数;---------------------------------------------------------------------ldc #0h,fb ; for debuger 用于调试器.glb _mainjsr.a _main;===================================================================== ; exit() function ;推出函数;---------------------------------------------------------------------.glb _exit.glb $exit_exit: ; End program 结束程序$exit:jmp _exit.einsf;===================================================================== ; dummy interrupt function ;虚设的中断处理函数;---------------------------------------------------------------------.glb dummy_intdummy_int:reit.end;***************************************************************************; C Compiler for R8C/Tiny, M16C/60,30,20,10; Copyright(C) 1999(2000-2006). Renesas Technology Corp.; and Renesas Solutions Corp., All rights reserved.;***************************************************************************映射文件：sect30.inc.映射各个段.设置段的起始地址.定义堆栈和堆段的大小.设置中断向量表.设置固定向量表.宏定义;***************************************************************************; C Compiler for R8C/Tiny, M16C/60,30,20,10; Copyright(C) 1999(2000-2006). Renesas Technology Corp.; and Renesas Solutions Corp., All rights reserved.;; sect30.inc : section definition for M16C family;; $Date: 2007/01/09 04:38:46 $; $Revision: 1.1.4.1 $;***************************************************************************;===================================================================== ;; Arrangement of section ;段的排列;;---------------------------------------------------------------------; Near RAM data area ;Near RAM数据区;---------------------------------------------------------------------; SBDATA area.section data_SE,DATA.org 400Hdata_SE_top:.section bss_SE,DATA,ALIGNbss_SE_top:.section data_SO,DATAdata_SO_top:.section bss_SO,DATAbss_SO_top:; SBDATA area definition.glb __SB____SB__ .equ data_SE_top; near RAM area.section data_NE,DATA,ALIGNdata_NE_top:.section bss_NE,DATA,ALIGNbss_NE_top:.section data_NO,DATAdata_NO_top:.section bss_NO,DATAbss_NO_top:;--------------------------------------------------------------------- ; Stack area ;堆栈区;--------------------------------------------------------------------- .section stack,DATA,ALIGN.blkb __ISTACKSIZE__ ;.blkb分配一字节ram istack_top:.if __STACKSIZE__ != 0.blkb __STACKSIZE__stack_top:.endif;--------------------------------------------------------------------- ; heap section ;heap段;--------------------------------------------------------------------- .if __HEAPSIZE__ != 0.section heap,DATAheap_top:.blkb __HEAPSIZE__.endif;--------------------------------------------------------------------- ; Near ROM data area ;NEAR rom数据区;--------------------------------------------------------------------- .if __NEAR_ROM_FLG__ != 0.section rom_NE,ROMDATA,ALIGNrom_NE_top:.section rom_NO,ROMDATArom_NO_top:.endif;--------------------------------------------------------------------- ; Far RAM data area ;FAR RAM 数据区;--------------------------------------------------------------------- .if __FAR_RAM_FLG__ != 0.section data_FE,DATA.org 10000Hdata_FE_top:.section bss_FE,DATA,ALIGNbss_FE_top:.section data_FO,DATAdata_FO_top:.section bss_FO,DATAbss_FO_top:.endif;--------------------------------------------------------------------- ; Far ROM data area ;FAR ROM 数据;--------------------------------------------------------------------- .section rom_FE,ROMDATA.org __ROM_TOPADR__rom_FE_top:.section rom_FO,ROMDATArom_FO_top:;--------------------------------------------------------------------- ; Initial data of 'data' section ;far rom数据初始化;--------------------------------------------------------------------- .section data_SEI,ROMDATA,ALIGNdata_SEI_top:.section data_SOI,ROMDATAdata_SOI_top:.section data_NEI,ROMDATA,ALIGNdata_NEI_top:.section data_NOI,ROMDATAdata_NOI_top:.if __FAR_RAM_FLG__ != 0.section data_FEI,ROMDATA,ALIGNdata_FEI_top:.section data_FOI,ROMDATAdata_FOI_top:.endif;--------------------------------------------------------------------- ; Switch Table Section;--------------------------------------------------------------------- ; .section switch_table,ROMDATA;switch_table_top:;--------------------------------------------------------------------- ; code area ;代码区;--------------------------------------------------------------------- .section program,CODE,ALIGN.section interrupt,CODE,ALIGN.section program_S,CODE,ALIGN;---------------------------------------------------------------------; variable vector section ;变量向量段;---------------------------------------------------------------------.section vector,ROMDATA.org __VECTOR_ADR__.if 0.lword dummy_int ; vector 0 BRK.lword dummy_int ; vector 1.lword dummy_int ; vector 2.lword dummy_int ; vector 3.lword dummy_int ; vector 4 (for user) int3.lword dummy_int ; vector 5 (for user) timerB5.lword dummy_int ; vector 6 (for user) timerB4.lword dummy_int ; vector 7 (for user) timerB3.lword dummy_int ; vector 8 (for user) si/o4/int5.lword dummy_int ; vector 9 (for user) si/o3/int4.lword dummy_int ; vector 10 (for user) Bus collision detection .lword dummy_int ; vector 11 (for user) DMA0.lword dummy_int ; vector 12 (for user) DMA1.lword dummy_int ; vector 13 (for user) Key input interrupt.lword dummy_int ; vector 14 (for user) A-D.lword dummy_int ; vector 15 (for user) uart2 transmit.lword dummy_int ; vector 16 (for user) uart2 receive.lword dummy_int ; vector 17 (for user) uart0 transmit.lword dummy_int ; vector 18 (for user) uart0 receive.lword dummy_int ; vector 19 (for user) uart1 transmit.lword dummy_int ; vector 20 (for user) uart1 receive.lword dummy_int ; vector 21 (for user) timer A0.lword dummy_int ; vector 22 (for user) timer A1.lword dummy_int ; vector 23 (for user) timer A2.lword dummy_int ; vector 24 (for user) timer A3.lword dummy_int ; vector 25 (for user) timer A4.lword dummy_int ; vector 26 (for user) timer B0.lword dummy_int ; vector 27 (for user) timer B1.lword dummy_int ; vector 28 (for user) timer B2.lword dummy_int ; vector 29 (for user) int0.lword dummy_int ; vector 30 (for user) int1.lword dummy_int ; vector 31 (for user) int2.lword dummy_int ; vector 32 (for user or MR30).lword dummy_int ; vector 33 (for user or MR30).lword dummy_int ; vector 34 (for user or MR30).lword dummy_int ; vector 35 (for user or MR30).lword dummy_int ; vector 36 (for user or MR30).lword dummy_int ; vector 37 (for user or MR30).lword dummy_int ; vector 38 (for user or MR30).lword dummy_int ; vector 39 (for user or MR30).lword dummy_int ; vector 40 (for user or MR30).lword dummy_int ; vector 41 (for user or MR30).lword dummy_int ; vector 42 (for user or MR30).lword dummy_int ; vector 43 (for user or MR30).lword dummy_int ; vector 44 (for user or MR30).lword dummy_int ; vector 45 (for user or MR30).lword dummy_int ; vector 46 (for user or MR30).lword dummy_int ; vector 47 (for user or MR30) .lword dummy_int ; vector 48.lword dummy_int ; vector 49.lword dummy_int ; vector 50.lword dummy_int ; vector 51.lword dummy_int ; vector 52.lword dummy_int ; vector 53.lword dummy_int ; vector 54.lword dummy_int ; vector 55.lword dummy_int ; vector 56.lword dummy_int ; vector 57.lword dummy_int ; vector 58.lword dummy_int ; vector 59.lword dummy_int ; vector 60.lword dummy_int ; vector 61.lword dummy_int ; vector 62.lword dummy_int ; vector 63.endif;--------------------------------------------------------------------- ; fixed vector section ;固定向量段;--------------------------------------------------------------------- .section fvector,ROMDATA.org 0fffdcHUDI:.lword dummy_intOVER_FLOW:.lword dummy_intBRKI:.lword dummy_intADDRESS_MATCH:.lword dummy_intSINGLE_STEP:.lword dummy_intWDT:.lword dummy_intDBC:.lword dummy_intNMI:.lword dummy_intRESET:.lword start;===================================================================== ; ID code & ROM code protect //密码保护设置;---------------------------------------------------------------------; ID code check function.id "#FFFFFFFFFFFFFF"; ROM code protect control address; .protect 00H;===================================================================== ; Initialize Macro declaration //宏定义,ncrt0.30中有使用到;---------------------------------------------------------------------N_BZERO .macro TOP_,SECT_mov.b #00H,R0Lmov.w #(TOP_ & 0FFFFH),A1mov.w #sizeof SECT_,R3sstr.b.endmN_BCOPY .macro FROM_,TO_,SECT_mov.w #(FROM_ & 0FFFFH),A0mov.b #(FROM_ >> 16),R1Hmov.w #TO_,A1mov.w #sizeof SECT_,R3smovf.b.endmBZERO .macro TOP_,SECT_push.w #sizeof SECT_ >> 16push.w #sizeof SECT_ & 0ffffhpusha TOP_ >> 16pusha TOP_ & 0ffffh.stk 8.glb _bzero.call _bzero,Gjsr.a _bzero.endmBCOPY .macro FROM_ ,TO_ ,SECT_push.w #sizeof SECT_ >> 16push.w #sizeof SECT_ & 0ffffhpusha TO_ >> 16pusha TO_ & 0ffffhpusha FROM_ >> 16pusha FROM_ & 0ffffh.stk 12.glb _bcopy.call _bcopy,Gjsr.a _bcopy.endm;*************************************************************************** ; C Compiler for R8C/Tiny, M16C/60,30,20,10; Copyright(C) 1999(2000-2006). Renesas Technology Corp.; and Renesas Solutions Corp., All rights reserved.;***************************************************************************nc_define.inc头文件定义;------------------------------------------------------------------------; |; FILE :nc_define.inc |; DATE :Fri, Dec 18, 2009 |; DESCRIPTION :interrupt program. |; CPU GROUP :29 |; |; This file is generated by Renesas Project Generator (Ver.4.8). |; |;------------------------------------------------------------------------; Macro Symbol definition__NEAR_ROM_FLG__ .equ 0 ; NEAR ROM flag definition__FAR_RAM_FLG__ .equ 0 ; FAR RAM flag definition__STANDARD_IO__ .equ 0 ; STANDARD I/O flag definition__HEAPSIZE__ .equ 0300H ; HEEP SIZE definition__STACKSIZE__ .equ 0300H ; STACK SIZE definition__ISTACKSIZE__ .equ 0300H ; INTERRUPT STACK SIZE definition__VECTOR_ADR__ .equ 0ffd00H ; INTERRUPT VECTOR ADDRESS definition__ROM_TOPADR__ .equ 0F4000H ; ROM TOP ADDRESS definition__SPECIAL_PRG__ .equ 0f8000H ; Special page program address。

SuperH RISC engine 族产品概要:SuperH是具有高性能价格比、小型化和高性能功耗比（MIPS/W）特性的嵌入式RISC单片机。

我们正在开发具有广泛的应用范围和多种功能的CPU内核，并提供有强大的产品阵容。

产品系列包含具有CPU内核、内部大容量快速擦写存储器和定时器、串行接口、AD转换器等外围功能的SH-2系列；具有能进行高速数据处理的CPU内核、高速缓冲存储器和MMU的SH-3系列或SH-4系列；具有全DSP功能和以多媒体处理/通信处理为主的CPU内核的SH2-DSP系列或SH3-DSP系列。

现在提供的产品还具有低功率模式、低功耗和小型化等许多特点。

改善了各种通用操作系统和开发工具，从而保证能实现更有效的开发。

主要应用•MPUo汽车导航系统、CIS、娱乐设备和多媒体设备。

o宽带路由器、防火墙、网络设备和因特网设备。

o小型打印机、直接打印机、POS终端、便携式终端和网络终端。

o DVC、DSC和图像处理设备等。

•MCUo空调、电冰箱和洗衣机。

o打印机、传真机和复印机。

o工业设备和机床。

o汽车引擎和动力转向系统。

.瑞萨MCU选型指南有想法吗？请使用我们的，为您寻找最合适的瑞萨产品。

Lineup:SH7780系列SH7780系列是搭载SH-4A CPU内核的高端SuperH处理器。

SH-4A的指令集是完全向上兼容的。

SH-4A的工作频率比已有的SH-4 CPU内核高的多。

并且SH-4A CPU内核具有支持单精度和双精度算术运算的FPU。

SH7722 | SH7723 | SH7724 | SH7730 | SH7731 | SH7763 | SH7764 | SH7780 | SH7781 | SH7785 | SH7786SH7450 系列SH7450系列高性能微控制器配有SH-4A CPU内核。

SH7450系列整合了大容量Flash存储器和SRAM，使其能够适用于汽车主动安全系统，如驱动支持。

M16C族编程技巧(M3T-NC30WA 工具链)2005年2月M3T-NC30WA 特点•支持MCU M16C 族-M16C/60, 30, 20, 10, R8C/Tiny 系列.•性能(Performance) 可以减小ROM大小的辅助功能强大的提高代码效率的优化功能•存储器型号(Memory model) 支持每个变量的near/far限定词•扩展功能(Extended functions)支持嵌入式系统的#pragma指令　•附加工具(Attached tools)IDE -TM 和HEW, 结构汇编器(Structured assembler) 和模拟器(Simulator).M3T-NC30WA存储器分配(Memory allocation )near/far#pragma ADDRESS #pragma BITADDRESS #pragma SECTION #pragma STRUCTetc减小ROM 大小(Reducing ROM size )#pragma SBDATA #pragma SPECIAL #pragma JSRA/JSRW#pragma BIT UTLxx etc 其他#pragma INTERRUPT #pragma PARAMETER #pragma ASM/ENDASM #pragma INTCALLasm( ) etcRTOS#pragma ALMHANDLER #pragma CYCHANDLER #pragma INTHANDLER #pragma TASK提高性能!减小系统消耗(Reduce OS overhead )给不同系统分配存储器!#pragma 扩展功能(Extended Functions)NEAR 修饰符–000000H ~ 00FFFFH 区域FAR 修饰符–000000H ~0FFFFFH 区域每个变量都有Near 和far指定near/far默认ROM areaSFRRAM areanear RAM far ROMFFFF1Mbytesnear areafar areaint near i;int far j;注意: 程序已固定far 属性FFFF默认是NEAR 指针j i *i int * i ;k*k int far * k;FFFFint far * far j ;*j#pragma ADDRESS port 03ECH#pragma ADDRESS base 100H extern int base;#pragma ADDRESS base2 _base+2H extern int base2;#pragma ADDRESS base3 _base+4H extern int base4;不仅对I/O 变量，对RAM 中的变量也很方便.Same as#define base *(volatile int *)0x100#pragma 地址指定变量的绝对地址 可以被用作设定SFR 区#pragma INTERRUPT /B func()Using bank registersvoid func( void ){}R0FB R1R2A0R3A1将后寄存器切换到前寄存器R0FB R1R2A0R3A1R0FBR1R2A0R3A1SB将寄存器切换到后寄存器R0FB R1R2A0R3A1SB声明中断处理器(interrupt handler) /B 使中断处理加快#pragma INTERRUPT /E func() 允许中断(FSET I) 保存寄存器获得自动变量区 释放自动变量区 恢复寄存器 REITvoid func(void){}出口入口/E 允许多个中断支持可以通过下列方式指定中断向量表号＃pragma INTERRUPT Vector number Function_nameOr＃pragma INTERRUPT Function_name(vect= Vector number )使用编译选项–fmake_vector_table 自动生成变量中断表.#pragma INTERRUPT timerA0(vect=21)void timerA0(void){}.section __NC_rvector,ROMDATA .rvector 21,_timerA0asm function汇编语言可以被直接包含在C 程序中格式是asm(““). 例如: asm(“FSETI”); 使用“$$, $b, $@”来参考参数或自动变量.用户不需要考虑变量的存储类(storage class).asm(“mov.w R0,$@”, value );FB offsetSymbol Register-2[FB]_value R0对于变量:对于位字段:asm(“bset $b”, bit.b1 );Bit position,Symbol1,_bit可以在C 中编写长汇编源代码.int asmRoutine(int arg){return work;分配工作区供汇编代码使用.int work;将工作区的偏移(offset)设置在堆栈上asm (“在#pragma ASM 和#pragma ENDASM 之间编写长汇编源程序.#pragma ASMmov.w R0,work[FB]...#pragma ENDASM注意1 : 不要破坏asm 函数中的寄存器.int func(long arg){register int ret=0;#pragma ASMmov.l #00000000H,R2R0mov.l #_addr,A0mov.l #_addr2,A1mov.w _counter,R3rmpa.wmov.l R2R0,_result #pragma ENDASM………..return ret;}参考并修改寄存器保存寄存器恢复寄存器pushm R0,R2,R3,A0,A1popm R0,R2,R3,A0,A1注意2 : 不要写入会引起汇编源程序控制流混乱的转移(branch)指令。

R8C/24 Group, R8C/25 GroupSINGLE-CHIP 16-BIT CMOS MCU1.OverviewThese MCUs are fabricated using a high-performance silicon gate CMOS process, embedding the R8C/Tiny Series CPU core, and are packaged in a 52-pin molded-plastic LQFP or a 64-pin molded-plastic FLGA. It implements sophisticated instructions for a high level of instruction efficiency. With 1 Mbyte of address space, they are capable of executing instructions at high speed.Furthermore, the R8C/25 Group has on-chip data flash (1 KB x 2 blocks).The difference between the R8C/24 Group and R8C/25 Group is only the presence or absence of data flash. Their peripheral functions are the same.1.1ApplicationsElectronic household appliances, office equipment, audio equipment, consumer products, etc.REJ03B0117-0300Rev.3.00Feb 29, 20081.2Performance OverviewTable 1.1 outlines the Functions and Specifications for R8C/24 Group and Table 1.2 outlines the Functions and Specifications for R8C/25 Group.NOTES:1.I 2C bus is a trademark of Koninklijke Philips Electronics N. V.2.Specify the D version if D version functions are to be used.Table 1.1Functions and Specifications for R8C/24 GroupItem SpecificationCPU Number of fundamental instructions89 instructionsMinimum instruction execution time 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V)100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.5 V)200 ns (f(XIN) = 5 MHz, VCC = 2.2 to 5.5 V)Operating mode Single-chip Address space 1 Mbyte Memory capacity Refer to Table 1.3 Product Information for R8C/24 GroupPeripheral Functions Ports I/O ports: 41 pins, Input port: 3 pins LED drive ports I/O ports: 8 pinsTimers Timer RA: 8 bits × 1 channelTimer RB: 8 bits × 1 channel(Each timer equipped with 8-bit prescaler)Timer RD: 16 bits × 2 channels(Input capture and output compare circuits)Timer RE: With real-time clock and compare match functionSerial interfaces 2 channels (UART0, UART1)Clock synchronous serial I/O, UARTClock synchronous serial interface 1 channel I 2C bus Interface (1)Clock synchronous serial I/O with chip selectLIN module Hardware LIN: 1 channel (timer RA, UART0)A/D converter 10-bit A/D converter: 1 circuit, 12 channels Watchdog timer 15 bits × 1 channel (with prescaler)Reset start selectableInterrupts Internal: 11 sources, External: 5 sources, Software: 4sources, Priority levels: 7 levelsClock Clock generation circuits 3 circuits•XIN clock generation circuit (with on-chip feedback resistor)•On-chip oscillator (high speed, low speed)High-speed on-chip oscillator has a frequency adjustment function•XCIN clock generation circuit (32 kHz)Real-time clock (timer RE)Oscillation stop detection function XIN clock oscillation stop detection function Voltage detection circuit On-chip Power-on reset circuit On-chipElectrical Characteristics Supply voltage VCC = 3.0 to 5.5 V (f(XIN) = 20 MHz)VCC = 2.7 to 5.5 V (f(XIN) = 10 MHz)VCC = 2.2 to 5.5 V (f(XIN) = 5 MHz)Current consumption Typ. 10 mA (VCC = 5.0 V, f(XIN) = 20 MHz)Typ. 6 mA (VCC = 3.0 V, f(XIN) = 10 MHz)Typ. 2.0 µA (VCC = 3.0 V, wait mode (f(XCIN) = 32 kHz)Typ. 0.7 µA (VCC = 3.0 V, stop mode)Flash Memory Programming and erasure voltage VCC = 2.7 to 5.5 VProgramming and erasure endurance 100 timesOperating Ambient Temperature -20 to 85°C (N version)-40 to 85°C (D version)(2)-20 to 105°C (Y version)(3)Package 52-pin molded-plastic LQFP64-pin molded-plastic FLGATable 1.2Functions and Specifications for R8C/25 GroupNOTES:1.I 2C bus is a trademark of Koninklijke Philips Electronics N. V.2.Specify the D version if D version functions are to be used.Item SpecificationCPU Number of fundamental instructions89 instructionsMinimum instruction execution time 50 ns (f(XIN) = 20 MHz, VCC = 3.0 to 5.5 V)100 ns (f(XIN) = 10 MHz, VCC = 2.7 to 5.5 V)200 ns (f(XIN) = 5 MHz, VCC = 2.2 to 5.5 V)Operating mode Single-chip Address space 1 Mbyte Memory capacity Refer to Table 1.4 Product Information for R8C/25 GroupPeripheral Functions Ports I/O ports: 41 pins, Input port: 3 pins LED drive ports I/O ports: 8 pinsTimers Timer RA: 8 bits × 1 channelTimer RB: 8 bits × 1 channel(Each timer equipped with 8-bit prescaler)Timer RD: 16 bits × 2 channels(Input capture and output compare circuits)Timer RE: With real-time clock and compare match functionSerial interface 2 channels (UART0, UART1)Clock synchronous serial I/O, UARTClock synchronous serial interface 1 channel I 2C bus Interface (1)Clock synchronous serial I/O with chip selectLIN module Hardware LIN: 1 channel (timer RA, UART0)A/D converter 10-bit A/D converter: 1 circuit, 12 channels Watchdog timer 15 bits × 1 channel (with prescaler)Reset start selectableInterrupts Internal: 11 sources, External: 5 sources, Software: 4sources, Priority levels: 7 levelsClock Clock generation circuits 3 circuits•XIN clock generation circuit (with on-chip feedbackresistor)•On-chip oscillator (high speed, low speed)High-speed on-chip oscillator has a frequency adjustment function•XCIN clock generation circuit (32 kHz)Real-time clock (timer RE)Oscillation stop detection function XIN clock oscillation stop detection function Voltage detection circuit On-chip Power-on reset circuit On-chipElectrical Characteristics Supply voltage VCC = 3.0 to 5.5 V (f(XIN) = 20 MHz)VCC = 2.7 to 5.5 V (f(XIN) = 10 MHz)VCC = 2.2 to 5.5 V (f(XIN) = 5 MHz)Current consumption Typ. 10 mA (VCC = 5.0 V, f(XIN) = 20 MHz)Typ. 6 mA (VCC = 3.0 V, f(XIN) = 10 MHz)Typ. 2.0 µA (VCC = 3.0 V, wait mode (f(XCIN) = 32 kHz)Typ. 0.7 µA (VCC = 3.0 V, stop mode)Flash memory Programming and erasure voltage VCC = 2.7 to 5.5 VProgramming and erasure endurance 1,0000 times (data flash)1,000 times (program ROM)Operating Ambient Temperature -20 to 85°C (N version)-40 to 85°C (D version)(2)-20 to 105°C (Y version)(3)Package 52-pin molded-plastic LQFP64-pin molded-plastic FLGA1.3Block DiagramFigure 1.1 shows a Block Diagram.1.4Product InformationTable 1.3 lists the Product Information for R8C/24 Group and Table 1.4 lists the Product Information for R8C/25Group.NOTE:1.The user ROM is programmed before shipment.Table 1.3Product Information for R8C/24 GroupCurrent of Feb. 2008 Type No.ROM Capacity RAM Capacity Package Type Remarks R5F21244SNFP 16 Kbytes 1 Kbyte PLQP0052JA-A N version Blank productR5F21245SNFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SNFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SNFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SNFP 64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNLG 16 Kbytes 1 Kbyte PTLG0064JA-A R5F21246SNLG 32 Kbytes 2 Kbytes PTLG0064JA-A R5F21244SDFP 16 Kbytes 1 Kbyte PLQP0052JA-A D version Blank productR5F21245SDFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SDFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SDFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SDFP64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNXXXFP 16 Kbytes 1 Kbyte PLQP0052JA-A N version Factoryprogramming product (1)R5F21245SNXXXFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SNXXXFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SNXXXFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SNXXXFP 64 Kbytes 3 Kbytes PLQP0052JA-A R5F21244SNXXXLG 16 Kbytes 1 Kbyte PTLG0064JA-A R5F21246SNXXXLG 32 Kbytes 2 Kbytes PTLG0064JA-A R5F21244SDXXXFP 16 Kbytes 1 Kbyte PLQP0052JA-A D version Factoryprogramming product (1)R5F21245SDXXXFP 24 Kbytes 2 Kbytes PLQP0052JA-A R5F21246SDXXXFP 32 Kbytes 2 Kbytes PLQP0052JA-A R5F21247SDXXXFP 48 Kbytes 2.5 Kbytes PLQP0052JA-A R5F21248SDXXXFP64 Kbytes3 KbytesPLQP0052JA-ANOTE:1.The user ROM is programmed before shipment.Table 1.4Product Information for R8C/25 GroupCurrent of Feb. 2008Type No.ROM CapacityRAMCapacity Package Type Remarks Program ROM Data flash R5F21254SNFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A N version Blank productR5F21255SNFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SNFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SNFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SNFP 64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNLG 16 Kbytes 1 Kbyte × 2 1 Kbyte PTLG0064JA-A R5F21256SNLG 32 Kbytes 1 Kbyte × 2 2 Kbytes PTLG0064JA-A R5F21254SDFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A D version Blank productR5F21255SDFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SDFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SDFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SDFP64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNXXXFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A N version Factoryprogramming product (1)R5F21255SNXXXFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SNXXXFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SNXXXFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SNXXXFP 64 Kbytes 1 Kbyte × 2 3 Kbytes PLQP0052JA-A R5F21254SNXXXLG 16 Kbytes 1 Kbyte × 2 1 Kbyte PTLG0064JA-A R5F21256SNXXXLG 32 Kbytes 1 Kbyte × 2 2 Kbytes PTLG0064JA-A R5F21254SDXXXFP 16 Kbytes 1 Kbyte × 2 1 Kbyte PLQP0052JA-A D version Factoryprogramming product (1)R5F21255SDXXXFP 24 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21256SDXXXFP 32 Kbytes 1 Kbyte × 2 2 Kbytes PLQP0052JA-A R5F21257SDXXXFP 48 Kbytes 1 Kbyte × 2 2.5 Kbytes PLQP0052JA-A R5F21258SDXXXFP64 Kbytes 1 Kbyte × 23 KbytesPLQP0052JA-A1.5Pin AssignmentsFigure 1.4 shows PLQP0052JA-A Package Pin Assignments (Top View). Figure 1.5 shows PTLG0064JA-A Package Pin Assignments.1.6Pin FunctionsTable 1.5 lists Pin Functions.I: InputO: OutputI/O: Input and outputTable 1.5Pin FunctionsTypeSymbolI/O TypeDescriptionPower supply input VCC, VSS I Apply 2.2 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin.Analog power supply input AVCC, AVSS I Power supply for the A/D converter.Connect a capacitor between AVCC and AVSS.Reset input RESET I Input “L” on this pin resets the MCU.MODE MODE I Connect this pin to VCC via a resistor.XIN clock input XIN I These pins are provided for XIN clock generation circuit I/O.Connect a ceramic resonator or a crystal oscillator between the XIN and XOUT pins. To use an external clock, input it to the XIN pin and leave the XOUT pin open.XIN clock output XOUT O XCIN clock input XCIN I These pins are provided for XCIN clock generation circuit I/O.Connect a crystal oscillator between the XCIN and XCOUT pins. To use an external clock, input it to the XCIN pin and leave the XCOUT pin open.XCIN clock output XCOUT O INT interrupt input INT0 to INT3I INT interrupt input pins.INT0 is timer RD input pin. INT1 is timer RA input pin.Key input interrupt KI0 to KI3I Key input interrupt input pins Timer RA TRAIO I/O Timer RA I/O pin TRAO O Timer RA output pin Timer RB TRBOO Timer RB output pin Timer RDTRDIOA0, TRDIOA1,TRDIOB0, TRDIOB1,TRDIOC0, TRDIOC1,TRDIOD0, TRDIOD1I/OTimer RD I/O portsTRDCLK I External clock input pin Timer RE TREO O Divided clock output pin Serial interfaceCLK0, CLK1I/O Transfer clock I/O pin RXD0, RXD1I Serial data input pins TXD0, TXD1O Serial data output pins I 2C bus interfaceSCL I/O Clock I/O pin SDAI/O Data I/O pin Clock synchronous serial I/O with chip selectSSI I/O Data I/O pinSCS I/O Chip-select signal I/O pin SSCKI/O Clock I/O pin SSOI/O Data I/O pinReference voltage input VREF I Reference voltage input pin to A/D converter A/D converter AN0 to AN11I Analog input pins to A/D converterI/O portP0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, P3_0, P3_1,P3_3 to P3_5, P3_7, P4_3 to P4_5, P6_0 to P6_7I/OCMOS I/O ports. Each port has an I/O select direction register, allowing each pin in the port to be directed for input or output individually.Any port set to input can be set to use a pull-up resistor or not by a program.P2_0 to P2_7 also function as LED drive ports.Input port P4_2, P4_6, P4_7IInput-only portsNOTE:1.Can be assigned to the pin in parentheses by a program.Table 1.6Pin Name Information by Pin NumberPinNumber Control PinPortI/O Pin Functions for of Peripheral ModulesInterruptTimerSerial Interface ClockSynchronous Serial I/O with Chip Select I 2C busInterfaceA/D Converter2P3_5SSCK SCL 3P3_3SSI4P3_4SCSSDA5MODE 6XCIN P4_37XCOUT P4_48RESET 9XOUT P4_710VSS/AVSS11XIN P4_612VCC/AVCC13P2_7TRDIOD114P2_6TRDIOC115P2_5TRDIOB116P2_4TRDIOA117P2_3TRDIOD018P2_2TRDIOC019P2_1TRDIOB020P2_0TRDIOA0/TRDCLK21P1_7INT1TRAIO22P1_6CLK023P1_5(INT1)(1)(TRAIO)(1)RXD024P1_4TXD025P1_3KI3AN1127P4_5INT0INT028P6_6INT2TXD129P6_7INT3RXD130P1_2KI2AN1031P1_1KI1AN932P1_0KI0AN833P3_1TRBO 34P3_0TRAO35P6_5CLK136P6_437P6_338P0_7AN041P0_6AN142P0_5AN243P0_4AN344VREFP4_245P6_0TREO46P6_247P6_148P0_3AN449P0_2AN550P0_1AN651P0_0AN752P3_7SSO2.Central Processing Unit (CPU)Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a register bank. There are two sets of register bank.2.1Data Registers (R0, R1, R2, and R3)R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is analogous to R2R0.2.2Address Registers (A0 and A1)A0 is a 16-bit register for address register indirect addressing and address register relative addressing. It is also used for transfer, arithmetic, and logic operations. A1 is analogous to A0. A1 can be combined with A0 and as a 32-bit address register (A1A0).2.3Frame Base Register (FB)FB is a 16-bit register for FB relative addressing.2.4Interrupt Table Register (INTB)INTB is a 20-bit register that indicates the start address of an interrupt vector table.2.5Program Counter (PC)PC is 20 bits wide and indicates the address of the next instruction to be executed.2.6User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)The stack pointers (SP), USP, and ISP, are each 16 bits wide. The U flag of FLG is used to switch betweenUSP and ISP.2.7Static Base Register (SB)SB is a 16-bit register for SB relative addressing.2.8Flag Register (FLG)FLG is an 11-bit register indicating the CPU state.2.8.1Carry Flag (C)The C flag retains carry, borrow, or shift-out bits that have been generated by the arithmetic and logic unit.2.8.2Debug Flag (D)The D flag is for debugging only. Set it to 0.2.8.3Zero Flag (Z)The Z flag is set to 1 when an arithmetic operation results in 0; otherwise to 0.2.8.4Sign Flag (S)The S flag is set to 1 when an arithmetic operation results in a negative value; otherwise to 0.2.8.5Register Bank Select Flag (B)Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is set to 1.2.8.6Overflow Flag (O)The O flag is set to 1 when an operation results in an overflow; otherwise to 0.2.8.7Interrupt Enable Flag (I)The I flag enables maskable interrupts.Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0 when an interrupt request is acknowledged.2.8.8Stack Pointer Select Flag (U)ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software interrupt numbers 0 to 31 is executed.2.8.9Processor Interrupt Priority Level (IPL)IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.If a requested interrupt has higher priority than IPL, the interrupt is enabled.2.8.10Reserved BitIf necessary, set to 0. When read, the content is undefined.3.Memory3.1R8C/24 GroupFigure 3.1 is a Memory Map of R8C/24 Group. The R8C/24 group has 1 Mbyte of address space from addresses 00000h to FFFFFh.The internal ROM is allocated lower addresses, beginning with address 0FFFFh. For example, a 48-Kbyte internal ROM area is allocated addresses 04000h to 0FFFFh.The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.The internal RAM is allocated higher addresses, beginning with address 00400h. For example, a 2-Kbyte internal RAM area is allocated addresses 00400h to 00BFFh. The internal RAM is used not only for storing data but also for calling subroutines and as stacks when interrupt requests are acknowledged.Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use and cannot be accessed by users.3.2R8C/25 GroupFigure 3.2 is a Memory Map of R8C/25 Group. The R8C/25 group has 1 Mbyte of address space from addresses 00000h to FFFFFh.The internal ROM (program ROM) is allocated lower addresses, beginning with address 0FFFFh. For example, a 48-Kbyte internal ROM area is allocated addresses 04000h to 0FFFFh.The fixed interrupt vector table is allocated addresses 0FFDCh to 0FFFFh. They store the starting address of each interrupt routine.The internal ROM (data flash) is allocated addresses 02400h to 02BFFh.The internal RAM area is allocated higher addresses, beginning with address 00400h. For example, a 2-Kbyte internal RAM is allocated addresses 00400h to 00BFFh. The internal RAM is used not only for storing data but also for calling subroutines and as stacks when interrupt requests are acknowledged.Special function registers (SFRs) are allocated addresses 00000h to 002FFh. The peripheral function control registers are allocated here. All addresses within the SFR, which have nothing allocated are reserved for future use and cannot be accessed by users.4.Special Function Registers (SFRs)An SFR (special function register) is a control register for a peripheral function. Tables 4.1 to 4.7 list the special function registers.Table 4.1SFR Information (1)(1)X: Undefined NOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Software reset, watchdog timer reset, and voltage monitor 1 reset or voltage monitor 2 reset do not affect this register.3.The LVD0ON bit in the OFS register is set to 1 and hardware reset.4.Power-on reset, voltage monitor 0 reset or the LVD0ON bit in the OFS register is set to 0, and hardware reset.5.Software reset, watchdog timer reset, and voltage monitor 1 reset or voltage monitor 2 reset do not affect b2 and b3.6.The CSPROINI bit in the OFS register is set to 0.Address RegisterSymbolAfter reset0000h 0001h 0002h 0003h 0004h Processor Mode Register 0PM000h 0005h Processor Mode Register 1PM100h0006h System Clock Control Register 0CM001101000b 0007h System Clock Control Register 1CM100100000b0008h 0009h 000Ah Protect RegisterPRCR 00h 000Bh 000Ch Oscillation Stop Detection Register OCD 00000100b 000Dh Watchdog Timer Reset Register WDTR XXh 000Eh Watchdog Timer Start Register WDTS XXh000Fh Watchdog Timer Control Register WDC 00X11111b 0010h Address Match Interrupt Register 0RMAD000h 0011h 00h 0012h 00h 0013h Address Match Interrupt Enable Register AIER 00h 0014h Address Match Interrupt Register 1RMAD100h 0015h 00h 0016h 00h0017h 0018h 0019h 001Ah 001Bh 001Ch Count Source Protection Mode Register CSPR00h10000000b (6)001Dh 001Eh 001Fh 0020h 0021h 0022h 0023h High-Speed On-Chip Oscillator Control Register 0FRA000h0024h High-Speed On-Chip Oscillator Control Register 1FRA1When shipping 0025h High-Speed On-Chip Oscillator Control Register 2FRA200h0026h 0027h 0028h Clock Prescaler Reset FlagCPSRF 00h0029h High-Speed On-Chip Oscillator Control Register 4FRA4When shipping 002Ah 002Bh High-Speed On-Chip Oscillator Control Register 6FRA6When shipping 002Ch High-Speed On-Chip Oscillator Control Register 7FRA7When shipping0030h 0031h Voltage Detection Register 1(2)VCA100001000b 0032h Voltage Detection Register 2(2)VCA200h (3)00100000b (4)0033h 0034h 0035h 0036h Voltage Monitor 1 Circuit Control Register (5)VW1C 00001000b 0037h Voltage Monitor 2 Circuit Control Register (5)VW2C 00h0038h Voltage Monitor 0 Circuit Control Register (2)VW0C0000X000b (3)0100X001b (4)0039h 003Ah003Eh 003FhTable 4.2SFR Information (2)(1)Address Register Symbol After reset 0040h0041h0042h0043h0044h0045h0046h0047h0048h Timer RD0 Interrupt Control Register TRD0IC XXXXX000b 0049h Timer RD1 Interrupt Control Register TRD1IC XXXXX000b 004Ah Timer RE Interrupt Control Register TREIC XXXXX000b 004Bh004Ch004Dh Key Input Interrupt Control Register KUPIC XXXXX000b 004Eh A/D Conversion Interrupt Control Register ADIC XXXXX000b 004Fh SSU/IIC Interrupt Control Register(2)SSUIC / IICIC XXXXX000b 0050h0051h UART0 Transmit Interrupt Control Register S0TIC XXXXX000b 0052h UART0 Receive Interrupt Control Register S0RIC XXXXX000b 0053h UART1 Transmit Interrupt Control Register S1TIC XXXXX000b 0054h UART1 Receive Interrupt Control Register S1RIC XXXXX000b 0055h INT2 Interrupt Control Register INT2IC XX00X000b 0056h Timer RA Interrupt Control Register TRAIC XXXXX000b 0057h0058h Timer RB Interrupt Control Register TRBIC XXXXX000b 0059h INT1 Interrupt Control Register INT1IC XX00X000b 005Ah INT3 Interrupt Control Register INT3IC XX00X000b 005Bh005Ch005Dh INT0 Interrupt Control Register INT0IC XX00X000b 005Eh005Fh0060h0061h0062h0063h0064h0065h0066h0067h0068h0069h006Ah006Bh006Ch006Dh006Eh006Fh0070h0071h0072h0073h0074h0075h0076h0077h0078h0079h007Ah007Bh007Ch007Dh007Eh007FhX: UndefinedNOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Selected by the IICSEL bit in the PMR register.Table 4.3SFR Information (3)(1)Address Register Symbol After reset 0080h0081h0082h0083h0084h0085h0086h0087h0088h0089h008Ah008Bh008Ch008Dh008Eh008Fh0090h0091h0092h0093h0094h0095h0096h0097h0098h0099h009Ah009Bh009Ch009Dh009Eh009Fh00A0h UART0 Transmit/Receive Mode Register U0MR00h00A1h UART0 Bit Rate Register U0BRG XXh00A2h UART0 Transmit Buffer Register U0TB XXh00A3h XXh00A4h UART0 Transmit/Receive Control Register 0U0C000001000b 00A5h UART0 Transmit/Receive Control Register 1U0C100000010b 00A6h UART0 Receive Buffer Register U0RB XXh00A7h XXh00A8h UART1 Transmit/Receive Mode Register U1MR00h00A9h UART1 Bit Rate Register U1BRG XXh00AAh UART1 Transmit Buffer Register U1TB XXh00ABh XXh00ACh UART1 Transmit/Receive Control Register 0U1C000001000b 00ADh UART1 Transmit/Receive Control Register 1U1C100000010b 00AEh UART1 Receive Buffer Register U1RB XXh00AFh XXh00B0h00B1h00B2h00B3h00B4h00B5h00B6h00B7h00B8h SS Control Register H / IIC bus Control Register 1(2)SSCRH / ICCR100h00B9h SS Control Register L / IIC bus Control Register 2(2)SSCRL / ICCR201111101b 00BAh SS Mode Register / IIC bus Mode Register(2)SSMR / ICMR00011000b 00BBh SS Enable Register / IIC bus Interrupt Enable Register(2)SSER / ICIER00h00BCh SS Status Register / IIC bus Status Register(2)SSSR / ICSR00h / 0000X000b 00BDh SS Mode Register 2 / Slave Address Register(2)SSMR2 / SAR00h00BEh SS Transmit Data Register / IIC bus Transmit Data Register(2)SSTDR / ICDRT FFh00BFh SS Receive Data Register / IIC bus Receive Data Register(2)SSRDR / ICDRR FFhX: UndefinedNOTES:1.The blank regions are reserved. Do not access locations in these regions.2.Selected by the IICSEL bit in the PMR register.Table 4.4SFR Information (4)(1)Address Register Symbol After reset 00C0h A/D Register AD XXh00C1h XXh00C2h00C3h00C4h00C5h00C6h00C7h00C8h00C9h00CAh00CBh00CCh00CDh00CEh00CFh00D0h00D1h00D2h00D3h00D4h A/D Control Register 2ADCON200h00D5h00D6h A/D Control Register 0ADCON000h00D7h A/D Control Register 1ADCON100h00D8h00D9h00DAh00DBh00DCh00DDh00DEh00DFh00E0h Port P0 Register P0XXh00E1h Port P1 Register P1XXh00E2h Port P0 Direction Register PD000h00E3h Port P1 Direction Register PD100h00E4h Port P2 Register P2XXh00E5h Port P3 Register P3XXh00E6h Port P2 Direction Register PD200h00E7h Port P3 Direction Register PD300h00E8h Port P4 Register P4XXh00E9h00EAh Port P4 Direction Register PD400h00EBh00ECh Port P6 Register P6XXh00EDh00EEh Port P6 Direction Register PD600h00EFh00F0h00F1h00F2h00F3h00F4h Port P2 Drive Capacity Control Register P2DRR00h00F5h UART1 Function Select Register U1SR XXh00F6h00F7h00F8h Port Mode Register PMR00h00F9h External Input Enable Register INTEN00h00FAh INT Input Filter Select Register INTF00h00FBh Key Input Enable Register KIEN00h00FCh Pull-Up Control Register 0PUR000h00FDh Pull-Up Control Register 1PUR1XX00XX00b 00FEh00FFhX: UndefinedNOTE:1.The blank regions are reserved. Do not access locations in these regions.Table 4.5SFR Information (5)(1)Address Register Symbol After reset 0100h Timer RA Control Register TRACR00h0101h Timer RA I/O Control Register TRAIOC00h0102h Timer RA Mode Register TRAMR00h0103h Timer RA Prescaler Register TRAPRE FFh0104h Timer RA Register TRA FFh0105h0106h LIN Control Register LINCR00h0107h LIN Status Register LINST00h0108h Timer RB Control Register TRBCR00h0109h Timer RB One-Shot Control Register TRBOCR00h010Ah Timer RB I/O Control Register TRBIOC00h010Bh Timer RB Mode Register TRBMR00h010Ch Timer RB Prescaler Register TRBPRE FFh010Dh Timer RB Secondary Register TRBSC FFh010Eh Timer RB Primary Register TRBPR FFh010Fh0110h0111h0112h0113h0114h0115h0116h0117h0118h Timer RE Second Data Register / Counter Data Register TRESEC00h0119h Timer RE Minute Data Register / Compare Data Register TREMIN00h011Ah Timer RE Hour Data Register TREHR00h011Bh Timer RE Day of Week Data Register TREWK00h011Ch Timer RE Control Register 1TRECR100h011Dh Timer RE Control Register 2TRECR200h011Eh Timer RE Count Source Select Register TRECSR00001000b 011Fh0120h0121h0122h0123h0124h0125h0126h0127h0128h0129h012Ah012Bh012Ch012Dh012Eh012Fh0130h0131h0132h0133h0134h0135h0136h0137h Timer RD Start Register TRDSTR11111100b 0138h Timer RD Mode Register TRDMR00001110b 0139h Timer RD PWM Mode Register TRDPMR10001000b 013Ah Timer RD Function Control Register TRDFCR10000000b 013Bh Timer RD Output Master Enable Register 1TRDOER1FFh013Ch Timer RD Output Master Enable Register 2TRDOER201111111b 013Dh Timer RD Output Control Register TRDOCR00h013Eh Timer RD Digital Filter Function Select Register 0TRDDF000h013Fh Timer RD Digital Filter Function Select Register 1TRDDF100hX: UndefinedNOTE:1.The blank regions are reserved. Do not access locations in these regions.。

TASKING R8C/Tiny toolset v1.1Start-up guide for Renesas 3D-starterkitThis Start-up Guide describes all steps necessary to successfully connect, debug and flash a 3D-example. This guide applies to the TASKING R8C/Tiny toolset v1.1 in combination with the Renesas 3D-starterkit for the R8C/Tiny. The hints and instructions in this guide are based on the 3D examples (i.e. 3dk-dance) included in the product.IMPORTANT: Do not plug in the USB cable before installing the USB drivers!There are three main topics covered in this guide:1) Flash TASKING ROM monitor ELF file (3dk-r8c.elf) into R8C Flash memory2) Debug a 3D-example (3dk-dance) via the TASKING ROM monitordebugger3) Flash a 3D-example (3dk-dance) into the R8C Flash memory1) Flash TASKING ROM monitor (3dk-r8c.elf) into R8C Flash memoryEDE Quick StartTake the following steps to successfully flash theTASKING ROM monitor into the R8C Flash memory.1. Open the ROM monitor Project SpaceThe corresponding ELF file (3dk-r8c.elf)Remove the jumper from the Boot-positionbutton on the boardTASKING R8C/TINY TOOLSET 2) Debug a 3D-example (3dk-dance) via theTASKING ROM monitor debuggerEDE Quick StartTake the following steps to select and build the 3D-example, creating a successful debugger connectionto the target board.1. Open the 3dk-dance projecta.Right-click on the 3dk-dance projectin the Project window at the leftb.Select Set as Current Project2. Rebuild the applicationa.Select the Build menub.Select Rebuild3. You can now start debugging with CrossView Proa.Select the Build menub.Select Debugc.Click the Run/Continue button in CrossView Pro3) Flash a 3D-example (3dk-dance) into theR8C/Tiny Flash memoryEDE Quick StartTake the following steps to select and build the 3D-example, then to successfully flash the ELF file intothe R8C Flash memory.1. Open the 3dk-dance projecta.Right-click on the 3dk-dance projectin the Project window at the leftb.Select Set as Current Project2. Rebuild the applicationa.Select the Build menub.Select Rebuild3. Configure Flash-mode on the boarda.Set the jumper on the board tothe Flash/Boot-position (JP1)b.Press the Reset button on the board4. Flash the 3dk-dance project (ELF file)a.Click the Flash button in the toolbarb.The corresponding ELF file (3dk-dance.elf)will be flashed automatically5. Check the 3dk-dance project on the boarda.Remove the jumper on the boardb.Press the Reset button on the boardc.The 3dk-dance project will run on the board TASKING ROM synchronization toolThe 'Sync' tool is used in combination with the ROM monitor debugger. By clicking the Sync button, your project settings (e.g. processor and memory) will be updated with the target specifics found by the TASKING ROM monitor.FEATURESTROUBLE SHOOTING1. CrossView Pro issues the following error:Solution:Ensure the correct COM port (e.g. COM3) is selectedfor the 3dk-dance project.1. Find the correct COM porta.Click the Sync button in the toolbarb.Click Scan all buttonc.When the correct COM port/baudrate is found, clickthe Sync button in the synchronize options menuAlternative:1. Check which COM port the USB drivers have been assigned to,e.g. under Windows XPa.Click Windows Control Panelb.Click Systemc.Click Hardwared.Click Device Managere.Click Ports (Com & LPT)2. Ensure that the identical COM port is selected under TASKING EDEa.Select Project menu in the toolbarb.Select Project optionsc.Select CrossView Prod.Select Communicatione.Select correct COM port2. R8C/Tiny Flasher issues the following error:Solution:Ensure the correct COM port (e.g. COM3) is selectedfor the 3dk-dance project.1. Check which COM port the USB drivers have been assigned to,e.g. under Windows XPa.Click Windows Control Panelb.Click Systemc.Click Hardwared.Click Device Managere.Click Ports (Com & LPT)2. Ensure that the identical COM port is selected under TASKING EDEa.Select Project menu in the toolbarb.Select Project optionsc.Select Flasherd.Select Flasher Settingse.Select correct COM port TASKING R8C/TINY TOOLSETR8C/Tiny FlasherThe TASKING R8C/Tiny Flasherallows you to directly flash anELF/Dwarf, Motorola S-Rec or IntelHex file into the chip.FEATURES1441TASKR8C-TinySK。

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Notes regarding these materialsNotes regarding these materials1. This document is provided for reference purposes only so that Renesas customers may select the appropriateRenesas products for their use. Renesas neither makes warranties or representations with respect to theaccuracy or completeness of the information contained in this document nor grants any license to anyintellectual property rights or any other rights of Renesas or any third party with respect to the information inthis document.2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arisingout of the use of any information in this document, including, but not limited to, product data, diagrams, charts,programs, algorithms, and application circuit examples.3. You should not use the products or the technology described in this document for the purpose of militaryapplications such as the development of weapons of mass destruction or for the purpose of any other militaryuse. When exporting the products or technology described herein, you should follow the applicable exportcontrol laws and regulations, and procedures required by such laws and regulations.4. All information included in this document such as product data, diagrams, charts, programs, algorithms, andapplication circuit examples, is current as of the date this document is issued. Such information, however, issubject to change without any prior notice. Before purchasing or using any Renesas products listed in thisdocument, please confirm the latest product information with a Renesas sales office. Also, please pay regularand careful attention to additional and different information to be disclosed by Renesas such as that disclosedthrough our website. ( )5. Renesas has used reasonable care in compiling the information included in this document, but Renesasassumes no liability whatsoever for any damages incurred as a result of errors or omissions in the informationincluded in this document.6. When using or otherwise relying on the information in this document, you should evaluate the information inlight of the total system before deciding about the applicability of such information to the intended application.Renesas makes no representations, warranties or guaranties regarding the suitability of its products for anyparticular application and specifically disclaims any liability arising out of the application and use of theinformation in this document or Renesas products.7. With the exception of products specified by Renesas as suitable for automobile applications, Renesasproducts are not designed, manufactured or tested for applications or otherwise in systems the failure ormalfunction of which may cause a direct threat to human life or create a risk of human injury or which requireespecially high quality and reliability such as safety systems, or equipment or systems for transportation andtraffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communicationtransmission. If you are considering the use of our products for such purposes, please contact a Renesassales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above.8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below:(1) artificial life support devices or systems(2) surgical implantations(3) healthcare intervention (e.g., excision, administration of medication, etc.)(4) any other purposes that pose a direct threat to human lifeRenesas shall have no liability for damages arising out of the uses set forth in the above and purchasers whoelect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless RenesasTechnology Corp., its affiliated companies and their officers, directors, and employees against any and alldamages arising out of such applications.9. You should use the products described herein within the range specified by Renesas, especially with respectto the maximum rating, operating supply voltage range, movement power voltage range, heat radiationcharacteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions ordamages arising out of the use of Renesas products beyond such specified ranges.10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specificcharacteristics such as the occurrence of failure at a certain rate and malfunctions under certain useconditions. Please be sure to implement safety measures to guard against the possibility of physical injury, andinjury or damage caused by fire in the event of the failure of a Renesas product, such as safety design forhardware and software including but not limited to redundancy, fire control and malfunction prevention,appropriate treatment for aging degradation or any other applicable measures. Among others, since theevaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products orsystem manufactured by you.11. In case Renesas products listed in this document are detached from the products to which the Renesasproducts are attached or affixed, the risk of accident such as swallowing by infants and small children is veryhigh. You should implement safety measures so that Renesas products may not be easily detached from yourproducts. Renesas shall have no liability for damages arising out of such detachment.12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior writtenapproval from Renesas.13. Please contact a Renesas sales office if you have any questions regarding the information contained in thisdocument, Renesas semiconductor products, or if you have any other inquiries.关于利用本资料时的注意事项 1. 䌘 Ўњ䅽⫼ ḍ ⫼䗨䗝 䗖ⱘ ѻ ⱘ 㗗䌘 ˈ Ѣ 䌘 Ё 䆄䕑ⱘ ˈ 䴲ⴔ 㗙㄀ϝ㗙ⱘⶹ䆚ѻ Ҫ 䆕 䖯㸠ⱘ 䇎DŽ2. Ѣ Փ⫼ 䌘 䆄䕑ⱘѻ ǃ ǃ㸼ǃ⿟ ǃㅫ⊩ Ҫ ⫼⬉䏃՟㗠 䍋ⱘ 㗙 ㄀ϝ㗙ⱘⶹ䆚ѻ Ҫ 䗴 ⢃ˈ ϡ ӏԩ䋷ӏDŽ3. ϡ㛑 䌘 䆄䕑ⱘѻ ⫼Ѣ 㾘῵⸈ ℺ ⱘ ㄝⳂⱘǃ џⳂⱘ Ҫⱘ 䳔⫼䗨 䴶DŽˈ 乏䙉 ⱘlj ∛ 䌌 ⊩NJ Ҫ ⱘⳌ ⊩Ҹ 㸠䖭ѯ⊩ҸЁ㾘 ⱘ 㽕㓁DŽ4. 䌘 䆄䕑ⱘѻ ǃ ǃ㸼ǃ⿟ ǃㅫ⊩ҹ Ҫ ⫼⬉䏃՟ㄝ Ў 䌘 㸠 ⱘ ˈ㛑 џ 䗮ⶹⱘ ϟˈ 䌘 䆄䕑ⱘѻ 㗙ѻ 㾘Ḑ䖯㸠 DŽ ҹ 䌁ф Փ⫼ⱘ ԧѻ П ˈ䇋џ ⱘ㧹Ϯに ⹂䅸 ⱘ 㒣 ⬭ 䗮䖛 Џ义()ㄝ ⱘ DŽ5. Ѣ 䌘 Ё 䆄䕑ⱘ ˈ ԰ Ӏ 䆕 ⠜ ⱘ㊒⹂ ˈԚϡ 䌘 ⱘ 䗄ϡ 㗠㟈Փ乒䙁 ㄝⱘӏԩⳌ 䋷ӏDŽ6. Փ⫼ 䌘 䆄䕑ⱘѻ ǃ ǃ㸼ㄝ ⼎ⱘ ǃ⿟ ǃㅫ⊩ Ҫ ⫼⬉䏃՟ ˈϡҙ㽕Փ⫼ⱘ 䖯㸠 ⣀䆘Ӌˈ䖬㽕 Ͼ㋏㒳䖯㸠 ⱘ䆘ӋDŽ䇋乒 㞾㸠䋳䋷ˈ䖯㸠 䗖⫼ⱘ DŽѢ 䗖⫼ϡ䋳ӏԩ䋷ӏDŽ7. 䌘 Ё 䆄䕑ⱘѻ 䴲䩜 ϛϔ ⦄ 䱰 䫭䇃䖤㸠 Ӯ 㚕 Ҏⱘ⫳ 㒭Ҏԧ ⱘ ǃ㋏㒳 ⾡ 㺙㕂 㗙䖤䕧Ѹ䗮⫼ⱘǃ ⭫ǃ➗⚻ ǃ㟾 ẄǃḌ㛑ǃ⍋ Ё㒻⫼ⱘ ㋏㒳ㄝ㗠䆒䅵 䗴ⱘ ⡍ Ѣ 䋼 䴴 㽕∖ 催ⱘ ㋏㒳ㄝ˄ ⫼Ѣ≑䔺 䴶ⱘѻ ⫼Ѣ≑䔺 䰸 ˅DŽ 㽕⫼ѢϞ䗄ⱘⳂⱘˈ䇋 џ ⱘ㧹Ϯに 䆶DŽ ˈ Ѣ⫼ѢϞ䗄Ⳃⱘ㗠䗴 ⱘ ㄝˈ ὖϡ䋳䋷DŽ8. 䰸Ϟ䗄㄀ 乍 ˈϡ㛑 䌘 Ё䆄䕑ⱘѻ ⫼Ѣҹϟ⫼䗨DŽ ⫼Ѣҹϟ⫼䗨㗠䗴 ⱘ ˈὖϡ䋳䋷DŽ1˅⫳ 㓈 㺙㕂DŽ2˅ỡ ѢҎԧՓ⫼ⱘ㺙㕂DŽ3˅⫼Ѣ⊏⭫˄ 䰸 䚼ǃ㒭㥃ㄝ˅ⱘ㺙㕂DŽ4˅ ҪⳈ Ҏⱘ⫳ ⱘ㺙㕂DŽ9. Փ⫼ 䌘 䆄䕑ⱘѻ ˈ Ѣ 乱 ǃ ԰⬉⑤⬉ ⱘ㣗 ǃ ⛁⡍ ǃ 㺙 ӊ Ҫ ӊ䇋㾘 ⱘ 䆕㣗 Փ⫼DŽ 䍙 њ 㾘 ⱘ 䆕㣗 Փ⫼ ˈ Ѣ⬅ℸ㗠䗴 ⱘ 䱰 ⦄ⱘџ ˈ ϡ ӏԩ䋷ӏDŽ10. ϔⳈ㟈 Ѣ 催ѻ ⱘ䋼䞣 䴴 ˈԚϔ㠀 䇈ˈ ԧѻ Ӯҹϔ ⱘὖ⥛ ⫳ 䱰ǃ 㗙⬅ѢՓ⫼ ӊϡ 㗠 ⦄䫭䇃䖤㸠ㄝDŽЎњ䙓 ⱘѻ ⫳ 䱰 㗙䫭䇃䖤㸠㗠 㟈Ҏ䑿џ ☿♒䗴 ⼒Ӯ ⱘ ˈ 㛑㞾㸠䋳䋷䖯㸠 ԭ䆒䅵ǃ䞛 ⚻ ㄪ 䖯㸠䰆ℶ䫭䇃䖤㸠ㄝⱘ 䆒䅵˄ ⹀ӊ 䕃ӊϸ 䴶ⱘ䆒䅵˅ҹ 㗕 ⧚ㄝˈ䖭 ԰Ў ㋏㒳ⱘ 䆕DŽ⡍ ⠛ ⱘ䕃ӊˈ⬅Ѣ ⣀䖯㸠偠䆕 䲒ˈ ҹ㽕∖ 乒 䗴ⱘ 㒜ⱘ ㋏㒳Ϟ䖯㸠 Ẕ偠 ԰DŽ11. 䌘 䆄䕑ⱘѻ Ң 䕑ԧ䆒 Ϟ ϟˈ 㛑䗴 䇃 ⱘ 䰽DŽ乒 ѻ 㺙乒 ⱘ䆒 Ϟ ˈ䇋乒 㞾㸠䋳䋷 ѻ 䆒㕂Ўϡ 㨑ⱘ 䆒䅵DŽ Ң乒 ⱘ䆒 Ϟ 㨑㗠䗴 џ ˈ ϡ ӏԩ䋷ӏDŽ12. ⱘџ к䴶䅸 ˈϡ 䌘 ⱘϔ䚼 㗙 䚼䕀䕑 㗙 DŽ13. 䳔㽕њ㾷 Ѣ 䌘 ⱘ䆺㒚 ˈ 㗙 Ҫ ⱘ䯂乬ˈ䇋 ⱘ㧹Ϯに 䆶DŽѢ ⫼ 䌘 ⱘ⊼ џ乍⊼ 㗗䆥 ˈ 义 䕑㣅 ⠜“Cautions” ℷ DŽ产品使用时的注意事项此处，对适用于所有单片机产品的“使用注意事项”进行了说明。