NCP1593AMNTWG,NCP1593BMNTWG, 规格书,Datasheet 资料

NCP1593A, NCP1593B1 MHz, 3 A Synchronous Buck RegulatorThe NCP1593 is a fixed 1 MHz, high−output−current, synchronous PWM converter that integrates a low−resistance, high−side P−channel MOSFET and a low−side N−channel MOSFET. The NCP1593 utilizes internally compensated current mode control to provide good transient response, ease of implementation and excellent loop stability. It regulates input voltages from 4.0 V to 5.5 V down to an output voltage as low as 0.6 V and is able to supply up to 3 A of load current.The NCP1593 includes an internally fixed switching frequency (F SW), and an internal soft−start to limit inrush current. Other features include cycle−by−cycle current limiting, 100% duty cycle operation, short− circuit protection, power saving mode and thermal shutdown. Features•Wide Input V oltage Range: from 4.0 V to 5.5 V•Internal 90 m W High−Side P−Channel MOSFET and 60 m W Low−Side N−Channel MOSFET•Fixed 1 MHz Switching Frequency•Cycle−by−Cycle Current Limiting•Hiccup Mode Short−Circuit Protection•Overtemperature Protection•Internal Soft−Start•Start−up with Pre−Biased Output Load •Adjustable Output V oltage Down to 0.6 V •Diode Emulation During Light Load•100% Duty Cycle Operation to Extend the Battery Life •These are Pb−Free DevicesApplications•Set−T op Boxes•DVD Drives and HDD•LCD Monitors and TVs•Cable Modems•USB Modems•Telecom/Networking/Datacom EquipmentDevice Package Shipping†ORDERING INFORMATIONNCP1593AMNTWG DFN10(Pb−Free)3000 / Tape &ReelDFN10CASE 485CMARKINGDIAGRAMS†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.VCCPVCCPVCCANCLXLX(Top View)PIN CONNECTIONSA= Assembly LocationL= Wafer LotY= YearW= Work WeekG= Pb−Free Package1593AALYW GG(Note: Microdot may be in either location)SSPGFBENNCP1593BMNTWGVCCPVCCPVCCALXLXLX(Top View)NCPGFBEN1593BALYW GGDFN10(Pb−Free)3000 / Tape &ReelBLOCK DIAGRAMFigure 1. Block DiagramVCCPLXPGNDVCCENFBPGLXSS PIN DESCRIPTIONSPin No Symbol Description1NC / LX No connect pin for NCP1593A. The user may ground this pin or leave it floating. / LX pin for NCP1593B 2, 3LX The drains of the internal MOSFETs. The output inductor should be connected to these pins.4PG Open drain output from the Power Good logic. When the FB voltage is within regulation, this is a high impedance pin. Otherwise it is pulled low.5EN Logic input to enable the part. Logic high to turn on the part and a logic low to shut off the part. An intern-al pullup forces the part into an enable state when no external bias is present on the pin.6FB Feedback input pin of the Error Amplifier. Connect a resistor divider from the converter’s output voltage to this pin to set the converter’s regulated voltage.7SS / NC An external capacitor on this pin sets the soft −start ramp time. Leaving this pin open sets the soft −start time at 500 m s. For NCP1593B this pin is a no connect and should be left floating.8V CC Input supply pin for internal bias circuitry. Connect a 0.1 m F ceramic bypass capacitor to this pin. Directly connect the V CC pin to the V CCP pin on the board.9, 10V CCP Input for the power stageEPGNDExposed pad of the package provides both electrical contact to the ground and good thermal contact to the PCB. This pad must be soldered to the PCB for proper operation.APPLICATION CIRCUITFigure 2. Recommended Application CircuitV inV outABSOLUTE MAXIMUM RATINGSRatingSymbol Value Unit Power Supply Pin (Pins 8, 9, 10) to GNDV in6.5−0.3 (DC)−1.0 (t < 100 ns)VLX to GND V in + 0.7V in + 1.0 (t < 20 ns)−0.7 (DC)−5.0 (t < 100 ns)VAll other pins 6.0−0.3 (DC)−1.0 (t < 100 ns)VOperating Ambient Temperature Range (Note 1)T A −40 to +85°C Operating Junction Temperature Range (Note 1)T J −40 to +125°C Maximum Junction Temperature T J(MAX)+150°C Storage Temperature RangeT S −55 to +150°C Thermal Resistance Junction −to −Air (Note 2)R q JA68°C/WStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.The maximum package power dissipation limit must not be exceeded.P D +T J(max)*T AR q JA2.R q JA measured on approximately 1x1 inch sq. of 1 oz. Copper FR −4 or G −10 board.ELECTRICAL CHARACTERISTICS (−40°C < T J < 125°C, V CC = 4.0 V − 5.5 V, for min/max values unless noted otherwise) Parameter Symbol Test Conditions Min Typ Max Unit Input Voltage Range V IN 4.0 5.5V V CC UVLO Threshold V UVLO 2.4 2.5 2.6V UVLO Hysteresis V UVLO_hys220mV V CC Quiescent Current I INVCC 1.0 1.5mA VCCP Quiescent Current I INVCCP2050m A Shutdown Supply Current I QSHDN 1.8 3.0m A FEEDBACK VOLTAGEReference Voltage V FB0.5910.60.609V Reference Voltage V FB T J = 25°C0.5940.60.606V Feedback Input Bias Current I FB10100nA Feedback Voltage Line Regulation (Note 3)V CC = 4.0 V to 5.5 V−65dB PWMMaximum Duty Cycle (Regulating) d.c.MAX95% Maximum Duty Cycle (LDO mode) d.c.LDO Vout > d.c.MAX* V IN100% Minimum Controllable On Time t ONmin35ns Current LimitCycle-by-cycle Current Limit (Note 3)I LIM V CC = 5.0 V, T J = 25°C 4.9A OscillatorSwitching Frequency f SW0.87 1.0 1.13MHz MOSFET’sHigh-Side MOSFET On Resistance R DSonH I DS = 100 mA, V IN = 5.0 V90190m W High-Side MOSFET Leakage I lkgH LX = 0 V10m A Low-Side MOSFET On Resistance R DSonL I DS = 100 mA, V IN = 5.0 V6090m W Low-Side MOSFET Leakage I lkgL LX = 5 V10m A POWER GOODPower Good Rising Threshold V PGH0.510.54V Power Good Falling Threshold V PHL0.480.51V Power Good Hysteresis (High-to-Low)V PGhys30mV Power Good Pulldown Voltage V RPG I PG = 2.5 mA130250mV ENABLEEnable High Threshold V ENHI 1.4V Enable Low Threshold V ENLO0.4V Enable Hysteresis V ENhys200mV Enable Pullup Current I EN 1.4 3.0m A Soft-StartDefault Soft-start Ramp Time t SS SS = open; f SW = 1MHz0.50.580.65ms Maximum Soft-start Ramp time t SS SS = max cap; f SW = 1MHz10ms Hiccup Timer 4 * t SS ms Soft-start Current I SS0.510.70.87m A Thermal ShutdownThermal Shutdown Threshold185°C Thermal Shutdown Hysteresis30°C 3.Guaranteed by Characterization.Figure 3. Efficiency vs. Output Current (3.3 V)Figure 4. Efficiency vs. Output Current (1.8 V)I OUT , OUTPUT CURRENT (A)I OUT , OUTPUT CURRENT (A)Figure 5. Efficiency vs. Output Current (1.05 V)Figure 6. Load Regulation (3.3 V)I OUT , OUTPUT CURRENT (A)I OUT , OUTPUT CURRENT (A)Figure 7. Load Regulation (1.8 V)Figure 8. Load Regulation (1.05 V)I OUT , OUTPUT CURRENT (A)I OUT , OUTPUT CURRENT (A)E F F I C I E N C Y (%)E F F I C I E N C Y (%)E F F I C I E N C Y (%)V O U T , O U T P U T V O L T A G E (V )V O U T , O U T P U T V O L T A G E (V )V O U T , O U T P U T V O L T A G E (V )Figure 9. Current Limit vs. TemperatureFigure 10. Current Limit vs. Input VoltageT J , JUNCTION TEMPERATURE (°C)INPUT VOLTAGE (V)5.505.255.004.754.504.254.003.503.754.004.254.755.005.255.50Figure 11. R DS(ON) vs. TemperatureFigure 12. Load Transient ResponseT J , JUNCTION TEMPERATURE (°C)Figure 13. Load Transient Response Figure 14. No Load Switching (1.05 V)P E A K C U R R E N T L I M I T (A )P E A K C U R R E N T L I M I T (A )R D S (O N ) (m W )4.50(VIN = 5 V, VOUT = 1.05 V, IOUT = 0.5 A to 3.0 A)Upper Trace: Output Voltage, 50 mV / div Lower Trace: Output Current, 2 A / divTime = 200 m s/div(VIN = 5 V, VOUT = 1.05 V, IOUT = 0.5 A to 3.0 A)Upper Trace: Output Voltage, 50 mV / div Lower Trace: Output Current, 2 A / divTime = 200 m s/div(VIN = 5 V, VOUT = 1.05 V, IOUT = 0 A)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 100 mA / divTime = 20 m s / divFigure 15. No Load Switching (1.8 V)Figure 16. No Load Switching (3.3 V)Figure 17. DCM Switching (1.05 V)Figure 18. DCM Switching (1.8 V)Figure 19. DCM Switching (3.3 V)Figure 20. CCM Switching (1.8 V)(VIN = 5 V, VOUT = 1.8 V, IOUT = 0 A)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 100 mA / divTime = 10 m s / div (VIN = 5 V, VOUT = 3.3 V, IOUT = 0 A)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 200 mA / divTime = 10 m s / div(VIN = 5 V, VOUT = 1.05 V, IOUT = 100 mA)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 200 mA / divTime = 500 ns / div (VIN = 5 V, VOUT = 1.8 V, IOUT = 150 A)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 200 mA / divTime = 500 ns / div(VIN = 5 V, VOUT = 3.3 V, IOUT = 100 mA)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 200 mA / divTime = 500 ns / div (VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A)Upper Trace: LX Pin Switching Waveforms, 5 V / divMiddle Trace: Output Voltage, 20 mV / div Lower Trace: Inductor Current, 2 A / divTime = 500 ns / divFigure 21. Power On from Input VoltageFigure 22. Power Off from Input VoltageFigure 23. Power On from Enable Figure 24. Power On from Enable CSS = 4.7 nFigure 25. Power Off from Enable Figure 26. Short Circuit Operation(VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A)Upper Trace: Input Voltage, 5 V / divSecond Trace: Power Good Pin Voltage, 5 V / divThird Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 1 ms / div(VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A)Upper Trace: Input Voltage, 5 V / divSecond Trace: Power Good Pin Voltage, 5 V / divThird Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 200 m s / div(VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A, no CSS)Upper Trace: Enable Pin Voltage, 5 V / div Second Trace: Power Good Pin Voltage, 5 V / divThird Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 2 ms / div (VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A, CSS = 4.7 nF)Upper Trace: Enable Pin Voltage, 5 V / div Second Trace: Power Good Pin Voltage, 5 V / divThird Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 2 ms / div(VIN = 5 V, VOUT = 1.8 V, IOUT = 3 A)Upper Trace: Enable Pin Voltage, 5 V / div Second Trace: Power Good Pin Voltage, 5 V / divThird Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 200 m s / div(VIN = 5 V, VOUT = 1.8 V, IOUT = Current Limit, no CSS)Upper Trace: LX Pin Voltage, 5 V / div Middle Trace: Output Voltage, 2 V / div Lower Trace: Inductor Current, 2 A / divTime = 500 m s / divDETAILED DESCRIPTION OverviewThe NCP1593 is a synchronous PWM controller that incorporates all the control and protection circuitry necessary to satisfy a wide range of applications. The NCP1593 employs current mode control to provide fast transient response, simple compensation, and excellent stability. The features of the NCP1593 include a precision reference, fixed 1 MHz switching frequency, a transconductance error amplifier, an integrated high−side P−channel MOSFET and low−side N−Channel MOSFET, internal soft−start, and very low shutdown current. The protection features of the NCP1593 include internal soft−start, pulse−by−pulse current limit, and thermal shutdown.Reference VoltageThe NCP1593 incorporates an internal reference that allows output voltages as low as 0.6 V. The tolerance of the internal reference is guaranteed over the entire operating temperature range of the controller. The reference voltage is trimmed using a test configuration that accounts for error amplifier offset and bias currents.Oscillator FrequencyA fixed precision oscillator is provided. The oscillator frequency range is 1 MHz with $13% variation. Transconductance Error AmplifierThe transconductance error amplifier’s primary function is to regulate the converter’s output voltage using a resistor divider connected from the converter’s output to the FB pin of the controller, as shown in the applications schematic. If a Fault occurs, the amplifier’s output is immediately pulled to GND and PWM switching is inhibited.Soft−StartTo limit the startup inrush current, a soft−start circuit is used to ramp up the reference voltage from 0 V to its final value linearly. This soft−start time is internally set to a typical value of 500 m s, or it can be externally adjusted by adding a capacitor (C SS) from the SS pin to GND. The following formulas show how to set the externally adjustable soft-start time. The maximum allowable C SS is 10 nF.t SS+ǒCSSV FBǓI SS(eq. 1) Where:V FB: Reference voltage, typically 0.6 VI SS: Soft−start current, typically 0.7 m AOutput MOSFETsThe NCP1593 includes low R DS(on), both high−side P−channel and low−side N−channel MOSFETs capable of delivering up to 3.0 A of current. When the controller is disabled or during a Fault condition, the controller’s output stage is tri−stated by turning OFF both the upper and lower MOSFETs.Pulse Width ModulationA high−speed PWM comparator, capable of pulse widths as low as 35 ns, is included in the NCP1593. The inverting input of the comparator is connected to the output of the error amplifier. The non−inverting input is connected to the the current sense signal. At the beginning of each PWM cycle, the CLK signal sets the PWM flip−flop and the upper MOSFET is turned ON. When the current sense signal rises above the error amplifier’s voltage then the comparator will reset the PWM flip−flop and the upper MOSFET will be turned OFF.Current SenseThe NCP1593 monitors the current in the upper MOSFET. The current signal is required by the PWM comparator and the pulse−by−pulse current limiter.PROTECTIONSUndervoltage Lockout (UVLO)The under voltage lockout feature prevents the controller from switching when the input voltage is too low to power the internal power supplies and reference. Hysteresis is incorporated in the UVLO comparator to prevent resistive drops in the wiring or PCB traces from causing ON/OFF cycling of the controller during heavy loading at power up or power down.Overcurrent Protection (OCP)NCP1593 detects high side switch current and then compares to a voltage level representing the overcurrent threshold limit. If the current through the high side FET exceeds the overcurrent threshold limit for seven consecutive switching cycles, overcurrent protection is triggered.Once the overcurrent protection occurs, hiccup mode engages. First, hiccup mode, turns off both FETs and discharges the internal compensation network at the output of the OTA. Next, the IC waits typically 4 x t SS ms and then resets the overcurrent counter. After this reset, the circuit attempts another normal soft−start. Hiccup mode reduces input supply current and power dissipation during a short circuit. It also allows for much improved system up−time, allowing auto−restart upon removal of a temporary short−circuit.Pre−Bias StartupIn some applications the controller will be required to start switching when it’s output capacitors are charged anywhere from slightly above 0 V to just below the regulation voltage. This situation occurs for a number of reasons: the converter’s output capacitors may have residual charge on them or the converter’s output may be held up by a low current standby power supply. NCP1593 supports pre−bias start up by holding off switching off until the soft start ramp reaches the FB Pin voltage.Power GoodPower Good (PG) is an open-drain output that requires a pull−up resistor. It is actively held low in soft−start, standby, and shutdown. PG releases when the FB voltage and thus the output voltage rises above 90% of nominal regulation point. The PG goes low when the FB voltage falls below 85% of the regulation point.Thermal ShutdownThe NCP1593 protects itself from over heating with an internal thermal monitoring circuit. If the junction temperature exceeds the thermal shutdown threshold both the upper and lower MOSFETs will be shut OFF.APPLICATION INFORMATION Programming the Output VoltageThe output voltage is set using a resistive voltage dividerfrom the output voltage to FB pin (see Figure 27). So theoutput voltage is calculated according to Eq.1.V out+V FB@R1)R2R2(eq. 2)Figure 27. Output dividerInductor SelectionThe inductor is the key component in the switching regulator. The selection of inductor involves trade−offs among size, cost and efficiency. The inductor value is selected according to the equation 2.L+V outf@I ripple@ǒ1*V out V in(max)Ǔ(eq. 3)Where V out− the output voltage;f− switching frequency, 1.0 MHz;I ripple− Ripple current, usually it’s 20% − 30% of output current;V in(max)− maximum input voltage.Choose a standard value close to the calculated value to maintain a maximum ripple current within 30% of the maximum load current. If the ripple current exceeds this 30% limit, the next larger value should be selected.The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be about 30% higher. For robust operation in fault conditions (start−up or short circuit), the saturation current should be high enough. To keep the efficiency high, the series resistance (DCR) should be less than 0.1 W, and the core material should be intended for high frequency applications. Output Capacitor SelectionThe output capacitor acts to smooth the dc output voltage and also provides energy storage. So the major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is related to capacitance and the ESR. The minimum capacitance required for a certain output ripple can be calculated by Equation 4.C OUT(min)+I ripple8@f@V ripple(eq. 4)Where V ripple is the allowed output voltage ripple.The required ESR for this amount of ripple can be calculated by equation 5.ESR+V rippleI ripple(eq. 5) Based on Equation 3 to choose capacitor and check its ESR according to Equation 4. If ESR exceeds the value from Eq.4, multiple capacitors should be used in parallel. Ceramic capacitor can be used in most of the applications. In addition, both surface mount tantalum and through−hole aluminum electrolytic capacitors can be used as well. Input Capacitor SelectionThe input capacitor can be calculated by Equation 6.C in(min)+I out(max)@D max@1f@V in(ripple)(eq. 6) Where V in(ripple) is the required input ripple voltage.D max+V outV in(min)is the maximum duty cycle.(eq. 7)Power DissipationThe NCP1593 is available in a thermally enhanced 10−pin, DFN package. When the die temperature reaches +185°C, the NCP1593 shuts down (see the Thermal−Overload Protection section). The power dissipated in the device is the sum of the power dissipated from supply current (PQ), power dissipated due to switching the internal power MOSFET (P SW), and the power dissipated due to the RMS current through the internal power MOSFET (PON). The total power dissipated in the package must be limited so the junction temperature does not exceed its absolute maximum rating of +150°C at maximum ambient temperature. Calculate the power lost in the NCP1593 using the following equations:1.High side MOSFETThe conduction loss in the top switch is:P HSON+I2RMS_HSFET R DS(on)HS(eq. 8) Where:I RMS_FET+ǒI out2)D I PP212ǓDǸ(eq. 9)D I PP is the peak−to−peak inductor current ripple.The power lost due to switching the internal power high side MOSFET is:P HSSW +V in @I out @ǒt r )t f Ǔ@f SW2(eq. 10)t r and t f are the rise and fall times of the internal power MOSFET measured at SW node. Typical rise times are 4 ns (rising) and 2 ns (falling).2.Low side MOSFETThe power dissipated in the top switch is:P LSON +I RMS_LSFET 2@R DS(on)LS(eq. 11)Where:I RMS_LSFET +ǒI out2)D I PP 212Ǔ@(1*D )Ǹ(eq. 12)D I PP is the peak −to −peak inductor current ripple.The switching loss for the low side MOSFET can be ignored.The power lost due to the quiescent current (I Q ) of the device is:P Q +V in @I Q(eq. 13)I Q is the switching quiescent current of the NCP1593.P TOTAL +P HSON )P HSSW )P LSON )P Q(eq. 14)Calculate the temperature rise of the die using the following equation:T J +T C )ǒP TOTAL @q JA Ǔ(eq. 15)q JC is the junction −to −case thermal resistance equal to 68°C/W. T A is the ambient temperature and TJ is the junction temperature, or die temperature. Solder the underside −exposed pad to a large copper GND plane. If thedie temperature reaches the thermal shutdown threshold the NCP1593 shut down and does not restart again until the die temperature cools by 30°C.Layout ConsiderationAs with all high frequency switchers, when considering layout, care must be taken in order to achieve optimal electrical, thermal and noise performance. For 1.0MHz switching frequency, switch rise and fall times are typically in few nanosecond range. To prevent noise both radiated and conducted the high speed switching current path must be kept as short as possible. Shortening the current path will also reduce the parasitic trace inductance of approximately 25 nH/inch. At switch off, this parasitic inductance produces a flyback spike across the NCP1593 switch. When operating at higher currents and input voltages, with poor layout, this spike can generate voltages across the NCP1593that may exceed its absolute maximum rating. A ground plane should always be used under the switcher circuitry to prevent interplane coupling and overall noise.The FB component should be kept as far away as possible from the switch node. The ground for these components should be separated from the switch current path. Failure to do so will result in poor stability or subharmonic like oscillation.Board layout also has a significant effect on thermal resistance. Reducing the thermal resistance from ground pin and exposed pad onto the board will reduce die temperature and increase the power capability of the NCP1593. This is achieved by providing as much copper area as possible around the exposed pad. Adding multiple thermal vias under and around this pad to an internal ground plane will also help. Similar treatment to the inductor pads will reduce any additional heating effects.PACKAGE DIMENSIONSDFN10 3x3, 0.5PCASE 485C−01ISSUE B ArrayDIMENSIONS: MILLIMETERS*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

EVBUM2776/DNCP1568D PoE Input USB-PD Evaluation Board User's ManualCircuit DescriptionThis evaluation board manual describes a 45 W universal input 5 V, 9V, 15 V and 20 V output evaluation board for Power over Ethernet to USB−PD applications. This featured power supply is an active−clamp flyback topology utilizingON Semiconductor’s NCP1568D PWM controller, NCP51530 HB Driver, NCP4308 SR Controller and FUSB3307 USB−PD Controller. This design note provides complete circuit schematic, PCB, BOM and transformer information of the evaluation board. It also provide efficiency, transient response, output ripple and thermal data of the evaluation board.This design utilized NCP1568 and NCP51530 for the active clamp flyback topology. Active clamp flyback topology effectively recycles the leakage energy. Another feature of this topology is the ZVS operation of the power MOSFETS. Because of no leakage losses and ZVS operation, this topology is suited for high frequency operation which results in size reduction of the transformer. Hence Active clamp flyback topology is well suited for high power density sub 100 W power supplies.NCP1568D is a highly integrated DC−DC PWM controller designed to implement an active clamp flyback topology. It features adaptive frequency scheme which optimizes frequency of operation and hence the efficiency over all load and input voltages. The NCP1568 features a HV startup circuit.NCP51530 is a 700 V high side and low side driver with 2 A current drive capability for DC−DC power supplies and inverters. NCP51530 offers best in class propagation delay, low quiescent current and low switching current at high frequencies of operation. This device is tailored for highly efficient power supplies operating at high frequencies. NCP4308 is high performance driver tailored to control a synchronous rectification MOSFET in switch mode power supplies.FUSB3307 is a fully compliant, highly integrated USB Power Delivery (PD) power source controller that can control a DC−DC port power regulator or the opto−coupler in the secondary side of an AC−DC adapter.Key Features•PoE Compatible DC−DC Input V oltages (37 V – 57 V)•High Full Load and Average Efficiency•Low Standby Power•Very Low Ripple and Noise•High Frequency Operation up to 400 kHz •Thermal and OVP Protection•Adaptive Frequency Operation based on Input and Output Load Conditions•Adaptive ZVS Operation•Inherent SCP and OCP Protection•Board Dimensions: 2.23” x 1.34” x 0.58”SpecificationsOutput Voltage5, 9, 12, 15, 20 VRipple< 2%Nominal Current 3 A / 2.25 A @ 20 VMax Current 3 A / 2.25 A @ 20 VMin Current ZeroDeviceApplication Input Voltage Output Power Topology I/O IsolationNCP1568D NCP51530 NCP4308D FUSB3307 FDMS86255 FDMS86101PoE to USB−PDAdapter37 Vdc − 57 Vdc45 W Active ClampFlybackIsolatedEVAL BOARD USER’S MANUALFigure 1. Top View of the Evaluation BoardFigure 2. Full View of the Evaluation BoardFigure 3. View of the Daughter CardMAIN BOARD LAYOUTFigure 4. Main Board Top LayerFigure 5. Main Board Inner Layer 1Figure 6. Main Board Inner Layer 2Figure 7. Main Board Bottom LayerDAUGHTER BOARD LAYOUTFigure 8. Daughter Card Top LayerFigure 9. Daughter Card Inner Layer 1Figure 10. Daughter Card Inner Layer 2Figure 11. Daughter Card Bottom LayerMAIN BOARD SCHEMATICFigure 12. Main Board SchematicDAUGHTER BOARD SCHEMATICFigure 13. Daughter Card SchematicMAGNETIC DESIGNFigure 14. Transformer Design (Core: Hitachi ML29D)Evaluation Board Efficiency DataFigure 15. 20 V Efficiency Plot60%65%70%75%80%85%90%95%100%00.250.50.7511.251.51.7522.25E f f i c i e n c y (%)Output Current (A)20 V Output Efficiency vs. Load37 V 48 V57 VFigure 16. 15 V Efficiency Plot60%65%70%75%80%85%90%95%100%00.511.522.53E f f i c i e n c y (%)Output Current (A)15 V Output Efficiency vs. Load37 V 48 V57 VFigure 17. 12 V Efficiency Plot60%65%70%75%80%85%90%95%100%00.511.522.53E f f i c i e n c y (%)Output Current (A)12 V Output Efficiency vs. Load37 V 48 V57 VFigure 18. 9 V Efficiency Plot60%65%70%75%80%85%90%95%100%00.511.522.53E f f i c i e n c y (%)Output Current (A)9 V Output Efficiency vs. Load37 V 48 V57 VFigure 19. 5 V Efficiency Plot60%65%70%75%80%85%90%95%100%00.51 1.52 2.53E f f i c i e n c y (%)Output Current (A)5 V Output Efficiency vs. Load 37 V 48 V57 VOUTPUT RIPPLEFigure 20. 37 Vin 5 Vout Output RippleFigure 21. 48 Vin 5 Vout Output RippleFigure 22. 57 Vin 5 Vout Output RippleFigure 23. 37 Vin 9 Vout Output RippleFigure 24. 48 Vin 9 Vout Output RippleFigure 25. 57 Vin 9 Vout Output RippleFigure 26. 37 Vin 12 Vout Output RippleFigure 27. 48 Vin 12 Vout Output RippleFigure 28. 57 Vin 12 Vout Output RippleFigure 29. 37 Vin 15 Vout Output RippleFigure 30. 48 Vin 15 Vout Output RippleFigure 31. 57 Vin 15 Vout Output RippleFigure 32. 37 Vin 20 Vout Output RippleFigure 33. 48 Vin 20 Vout Output RippleFigure 34. 57 Vin 20 Vout Output RippleTransient Response(0.1 A − 3A / 2.25 A, 150 mA/m s, 20 ms)Figure 35. 37 Vin 5 Vout Transient ResponseFigure 36. 48 Vin 5 Vout Transient ResponseFigure 37. 57 Vin 5 Vout Transient ResponseFigure 38. 37 Vin 9 Vout Transient ResponseFigure 39. 48 Vin 9 Vout Transient ResponseFigure 40. 57 Vin 9 Vout Transient ResponseFigure 41. 37 Vin 12 Vout Transient ResponseFigure 42. 48 Vin 12 Vout Transient ResponseFigure 43. 57 Vin 12 Vout Transient ResponseFigure 44. 37 Vin 15 Vout Transient ResponseFigure 45. 48 Vin 15 Vout Transient ResponseFigure 46. 57 Vin 15 Vout Transient ResponseFigure 47. 37 Vin 20 Vout Transient ResponseFigure 48. 48 Vin 20 Vout Transient ResponseFigure 49. 57 Vin 20 Vout Transient ResponseThermal DataAll Temperatures shown in °CelsiusFigure 50. 37 Vin 15 Vout Full Load Top SRFET 64.10Figure 51. 37 Vin 15 Vout Full Load Bottom TransformerWindingLFET HFET NCP1568NCP51530NCP430873.8378.1452.356.4847.0247.6556.74Figure 52. 48 Vin 15 Vout Full Load TopSRFET 66.17Figure 53. 48 Vin 15 Vout Full Load Bottom Transformer Winding LFET HFET NCP1568NCP51530NCP430877.3380.7155.2659.3551.5752.4258.95Figure 54. 57 Vin 15 Vout Full Load TopSRFET 66.92Figure 55. 57 Vin 15 Vout Full Load Bottom Transformer Winding LFET HFET NCP1568NCP51530NCP430879.9582.8457.8861.5854.0455.6960.25Figure 56. 37 Vin 20 Vout Full Load TopSRFET 62.38Figure 57. 37 Vin 20 Vout Full Load Bottom Transformer Winding LFET HFET NCP1568NCP51530NCP430875.1578.2354.7257.9651.8551.9658.93Figure 58. 48 Vin 20 Vout Full Load TopSRFET 64.47Figure 59. 48 Vin 20 Vout Full Load BottomTransformer Winding LFET HFET NCP1568NCP51530NCP430879.4781.856.2860.4453.9554.3261.87Figure 60. 57 Vin 20 Vout Full Load TopSRFET 66.49Transformer Winding LFET HFET NCP1568NCP51530NCP430883.1284.6557.7461.9455.6156.1964.02Figure 61. 57 Vin 20 Vout Full Load BottomTable 1. BILL OF MATERIALS MAIN BOARDQty Reference Manufacturer Manufacturer Part Number VoltageRating Value Footprint1Q4ON Semiconductor2N700260 V SOT−231C19Wurth Electronik88501220609550 V0.1 m F6033C21 C26 C39TDK CGA3E3X5R1H105K080AB50 V 1.0 m F6032C24 C34Wurth Electronik88501220609550 V120 nF6031C27Wurth Electronik88501200605850 V120 pF6031C23Wurth Electronik88501200602916 V 1 nF6031C28Wurth Electronik88501220608550 V 2.2 nF6031C12Wurth Electronik885342006005250 V470 pF6032C1 C17Wurth Electronik88501200602116 V47 pF6031C29DNI6032C37 C40−41Wurth Electronik88501220710350 V 1 m F8051C38Taiyo Yuden GMK325BJ226MM−P22 m F12067C2−8Murata GRM31CC72A475KE11L100 V 4.7 m F12061C9Murata GRM31CC72A475KE11L DNI12061C16STD100 pF12103C10−11 C15Taiyo Yuden GMK325BJ226MM−P22 m F12061C20Wurth Electronik8853622100091470 pF18081C30Wurth Electronik86002067301450 V68 m F(6.3)mm2C13 C14Kemet A750MS477M1EAAE015470 m F TH−10x5mm 3J19 J30−31NA NA NA2X3mm6D7−8 D10−12D14ON Semiconductor MMSD4148T3G100 V SOD−1231D2Vishay VS−1EQH02−M3/H200 V DO−219AD5D1 D3 D5−6D15ON Semiconductor MBR053030 V SOD−1231D4ON Semiconductor MMSZ5250BT1G20 V SOD 1231D9ON Semiconductor MM3Z16VT1G16 V SOD−3231D13ON Semiconductor 6.8 V SOD−3231U1CEL FODM8801BV80 V 1.17 V 50 mA4−SMD, GullWing1T2Wurth Electronik7.5E+0816uH HitachiML29D CoreRM6 12pin3L1−3SHORT1U3ON Semiconductor NCP1568C30 V 1 MHz TSSOP−16_SPECIAL1U2ON Semiconductor NCP4308DMNTWG DFN8−TPAD 1U6ON Semiconductor NCP51530AMNTWG NCP51530AMNTWGDGN−10 W/PAD 2Q1 Q3ON Semiconductor FDMS86255150 V PWR561Q2ON Semiconductor FDMS86101100 V PWR562R9 R26Vishay CRCW06030000Z0BC06032R12 R20Vishay CRCW06030000Z0BC06032R7 R11Vishay CRCW06031R00JNEA16031R23Vishay CRCW060310R0JNEA106031R3Vishay CRCW0603100RFKEA1006031R18Vishay CRCW0603100KFKEA100k603Table 1. BILL OF MATERIALS MAIN BOARD (continued)Qty Footprint Value Voltage RatingManufacturer Part Number ManufacturerReference 1R13Vishay CRCW060310K0JNEA 10k 6031R2Vishay CRCW060311R0FKEA 11R06031R21Yageo RC0603FR−0715RL 156031R37Vishay CRCW060316K2FKEA 16.2k 6031R15Yageo RT0603FRE071KL 1k 6031R29Vishay CRCW06032K00FKEA 2.00k 6031R42Vishay CRCW06032M49FKEA 2.49M 6032R16−17Vishay CRCW06032K49FKEAC 2.49k 6031R30Vishay CRCW060320R0FKEA 206031R24Panasonic ERJ−3EKF4532V 30.9k 6031R1Vishay CRCW0603324RFKEA 324R 6031R27Vishay CRCW060338K3FKEA 38.3k 6031R38Yageo RC0603FR−074K99L 4.99k 6031R8Vishay CRCW060343R0JNEA 436031R19Vishay CRCW060344K2FKEA 44.2k 6031R41Vishay CRCW0603475KFKEA 475k 6032R10 R22Vishay CRCW060347K0JNEA47k 6033R31−32 R40Vishay??4R996031R33DNI 6031R39VishayCRCW06031R00JNEADNI 6032R34−35DNI 6032R25 R28????DNI 6032R6 R14Vishay CRCW1206100RJNEA10012061R4Vishay 20k 12061R5Vishay DNI 12061T1Wurth7.5E+081:100SMD−8.4x7.2mmTable 2. BILL OF MATERIALS DAUGHTER CARDQty Reference Manufacturer Manufacturer Part Number Voltage Rating Value Footprint 1C46Kemet C0402C681G5GACTU25 V680 pF402 1C425 V DNI402 2C37 C44TDK CGA2B2X7R1H472K050BE50 V 4.7 nF402 1C30Samsung CL10A105KL8NNNC35 V 1.0 m F603 1R32Vishay CRCW040210R0FKED10R402 1R21Vishay CRCW0402120KJNED120k402 1R34Vishay CRCW040213K0JNED13k402 2R40 R42Vishay CRCW040210R0FKED10R402 1R39Yageo RC0402FR−07100KL100k402 1R53Yageo RC0402FR−07100KL100k402 1R25Vishay CRCW040210K0FKEDC10k402 1R35Vishay CRCW040282K5FKEDC82.5k402 1R47Vishay CRCW04021K00FKTD1k402 3J2 J4 J6NA NA NA2x3 mm 1U1ON Semiconductor FUSB3307QFNW20 1C48Yageo CC0402JRX7R9BB10250 V 1 nF402 2C34−35Murata GRM1555C1H391JA01J50 V390 pF402 1Q3ON Semiconductor FDMC012N03Power33 1R31Yageo AC0805FR−0740R2L40R2805 4D1−2 D6 D10ON Semiconductor NSPU3051N2T5G7V X2DFN2 1C21AVX0603DD105KAT2A35 V 1 m F603 1CON1Wurth632723300011NA THT/SM 1R26Visahy WSLP12065L000FEA 5 m W1206ADDITIONAL INFORMATIONTECHNICAL PUBLICATIONS :Technical Library: /design/resources/technical−documentation onsemi Website: ONLINE SUPPORT : /supportFor additional information, please contact your local Sales Representative at /support/sales。

NCP4303A, NCP4303B
Secondary Side Synchronous Rectification Driver for High Efficiency SMPS Topologies
The NCP4303A/B is a full featured controller and driver tailored to control synchronous rectification circuitry in switch mode power supplies. Thanks to its versatility, it can be used in various topologies such as flyback, forward and Half Bridge Resonant LLC.
(NOTE: For DFN the exposed pad must be either unconnected or preferably connected to ground. The GND pin must be always connected to ground.)
ORDERING INFORMATION
Y
= Year
W
= Work Week
G
= Pb−Free Package
(*Note: Microdot may be in either location)
PINOUT INFORMATION
VCC Min_Toff Min_Ton
Trig/Disable
18 27
36 45
DRV GND COMP CS
This pin detects if the current flows through the SR MOSFET and/or its body diode. Basic turn off detection threshold is 0 mV. A resistor in series with this pin can modify the turn off threshold if needed.

NCP551SN27T1G NCP551SN28T1G NCV551SN36T1GNCP551, NCV551Voltage Regulator - CMOS,Low Iq, Low-Dropout150 mAThe NCP551 series of fixed output low dropout linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. The NCP551series features an ultra −low quiescent current of 4.0 m A. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits.The NCP551 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 0.1 m F. The device is housed in the TSOP −5 surface mount package. Standard voltage versions are 1.4, 1.5, 1.8, 2.5, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3,3.6, 3.8 and 5.0 V . Other voltages are available in 100 mV steps.Features•Low Quiescent Current of 4.0 m A Typical •Maximum Operating V oltage of 12 V •Low Output V oltage Option•High Accuracy Output V oltage of 2.0%•Industrial Temperature Range of −40°C to 85°C (NCV551, T A = −40°C to +125°C)•NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC −Q100Qualified and PPAP Capable•These Devices are Pb −Free and are RoHS CompliantTypical Applications•Battery Powered Instruments •Hand −Held Instruments •Camcorders and CamerasFigure 1. Representative Block DiagramV inV outEnable OFFON See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.ORDERING INFORMATIONTSOP −5(SOT23−5, SC59−5)SN SUFFIX CASE 483PIN CONNECTIONS AND MARKING DIAGRAM13N/CVin 2GND Enable4V out5(Top View)xxxAYW G G xxx = Specific Device Code A = Assembly Location Y = YearW = Work Week G = Pb −Free Package(Note: Microdot may be in either location)PIN FUNCTION DESCRIPTIONPin No.Pin Name Description1V in Positive power supply input voltage.2GND Power supply ground.3Enable This input is used to place the device into low−power standby. When this input is pulled low, thedevice is disabled. If this function is not used, Enable should be connected to V in.4N/C No Internal Connection.5V out Regulated output voltage.MAXIMUM RATINGSRating Symbol Value Unit Input Voltage V in0 to 12V Enable Voltage V EN−0.3 to V in+0.3V Output Voltage V out−0.3 to V in+0.3V Power Dissipation P D Internally Limited W Operating Junction Temperature T J+150°COperating Ambient Temperature NCP551NCV551T A−40 to +85−40 to +125°CStorage Temperature T stg−55 to +150°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be affected.1.This device series contains ESD protection and exceeds the following tests:Human Body Model 2000 V per MIL−STD−883, Method 3015Machine Model Method 200 VCharge Device Model (CDM) tested C3B per EIA/JESD22−C101.tchup capability (85°C) "100 mA DC with trigger voltage.THERMAL CHARACTERISTICSRating Symbol Test Conditions Typical Value Unit Junction−to−Ambient R q JA 1 oz Copper Thickness, 100 mm2250°C/W PSIJ−Lead 2Y J−L2 1 oz Copper Thickness, 100 mm268°C/W NOTE:Single component mounted on an 80 x 80 x 1.5 mm FR4 PCB with stated copper head spreading area. Using the following boundary conditions as stated in EIA/JESD 51−1, 2, 3, 7, 12.ELECTRICAL CHARACTERISTICS(V in = V out(nom.) + 1.0 V, V EN = V in, C in = 1.0 m F, C out = 1.0 m F, T A = 25°C, unless otherwise noted.)Characteristic Symbol Min Typ Max UnitOutput Voltage (T A = 25°C, I out = 10 mA) 1.4 V1.5 V1.8 V2.5 V2.7 V2.8 V2.9 V3.0 V3.1 V3.2 V3.3 V3.6 V3.8 V5.0 V V out1.3581.4551.7462.4252.6462.7442.8422.9403.0383.1363.2343.5283.7244.901.41.51.82.52.72.82.93.03.13.23.33.63.85.01.4421.5451.8542.5752.7542.8562.9583.0603.1623.2643.3663.6723.8765.10VOutput Voltage (T A = T low to T high, I out = 10 mA) 1.4 V1.5 V1.8 V2.5 V2.7 V2.8 V2.9 V3.0 V3.1 V3.2 V3.3 V3.6 V3.8 V5.0 V V out1.3441.4401.7282.4002.6192.7162.8132.9103.0073.1043.2013.4923.6864.8501.41.51.82.52.72.82.93.03.13.23.33.63.85.01.4561.5601.8722.6002.7812.8842.9873.0903.1933.2963.3993.7083.9145.150VLine Regulation (V in = V out + 1.0 V to 12 V, I out = 10 mA)Reg line−1030mV Load Regulation (I out = 10 mA to 150 mA, V in = V out + 2.0 V)Reg load−4065mVOutput Current (V out = (V out at I out = 100 mA) −3%)1.4 V−2.0 V (V in = 4.0 V)2.1 V−3.0 V (V in = 5.0 V)3.1 V−4.0 V (V in = 6.0 V)4.1 V−5.0 V (V in = 8.0 V)I o(nom.)150150150150−−−−−−−−mADropout Voltage (I out = 10 mA, Measured at V out−3.0%)1.4 V1.5 V, 1.8 V,2.5 V2.7 V, 2.8 V, 2.9 V,3.0 V, 3.1 V, 3.2 V, 3.3 V, 3.6 V, 3.8 V, 5.0 V V in−V out−−−17013040250220150mVQuiescent Current(Enable Input = 0 V)(Enable Input = V in, I out = 1.0 mA to I o(nom.))1.4 V−2.0 V options, V in = 4.0 V2.1 V−3.0 V options, V in = 5.0 V3.1 V−4.0 V options, V in = 6.0 V4.1 V−5.0 V options, V in = 8.0 V I Q−−0.14.01.08.0m AOutput Voltage Temperature Coefficient T c−"100−ppm/°CEnable Input Threshold Voltage(Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low)V th(en)1.3−−−−0.3VELECTRICAL CHARACTERISTICS (continued)(V in = V out(nom.) + 1.0 V, V EN = V in , C in = 1.0 m F, C out = 1.0 m F, T A = 25°C, unless otherwise noted.)Output Short Circuit Current (V out = 0 V)1.4 V −2.0 V (V in = 4.0 V)2.1 V −3.0 V (V in = 5.0 V)3.1 V −4.0 V (V in = 6.0 V)4.1 V −5.0 V (V in = 8.0 V)I out(max)160160160160350350350350600600600600mA3.Maximum package power dissipation limits must be observed.PD +T J(max)*T A R q JA4.Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.5.NCP551T low = −40°CT high = +85°C NCV551T low = −40°CT high = +125°C.DEFINITIONSLoad RegulationThe change in output voltage for a change in output current at a constant temperature.Dropout VoltageThe input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 3% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Maximum Power DissipationThe maximum total dissipation for which the regulator will operate within its specifications.Quiescent CurrentThe quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current.Line RegulationThe change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected.Line Transient ResponseTypical over and undershoot response when input voltage is excited with a given slope.Thermal ProtectionInternal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating.Maximum Package Power DissipationThe maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current.3.25G R O U N D C U R R E N T (m A )3.05Figure 2. Ground Pin Current versusOutput Current 3.35I out , OUTPUT CURRENT (mA)3.33.13.23.15Figure 3. Ground Pin Current versusOutput Current3.35G R O U N D C U R R E N T (m A )3.153.45I out , OUTPUT CURRENT (mA)3.43.23.33.250.50Figure4. Ground Pin Current versusInput Voltage V in , INPUT VOLTAGE (VOLTS)Figure 5. Ground Pin Current versusInput VoltageG R OU N D P I N C U R R E N T (m A )11.522.533.540.50V in , INPUT VOLTAGE (VOLTS)G R OU N D P I N C U R R E N T (m A )11.522.533.5440004−200200−60064200TIME (m s)Figure 6. Line Transient Response Figure 7. Line Transient Response8TIME (m s)−20004006−400−400O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )4−−4200TIME (m s)Figure 8. Line Transient Response Figure 9. Line Transient ResponseTIME (m s)−20004006−−400O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )−600−−4200Figure 10. Line Transient Response Figure 11. Line Transient ResponseTIME (m s)−20004006−−400O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )O U T P U T V O L T A G E D E V I A T I O N (m V )V i n , I N P U T V O L T A G E (V )−600600800TIME (m s)150O U T P U T V O L T A G E D E V I A T I O N (m V )−1000TIME (ms)Figure 12. Load Transient Response ON Figure 13. Load Transient Response OFFTIME (ms)−50000I o u t , O U T P U T C U R R E N T (m A )−O U T P U T V O L T A G E D E V I A T I O N (m V )I o u t , O U T P U T C U R R E N T (m A )Figure 14. Load Transient Response OFF TIME (ms)Figure 15. Load Transient Response ONTIME (ms)150−5005000−−01000O U T P U T V O L T A G E D E V I A T I O N (m V )I o u t , O U T P U T C U R R E N T (m A )O U T P U T V O L T A G E D E V I A T I O N (m V )I o u t , O U T P U T C U R R E N T (m A )12Figure 16. Turn −On Response 3TIME (m s)0132V o u t , O U T P U T V O L T A G E (V )E N A B L E V O L T A G E (V )Figure 17. Turn−On ResponseTIME (m s)V o u t , O U T P U T V O L T A G E (V )E N A B L E V O L T A G E(V )Figure 18. Output Voltage versus Input Voltage Figure 19. Output Voltage versus Input Voltage2V o u t , O U T P U T V O L T A G E (V O L T S )3V in , INPUT VOLTAGE (VOLTS)2.50.51.51V o u t , O U T P U T V O L T A G E (V O L T S )V in , INPUT VOLTAGE (VOLTS)APPLICATIONS INFORMATIONA typical application circuit for the NCP551 series is shown in Figure 20.Input Decoupling (C1)A 0.1 m F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP551package. Higher values and lower ESR will improve the overall line transient response.Output Decoupling (C2)The NCP551 is a stable Regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m W up to 3.0 W can thus safely be used.The minimum decoupling value is 0.1 m F and can be augmented to fulfill stringent load transient requirements.The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response.Enable OperationThe enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to V in .HintsPlease be sure the V in and GND lines are sufficiently wide.When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction.Set external components, especially the output capacitor,as close as possible to the circuit, and make leads as short as possible.ThermalAs power across the NCP551 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature effect the rate of temperature rise for the part.This is stating that when the NCP551 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications.The maximum dissipation the package can handle is given by:PD +T J(max)*T AR q JAIf junction temperature is not allowed above the maximum 125°C, then the NCP551 can dissipate up to 400 mW @ 25°C.The power dissipated by the NCP551 can be calculated from the following equation:P tot +ƪV in *I gnd (I out )ƫ)[V in *V out ]*I outorV inMAX +P tot)V out *I outI GND )I outIf a 150 mA output current is needed then the ground current from the data sheet is 4.0 m A. For an NCP551SN30T1 (3.0 V), the maximum input voltage will then be 5.6 V .Battery or Unregulated VoltageFigure 20. Typical Application CircuitOFFONm FFigure 21. Current Boost RegulatorFigure 22. Current Boost Regulator withShort Circuit LimitFigure 23. Delayed Turn −onFigure 24. Input Voltages Greater than 12 VThe NCP551 series can be current boosted with a PNP transist-or. Resistor R in conjunction with V BE of the PNP determines when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by V BE of the pass resistor.Short circuit current limit is essentially set by the V BE of Q2 and R1. I SC = ((V BEQ2 − ib * R2) / R1) + I O(max) RegulatorIf a delayed turn −on is needed during power up of several volt-ages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn −on of the bottom regulator.A regulated output can be achieved with input voltages that exceed the 12 V maximum rating of the NCP551 series with the addition of a simple pre −regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (V out ) is shorted to GND .ORDERING INFORMATIONDeviceNominalOutput Voltage Marking Package Shipping†NCP551SN15T1G 1.5LAO TSOP−5(Pb−Free)3000 / Tape & Reel NCP551SN18T1G 1.8LAP TSOP−5(Pb−Free)3000 / Tape & Reel NCP551SN25T1G 2.5LAQ TSOP−5(Pb−Free)3000 / Tape & Reel NCP551SN27T1G 2.7LAR TSOP−5(Pb−Free)3000 / Tape & Reel NCP551SN28T1G 2.8LAS TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN29T1G 2.9LJL TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN30T1G 3.0LAT TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN31T1G 3.1LJM TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN32T1G 3.2LIV TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN33T1G 3.3LAU TSOP−5(Pb−Free)3000 / Tape & ReelNCP551SN50T1G 5.0LAV TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN14T1G* 1.4AAT TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN15T1G* 1.5LFZ TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN18T1G* 1.8LGA TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN25T1G* 2.5LGB TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN27T1G* 2.7LGC TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN28T1G* 2.8LGD TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN30T1G* 3.0LGE TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN31T1G* 3.1LJR TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN32T1G* 3.2LFR TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN33T1G* 3.3LGG TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN36T1G* 3.6AEJ TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN38T1G* 3.8AD5TSOP−5(Pb−Free)3000 / Tape & ReelNCV551SN50T1G* 5.0LGF TSOP−5(Pb−Free)3000 / Tape & ReelNOTE:Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specific-ations Brochure, BRD8011/D.*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.PACKAGE DIMENSIONSTSOP −5SN SUFFIX CASE 483−02ISSUE KNOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.4.DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLDFLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A.5.OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION.TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2FROM BODY .DIM MIN MAX MILLIMETERS A 3.00 BSC B 1.50 BSC C 0.90 1.10D 0.250.50G 0.95 BSC H 0.010.10J 0.100.26K 0.200.60M 0 10 S2.503.00__ǒmm inchesǓ*For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*2XDETAIL ZTOP VIEWON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent −Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATIONNCP551SN27T1G NCP551SN28T1G NCV551SN36T1G。